Avoid SeqCst or static mut in mach_timebase_info cache
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ccea570488
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@ -117,8 +117,7 @@ impl Hash for Timespec {
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#[cfg(any(target_os = "macos", target_os = "ios"))]
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mod inner {
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use crate::fmt;
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use crate::mem;
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use crate::sync::atomic::{AtomicUsize, Ordering::SeqCst};
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use crate::sync::atomic::{AtomicBool, AtomicU64, Ordering};
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use crate::sys::cvt;
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use crate::sys_common::mul_div_u64;
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use crate::time::Duration;
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@ -233,31 +232,46 @@ mod inner {
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}
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fn info() -> mach_timebase_info {
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static mut INFO: mach_timebase_info = mach_timebase_info { numer: 0, denom: 0 };
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static STATE: AtomicUsize = AtomicUsize::new(0);
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static INITIALIZED: AtomicBool = AtomicBool::new(false);
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static INFO_BITS: AtomicU64 = AtomicU64::new(0);
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unsafe {
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// If a previous thread has filled in this global state, use that.
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if STATE.load(SeqCst) == 2 {
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return INFO;
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}
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// ... otherwise learn for ourselves ...
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let mut info = mem::zeroed();
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extern "C" {
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fn mach_timebase_info(info: mach_timebase_info_t) -> kern_return_t;
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}
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mach_timebase_info(&mut info);
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// ... and attempt to be the one thread that stores it globally for
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// all other threads
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if STATE.compare_exchange(0, 1, SeqCst, SeqCst).is_ok() {
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INFO = info;
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STATE.store(2, SeqCst);
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}
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return info;
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// If a previous thread has filled in this global INITIALIZED, use that.
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if INITIALIZED.load(Ordering::Acquire) {
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// The Acquire/Release pair used for INITIALIZED ensures that this
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// load can see the corresponding `INFO_BITS` store, despite them
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// both being Relaxed.
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return info_from_bits(INFO_BITS.load(Ordering::Relaxed));
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}
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// ... otherwise learn for ourselves ...
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extern "C" {
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fn mach_timebase_info(info: mach_timebase_info_t) -> kern_return_t;
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}
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let mut info = info_from_bits(0);
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unsafe {
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mach_timebase_info(&mut info);
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}
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// Note: This is racy, but the race is against other threads trying to
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// write the same value.
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INFO_BITS.store(info_to_bits(info), Ordering::Relaxed);
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// The `Release` here "publishes" the store of `INFO_BITS` to other
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// threads (which do a `INITIALIZED.load(Acquire)`) despite it being
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// read/written w/ `Relaxed`.
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INITIALIZED.store(true, Ordering::Release);
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info
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}
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#[inline]
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fn info_to_bits(info: mach_timebase_info) -> u64 {
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((info.denom as u64) << 32) | (info.numer as u64)
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}
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#[inline]
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fn info_from_bits(bits: u64) -> mach_timebase_info {
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mach_timebase_info { numer: bits as u32, denom: (bits >> 32) as u32 }
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}
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}
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