mirror of https://github.com/NekoX-Dev/NekoX.git
203 lines
6.5 KiB
ArmAsm
203 lines
6.5 KiB
ArmAsm
/*!
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* \copy
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* Copyright (c) 2013, Cisco Systems
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* * Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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*
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* * Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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*/
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#ifdef HAVE_NEON_AARCH64
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#include "arm_arch64_common_macro.S"
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.macro LOAD_ALIGNED_DATA_WITH_STRIDE arg0, arg1, arg2, arg3, arg4, arg5
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// { // input: $0~$3, src*, src_stride
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ld1 {\arg0\().d}[0], [\arg4], \arg5
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ld1 {\arg1\().d}[0], [\arg4], \arg5
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ld1 {\arg2\().d}[0], [\arg4], \arg5
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ld1 {\arg3\().d}[0], [\arg4], \arg5
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// }
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.endm
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.macro STORE_ALIGNED_DATA_WITH_STRIDE arg0, arg1, arg2, arg3, arg4, arg5
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// { // input: $0~$3, dst*, dst_stride
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st1 {\arg0\().d}[0], [\arg4], \arg5
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st1 {\arg1\().d}[0], [\arg4], \arg5
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st1 {\arg2\().d}[0], [\arg4], \arg5
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st1 {\arg3\().d}[0], [\arg4], \arg5
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// }
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.endm
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.macro LOAD_UNALIGNED_DATA_WITH_STRIDE arg0, arg1, arg2, arg3, arg4, arg5
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// { // input: $0~$3, src*, src_stride
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ld1 {\arg0\().8b}, [\arg4], \arg5
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ld1 {\arg1\().8b}, [\arg4], \arg5
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ld1 {\arg2\().8b}, [\arg4], \arg5
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ld1 {\arg3\().8b}, [\arg4], \arg5
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// }
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.endm
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.macro STORE_UNALIGNED_DATA_WITH_STRIDE arg0, arg1, arg2, arg3, arg4, arg5
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// { // input: $0~$3, dst*, dst_stride
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st1 {\arg0\().8b}, [\arg4], \arg5
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st1 {\arg1\().8b}, [\arg4], \arg5
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st1 {\arg2\().8b}, [\arg4], \arg5
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st1 {\arg3\().8b}, [\arg4], \arg5
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// }
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.endm
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.macro LOAD16_ALIGNED_DATA_WITH_STRIDE arg0, arg1, arg2, arg3, arg4, arg5
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// { // input: $0~$3, src*, src_stride
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ld1 {\arg0\().2d}, [\arg4], \arg5
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ld1 {\arg1\().2d}, [\arg4], \arg5
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ld1 {\arg2\().2d}, [\arg4], \arg5
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ld1 {\arg3\().2d}, [\arg4], \arg5
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// }
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.endm
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.macro STORE16_ALIGNED_DATA_WITH_STRIDE arg0, arg1, arg2, arg3, arg4, arg5
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// { // input: $0~$3, dst*, dst_stride
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st1 {\arg0\().2d}, [\arg4], \arg5
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st1 {\arg1\().2d}, [\arg4], \arg5
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st1 {\arg2\().2d}, [\arg4], \arg5
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st1 {\arg3\().2d}, [\arg4], \arg5
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// }
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.endm
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.macro LOAD16_UNALIGNED_DATA_WITH_STRIDE arg0, arg1, arg2, arg3, arg4, arg5
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// { // input: $0~$3, src*, src_stride
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ld1 {\arg0\().16b}, [\arg4], \arg5
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ld1 {\arg1\().16b}, [\arg4], \arg5
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ld1 {\arg2\().16b}, [\arg4], \arg5
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ld1 {\arg3\().16b}, [\arg4], \arg5
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// }
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.endm
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.macro STORE16_UNALIGNED_DATA_WITH_STRIDE arg0, arg1, arg2, arg3, arg4, arg5
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// { // input: $0~$3, dst*, dst_stride
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st1 {\arg0\().16b}, [\arg4], \arg5
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st1 {\arg1\().16b}, [\arg4], \arg5
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st1 {\arg2\().16b}, [\arg4], \arg5
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st1 {\arg3\().16b}, [\arg4], \arg5
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// }
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.endm
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//void WelsCopy8x8_AArch64_neon (uint8_t* pDst, int32_t iStrideD, uint8_t* pSrc, int32_t iStrideS);
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WELS_ASM_AARCH64_FUNC_BEGIN WelsCopy8x8_AArch64_neon
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SIGN_EXTENSION x1,w1
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SIGN_EXTENSION x3,w3
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LOAD_UNALIGNED_DATA_WITH_STRIDE v0, v1, v2, v3, x2, x3
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STORE_UNALIGNED_DATA_WITH_STRIDE v0, v1, v2, v3, x0, x1
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LOAD_UNALIGNED_DATA_WITH_STRIDE v4, v5, v6, v7, x2, x3
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STORE_UNALIGNED_DATA_WITH_STRIDE v4, v5, v6, v7, x0, x1
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WELS_ASM_AARCH64_FUNC_END
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WELS_ASM_AARCH64_FUNC_BEGIN WelsCopy16x16_AArch64_neon
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SIGN_EXTENSION x1,w1
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SIGN_EXTENSION x3,w3
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LOAD16_ALIGNED_DATA_WITH_STRIDE v0, v1, v2, v3, x2, x3
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STORE16_ALIGNED_DATA_WITH_STRIDE v0, v1, v2, v3, x0, x1
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LOAD16_ALIGNED_DATA_WITH_STRIDE v16, v17, v18, v19, x2, x3
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STORE16_ALIGNED_DATA_WITH_STRIDE v16, v17, v18, v19, x0, x1
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LOAD16_ALIGNED_DATA_WITH_STRIDE v0, v1, v2, v3, x2, x3
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STORE16_ALIGNED_DATA_WITH_STRIDE v0, v1, v2, v3, x0, x1
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LOAD16_ALIGNED_DATA_WITH_STRIDE v16, v17, v18, v19, x2, x3
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STORE16_ALIGNED_DATA_WITH_STRIDE v16, v17, v18, v19, x0, x1
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WELS_ASM_AARCH64_FUNC_END
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WELS_ASM_AARCH64_FUNC_BEGIN WelsCopy16x16NotAligned_AArch64_neon
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SIGN_EXTENSION x1,w1
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SIGN_EXTENSION x3,w3
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LOAD16_UNALIGNED_DATA_WITH_STRIDE v0, v1, v2, v3, x2, x3
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STORE16_UNALIGNED_DATA_WITH_STRIDE v0, v1, v2, v3, x0, x1
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LOAD16_UNALIGNED_DATA_WITH_STRIDE v16, v17, v18, v19, x2, x3
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STORE16_UNALIGNED_DATA_WITH_STRIDE v16, v17, v18, v19, x0, x1
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LOAD16_UNALIGNED_DATA_WITH_STRIDE v0, v1, v2, v3, x2, x3
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STORE16_UNALIGNED_DATA_WITH_STRIDE v0, v1, v2, v3, x0, x1
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LOAD16_UNALIGNED_DATA_WITH_STRIDE v16, v17, v18, v19, x2, x3
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STORE16_UNALIGNED_DATA_WITH_STRIDE v16, v17, v18, v19, x0, x1
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WELS_ASM_AARCH64_FUNC_END
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WELS_ASM_AARCH64_FUNC_BEGIN WelsCopy16x8NotAligned_AArch64_neon
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SIGN_EXTENSION x1,w1
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SIGN_EXTENSION x3,w3
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LOAD16_UNALIGNED_DATA_WITH_STRIDE v0, v1, v2, v3, x2, x3
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STORE16_UNALIGNED_DATA_WITH_STRIDE v0, v1, v2, v3, x0, x1
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LOAD16_UNALIGNED_DATA_WITH_STRIDE v16, v17, v18, v19, x2, x3
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STORE16_UNALIGNED_DATA_WITH_STRIDE v16, v17, v18, v19, x0, x1
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WELS_ASM_AARCH64_FUNC_END
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WELS_ASM_AARCH64_FUNC_BEGIN WelsCopy8x16_AArch64_neon
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SIGN_EXTENSION x1,w1
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SIGN_EXTENSION x3,w3
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LOAD_UNALIGNED_DATA_WITH_STRIDE v0, v1, v2, v3, x2, x3
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STORE_UNALIGNED_DATA_WITH_STRIDE v0, v1, v2, v3, x0, x1
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LOAD_UNALIGNED_DATA_WITH_STRIDE v4, v5, v6, v7, x2, x3
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STORE_UNALIGNED_DATA_WITH_STRIDE v4, v5, v6, v7, x0, x1
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LOAD_UNALIGNED_DATA_WITH_STRIDE v0, v1, v2, v3, x2, x3
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STORE_UNALIGNED_DATA_WITH_STRIDE v0, v1, v2, v3, x0, x1
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LOAD_UNALIGNED_DATA_WITH_STRIDE v4, v5, v6, v7, x2, x3
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STORE_UNALIGNED_DATA_WITH_STRIDE v4, v5, v6, v7, x0, x1
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WELS_ASM_AARCH64_FUNC_END
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#endif
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