325 lines
8.9 KiB
C
325 lines
8.9 KiB
C
//=======================================================================
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// Copyright XashXT Group 2007 ©
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// cpuinfo.c - get cpu information
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//=======================================================================
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#include "launch.h"
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// Processor Information:
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typedef struct cpuinfo_s
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{
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bool m_bRDTSC : 1; // Is RDTSC supported?
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bool m_bCMOV : 1; // Is CMOV supported?
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bool m_bFCMOV : 1; // Is FCMOV supported?
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bool m_bSSE : 1; // Is SSE supported?
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bool m_bSSE2 : 1; // Is SSE2 Supported?
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bool m_b3DNow : 1; // Is 3DNow! Supported?
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bool m_bMMX : 1; // Is MMX supported?
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bool m_bHT : 1; // Is HyperThreading supported?
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byte m_usNumLogicCore; // Number op logical processors.
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byte m_usNumPhysCore; // Number of physical processors
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int64 m_speed; // In cycles per second.
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int m_size; // structure size
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char* m_szCPUID; // Processor vendor Identification.
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} cpuinfo_t;
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typedef struct register_s
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{
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dword eax;
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dword ebx;
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dword ecx;
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dword edx;
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bool retval;
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} register_t;
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static register_t cpuid(uint function )
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{
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register_t local;
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local.retval = true;
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_asm pushad;
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__try
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{
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_asm
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{
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xor edx, edx // Clue the compiler that EDX is about to be used.
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mov eax, function // set up CPUID to return processor version and features
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// 0 = vendor string, 1 = version info, 2 = cache info
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cpuid // code bytes = 0fh, 0a2h
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mov local.eax, eax // features returned in eax
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mov local.ebx, ebx // features returned in ebx
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mov local.ecx, ecx // features returned in ecx
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mov local.edx, edx // features returned in edx
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}
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}
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__except(EXCEPTION_EXECUTE_HANDLER)
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{
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local.retval = false;
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}
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_asm popad
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return local;
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}
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bool CheckMMXTechnology(void)
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{
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register_t mmx = cpuid(1);
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if( !mmx.retval ) return false;
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return ( mmx.edx & 0x800000 ) != 0;
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}
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bool CheckSSETechnology(void)
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{
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register_t sse = cpuid(1);
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if( !sse.retval ) return false;
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return ( sse.edx & 0x2000000L ) != 0;
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}
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bool CheckSSE2Technology(void)
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{
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register_t sse2 = cpuid(1);
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if( !sse2.retval ) return false;
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return ( sse2.edx & 0x04000000 ) != 0;
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}
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bool Check3DNowTechnology(void)
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{
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register_t amd = cpuid( 0x80000000 );
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if( !amd.retval ) return false;
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if( amd.eax > 0x80000000L )
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{
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amd = cpuid( 0x80000001 );
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if( !amd.retval ) return false;
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return ( amd.edx & 1<<31 ) != 0;
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}
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return false;
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}
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bool CheckCMOVTechnology()
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{
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register_t cmov = cpuid(1);
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if( !cmov.retval ) return false;
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return ( cmov.edx & (1<<15) ) != 0;
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}
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bool CheckFCMOVTechnology(void)
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{
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register_t fcmov = cpuid(1);
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if( !fcmov.retval ) return false;
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return ( fcmov.edx & (1<<16) ) != 0;
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}
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bool CheckRDTSCTechnology(void)
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{
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register_t rdtsc = cpuid(1);
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if( !rdtsc.retval ) return false;
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return rdtsc.edx & 0x10 != 0;
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}
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/*
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================
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Return the Processor's vendor identification string, or "Generic_x86" if it doesn't exist on this CPU
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================
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*/
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const char* GetProcessorVendorId()
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{
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static char VendorID[13];
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register_t vendor = cpuid(0);
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Mem_Set( VendorID, 0, sizeof(VendorID) );
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if( !vendor.retval )
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{
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com_strcpy( VendorID, "Generic_x86" );
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}
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else
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{
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Mem_Copy( VendorID+0, &(vendor.ebx), sizeof( vendor.ebx ) );
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Mem_Copy( VendorID+4, &(vendor.edx), sizeof( vendor.edx ) );
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Mem_Copy( VendorID+8, &(vendor.ecx), sizeof( vendor.ecx ) );
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}
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return VendorID;
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}
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/*
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================
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Returns non-zero if Hyper-Threading Technology is supported on the processors and zero if not.
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This does not mean that Hyper-Threading Technology is necessarily enabled.
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================
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*/
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static bool HTSupported(void)
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{
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const uint HT_BIT = 0x10000000; // EDX[28] - Bit 28 set indicates Hyper-Threading Technology is supported in hardware.
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const uint FAMILY_ID = 0x0f00; // EAX[11:8] - Bit 11 thru 8 contains family processor id
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const uint EXT_FAMILY_ID = 0x0f00000; // EAX[23:20] - Bit 23 thru 20 contains extended family processor id
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const uint PENTIUM4_ID = 0x0f00; // Pentium 4 family processor id
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register_t intel1 = cpuid(0);
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register_t intel2 = cpuid(1);
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if(!intel1.retval || !intel2.retval ) return false;
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// Check to see if this is a Pentium 4 or later processor
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if (((intel2.eax & FAMILY_ID) == PENTIUM4_ID) || (intel2.eax & EXT_FAMILY_ID))
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if (intel1.ebx == 'uneG' && intel1.edx == 'Ieni' && intel1.ecx == 'letn')
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return (intel2.edx & HT_BIT) != 0; // Genuine Intel Processor with Hyper-Threading Technology
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return false; // This is not a genuine Intel processor.
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}
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/*
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================
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Returns the number of logical processors per physical processors.
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================
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*/
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static byte LogicalProcessorsPerPackage(void)
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{
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const unsigned NUM_LOGICAL_BITS = 0x00FF0000; // EBX[23:16] indicate number of logical processors per package
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register_t core = cpuid(1);
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if (!HTSupported()) return 1;
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if( !core.retval) return 1;
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return (byte)((core.ebx & NUM_LOGICAL_BITS) >> 16);
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}
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int64 ClockSample( void )
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{
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static int64 m_time = 0;
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dword* pSample = (dword *)&m_time;
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__asm
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{
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mov ecx, pSample
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rdtsc
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mov [ecx], eax
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mov [ecx+4], edx
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}
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return m_time;
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}
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/*
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================
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Measure the processor clock speed by sampling the cycle count, waiting
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for some fraction of a second, then measuring the elapsed number of cycles.
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================
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*/
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static int64 CalculateClockSpeed()
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{
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LARGE_INTEGER waitTime, startCount, curCount;
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int scale = 5; // Take 1/32 of a second for the measurement.
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int64 start, end;
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QueryPerformanceCounter(&startCount);
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QueryPerformanceFrequency(&waitTime);
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waitTime.QuadPart >>= scale;
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start = ClockSample();
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do
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{
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QueryPerformanceCounter(&curCount);
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}
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while(curCount.QuadPart - startCount.QuadPart < waitTime.QuadPart);
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end = ClockSample();
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return (end - start) << scale;
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}
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/*
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================
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GetCPUInfo
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================
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*/
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cpuinfo_t GetCPUInfo( void )
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{
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static cpuinfo_t pi;
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SYSTEM_INFO si;
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if( pi.m_size == sizeof(pi) ) return pi;// Has the structure already been initialized and filled out?
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Mem_Set(&pi, 0, sizeof(pi)); // Redundant, but just in case the user somehow messes with the size.
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pi.m_size = sizeof(pi); // Fill out the structure, and return it:
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pi.m_speed = CalculateClockSpeed(); // Grab the processor frequency:
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pi.m_usNumLogicCore = LogicalProcessorsPerPackage();// Get the logical and physical processor counts:
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Mem_Set( &si, 0, sizeof(si) );
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GetSystemInfo( &si );
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pi.m_usNumPhysCore = si.dwNumberOfProcessors / pi.m_usNumLogicCore;
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pi.m_usNumLogicCore *= pi.m_usNumPhysCore;
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// Make sure I always report at least one, when running WinXP with the /ONECPU switch,
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// it likes to report 0 processors for some reason.
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if( pi.m_usNumPhysCore == 0 && pi.m_usNumLogicCore == 0 )
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{
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pi.m_usNumPhysCore = 1;
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pi.m_usNumLogicCore = 1;
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}
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// Determine Processor Features:
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pi.m_bRDTSC = CheckRDTSCTechnology();
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pi.m_bCMOV = CheckCMOVTechnology();
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pi.m_bFCMOV = CheckFCMOVTechnology();
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pi.m_bMMX = CheckMMXTechnology();
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pi.m_bSSE = CheckSSETechnology();
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pi.m_bSSE2 = CheckSSE2Technology();
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pi.m_b3DNow = Check3DNowTechnology();
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pi.m_szCPUID = (char*)GetProcessorVendorId();
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return pi;
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}
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void Sys_InitCPU( void )
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{
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cpuinfo_t cpu = GetCPUInfo();
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char szFeatureString[256];
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// Compute Frequency in Mhz:
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char* szFrequencyDenomination = "Mhz";
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double fFrequency = cpu.m_speed / 1000000.0;
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// copy shared info
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GI.tickcount = cpu.m_speed; // used for profiling
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GI.cpufreq = (float)fFrequency;
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GI.cpunum = cpu.m_usNumLogicCore;
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GI.rdtsc = cpu.m_bRDTSC;
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// Adjust to Ghz if nessecary:
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if( fFrequency > 1000.0 )
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{
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fFrequency /= 1000.0;
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szFrequencyDenomination = "Ghz";
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}
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com_strcpy(szFeatureString, "" );
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if( cpu.m_bMMX ) com_strcat(szFeatureString, "MMX " );
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if( cpu.m_b3DNow ) com_strcat(szFeatureString, "3DNow " );
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if( cpu.m_bSSE ) com_strcat(szFeatureString, "SSE " );
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if( cpu.m_bSSE2 ) com_strcat(szFeatureString, "SSE2 " );
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if( cpu.m_bRDTSC ) com_strcat(szFeatureString, "RDTSC " );
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if( cpu.m_bCMOV ) com_strcat(szFeatureString, "CMOV " );
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if( cpu.m_bFCMOV ) com_strcat(szFeatureString, "FCMOV " );
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// Remove the trailing space. There will always be one.
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szFeatureString[com_strlen(szFeatureString)-1] = '\0';
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// Dump CPU information:
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if( cpu.m_usNumLogicCore == 1 ) MsgDev( D_INFO, "CPU: %s [1 core]. Frequency: %.01f %s\n", cpu.m_szCPUID, fFrequency, szFrequencyDenomination );
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else
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{
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char buffer[256] = "";
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if( cpu.m_usNumPhysCore != cpu.m_usNumLogicCore )
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com_sprintf(buffer, " (%i physical)", (int) cpu.m_usNumPhysCore );
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MsgDev(D_INFO, "CPU: %s [%i core's %s]. Frequency: %.01f %s\n ", cpu.m_szCPUID, (int)cpu.m_usNumLogicCore, buffer, fFrequency, szFrequencyDenomination );
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}
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MsgDev(D_NOTE, "CPU Features: %s\n", szFeatureString );
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} |