2001-10-31 03:40:19 +01:00
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/* mmix-dis.c -- Disassemble MMIX instructions.
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2019-01-01 11:31:27 +01:00
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Copyright (C) 2000-2019 Free Software Foundation, Inc.
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2001-10-31 03:40:19 +01:00
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Written by Hans-Peter Nilsson (hp@bitrange.com)
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2007-07-05 11:49:03 +02:00
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This file is part of the GNU opcodes library.
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2001-10-31 03:40:19 +01:00
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2007-07-05 11:49:03 +02:00
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This library is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3, or (at your option)
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any later version.
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2001-10-31 03:40:19 +01:00
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2007-07-05 11:49:03 +02:00
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It is distributed in the hope that it will be useful, but WITHOUT
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ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
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or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
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License for more details.
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2001-10-31 03:40:19 +01:00
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2005-07-01 13:16:33 +02:00
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You should have received a copy of the GNU General Public License
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along with this file; see the file COPYING. If not, write to the Free
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Software Foundation, 51 Franklin Street - Fifth Floor, Boston,
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MA 02110-1301, USA. */
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2001-10-31 03:40:19 +01:00
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2012-05-18 03:59:38 +02:00
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#include "sysdep.h"
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2001-10-31 03:40:19 +01:00
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#include <stdio.h>
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#include "opcode/mmix.h"
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Move print_insn_XXX to an opcodes internal header
With the changes done in previous patches, print_insn_XXX functions
don't have to be external visible out of opcodes, because both gdb
and objdump select disassemblers through a single interface.
This patch moves these print_insn_XXX declarations from
include/dis-asm.h to opcodes/disassemble.h, which is a new header
added by this patch.
include:
2017-05-24 Yao Qi <yao.qi@linaro.org>
* dis-asm.h: Move some function declarations to
opcodes/disassemble.h.
opcodes:
2017-05-24 Yao Qi <yao.qi@linaro.org>
* alpha-dis.c: Include disassemble.h, don't include
dis-asm.h.
* avr-dis.c, bfin-dis.c, cr16-dis.c: Likewise.
* crx-dis.c, d10v-dis.c, d30v-dis.c: Likewise.
* disassemble.c, dlx-dis.c, epiphany-dis.c: Likewise.
* fr30-dis.c, ft32-dis.c, h8300-dis.c, h8500-dis.c: Likewise.
* hppa-dis.c, i370-dis.c, i386-dis.c: Likewise.
* i860-dis.c, i960-dis.c, ip2k-dis.c: Likewise.
* iq2000-dis.c, lm32-dis.c, m10200-dis.c: Likewise.
* m10300-dis.c, m32r-dis.c, m68hc11-dis.c: Likewise.
* m68k-dis.c, m88k-dis.c, mcore-dis.c: Likewise.
* metag-dis.c, microblaze-dis.c, mmix-dis.c: Likewise.
* moxie-dis.c, msp430-dis.c, mt-dis.c:
* nds32-dis.c, nios2-dis.c, ns32k-dis.c: Likewise.
* or1k-dis.c, pdp11-dis.c, pj-dis.c: Likewise.
* ppc-dis.c, pru-dis.c, riscv-dis.c: Likewise.
* rl78-dis.c, s390-dis.c, score-dis.c: Likewise.
* sh-dis.c, sh64-dis.c, tic30-dis.c: Likewise.
* tic4x-dis.c, tic54x-dis.c, tic6x-dis.c: Likewise.
* tic80-dis.c, tilegx-dis.c, tilepro-dis.c: Likewise.
* v850-dis.c, vax-dis.c, visium-dis.c: Likewise.
* w65-dis.c, wasm32-dis.c, xc16x-dis.c: Likewise.
* xgate-dis.c, xstormy16-dis.c, xtensa-dis.c: Likewise.
* z80-dis.c, z8k-dis.c: Likewise.
* disassemble.h: New file.
2017-05-24 18:23:52 +02:00
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#include "disassemble.h"
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2001-10-31 03:40:19 +01:00
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#include "libiberty.h"
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#include "bfd.h"
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#include "opintl.h"
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opcodes error messages
Another patch aimed at making binutils comply with the GNU coding
standard. The generated files require
https://sourceware.org/ml/cgen/2018-q1/msg00004.html
cpu/
* frv.opc: Include opintl.h.
(add_next_to_vliw): Use opcodes_error_handler to print error.
Standardize error message.
(fr500_check_insn_major_constraints, frv_vliw_add_insn): Likewise.
opcodes/
* sysdep.h (opcodes_error_handler): Define.
(_bfd_error_handler): Declare.
* Makefile.am: Remove stray #.
* opc2c.c (main): Remove bogus -l arg handling. Print "DO NOT
EDIT" comment.
* aarch64-dis.c, * arc-dis.c, * arm-dis.c, * avr-dis.c,
* d30v-dis.c, * h8300-dis.c, * mmix-dis.c, * ppc-dis.c,
* riscv-dis.c, * s390-dis.c, * sparc-dis.c, * v850-dis.c: Use
opcodes_error_handler to print errors. Standardize error messages.
* msp430-decode.opc, * nios2-dis.c, * rl78-decode.opc: Likewise,
and include opintl.h.
* nds32-asm.c: Likewise, and include sysdep.h and opintl.h.
* i386-gen.c: Standardize error messages.
* msp430-decode.c, * rl78-decode.c, rx-decode.c: Regenerate.
* Makefile.in: Regenerate.
* epiphany-asm.c, * epiphany-desc.c, * epiphany-dis.c,
* epiphany-ibld.c, * fr30-asm.c, * fr30-desc.c, * fr30-dis.c,
* fr30-ibld.c, * frv-asm.c, * frv-desc.c, * frv-dis.c, * frv-ibld.c,
* frv-opc.c, * ip2k-asm.c, * ip2k-desc.c, * ip2k-dis.c, * ip2k-ibld.c,
* iq2000-asm.c, * iq2000-desc.c, * iq2000-dis.c, * iq2000-ibld.c,
* lm32-asm.c, * lm32-desc.c, * lm32-dis.c, * lm32-ibld.c,
* m32c-asm.c, * m32c-desc.c, * m32c-dis.c, * m32c-ibld.c,
* m32r-asm.c, * m32r-desc.c, * m32r-dis.c, * m32r-ibld.c,
* mep-asm.c, * mep-desc.c, * mep-dis.c, * mep-ibld.c, * mt-asm.c,
* mt-desc.c, * mt-dis.c, * mt-ibld.c, * or1k-asm.c, * or1k-desc.c,
* or1k-dis.c, * or1k-ibld.c, * xc16x-asm.c, * xc16x-desc.c,
* xc16x-dis.c, * xc16x-ibld.c, * xstormy16-asm.c, * xstormy16-desc.c,
* xstormy16-dis.c, * xstormy16-ibld.c: Regenerate.
2018-03-01 22:53:50 +01:00
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#define BAD_CASE(x) \
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do \
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{ \
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opcodes_error_handler (_("bad case %d (%s) in %s:%d"), \
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x, #x, __FILE__, __LINE__); \
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abort (); \
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} \
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2001-10-31 03:40:19 +01:00
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while (0)
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opcodes error messages
Another patch aimed at making binutils comply with the GNU coding
standard. The generated files require
https://sourceware.org/ml/cgen/2018-q1/msg00004.html
cpu/
* frv.opc: Include opintl.h.
(add_next_to_vliw): Use opcodes_error_handler to print error.
Standardize error message.
(fr500_check_insn_major_constraints, frv_vliw_add_insn): Likewise.
opcodes/
* sysdep.h (opcodes_error_handler): Define.
(_bfd_error_handler): Declare.
* Makefile.am: Remove stray #.
* opc2c.c (main): Remove bogus -l arg handling. Print "DO NOT
EDIT" comment.
* aarch64-dis.c, * arc-dis.c, * arm-dis.c, * avr-dis.c,
* d30v-dis.c, * h8300-dis.c, * mmix-dis.c, * ppc-dis.c,
* riscv-dis.c, * s390-dis.c, * sparc-dis.c, * v850-dis.c: Use
opcodes_error_handler to print errors. Standardize error messages.
* msp430-decode.opc, * nios2-dis.c, * rl78-decode.opc: Likewise,
and include opintl.h.
* nds32-asm.c: Likewise, and include sysdep.h and opintl.h.
* i386-gen.c: Standardize error messages.
* msp430-decode.c, * rl78-decode.c, rx-decode.c: Regenerate.
* Makefile.in: Regenerate.
* epiphany-asm.c, * epiphany-desc.c, * epiphany-dis.c,
* epiphany-ibld.c, * fr30-asm.c, * fr30-desc.c, * fr30-dis.c,
* fr30-ibld.c, * frv-asm.c, * frv-desc.c, * frv-dis.c, * frv-ibld.c,
* frv-opc.c, * ip2k-asm.c, * ip2k-desc.c, * ip2k-dis.c, * ip2k-ibld.c,
* iq2000-asm.c, * iq2000-desc.c, * iq2000-dis.c, * iq2000-ibld.c,
* lm32-asm.c, * lm32-desc.c, * lm32-dis.c, * lm32-ibld.c,
* m32c-asm.c, * m32c-desc.c, * m32c-dis.c, * m32c-ibld.c,
* m32r-asm.c, * m32r-desc.c, * m32r-dis.c, * m32r-ibld.c,
* mep-asm.c, * mep-desc.c, * mep-dis.c, * mep-ibld.c, * mt-asm.c,
* mt-desc.c, * mt-dis.c, * mt-ibld.c, * or1k-asm.c, * or1k-desc.c,
* or1k-dis.c, * or1k-ibld.c, * xc16x-asm.c, * xc16x-desc.c,
* xc16x-dis.c, * xc16x-ibld.c, * xstormy16-asm.c, * xstormy16-desc.c,
* xstormy16-dis.c, * xstormy16-ibld.c: Regenerate.
2018-03-01 22:53:50 +01:00
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#define FATAL_DEBUG \
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do \
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{ \
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opcodes_error_handler (_("internal: non-debugged code " \
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"(test-case missing): %s:%d"), \
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__FILE__, __LINE__); \
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abort (); \
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} \
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2001-10-31 03:40:19 +01:00
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while (0)
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#define ROUND_MODE(n) \
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((n) == 1 ? "ROUND_OFF" : (n) == 2 ? "ROUND_UP" : \
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(n) == 3 ? "ROUND_DOWN" : (n) == 4 ? "ROUND_NEAR" : \
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_("(unknown)"))
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#define INSN_IMMEDIATE_BIT (IMM_OFFSET_BIT << 24)
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#define INSN_BACKWARD_OFFSET_BIT (1 << 24)
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struct mmix_dis_info
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{
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const char *reg_name[256];
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const char *spec_reg_name[32];
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/* Waste a little memory so we don't have to allocate each separately.
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We could have an array with static contents for these, but on the
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other hand, we don't have to. */
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char basic_reg_name[256][sizeof ("$255")];
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};
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/* Initialize a target-specific array in INFO. */
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2002-11-30 09:39:46 +01:00
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static bfd_boolean
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2005-07-01 13:16:33 +02:00
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initialize_mmix_dis_info (struct disassemble_info *info)
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2001-10-31 03:40:19 +01:00
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{
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struct mmix_dis_info *minfop = malloc (sizeof (struct mmix_dis_info));
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2009-12-11 14:42:17 +01:00
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long i;
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2001-10-31 03:40:19 +01:00
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if (minfop == NULL)
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2002-11-30 09:39:46 +01:00
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return FALSE;
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2001-10-31 03:40:19 +01:00
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memset (minfop, 0, sizeof (*minfop));
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/* Initialize register names from register symbols. If there's no
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register section, then there are no register symbols. */
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if ((info->section != NULL && info->section->owner != NULL)
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|| (info->symbols != NULL
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&& info->symbols[0] != NULL
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&& bfd_asymbol_bfd (info->symbols[0]) != NULL))
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{
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bfd *abfd = info->section && info->section->owner != NULL
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? info->section->owner
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: bfd_asymbol_bfd (info->symbols[0]);
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asection *reg_section = bfd_get_section_by_name (abfd, "*REG*");
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if (reg_section != NULL)
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{
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/* The returned symcount *does* include the ending NULL. */
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long symsize = bfd_get_symtab_upper_bound (abfd);
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asymbol **syms = malloc (symsize);
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long nsyms;
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if (syms == NULL)
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2005-07-01 13:16:33 +02:00
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{
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FATAL_DEBUG;
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2001-10-31 03:40:19 +01:00
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free (minfop);
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2002-11-30 09:39:46 +01:00
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return FALSE;
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2001-10-31 03:40:19 +01:00
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}
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nsyms = bfd_canonicalize_symtab (abfd, syms);
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/* We use the first name for a register. If this is MMO, then
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it's the name with the first sequence number, presumably the
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first in the source. */
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for (i = 0; i < nsyms && syms[i] != NULL; i++)
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{
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if (syms[i]->section == reg_section
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&& syms[i]->value < 256
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&& minfop->reg_name[syms[i]->value] == NULL)
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minfop->reg_name[syms[i]->value] = syms[i]->name;
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}
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}
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}
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/* Fill in the rest with the canonical names. */
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for (i = 0; i < 256; i++)
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if (minfop->reg_name[i] == NULL)
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{
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2009-12-11 14:42:17 +01:00
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sprintf (minfop->basic_reg_name[i], "$%ld", i);
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2001-10-31 03:40:19 +01:00
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minfop->reg_name[i] = minfop->basic_reg_name[i];
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}
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/* We assume it's actually a one-to-one mapping of number-to-name. */
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for (i = 0; mmix_spec_regs[i].name != NULL; i++)
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minfop->spec_reg_name[mmix_spec_regs[i].number] = mmix_spec_regs[i].name;
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2005-07-01 13:16:33 +02:00
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info->private_data = (void *) minfop;
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2002-11-30 09:39:46 +01:00
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return TRUE;
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2001-10-31 03:40:19 +01:00
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}
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/* A table indexed by the first byte is constructed as we disassemble each
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tetrabyte. The contents is a pointer into mmix_insns reflecting the
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first found entry with matching match-bits and lose-bits. Further
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entries are considered one after one until the operand constraints
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match or the match-bits and lose-bits do not match. Normally a
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"further entry" will just show that there was no other match. */
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static const struct mmix_opcode *
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2005-07-01 13:16:33 +02:00
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get_opcode (unsigned long insn)
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2001-10-31 03:40:19 +01:00
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{
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static const struct mmix_opcode **opcodes = NULL;
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const struct mmix_opcode *opcodep = mmix_opcodes;
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unsigned int opcode_part = (insn >> 24) & 255;
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2005-07-01 13:16:33 +02:00
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2001-10-31 03:40:19 +01:00
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if (opcodes == NULL)
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opcodes = xcalloc (256, sizeof (struct mmix_opcode *));
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opcodep = opcodes[opcode_part];
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if (opcodep == NULL
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|| (opcodep->match & insn) != opcodep->match
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|| (opcodep->lose & insn) != 0)
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{
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/* Search through the table. */
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for (opcodep = mmix_opcodes; opcodep->name != NULL; opcodep++)
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{
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/* FIXME: Break out this into an initialization function. */
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if ((opcodep->match & (opcode_part << 24)) == opcode_part
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&& (opcodep->lose & (opcode_part << 24)) == 0)
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opcodes[opcode_part] = opcodep;
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if ((opcodep->match & insn) == opcodep->match
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&& (opcodep->lose & insn) == 0)
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break;
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}
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}
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if (opcodep->name == NULL)
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return NULL;
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/* Check constraints. If they don't match, loop through the next opcode
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entries. */
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do
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{
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switch (opcodep->operands)
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{
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/* These have no restraint on what can be in the lower three
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bytes. */
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case mmix_operands_regs:
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case mmix_operands_reg_yz:
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case mmix_operands_regs_z_opt:
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case mmix_operands_regs_z:
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case mmix_operands_jmp:
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case mmix_operands_pushgo:
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case mmix_operands_pop:
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case mmix_operands_sync:
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case mmix_operands_x_regs_z:
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case mmix_operands_neg:
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case mmix_operands_pushj:
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case mmix_operands_regaddr:
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case mmix_operands_get:
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case mmix_operands_set:
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case mmix_operands_save:
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case mmix_operands_unsave:
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case mmix_operands_xyz_opt:
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return opcodep;
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/* For a ROUND_MODE, the middle byte must be 0..4. */
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case mmix_operands_roundregs_z:
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case mmix_operands_roundregs:
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{
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int midbyte = (insn >> 8) & 255;
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2005-07-01 13:16:33 +02:00
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2001-10-31 03:40:19 +01:00
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if (midbyte <= 4)
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return opcodep;
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}
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|
|
|
break;
|
|
|
|
|
|
|
|
case mmix_operands_put:
|
|
|
|
/* A "PUT". If it is "immediate", then no restrictions,
|
|
|
|
otherwise we have to make sure the register number is < 32. */
|
|
|
|
if ((insn & INSN_IMMEDIATE_BIT)
|
|
|
|
|| ((insn >> 16) & 255) < 32)
|
|
|
|
return opcodep;
|
|
|
|
break;
|
|
|
|
|
|
|
|
case mmix_operands_resume:
|
|
|
|
/* Middle bytes must be zero. */
|
|
|
|
if ((insn & 0x00ffff00) == 0)
|
|
|
|
return opcodep;
|
|
|
|
break;
|
|
|
|
|
|
|
|
default:
|
|
|
|
BAD_CASE (opcodep->operands);
|
|
|
|
}
|
|
|
|
|
|
|
|
opcodep++;
|
|
|
|
}
|
|
|
|
while ((opcodep->match & insn) == opcodep->match
|
|
|
|
&& (opcodep->lose & insn) == 0);
|
|
|
|
|
|
|
|
/* If we got here, we had no match. */
|
|
|
|
return NULL;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* The main disassembly function. */
|
|
|
|
|
|
|
|
int
|
2005-07-01 13:16:33 +02:00
|
|
|
print_insn_mmix (bfd_vma memaddr, struct disassemble_info *info)
|
2001-10-31 03:40:19 +01:00
|
|
|
{
|
|
|
|
unsigned char buffer[4];
|
|
|
|
unsigned long insn;
|
|
|
|
unsigned int x, y, z;
|
|
|
|
const struct mmix_opcode *opcodep;
|
|
|
|
int status = (*info->read_memory_func) (memaddr, buffer, 4, info);
|
|
|
|
struct mmix_dis_info *minfop;
|
|
|
|
|
|
|
|
if (status != 0)
|
|
|
|
{
|
|
|
|
(*info->memory_error_func) (status, memaddr, info);
|
|
|
|
return -1;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* FIXME: Is -1 suitable? */
|
|
|
|
if (info->private_data == NULL
|
|
|
|
&& ! initialize_mmix_dis_info (info))
|
|
|
|
return -1;
|
|
|
|
|
|
|
|
minfop = (struct mmix_dis_info *) info->private_data;
|
|
|
|
x = buffer[1];
|
|
|
|
y = buffer[2];
|
|
|
|
z = buffer[3];
|
|
|
|
|
|
|
|
insn = bfd_getb32 (buffer);
|
|
|
|
|
|
|
|
opcodep = get_opcode (insn);
|
|
|
|
|
|
|
|
if (opcodep == NULL)
|
|
|
|
{
|
|
|
|
(*info->fprintf_func) (info->stream, _("*unknown*"));
|
|
|
|
return 4;
|
|
|
|
}
|
|
|
|
|
|
|
|
(*info->fprintf_func) (info->stream, "%s ", opcodep->name);
|
|
|
|
|
|
|
|
/* Present bytes in the order they are laid out in memory. */
|
|
|
|
info->display_endian = BFD_ENDIAN_BIG;
|
|
|
|
|
|
|
|
info->insn_info_valid = 1;
|
|
|
|
info->bytes_per_chunk = 4;
|
|
|
|
info->branch_delay_insns = 0;
|
|
|
|
info->target = 0;
|
|
|
|
switch (opcodep->type)
|
|
|
|
{
|
|
|
|
case mmix_type_normal:
|
|
|
|
case mmix_type_memaccess_block:
|
|
|
|
info->insn_type = dis_nonbranch;
|
|
|
|
break;
|
|
|
|
|
|
|
|
case mmix_type_branch:
|
|
|
|
info->insn_type = dis_branch;
|
|
|
|
break;
|
|
|
|
|
|
|
|
case mmix_type_condbranch:
|
|
|
|
info->insn_type = dis_condbranch;
|
|
|
|
break;
|
|
|
|
|
|
|
|
case mmix_type_memaccess_octa:
|
|
|
|
info->insn_type = dis_dref;
|
|
|
|
info->data_size = 8;
|
|
|
|
break;
|
|
|
|
|
|
|
|
case mmix_type_memaccess_tetra:
|
|
|
|
info->insn_type = dis_dref;
|
|
|
|
info->data_size = 4;
|
|
|
|
break;
|
|
|
|
|
|
|
|
case mmix_type_memaccess_wyde:
|
|
|
|
info->insn_type = dis_dref;
|
|
|
|
info->data_size = 2;
|
|
|
|
break;
|
|
|
|
|
|
|
|
case mmix_type_memaccess_byte:
|
|
|
|
info->insn_type = dis_dref;
|
|
|
|
info->data_size = 1;
|
|
|
|
break;
|
|
|
|
|
|
|
|
case mmix_type_jsr:
|
|
|
|
info->insn_type = dis_jsr;
|
|
|
|
break;
|
|
|
|
|
|
|
|
default:
|
|
|
|
BAD_CASE(opcodep->type);
|
|
|
|
}
|
|
|
|
|
|
|
|
switch (opcodep->operands)
|
|
|
|
{
|
|
|
|
case mmix_operands_regs:
|
|
|
|
/* All registers: "$X,$Y,$Z". */
|
|
|
|
(*info->fprintf_func) (info->stream, "%s,%s,%s",
|
|
|
|
minfop->reg_name[x],
|
|
|
|
minfop->reg_name[y],
|
|
|
|
minfop->reg_name[z]);
|
|
|
|
break;
|
|
|
|
|
|
|
|
case mmix_operands_reg_yz:
|
|
|
|
/* Like SETH - "$X,YZ". */
|
|
|
|
(*info->fprintf_func) (info->stream, "%s,0x%x",
|
|
|
|
minfop->reg_name[x], y * 256 + z);
|
|
|
|
break;
|
|
|
|
|
|
|
|
case mmix_operands_regs_z_opt:
|
|
|
|
case mmix_operands_regs_z:
|
|
|
|
case mmix_operands_pushgo:
|
|
|
|
/* The regular "$X,$Y,$Z|Z". */
|
|
|
|
if (insn & INSN_IMMEDIATE_BIT)
|
|
|
|
(*info->fprintf_func) (info->stream, "%s,%s,%d",
|
|
|
|
minfop->reg_name[x], minfop->reg_name[y], z);
|
|
|
|
else
|
|
|
|
(*info->fprintf_func) (info->stream, "%s,%s,%s",
|
|
|
|
minfop->reg_name[x],
|
|
|
|
minfop->reg_name[y],
|
|
|
|
minfop->reg_name[z]);
|
|
|
|
break;
|
|
|
|
|
|
|
|
case mmix_operands_jmp:
|
|
|
|
/* Address; only JMP. */
|
|
|
|
{
|
|
|
|
bfd_signed_vma offset = (x * 65536 + y * 256 + z) * 4;
|
|
|
|
|
|
|
|
if (insn & INSN_BACKWARD_OFFSET_BIT)
|
|
|
|
offset -= (256 * 65536) * 4;
|
|
|
|
|
|
|
|
info->target = memaddr + offset;
|
|
|
|
(*info->print_address_func) (memaddr + offset, info);
|
|
|
|
}
|
|
|
|
break;
|
|
|
|
|
|
|
|
case mmix_operands_roundregs_z:
|
|
|
|
/* Two registers, like FLOT, possibly with rounding: "$X,$Z|Z"
|
|
|
|
"$X,ROUND_MODE,$Z|Z". */
|
|
|
|
if (y != 0)
|
|
|
|
{
|
|
|
|
if (insn & INSN_IMMEDIATE_BIT)
|
|
|
|
(*info->fprintf_func) (info->stream, "%s,%s,%d",
|
|
|
|
minfop->reg_name[x],
|
|
|
|
ROUND_MODE (y), z);
|
|
|
|
else
|
|
|
|
(*info->fprintf_func) (info->stream, "%s,%s,%s",
|
|
|
|
minfop->reg_name[x],
|
|
|
|
ROUND_MODE (y),
|
|
|
|
minfop->reg_name[z]);
|
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
|
|
|
if (insn & INSN_IMMEDIATE_BIT)
|
|
|
|
(*info->fprintf_func) (info->stream, "%s,%d",
|
|
|
|
minfop->reg_name[x], z);
|
|
|
|
else
|
|
|
|
(*info->fprintf_func) (info->stream, "%s,%s",
|
|
|
|
minfop->reg_name[x],
|
|
|
|
minfop->reg_name[z]);
|
|
|
|
}
|
|
|
|
break;
|
|
|
|
|
|
|
|
case mmix_operands_pop:
|
|
|
|
/* Like POP - "X,YZ". */
|
|
|
|
(*info->fprintf_func) (info->stream, "%d,%d", x, y*256 + z);
|
|
|
|
break;
|
|
|
|
|
|
|
|
case mmix_operands_roundregs:
|
|
|
|
/* Two registers, possibly with rounding: "$X,$Z" or
|
|
|
|
"$X,ROUND_MODE,$Z". */
|
|
|
|
if (y != 0)
|
|
|
|
(*info->fprintf_func) (info->stream, "%s,%s,%s",
|
|
|
|
minfop->reg_name[x],
|
|
|
|
ROUND_MODE (y),
|
|
|
|
minfop->reg_name[z]);
|
|
|
|
else
|
|
|
|
(*info->fprintf_func) (info->stream, "%s,%s",
|
|
|
|
minfop->reg_name[x],
|
|
|
|
minfop->reg_name[z]);
|
|
|
|
break;
|
|
|
|
|
|
|
|
case mmix_operands_sync:
|
|
|
|
/* Like SYNC - "XYZ". */
|
|
|
|
(*info->fprintf_func) (info->stream, "%u",
|
|
|
|
x * 65536 + y * 256 + z);
|
|
|
|
break;
|
|
|
|
|
|
|
|
case mmix_operands_x_regs_z:
|
|
|
|
/* Like SYNCD - "X,$Y,$Z|Z". */
|
|
|
|
if (insn & INSN_IMMEDIATE_BIT)
|
|
|
|
(*info->fprintf_func) (info->stream, "%d,%s,%d",
|
|
|
|
x, minfop->reg_name[y], z);
|
|
|
|
else
|
|
|
|
(*info->fprintf_func) (info->stream, "%d,%s,%s",
|
|
|
|
x, minfop->reg_name[y],
|
|
|
|
minfop->reg_name[z]);
|
|
|
|
break;
|
|
|
|
|
|
|
|
case mmix_operands_neg:
|
|
|
|
/* Like NEG and NEGU - "$X,Y,$Z|Z". */
|
|
|
|
if (insn & INSN_IMMEDIATE_BIT)
|
|
|
|
(*info->fprintf_func) (info->stream, "%s,%d,%d",
|
|
|
|
minfop->reg_name[x], y, z);
|
|
|
|
else
|
|
|
|
(*info->fprintf_func) (info->stream, "%s,%d,%s",
|
|
|
|
minfop->reg_name[x], y,
|
|
|
|
minfop->reg_name[z]);
|
|
|
|
break;
|
|
|
|
|
|
|
|
case mmix_operands_pushj:
|
|
|
|
case mmix_operands_regaddr:
|
|
|
|
/* Like GETA or branches - "$X,Address". */
|
|
|
|
{
|
|
|
|
bfd_signed_vma offset = (y * 256 + z) * 4;
|
|
|
|
|
|
|
|
if (insn & INSN_BACKWARD_OFFSET_BIT)
|
|
|
|
offset -= 65536 * 4;
|
|
|
|
|
|
|
|
info->target = memaddr + offset;
|
|
|
|
|
|
|
|
(*info->fprintf_func) (info->stream, "%s,", minfop->reg_name[x]);
|
|
|
|
(*info->print_address_func) (memaddr + offset, info);
|
|
|
|
}
|
|
|
|
break;
|
|
|
|
|
|
|
|
case mmix_operands_get:
|
|
|
|
/* GET - "X,spec_reg". */
|
|
|
|
(*info->fprintf_func) (info->stream, "%s,%s",
|
|
|
|
minfop->reg_name[x],
|
|
|
|
minfop->spec_reg_name[z]);
|
|
|
|
break;
|
|
|
|
|
|
|
|
case mmix_operands_put:
|
|
|
|
/* PUT - "spec_reg,$Z|Z". */
|
|
|
|
if (insn & INSN_IMMEDIATE_BIT)
|
|
|
|
(*info->fprintf_func) (info->stream, "%s,%d",
|
|
|
|
minfop->spec_reg_name[x], z);
|
|
|
|
else
|
|
|
|
(*info->fprintf_func) (info->stream, "%s,%s",
|
|
|
|
minfop->spec_reg_name[x],
|
|
|
|
minfop->reg_name[z]);
|
|
|
|
break;
|
|
|
|
|
|
|
|
case mmix_operands_set:
|
|
|
|
/* Two registers, "$X,$Y". */
|
|
|
|
(*info->fprintf_func) (info->stream, "%s,%s",
|
|
|
|
minfop->reg_name[x],
|
|
|
|
minfop->reg_name[y]);
|
|
|
|
break;
|
|
|
|
|
|
|
|
case mmix_operands_save:
|
|
|
|
/* SAVE - "$X,0". */
|
|
|
|
(*info->fprintf_func) (info->stream, "%s,0", minfop->reg_name[x]);
|
|
|
|
break;
|
|
|
|
|
|
|
|
case mmix_operands_unsave:
|
|
|
|
/* UNSAVE - "0,$Z". */
|
|
|
|
(*info->fprintf_func) (info->stream, "0,%s", minfop->reg_name[z]);
|
|
|
|
break;
|
|
|
|
|
|
|
|
case mmix_operands_xyz_opt:
|
|
|
|
/* Like SWYM or TRAP - "X,Y,Z". */
|
|
|
|
(*info->fprintf_func) (info->stream, "%d,%d,%d", x, y, z);
|
|
|
|
break;
|
|
|
|
|
|
|
|
case mmix_operands_resume:
|
|
|
|
/* Just "Z", like RESUME. */
|
|
|
|
(*info->fprintf_func) (info->stream, "%d", z);
|
|
|
|
break;
|
|
|
|
|
|
|
|
default:
|
|
|
|
(*info->fprintf_func) (info->stream, _("*unknown operands type: %d*"),
|
|
|
|
opcodep->operands);
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
|
|
|
return 4;
|
|
|
|
}
|