binutils-gdb/ld/testsuite/ld-m68hc11/adj-jump.d

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#source: adj-jump.s
#as: -m68hc11
#ld: -m m68hc11elf --relax
#objdump: -d --prefix-addresses -r
.*: +file format elf32\-m68hc11
Disassembly of section .text:
* config/tc-m68hc11.c: Add S12X and XGATE co-processor support. Add option to offset S12 addresses into XGATE memory space. Tweak target flags to match other tools. (i.e. -m m68hc11). * doc/as.texinfo: Mention new options. * doc/c-m68hc11.texi: Document new options. * NEWS: Mention new support. * archures.c: Add bfd_arch_m9s12x and bfd_arch_m9s12xg. * config.bfd: Likewise. * cpu-m9s12x.c: New. * cpu-m9s12xg.c: New. * elf32-m68hc12.c: Add S12X and XGATE co-processor support. Add option to offset S12 addresses into XGATE memory space. Fix carry bug in IMM16 (IMM8 low/high) relocate. * Makefile.am (ALL_MACHINES): Add cpu-m9s12x and cpu-m9s12xg. (ALL_MACHINES_CFILES): Likewise. * reloc.c: Add S12X relocs. * Makefile.in: Regenerate. * bfd-in2.h: Regenerate. * libbfd.h: Regenerate. * gas/m68hc11/insns9s12x.s: New * gas/m68hc11/insns9s12x.d: New * gas/m68hc11/hexprefix.s: New * gas/m68hc11/hexprefix.d: New * gas/m68hc11/9s12x-exg-sex-tfr.s: New * gas/m68hc11/9s12x-exg-sex-tfr.d: New * gas/m68hc11/insns9s12xg.s: New * gas/m68hc11/insns9s12xg.d: New * gas/m68hc11/9s12x-mov.s: New * gas/m68hc11/9s12x-mov.d: New * gas/m68hc11/m68hc11.exp: Updated * gas/m68hc11/*.d: Brought in line with changed objdump output. * gas/all/gas.exp: XFAIL all hc11/12 targets for redef2,3. * gas/elf/elf.exp: XFAIL all hc11/12 targets for redef. * gas/elf/dwarf2-1.d: Skip for hc11/12 targets. * gas/elf/dwarf2-2.d: Likewise. * ld-m68hc11/xgate-link.s: New. * ld-m68hc11/xgate-link.d: New. * ld-m68hc11/xgate-offset.s: New. * ld-m68hc11/xgate-offset.d: New. * ld-m68hc11/xgate1.s: New. * ld-m68hc11/xgate1.d: New. * ld-m68hc11/xgate2.s: New. * ld-m68hc11/m68hc11.exp: Updated. * ld-m68hc11/*.d: Brought in line with changed objdump output. * ld-gc/gc.exp: Update CFLAGS for m68hc11. * ld-plugin/plugin.exp: Likewise. * ld-srec/srec.exp: XFAIL for m68hc11 and m68hc12. * configure.in: Add S12X and XGATE co-processor support to m68hc11 target. * disassemble.c: Likewise. * configure: Regenerate. * m68hc11-dis.c: Make objdump output more consistent, use hex instead of decimal and use 0x prefix for hex. * m68hc11-opc.c: Add S12X and XGATE opcodes. * dis-asm.h (print_insn_m9s12x): Prototype. (print_insn_m9s12xg): Prototype. * m68hc11.h (R_M68HC12_16B, R_M68HC12_PCREL_9, R_M68HC12_PCREL_10) R_M68HC12_HI8XG, R_M68HC12_LO8XG): New relocations. (E_M68HC11_XGATE_RAMOFFSET): Define. * m68hc11.h: Add XGate definitions. (struct m68hc11_opcode): Add xg_mask field.
2012-05-15 14:55:51 +02:00
0+8000 <_start> bra 0x0+8074 <L3>
...
* config/tc-m68hc11.c: Add S12X and XGATE co-processor support. Add option to offset S12 addresses into XGATE memory space. Tweak target flags to match other tools. (i.e. -m m68hc11). * doc/as.texinfo: Mention new options. * doc/c-m68hc11.texi: Document new options. * NEWS: Mention new support. * archures.c: Add bfd_arch_m9s12x and bfd_arch_m9s12xg. * config.bfd: Likewise. * cpu-m9s12x.c: New. * cpu-m9s12xg.c: New. * elf32-m68hc12.c: Add S12X and XGATE co-processor support. Add option to offset S12 addresses into XGATE memory space. Fix carry bug in IMM16 (IMM8 low/high) relocate. * Makefile.am (ALL_MACHINES): Add cpu-m9s12x and cpu-m9s12xg. (ALL_MACHINES_CFILES): Likewise. * reloc.c: Add S12X relocs. * Makefile.in: Regenerate. * bfd-in2.h: Regenerate. * libbfd.h: Regenerate. * gas/m68hc11/insns9s12x.s: New * gas/m68hc11/insns9s12x.d: New * gas/m68hc11/hexprefix.s: New * gas/m68hc11/hexprefix.d: New * gas/m68hc11/9s12x-exg-sex-tfr.s: New * gas/m68hc11/9s12x-exg-sex-tfr.d: New * gas/m68hc11/insns9s12xg.s: New * gas/m68hc11/insns9s12xg.d: New * gas/m68hc11/9s12x-mov.s: New * gas/m68hc11/9s12x-mov.d: New * gas/m68hc11/m68hc11.exp: Updated * gas/m68hc11/*.d: Brought in line with changed objdump output. * gas/all/gas.exp: XFAIL all hc11/12 targets for redef2,3. * gas/elf/elf.exp: XFAIL all hc11/12 targets for redef. * gas/elf/dwarf2-1.d: Skip for hc11/12 targets. * gas/elf/dwarf2-2.d: Likewise. * ld-m68hc11/xgate-link.s: New. * ld-m68hc11/xgate-link.d: New. * ld-m68hc11/xgate-offset.s: New. * ld-m68hc11/xgate-offset.d: New. * ld-m68hc11/xgate1.s: New. * ld-m68hc11/xgate1.d: New. * ld-m68hc11/xgate2.s: New. * ld-m68hc11/m68hc11.exp: Updated. * ld-m68hc11/*.d: Brought in line with changed objdump output. * ld-gc/gc.exp: Update CFLAGS for m68hc11. * ld-plugin/plugin.exp: Likewise. * ld-srec/srec.exp: XFAIL for m68hc11 and m68hc12. * configure.in: Add S12X and XGATE co-processor support to m68hc11 target. * disassemble.c: Likewise. * configure: Regenerate. * m68hc11-dis.c: Make objdump output more consistent, use hex instead of decimal and use 0x prefix for hex. * m68hc11-opc.c: Add S12X and XGATE opcodes. * dis-asm.h (print_insn_m9s12x): Prototype. (print_insn_m9s12xg): Prototype. * m68hc11.h (R_M68HC12_16B, R_M68HC12_PCREL_9, R_M68HC12_PCREL_10) R_M68HC12_HI8XG, R_M68HC12_LO8XG): New relocations. (E_M68HC11_XGATE_RAMOFFSET): Define. * m68hc11.h: Add XGate definitions. (struct m68hc11_opcode): Add xg_mask field.
2012-05-15 14:55:51 +02:00
0+8016 <_start\+0x16> bra 0x0+8074 <L3>
0+8018 <L1> addd 0x0,x
0+801a <L1\+0x2> bne 0x0+8018 <L1>
0+801c <L1\+0x4> addd \*0x0+4 <_toto>
0+801e <L1\+0x6> beq 0x0+8018 <L1>
0+8020 <L1\+0x8> addd \*0x0+5 <_toto\+0x1>
0+8022 <L1\+0xa> bne 0x0+8018 <L1>
0+8024 <L1\+0xc> bgt 0x0+8018 <L1>
0+8026 <L1\+0xe> bge 0x0+8018 <L1>
0+8028 <L1\+0x10> beq 0x0+8018 <L1>
0+802a <L1\+0x12> ble 0x0+8018 <L1>
0+802c <L1\+0x14> blt 0x0+8018 <L1>
0+802e <L1\+0x16> bhi 0x0+8018 <L1>
0+8030 <L1\+0x18> bcc 0x0+8018 <L1>
0+8032 <L1\+0x1a> beq 0x0+8018 <L1>
0+8034 <L1\+0x1c> bls 0x0+8018 <L1>
0+8036 <L1\+0x1e> bcs 0x0+8018 <L1>
0+8038 <L1\+0x20> bcs 0x0+8018 <L1>
0+803a <L1\+0x22> bmi 0x0+8018 <L1>
0+803c <L1\+0x24> bvs 0x0+8018 <L1>
0+803e <L1\+0x26> bcc 0x0+8018 <L1>
0+8040 <L1\+0x28> bpl 0x0+8018 <L1>
0+8042 <L1\+0x2a> bvc 0x0+8018 <L1>
0+8044 <L1\+0x2c> bne 0x0+8018 <L1>
0+8046 <L1\+0x2e> brn 0x0+8018 <L1>
0+8048 <L1\+0x30> bra 0x0+8018 <L1>
0+804a <L1\+0x32> addd \*0x0+4 <_toto>
0+804c <L1\+0x34> addd \*0x0+4 <_toto>
0+804e <L1\+0x36> addd \*0x0+4 <_toto>
0+8050 <L1\+0x38> addd \*0x0+4 <_toto>
0+8052 <L1\+0x3a> addd \*0x0+4 <_toto>
0+8054 <L1\+0x3c> addd \*0x0+4 <_toto>
0+8056 <L1\+0x3e> addd \*0x0+4 <_toto>
0+8058 <L1\+0x40> addd \*0x0+4 <_toto>
0+805a <L1\+0x42> addd \*0x0+4 <_toto>
0+805c <L1\+0x44> addd \*0x0+4 <_toto>
0+805e <L1\+0x46> addd \*0x0+4 <_toto>
0+8060 <L1\+0x48> addd \*0x0+4 <_toto>
0+8062 <L1\+0x4a> addd \*0x0+4 <_toto>
0+8064 <L1\+0x4c> addd \*0x0+4 <_toto>
0+8066 <L1\+0x4e> addd \*0x0+4 <_toto>
0+8068 <L2> bra 0x0+8000 <_start>
0+806a <L2\+0x2> bne 0x0+8068 <L2>
0+806c <L2\+0x4> beq 0x0+8074 <L3>
0+806e <L2\+0x6> addd \*0x0+4 <_toto>
0+8070 <L2\+0x8> beq 0x0+8074 <L3>
0+8072 <L2\+0xa> addd \*0x0+4 <_toto>
0+8074 <L3> addd \*0x0+4 <_toto>
0+8076 <L3\+0x2> rts