2020-02-10 17:37:22 +01:00
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2020-02-10 H.J. Lu <hongjiu.lu@intel.com>
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PR gas/25516
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* config/tc-i386.c (intel64): Renamed to ...
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(isa64): This.
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(match_template): Accept Intel64 only instruction by default.
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(i386_displacement): Updated.
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(md_parse_option): Updated.
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* c-i386.texi: Update -mamd64/-mintel64 documentation.
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* testsuite/gas/i386/i386.exp: Run x86-64-sysenter. Pass
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-mamd64 to x86-64-sysenter-amd.
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* testsuite/gas/i386/x86-64-sysenter.d: New file.
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2020-02-06 15:12:45 +01:00
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2020-02-10 Alan Modra <amodra@gmail.com>
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* config/obj-elf.c (obj_elf_change_section): Error for section
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type, attr or entsize changes in assembly.
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* testsuite/gas/elf/elf.exp: Pass -Z to gas for section5 test.
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* testsuite/gas/elf/section5.l: Update.
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2020-02-10 01:57:16 +01:00
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2020-02-10 Alan Modra <amodra@gmail.com>
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* output-file.c (output_file_close): Do a normal close when
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flag_always_generate_output.
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* write.c (write_object_file): Don't stop output when
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flag_always_generate_output.
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2020-02-07 15:53:46 +01:00
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2020-02-07 Sergey Belyashov <sergey.belyashov@gmail.com>
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PR 25469
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* config/tc-z80.c: Add -gbz80 command line option to generate code
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for the GameBoy Z80. Add support for generating DWARF.
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* config/tc-z80.h: Add support for DWARF debug information
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generation.
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* doc/c-z80.texi: Document new command line option.
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* testsuite/gas/z80/gbz80_all.d: New file.
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* testsuite/gas/z80/gbz80_all.s: New file.
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* testsuite/gas/z80/z80.exp: Run the new tests.
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* testsuite/gas/z80/z80n_all.d: New file.
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* testsuite/gas/z80/z80n_all.s: New file.
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* testsuite/gas/z80/z80n_reloc.d: New file.
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ELF: Support the section flag 'o' in .section directive
As shown in
https://sourceware.org/bugzilla/show_bug.cgi?id=25490
--gc-sections will silently remove __patchable_function_entries section
and generate corrupt result. This patch adds the section flag 'o' to
.section directive:
.section __patchable_function_entries,"awo",@progbits,foo
.section __patchable_function_entries,"awoG",@progbits,foo,foo,comdat
.section __patchable_function_entries,"awo",@progbits,bar,unique,4
.section __patchable_function_entries,"awoG",@progbits,foo,foo,comdat,unique,1
which specifies the symbol name which the section references. Assmebler
will set its elf_linked_to_section to a local section where the symbol
is defined.
Linker is updated to call mark_hook if gc_mark of any of its linked-to
sections is set after all sections, except for backend specific ones,
have been garbage collected.
bfd/
PR gas/25381
* bfd-in2.h: Regenerated.
* elflink.c (_bfd_elf_gc_mark_extra_sections): Call mark_hook
on section if gc_mark of any of its linked-to sections is set
and don't set gc_mark again.
* section.c (asection): Add linked_to_symbol_name to map_head
union.
gas/
PR gas/25381
* config/obj-elf.c (get_section): Also check
linked_to_symbol_name.
(obj_elf_change_section): Also set map_head.linked_to_symbol_name.
(obj_elf_parse_section_letters): Handle the 'o' flag.
(build_group_lists): Renamed to ...
(build_additional_section_info): This. Set elf_linked_to_section
from map_head.linked_to_symbol_name.
(elf_adjust_symtab): Updated.
* config/obj-elf.h (elf_section_match): Add linked_to_symbol_name.
* doc/as.texi: Document the 'o' flag.
* testsuite/gas/elf/elf.exp: Run PR gas/25381 tests.
* testsuite/gas/elf/section18.d: New file.
* testsuite/gas/elf/section18.s: Likewise.
* testsuite/gas/elf/section19.d: Likewise.
* testsuite/gas/elf/section19.s: Likewise.
* testsuite/gas/elf/section20.d: Likewise.
* testsuite/gas/elf/section20.s: Likewise.
* testsuite/gas/elf/section21.d: Likewise.
* testsuite/gas/elf/section21.l: Likewise.
* testsuite/gas/elf/section21.s: Likewise.
ld/
PR ld/24526
PR ld/25021
PR ld/25490
* testsuite/ld-elf/elf.exp: Run PR ld/25490 tests.
* testsuite/ld-elf/pr24526.d: New file.
* testsuite/ld-elf/pr24526.s: Likewise.
* testsuite/ld-elf/pr25021.d: Likewise.
* testsuite/ld-elf/pr25021.s: Likewise.
* testsuite/ld-elf/pr25490-2-16.rd: Likewise.
* testsuite/ld-elf/pr25490-2-32.rd: Likewise.
* testsuite/ld-elf/pr25490-2-64.rd: Likewise.
* testsuite/ld-elf/pr25490-2.s: Likewise.
* testsuite/ld-elf/pr25490-3-16.rd: Likewise.
* testsuite/ld-elf/pr25490-3-32.rd: Likewise.
* testsuite/ld-elf/pr25490-3-64.rd: Likewise.
* testsuite/ld-elf/pr25490-3.s: Likewise.
* testsuite/ld-elf/pr25490-4-16.rd: Likewise.
* testsuite/ld-elf/pr25490-4-32.rd: Likewise.
* testsuite/ld-elf/pr25490-4-64.rd: Likewise.
* testsuite/ld-elf/pr25490-4.s: Likewise.
* testsuite/ld-elf/pr25490-5-16.rd: Likewise.
* testsuite/ld-elf/pr25490-5-32.rd: Likewise.
* testsuite/ld-elf/pr25490-5-64.rd: Likewise.
* testsuite/ld-elf/pr25490-5.s: Likewise.
* testsuite/ld-elf/pr25490-6-16.rd: Likewise.
* testsuite/ld-elf/pr25490-6-32.rd: Likewise.
* testsuite/ld-elf/pr25490-6-64.rd: Likewise.
* testsuite/ld-elf/pr25490-6.s: Likewise.
2020-02-07 03:04:58 +01:00
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2020-02-06 H.J. Lu <hongjiu.lu@intel.com>
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PR gas/25381
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* config/obj-elf.c (get_section): Also check
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linked_to_symbol_name.
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(obj_elf_change_section): Also set map_head.linked_to_symbol_name.
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(obj_elf_parse_section_letters): Handle the 'o' flag.
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(build_group_lists): Renamed to ...
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(build_additional_section_info): This. Set elf_linked_to_section
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from map_head.linked_to_symbol_name.
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(elf_adjust_symtab): Updated.
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* config/obj-elf.h (elf_section_match): Add linked_to_symbol_name.
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* doc/as.texi: Document the 'o' flag.
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* testsuite/gas/elf/elf.exp: Run PR gas/25381 tests.
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* testsuite/gas/elf/section18.d: New file.
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* testsuite/gas/elf/section18.s: Likewise.
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* testsuite/gas/elf/section19.d: Likewise.
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* testsuite/gas/elf/section19.s: Likewise.
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* testsuite/gas/elf/section20.d: Likewise.
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* testsuite/gas/elf/section20.s: Likewise.
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* testsuite/gas/elf/section21.d: Likewise.
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* testsuite/gas/elf/section21.l: Likewise.
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* testsuite/gas/elf/section21.s: Likewise.
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2020-02-06 16:50:16 +01:00
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2020-02-06 H.J. Lu <hongjiu.lu@intel.com>
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* NEWS: Mention x86 assembler options to align branches for
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binutils 2.34.
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2020-02-06 13:44:39 +01:00
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2020-02-06 H.J. Lu <hongjiu.lu@intel.com>
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* testsuite/gas/i386/i386.exp: Run unique and x86-64-unique
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only for ELF targets.
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* testsuite/gas/i386/unique.d: Don't xfail.
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* testsuite/gas/i386/x86-64-unique.d: Likewise.
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2020-02-06 01:22:29 +01:00
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2020-02-06 Alan Modra <amodra@gmail.com>
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* testsuite/gas/i386/unique.d: xfail for non-elf targets.
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* testsuite/gas/i386/x86-64-unique.d: Likewise.
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2020-02-05 06:49:17 +01:00
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2020-02-06 Alan Modra <amodra@gmail.com>
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* testsuite/gas/elf/section12a.d: Use supports_gnu_osabi in
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xfail, and rename test.
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* testsuite/gas/elf/section12b.d: Likewise.
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* testsuite/gas/elf/section16a.d: Likewise.
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* testsuite/gas/elf/section16b.d: Likewise.
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ELF: Add support for unique section ID to assembler
Clang's integrated assembler supports multiple section with the same
name:
.section .text,"ax",@progbits,unique,1
nop
.section .text,"ax",@progbits,unique,2
nop
"unique,N" assigns the number, N, as the section ID, to a section. The
valid values of the section ID are between 0 and 4294967295. It can be
used to distinguish different sections with the same section name.
This is useful with -fno-unique-section-names -ffunction-sections.
-ffunction-sections by default generates .text.foo, .text.bar, etc.
Using the same string can save lots of space in .strtab.
This patch adds section_id to bfd_section and reuses the linker
internal bit in BFD section flags, SEC_LINKER_CREATED, for assmebler
internal use to mark valid section_id. It also updates objdump to
compare section pointers if 2 sections comes from the same file since
2 different sections can have the same section name.
bfd/
PR gas/25380
* bfd-in2.h: Regenerated.
* ecoff.c (bfd_debug_section): Add section_id.
* section.c (bfd_section): Add section_id.
(SEC_ASSEMBLER_SECTION_ID): New.
(BFD_FAKE_SECTION): Add section_id.
binutils/
PR gas/25380
* objdump.c (sym_ok): Return FALSE if 2 sections are in the
same file with different section pointers.
gas/
PR gas/25380
* config/obj-elf.c (section_match): Removed.
(get_section): Also match SEC_ASSEMBLER_SECTION_ID and
section_id.
(obj_elf_change_section): Replace info and group_name arguments
with match_p. Also update the section ID and flags from match_p.
(obj_elf_section): Handle "unique,N". Update call to
obj_elf_change_section.
* config/obj-elf.h (elf_section_match): New.
(obj_elf_change_section): Updated.
* config/tc-arm.c (start_unwind_section): Update call to
obj_elf_change_section.
* config/tc-ia64.c (obj_elf_vms_common): Likewise.
* config/tc-microblaze.c (microblaze_s_data): Likewise.
(microblaze_s_sdata): Likewise.
(microblaze_s_rdata): Likewise.
(microblaze_s_bss): Likewise.
* config/tc-mips.c (s_change_section): Likewise.
* config/tc-msp430.c (msp430_profiler): Likewise.
* config/tc-rx.c (parse_rx_section): Likewise.
* config/tc-tic6x.c (tic6x_start_unwind_section): Likewise.
* doc/as.texi: Document "unique,N" in .section directive.
* testsuite/gas/elf/elf.exp: Run "unique,N" tests.
* testsuite/gas/elf/section15.d: New file.
* testsuite/gas/elf/section15.s: Likewise.
* testsuite/gas/elf/section16.s: Likewise.
* testsuite/gas/elf/section16a.d: Likewise.
* testsuite/gas/elf/section16b.d: Likewise.
* testsuite/gas/elf/section17.d: Likewise.
* testsuite/gas/elf/section17.l: Likewise.
* testsuite/gas/elf/section17.s: Likewise.
* testsuite/gas/i386/unique.d: Likewise.
* testsuite/gas/i386/unique.s: Likewise.
* testsuite/gas/i386/x86-64-unique.d: Likewise.
* testsuite/gas/i386/i386.exp: Run unique and x86-64-unique.
ld/
PR gas/25380
* testsuite/ld-i386/pr22001-1c.S: Use "unique,N" in .section
directives.
* testsuite/ld-i386/tls-gd1.S: Likewise.
* testsuite/ld-x86-64/pr21481b.S: Likewise.
2020-02-03 02:07:51 +01:00
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2020-02-02 H.J. Lu <hongjiu.lu@intel.com>
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PR gas/25380
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* config/obj-elf.c (section_match): Removed.
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(get_section): Also match SEC_ASSEMBLER_SECTION_ID and
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section_id.
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(obj_elf_change_section): Replace info and group_name arguments
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with match_p. Also update the section ID and flags from match_p.
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(obj_elf_section): Handle "unique,N". Update call to
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obj_elf_change_section.
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* config/obj-elf.h (elf_section_match): New.
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(obj_elf_change_section): Updated.
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* config/tc-arm.c (start_unwind_section): Update call to
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obj_elf_change_section.
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* config/tc-ia64.c (obj_elf_vms_common): Likewise.
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* config/tc-microblaze.c (microblaze_s_data): Likewise.
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(microblaze_s_sdata): Likewise.
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(microblaze_s_rdata): Likewise.
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(microblaze_s_bss): Likewise.
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* config/tc-mips.c (s_change_section): Likewise.
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* config/tc-msp430.c (msp430_profiler): Likewise.
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* config/tc-rx.c (parse_rx_section): Likewise.
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* config/tc-tic6x.c (tic6x_start_unwind_section): Likewise.
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* doc/as.texi: Document "unique,N" in .section directive.
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* testsuite/gas/elf/elf.exp: Run "unique,N" tests.
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* testsuite/gas/elf/section15.d: New file.
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* testsuite/gas/elf/section15.s: Likewise.
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* testsuite/gas/elf/section16.s: Likewise.
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* testsuite/gas/elf/section16a.d: Likewise.
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* testsuite/gas/elf/section16b.d: Likewise.
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* testsuite/gas/elf/section17.d: Likewise.
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* testsuite/gas/elf/section17.l: Likewise.
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* testsuite/gas/elf/section17.s: Likewise.
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* testsuite/gas/i386/unique.d: Likewise.
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* testsuite/gas/i386/unique.s: Likewise.
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* testsuite/gas/i386/x86-64-unique.d: Likewise.
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* testsuite/gas/i386/i386.exp: Run unique and x86-64-unique.
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2020-02-02 17:20:18 +01:00
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2020-02-02 H.J. Lu <hongjiu.lu@intel.com>
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* testsuite/gas/elf/section13.s: Replace @nobits with %nobits.
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2020-02-02 02:59:19 +01:00
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2020-02-01 Anthony Green <green@moxielogic.com>
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* config/tc-moxie.c (md_begin): Don't force big-endian mode.
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2020-01-31 19:32:48 +01:00
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2020-01-31 Sandra Loosemore <sandra@codesourcery.com>
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* config/tc-nios2.c (nios2_cons): Handle %gotoff as well as
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%tls_ldo.
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2020-01-31 18:13:18 +01:00
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2020-01-31 Andre Vieira <andre.simoesdiasvieira@arm.com>
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PR gas/25472
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* config/tc-arm.c (armv8m_main_ext_table): Refactored +dsp adding.
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(armv8_1m_main_ext_table): Refactored +dsp adding and enabled dsp for
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+mve.
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* testsuite/gas/arm/mve_dsp.d: New test.
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2020-01-31 17:43:57 +01:00
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2020-01-31 Nick Clifton <nickc@redhat.com>
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* config/tc-s390.c (s390_elf_suffix): Return ELF_SUFFIX_NONE
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rather than BFD_RELOC_NONE.
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2020-01-31 17:16:19 +01:00
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2020-01-31 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
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* config/tc-arm.c (fldmias): Moved inside "THUMB_VARIANT & arm_ext_v6t2"
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to support VLDMIA instruction for MVE.
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(fldmdbs): Moved inside "THUMB_VARIANT & arm_ext_v6t2" to support VLDMDB
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instruction for MVE.
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(fstmias): Moved inside "THUMB_VARIANT & arm_ext_v6t2" to support VSTMIA
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instruction for MVE.
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(fstmdbs): Moved inside "THUMB_VARIANT & arm_ext_v6t2" to support VSTMDB
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instruction for MVE.
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* testsuite/gas/arm/mve-ldst.d: New test.
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* testsuite/gas/arm/mve-ldst.s: Likewise.
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2020-01-31 15:45:51 +01:00
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2020-01-31 Nick Clifton <nickc@redhat.com>
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* po/fr.po: Updated French translation.
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* po/ru.po: Updated Russian translation.
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2020-01-31 09:03:56 +01:00
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2020-01-31 Richard Sandiford <richard.sandiford@arm.com>
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* testsuite/gas/aarch64/sve-bfloat-movprfx.s: Use .h rather than
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.s for the movprfx.
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* testsuite/gas/aarch64/sve-bfloat-movprfx.d: Update accordingly.
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* testsuite/gas/aarch64/sve-movprfx_28.d,
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* testsuite/gas/aarch64/sve-movprfx_28.l,
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* testsuite/gas/aarch64/sve-movprfx_28.s: New test.
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2020-01-30 17:03:22 +01:00
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2020-01-30 Jan Beulich <jbeulich@suse.com>
|
|
|
|
|
|
|
|
|
|
* config/tc-i386.c (output_disp): Tighten base_opcode check.
|
|
|
|
|
* testsuite/gas/i386/got.s: Add LSL, MOVLPS, and BNDCN cases.
|
|
|
|
|
* testsuite/gas/i386/got-no-relax.d, testsuite/gas/i386/got.d:
|
|
|
|
|
Adjust expectations.
|
|
|
|
|
|
2020-01-30 13:59:04 +01:00
|
|
|
|
2020-01-30 Jose E. Marchesi <jose.marchesi@oracle.com>
|
|
|
|
|
|
|
|
|
|
* testsuite/gas/bpf/alu.d: Update expected opcode for `neg'.
|
|
|
|
|
* testsuite/gas/bpf/alu-be.d: Likewise.
|
|
|
|
|
* testsuite/gas/bpf/alu32.d: Likewise for `neg32'.
|
|
|
|
|
* testsuite/gas/bpf/alu32-be.d: Likewise.
|
|
|
|
|
|
2020-01-30 11:36:33 +01:00
|
|
|
|
2020-01-30 Jan Beulich <jbeulich@suse.com>
|
|
|
|
|
|
|
|
|
|
* testsuite/gas/i386/x86-64-branch-2.s,
|
|
|
|
|
testsuite/gas/i386/x86-64-branch-4.s,
|
|
|
|
|
testsuite/gas/i386/x86-64-branch.s: Add RETW cases.
|
|
|
|
|
* testsuite/gas/i386/ilp32/x86-64-branch.d,
|
|
|
|
|
testsuite/gas/i386/x86-64-branch-2.d,
|
|
|
|
|
testsuite/gas/i386/x86-64-branch-4.l,
|
|
|
|
|
testsuite/gas/i386/x86-64-branch.d: Adjust expectations.
|
|
|
|
|
|
2020-01-30 11:35:20 +01:00
|
|
|
|
2020-01-30 Jan Beulich <jbeulich@suse.com>
|
|
|
|
|
|
|
|
|
|
* config/tc-i386.c (process_suffix): .
|
|
|
|
|
testsuite/gas/i386/noreg64.s: Add IRET and LRET cases.
|
|
|
|
|
testsuite/gas/i386/x86-64-opcode.s: Add suffix to IRET and LRET.
|
|
|
|
|
Add LRETQ case.
|
|
|
|
|
testsuite/gas/i386/x86-64-suffix.s: Drop IRET case without
|
|
|
|
|
suffix.
|
|
|
|
|
testsuite/gas/i386/x86_64.s: Add RETF cases.
|
|
|
|
|
* testsuite/gas/i386/k1om.d, testsuite/gas/i386/l1om.d,
|
|
|
|
|
testsuite/gas/i386/noreg64.d, testsuite/gas/i386/noreg64.l,
|
|
|
|
|
testsuite/gas/i386/x86-64-opcode.d,
|
|
|
|
|
testsuite/gas/i386/x86-64-suffix-intel.d,
|
|
|
|
|
testsuite/gas/i386/x86-64-suffix.d,
|
|
|
|
|
testsuite/gas/i386/x86_64-intel.d
|
|
|
|
|
testsuite/gas/i386/x86_64.d: Adjust expectations.
|
|
|
|
|
* testsuite/gas/i386/x86-64-suffix.e,
|
|
|
|
|
testsuite/gas/i386/x86_64.e: New.
|
|
|
|
|
|
2020-01-30 11:33:53 +01:00
|
|
|
|
2020-01-30 Jan Beulich <jbeulich@suse.com>
|
|
|
|
|
|
|
|
|
|
* config/tc-i386.c (process_suffix): Redo and move FLDENV et al
|
|
|
|
|
special case.
|
|
|
|
|
|
2020-01-27 13:38:10 +01:00
|
|
|
|
2020-01-27 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
|
|
|
PR binutils/25445
|
|
|
|
|
* config/tc-i386.c (check_long_reg): Also convert to QWORD for
|
|
|
|
|
movsxd.
|
|
|
|
|
* doc/c-i386.texi: Add a node for AMD64 vs. Intel64 ISA
|
|
|
|
|
differences. Document movslq and movsxd.
|
|
|
|
|
* testsuite/gas/i386/i386.exp: Run PR binutils/25445 tests.
|
|
|
|
|
* testsuite/gas/i386/x86-64-movsxd-intel.d: New file.
|
|
|
|
|
* testsuite/gas/i386/x86-64-movsxd-intel64-intel.d: Likewise.
|
|
|
|
|
* testsuite/gas/i386/x86-64-movsxd-intel64-inval.l: Likewise.
|
|
|
|
|
* testsuite/gas/i386/x86-64-movsxd-intel64-inval.s: Likewise.
|
|
|
|
|
* testsuite/gas/i386/x86-64-movsxd-intel64.d: Likewise.
|
|
|
|
|
* testsuite/gas/i386/x86-64-movsxd-intel64.s: Likewise.
|
|
|
|
|
* testsuite/gas/i386/x86-64-movsxd-inval.l: Likewise.
|
|
|
|
|
* testsuite/gas/i386/x86-64-movsxd-inval.s: Likewise.
|
|
|
|
|
* testsuite/gas/i386/x86-64-movsxd.d: Likewise.
|
|
|
|
|
* testsuite/gas/i386/x86-64-movsxd.s: Likewise.
|
|
|
|
|
|
2020-01-27 01:21:52 +01:00
|
|
|
|
2020-01-27 Alan Modra <amodra@gmail.com>
|
|
|
|
|
|
|
|
|
|
* testsuite/gas/all/gas.exp: Replace case statements with switch
|
|
|
|
|
statements.
|
|
|
|
|
* testsuite/gas/elf/elf.exp: Likewise.
|
|
|
|
|
* testsuite/gas/macros/macros.exp: Likewise.
|
|
|
|
|
* testsuite/lib/gas-defs.exp: Likewise.
|
|
|
|
|
|
2020-01-27 11:40:02 +01:00
|
|
|
|
2020-01-27 Tamar Christina <tamar.christina@arm.com>
|
|
|
|
|
|
|
|
|
|
PR 25403
|
|
|
|
|
* testsuite/gas/aarch64/armv8_4-a.d: Add cfinv.
|
|
|
|
|
* testsuite/gas/aarch64/armv8_4-a.s: Likewise.
|
|
|
|
|
|
2020-01-23 01:45:04 +01:00
|
|
|
|
2020-01-22 Maxim Blinov <maxim.blinov@embecosm.com>
|
|
|
|
|
|
|
|
|
|
* testsuite/gas/riscv/march-ok-s.d: sx is no longer valid and
|
|
|
|
|
s exts must be known, so rename *ok* to *fail*.
|
|
|
|
|
* testsuite/gas/riscv/march-ok-sx.d: Likewise.
|
|
|
|
|
* testsuite/gas/riscv/march-ok-s-with-version: Likewise.
|
|
|
|
|
* testsuite/gas/riscv/march-fail-s.l: Expected error messages for
|
|
|
|
|
above change.
|
|
|
|
|
* testsuite/gas/riscv/march-fail-sx.l: Likewise.
|
|
|
|
|
* testsuite/gas/riscv/march-fail-sx-with-version.l: Likewise.
|
|
|
|
|
|
2020-01-22 18:24:14 +01:00
|
|
|
|
2020-01-22 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
|
|
|
PR gas/25438
|
|
|
|
|
* config/tc-i386.c (check_long_reg): Always disallow double word
|
|
|
|
|
suffix in mnemonic with word general register.
|
|
|
|
|
* testsuite/gas/i386/general.s: Replace word general register
|
|
|
|
|
with double word general register for movl.
|
|
|
|
|
* testsuite/gas/i386/inval.s: Add tests for movl with word general
|
|
|
|
|
register.
|
|
|
|
|
* testsuite/gas/i386/general.l: Updated.
|
|
|
|
|
* testsuite/gas/i386/inval.l: Likewise.
|
|
|
|
|
|
PowerPC64 __tls_get_addr_desc
This implements register saving and restoring in the __tls_get_addr
call stub, so that when glibc supports the optimized tls call stub gcc
can generate code that assumes only r0, r12 and of course r3 are
changed on a __tls_get_addr call. When gcc expects __tls_get_addr
calls to preserve registers the call will be to __tls_get_addr_desc,
which will be translated by the linker to a call to __tls_get_addr_opt.
bfd/
* elf64-ppc.h (struct ppc64_elf_params): Add no_tls_get_addr_regsave.
* elf64-ppc.c (struct ppc_link_hash_table): Add tga_desc and
tga_desc_fd.
(is_tls_get_addr): Match tga_desc and tga_desc_df too.
(STDU_R1_0R1, ADDI_R1_R1): Define.
(tls_get_addr_prologue, tls_get_addr_epilogue): New functions.
(ppc64_elf_tls_setup): Set up tga_desc and tga_desc_fd. Indirect
tga_desc_fd to opt_fd, and tga_desc to opt. Set
no_tls_get_addr_regsave.
(branch_reloc_hash_match): Add hash3 and hash4.
(ppc64_elf_tls_optimize): Handle tga_desc_fd and tga_desc too.
(ppc64_elf_size_dynamic_sections): Likewise.
(ppc64_elf_relocate_section): Likewise.
(plt_stub_size, build_plt_stub): Likewise. Size regsave
__tls_get_addr stub.
(build_tls_get_addr_stub): Build regsave __tls_get_addr stub and
eh_frame.
(ppc_size_one_stub): Handle tga_desc_fd and tga_desc too. Size
eh_frame for regsave __tls_get_addr.
gas/
* config/tc-ppc.c (parse_tls_arg): Handle tls arg for
__tls_get_addr_desc and __tls_get_addr_opt.
ld/
* emultempl/ppc64elf.em (ppc64_opt, PARSE_AND_LIST_LONGOPTS),
(PARSE_AND_LIST_OPTIONS, PARSE_AND_LIST_ARGS_CASES): Support
--tls-get-addr-regsave and --no-tls-get-addr-regsave.
(params): Init new field.
* ld.texi (--tls-get-addr-regsave, --no-tls-get-addr-regsave):
Document.
* testsuite/ld-powerpc/tlsdesc.s,
* testsuite/ld-powerpc/tlsdesc.d,
* testsuite/ld-powerpc/tlsdesc.wf,
* testsuite/ld-powerpc/tlsdesc2.d,
* testsuite/ld-powerpc/tlsdesc2.wf,
* testsuite/ld-powerpc/tlsexenors.d,
* testsuite/ld-powerpc/tlsexenors.r,
* testsuite/ld-powerpc/tlsexers.d,
* testsuite/ld-powerpc/tlsexers.r,
* testsuite/ld-powerpc/tlsexetocnors.d,
* testsuite/ld-powerpc/tlsexetocrs.d,
* testsuite/ld-powerpc/tlsexetocrs.r,
* testsuite/ld-powerpc/tlsopt6.d,
* testsuite/ld-powerpc/tlsopt6.wf: New.
* testsuite/ld-powerpc/powerpc.exp: Run new tests.
2020-01-20 03:08:00 +01:00
|
|
|
|
2020-01-22 Alan Modra <amodra@gmail.com>
|
|
|
|
|
|
|
|
|
|
* config/tc-ppc.c (parse_tls_arg): Handle tls arg for
|
|
|
|
|
__tls_get_addr_desc and __tls_get_addr_opt.
|
|
|
|
|
|
2020-01-21 14:41:05 +01:00
|
|
|
|
2020-01-21 Jan Beulich <jbeulich@suse.com>
|
|
|
|
|
|
|
|
|
|
* testsuite/gas/i386/inval-crc32.s,
|
|
|
|
|
testsuite/gas/i386/x86-64-inval-crc32.s: Add alignment directive.
|
|
|
|
|
* testsuite/gas/i386/inval-crc32.l,
|
|
|
|
|
testsuite/gas/i386/x86-64-inval-crc32.l: Adjust expectations.
|
|
|
|
|
|
2020-01-21 08:30:05 +01:00
|
|
|
|
2020-01-21 Jan Beulich <jbeulich@suse.com>
|
|
|
|
|
|
|
|
|
|
* config/tc-i386.c (process_suffix): Merge CRC32 handling into
|
|
|
|
|
generic code path. Deal with No_lSuf being set in a template.
|
|
|
|
|
* testsuite/gas/i386/inval-crc32.l,
|
|
|
|
|
testsuite/gas/i386/x86-64-inval-crc32.l: Expect warning(s)
|
|
|
|
|
instead of error(s) when operand size is ambiguous.
|
|
|
|
|
* testsuite/gas/i386/noreg16.s, testsuite/gas/i386/noreg32.s,
|
|
|
|
|
testsuite/gas/i386/noreg64.s: Add CRC32 tests.
|
|
|
|
|
* testsuite/gas/i386/noreg16.d, testsuite/gas/i386/noreg16.l,
|
|
|
|
|
testsuite/gas/i386/noreg32.d, testsuite/gas/i386/noreg32.l,
|
|
|
|
|
testsuite/gas/i386/noreg64.d, testsuite/gas/i386/noreg64.l:
|
|
|
|
|
Adjust expectations.
|
|
|
|
|
|
x86: improve handling of insns with ambiguous operand sizes
Commit b76bc5d54e ("x86: don't default variable shift count insns to
8-bit operand size") pointed out a very bad case, but the underlying
problem is, as mentioned on various occasions, much larger: Silently
selecting a (nowhere documented afaict) certain default operand size
when there's no "sizing" suffix and no suitable register operand(s) is
simply dangerous (for the programmer to make mistakes).
While in Intel syntax mode such mistakes already lead to an error (which
is going to remain that way), AT&T syntax mode now gains warnings in
such cases by default, which can be suppressed or promoted to an error
if so desired by the programmer. Furthermore at least general purpose
insns now consistently have a default applied (alongside the warning
emission), rather than accepting some and refusing others.
No warnings are (as before) to be generated for "DefaultSize" insns as
well as ones acting on selector and other fixed-width values. For
SYSRET, however, the DefaultSize needs to be dropped - it had been
wrongly put there in the first place, as it's unrelated to .code16gcc
(no stack accesses involved).
As set forth as a prereq when I first mentioned this intended change a
few years back, Linux as well as gcc have meanwhile been patched to
avoid (emission of) ambiguous operands (and hence triggering of the new
warning).
Note that I think that in 64-bit mode IRET and far RET would better get
a diagnostic too, as it's reasonably likely that a suffix-less instance
really is meant to be a 64-bit one. But I guess I better make this a
separate follow-on patch.
Note further that floating point operations with integer operands are an
exception for now: They continue to use short (16-bit) operands by
default even in 32- and 64-bit modes.
Finally note that while {,V}PCMPESTR{I,M} would, strictly speaking, also
need to be diagnosed, with their 64-bit forms not being very useful I
think it is better to continue to avoid warning about them (by way of
them carrying IgnoreSize attributes).
2020-01-21 08:28:25 +01:00
|
|
|
|
2020-01-21 Jan Beulich <jbeulich@suse.com>
|
|
|
|
|
|
|
|
|
|
* config/tc-i386.c (process_suffix): Drop SYSRET special case
|
|
|
|
|
and an intel_syntax check. Re-write lack-of-suffix processing
|
|
|
|
|
logic.
|
|
|
|
|
* doc/c-i386.texi: Document operand size defaults for suffix-
|
|
|
|
|
less AT&T syntax insns.
|
|
|
|
|
* testsuite/gas/i386/bundle.s, testsuite/gas/i386/lock-1.s,
|
|
|
|
|
testsuite/gas/i386/opcode.s, testsuite/gas/i386/sse3.s,
|
|
|
|
|
testsuite/gas/i386/x86-64-avx-scalar.s,
|
|
|
|
|
testsuite/gas/i386/x86-64-avx.s,
|
|
|
|
|
testsuite/gas/i386/x86-64-bundle.s,
|
|
|
|
|
testsuite/gas/i386/x86-64-intel64.s,
|
|
|
|
|
testsuite/gas/i386/x86-64-lock-1.s,
|
|
|
|
|
testsuite/gas/i386/x86-64-opcode.s,
|
|
|
|
|
testsuite/gas/i386/x86-64-sse2avx.s,
|
|
|
|
|
testsuite/gas/i386/x86-64-sse3.s: Add missing suffixes.
|
|
|
|
|
* testsuite/gas/i386/nops.s, testsuite/gas/i386/sse-noavx.s,
|
|
|
|
|
testsuite/gas/i386/x86-64-nops.s,
|
|
|
|
|
testsuite/gas/i386/x86-64-ptwrite.s,
|
|
|
|
|
testsuite/gas/i386/x86-64-simd.s,
|
|
|
|
|
testsuite/gas/i386/x86-64-sse-noavx.s,
|
|
|
|
|
testsuite/gas/i386/x86-64-suffix.s: Drop bogus suffix-less
|
|
|
|
|
insns.
|
|
|
|
|
* testsuite/gas/i386/noreg16.s, testsuite/gas/i386/noreg32.s,
|
|
|
|
|
testsuite/gas/i386/noreg64.s: Add further tests.
|
|
|
|
|
* testsuite/gas/i386/ilp32/x86-64-nops.d,
|
|
|
|
|
testsuite/gas/i386/nops.d, testsuite/gas/i386/noreg16.d,
|
|
|
|
|
testsuite/gas/i386/noreg32.d, testsuite/gas/i386/noreg64.d,
|
|
|
|
|
testsuite/gas/i386/sse-noavx.d,
|
|
|
|
|
testsuite/gas/i386/x86-64-intel64.d,
|
|
|
|
|
testsuite/gas/i386/x86-64-nops.d,
|
|
|
|
|
testsuite/gas/i386/x86-64-opcode.d,
|
|
|
|
|
testsuite/gas/i386/x86-64-ptwrite-intel.d,
|
|
|
|
|
testsuite/gas/i386/x86-64-ptwrite.d,
|
|
|
|
|
testsuite/gas/i386/x86-64-simd-intel.d,
|
|
|
|
|
testsuite/gas/i386/x86-64-simd-suffix.d,
|
|
|
|
|
testsuite/gas/i386/x86-64-simd.d,
|
|
|
|
|
testsuite/gas/i386/x86-64-sse-noavx.d
|
|
|
|
|
testsuite/gas/i386/x86-64-suffix.d,
|
|
|
|
|
testsuite/gas/i386/x86-64-suffix-intel.d: Adjust expectations.
|
|
|
|
|
* testsuite/gas/i386/noreg16.l, testsuite/gas/i386/noreg32.l,
|
|
|
|
|
testsuite/gas/i386/noreg64.l: New.
|
|
|
|
|
* testsuite/gas/i386/i386.exp: Run new tests.
|
|
|
|
|
|
2020-01-21 08:25:31 +01:00
|
|
|
|
2020-01-21 Jan Beulich <jbeulich@suse.com>
|
|
|
|
|
|
|
|
|
|
* testsuite/gas/i386/avx512_bf16_vl.s,
|
|
|
|
|
testsuite/gas/i386/x86-64-avx512_bf16_vl.s: Add broadcast forms
|
|
|
|
|
of VCVTNEPS2BF16{X,Y}. Add operand-size less Intel syntax
|
|
|
|
|
broadcast forms of VCVTNEPS2BF16.
|
|
|
|
|
* testsuite/gas/i386/avx512_bf16_vl.d,
|
|
|
|
|
testsuite/gas/i386/x86-64-avx512_bf16_vl.d: Adjust expectations.
|
|
|
|
|
|
2020-01-20 16:10:23 +01:00
|
|
|
|
2020-01-20 Nick Clifton <nickc@redhat.com>
|
|
|
|
|
|
|
|
|
|
* po/uk.po: Updated Ukranian translation.
|
|
|
|
|
|
x86-64: Fix TLSDESC relaxation for x32
For x32, we must encode "lea x@TLSDESC(%rip), %reg" with a REX prefix
even if it isn't required. Otherwise linker can’t safely perform
GDesc -> IE/LE optimization. X32 TLSDESC sequences can be:
40 8d 05 00 00 00 00 rex lea x@TLSDESC(%rip), %reg
...
67 ff 10 call *x@TLSCALL(%eax)
or the same sequence as LP64:
48 8d 05 00 00 00 00 lea foo@TLSDESC(%rip), %reg
...
ff 10 call *foo@TLSCALL(%rax)
We need to support both sequences for x32. For both GDesc -> IE/LE
transitions,
67 ff 10 call *x@TLSCALL(%eax)
should relaxed to
0f 1f 00 nopl (%rax)
For GDesc -> LE transition,
40 8d 05 00 00 00 00 rex lea x@TLSDESC(%rip), %reg
should relaxed to
40 c7 c0 fc ff ff ff rex movl $x@tpoff, %reg
For GDesc -> IE transition,
40 8d 05 00 00 00 00 rex lea x@TLSDESC(%rip), %reg
should relaxed to
40 8b 05 00 00 00 00 rex movl x@gottpoff(%rip), %eax
bfd/
PR ld/25416
* elf64-x86-64.c (elf_x86_64_check_tls_transition): Support
"rex leal x@tlsdesc(%rip), %reg" and "call *x@tlsdesc(%eax)" in
X32 mode.
(elf_x86_64_relocate_section): In x32 mode, for GDesc -> LE
transition, relax "rex leal x@tlsdesc(%rip), %reg" to
"rex movl $x@tpoff, %reg", for GDesc -> IE transition, relax
"rex leal x@tlsdesc(%rip), %reg" to
"rex movl x@gottpoff(%rip), %eax". For both transitions, relax
"call *(%eax)" to "nopl (%rax)".
gas/
PR ld/25416
* config/tc-i386.c (output_insn): Add a dummy REX_OPCODE prefix
for lea with R_X86_64_GOTPC32_TLSDESC relocation when generating
x32 object.
* testsuite/gas/i386/ilp32/x32-tls.d: Updated.
* testsuite/gas/i386/ilp32/x32-tls.s: Add tests for lea with
R_X86_64_GOTPC32_TLSDESC relocation.
ld/
PR ld/25416
* testsuite/ld-x86-64/pr25416-1.s: New file
* testsuite/ld-x86-64/pr25416-1a.d: Likewise.
* testsuite/ld-x86-64/pr25416-1b.d: Likewise.
* testsuite/ld-x86-64/pr25416-1.s: Likewise.
* testsuite/ld-x86-64/pr25416-2.s: Likewise.
* testsuite/ld-x86-64/pr25416-2a.d: Likewise.
* testsuite/ld-x86-64/pr25416-2b.d: Likewise.
* testsuite/ld-x86-64/pr25416-3.d: Likewise.
* testsuite/ld-x86-64/pr25416-3.s: Likewise.
* testsuite/ld-x86-64/pr25416-4.d: Likewise.
* testsuite/ld-x86-64/pr25416-4.s: Likewise.
* testsuite/ld-x86-64/pr25416-5a.c: Likewise.
* testsuite/ld-x86-64/pr25416-5b.s: Likewise.
* testsuite/ld-x86-64/pr25416-5c.s: Likewise.
* testsuite/ld-x86-64/pr25416-5d.s: Likewise.
* testsuite/ld-x86-64/pr25416-5e.s: Likewise.
* testsuite/ld-x86-64/x86-64.exp: Run PR ld/25416 tests.
2020-01-20 15:58:51 +01:00
|
|
|
|
2020-01-20 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
|
|
|
PR ld/25416
|
|
|
|
|
* config/tc-i386.c (output_insn): Add a dummy REX_OPCODE prefix
|
|
|
|
|
for lea with R_X86_64_GOTPC32_TLSDESC relocation when generating
|
|
|
|
|
x32 object.
|
|
|
|
|
* testsuite/gas/i386/ilp32/x32-tls.d: Updated.
|
|
|
|
|
* testsuite/gas/i386/ilp32/x32-tls.s: Add tests for lea with
|
|
|
|
|
R_X86_64_GOTPC32_TLSDESC relocation.
|
|
|
|
|
|
2020-01-18 15:12:07 +01:00
|
|
|
|
2020-01-18 Nick Clifton <nickc@redhat.com>
|
|
|
|
|
|
|
|
|
|
* configure: Regenerate.
|
|
|
|
|
* po/gas.pot: Regenerate.
|
|
|
|
|
|
2020-01-18 14:50:25 +01:00
|
|
|
|
2020-01-18 Nick Clifton <nickc@redhat.com>
|
|
|
|
|
|
|
|
|
|
Binutils 2.34 branch created.
|
|
|
|
|
|
2020-01-17 16:07:55 +01:00
|
|
|
|
2020-01-17 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
|
|
|
* config/tc-i386.c (_i386_insn): Replace vex_encoding_vex2
|
|
|
|
|
with vex_encoding_vex.
|
|
|
|
|
(parse_insn): Likewise.
|
|
|
|
|
* doc/c-i386.texi: Replace {vex2} with {vex}. Update {vex}
|
|
|
|
|
and {vex3} documentation.
|
|
|
|
|
* testsuite/gas/i386/pseudos.s: Replace 3 {vex2} tests with
|
|
|
|
|
{vex}.
|
|
|
|
|
* testsuite/gas/i386/x86-64-pseudos.s: Likewise.
|
|
|
|
|
|
2020-01-16 14:50:52 +01:00
|
|
|
|
2020-01-16 Andre Vieira <andre.simoesdiasvieira@arm.com>
|
|
|
|
|
|
|
|
|
|
PR 25376
|
|
|
|
|
* config/tc-arm.c (mve_ext, mve_fp_ext): Use CORE_HIGH.
|
|
|
|
|
(armv8_1m_main_ext_table): Use CORE_HIGH for mve.
|
|
|
|
|
* testsuite/arm/armv8_1-m-fpu-mve-1.s: New.
|
|
|
|
|
* testsuite/arm/armv8_1-m-fpu-mve-1.d: New.
|
|
|
|
|
* testsuite/arm/armv8_1-m-fpu-mve-2.s: New.
|
|
|
|
|
* testsuite/arm/armv8_1-m-fpu-mve-2.d: New.
|
|
|
|
|
|
2020-01-16 10:07:36 +01:00
|
|
|
|
2020-01-16 Jan Beulich <jbeulich@suse.com>
|
|
|
|
|
|
|
|
|
|
* config/tc-i386.c (match_template): Drop found_cpu_match local
|
|
|
|
|
variable.
|
|
|
|
|
|
2020-01-16 10:05:35 +01:00
|
|
|
|
2020-01-16 Jan Beulich <jbeulich@suse.com>
|
|
|
|
|
|
|
|
|
|
* testsuite/gas/i386/avx512dq-inval.l,
|
|
|
|
|
testsuite/gas/i386/avx512dq-inval.s: New.
|
|
|
|
|
* testsuite/gas/i386/i386.exp: Run new test.
|
|
|
|
|
|
2020-01-15 14:17:27 +01:00
|
|
|
|
2020-01-15 Jozef Lawrynowicz <jozef.l@mittosystems.com>
|
|
|
|
|
|
|
|
|
|
* config/tc-msp430.c (CHECK_RELOC_MSP430): Always generate 430X
|
|
|
|
|
relocations when the target is 430X, except when extracting part of an
|
|
|
|
|
expression.
|
|
|
|
|
(msp430_srcoperand): Adjust comment.
|
|
|
|
|
Initialize the expp member of the msp430_operand_s struct as
|
|
|
|
|
appropriate.
|
|
|
|
|
(msp430_dstoperand): Likewise.
|
|
|
|
|
* testsuite/gas/msp430/msp430.exp: Run new test.
|
|
|
|
|
* testsuite/gas/msp430/reloc-lo-430x.d: New test.
|
|
|
|
|
* testsuite/gas/msp430/reloc-lo-430x.s: New test.
|
|
|
|
|
|
2020-01-15 06:45:43 +01:00
|
|
|
|
2020-01-15 Alan Modra <amodra@gmail.com>
|
|
|
|
|
|
|
|
|
|
* configure.tgt: Add sparc-*-freebsd case.
|
|
|
|
|
|
2020-01-14 17:59:37 +01:00
|
|
|
|
2020-01-14 Lili Cui <lili.cui@intel.com>
|
|
|
|
|
|
|
|
|
|
* testsuite/gas/i386/align-branch-1a.d: Updated for Darwin.
|
|
|
|
|
* testsuite/gas/i386/align-branch-1b.d: Likewise.
|
|
|
|
|
* testsuite/gas/i386/align-branch-1c.d: Likewise.
|
|
|
|
|
* testsuite/gas/i386/align-branch-1d.d: Likewise.
|
|
|
|
|
* testsuite/gas/i386/align-branch-1e.d: Likewise.
|
|
|
|
|
* testsuite/gas/i386/align-branch-1f.d: Likewise.
|
|
|
|
|
* testsuite/gas/i386/align-branch-1g.d: Likewise.
|
|
|
|
|
* testsuite/gas/i386/align-branch-1h.d: Likewise.
|
|
|
|
|
* testsuite/gas/i386/align-branch-1i.d: Likewise.
|
|
|
|
|
* testsuite/gas/i386/align-branch-5.d: Likewise.
|
|
|
|
|
* testsuite/gas/i386/x86-64-align-branch-1a.d: Likewise.
|
|
|
|
|
* testsuite/gas/i386/x86-64-align-branch-1b.d: Likewise.
|
|
|
|
|
* testsuite/gas/i386/x86-64-align-branch-1c.d: Likewise.
|
|
|
|
|
* testsuite/gas/i386/x86-64-align-branch-1d.d: Likewise.
|
|
|
|
|
* testsuite/gas/i386/x86-64-align-branch-1e.d: Likewise.
|
|
|
|
|
* testsuite/gas/i386/x86-64-align-branch-1f.d: Likewise.
|
|
|
|
|
* testsuite/gas/i386/x86-64-align-branch-1g.d: Likewise.
|
|
|
|
|
* testsuite/gas/i386/x86-64-align-branch-1h.d: Likewise.
|
|
|
|
|
* testsuite/gas/i386/x86-64-align-branch-1i.d: Likewise.
|
|
|
|
|
* testsuite/gas/i386/x86-64-align-branch-5.d: Likewise.
|
|
|
|
|
* testsuite/gas/i386/i386.exp: Skip x86-64-align-branch-2a,
|
|
|
|
|
x86-64-align-branch-2b and x86-64-align-branch-2c on Darwin.
|
|
|
|
|
|
2020-01-14 14:13:57 +01:00
|
|
|
|
2020-01-14 Sergey Belyashov <sergey.belyashov@gmail.com>
|
|
|
|
|
|
|
|
|
|
PR 25377
|
|
|
|
|
* config/tc-z80.c: Add support for half precision, single
|
|
|
|
|
precision and double precision floating point values.
|
|
|
|
|
* config/tc-z80.h b/gas/config/tc-z80.h: Disable string escapes.
|
|
|
|
|
* doc/as.texi: Add new z80 command line options.
|
|
|
|
|
* doc/c-z80.texi: Document new z80 command line options.
|
|
|
|
|
* testsuite/gas/z80/ez80_pref_dis.s: New test.
|
|
|
|
|
* testsuite/gas/z80/ez80_pref_dis.d: New test driver.
|
|
|
|
|
* testsuite/gas/z80/z80.exp: Run the new test.
|
|
|
|
|
* testsuite/gas/z80/fp_math48.d: Use correct command line option.
|
|
|
|
|
* testsuite/gas/z80/fp_zeda32.d: Likewise.
|
|
|
|
|
* testsuite/gas/z80/strings.d: Update expected output.
|
|
|
|
|
|
2020-01-13 16:31:39 +01:00
|
|
|
|
2020-01-13 Matthew Malcomson <matthew.malcomson@arm.com>
|
|
|
|
|
|
|
|
|
|
* config/tc-aarch64.c (f64mm, f32mm): Add sve as a feature
|
|
|
|
|
dependency.
|
|
|
|
|
|
2020-01-13 10:16:47 +01:00
|
|
|
|
2020-01-13 Claudiu Zissulescu <claziss@gmail.com>
|
|
|
|
|
|
|
|
|
|
* config/tc-arc.c (arc_select_cpu): Re-init the bfd if we change
|
|
|
|
|
the CPU.
|
|
|
|
|
* config/tc-arc.h: Add header if/defs.
|
|
|
|
|
* testsuite/gas/arc/pseudos.d: Improve matching pattern.
|
|
|
|
|
|
2020-01-13 04:57:19 +01:00
|
|
|
|
2020-01-13 Alan Modra <amodra@gmail.com>
|
|
|
|
|
|
|
|
|
|
* testsuite/gas/wasm32/allinsn.d: Update expected output.
|
|
|
|
|
|
2020-01-12 10:46:22 +01:00
|
|
|
|
2020-01-13 Alan Modra <amodra@gmail.com>
|
|
|
|
|
|
|
|
|
|
* config/tc-tic4x.c (tic4x_operands_match): Correct tic3x trap
|
|
|
|
|
insertion.
|
|
|
|
|
|
2020-01-10 07:59:59 +01:00
|
|
|
|
2020-01-10 Alan Modra <amodra@gmail.com>
|
|
|
|
|
|
|
|
|
|
* testsuite/gas/elf/pr14891.s: Don't start directives in first column.
|
|
|
|
|
* testsuite/gas/elf/pr21661.d: Don't run on hpux.
|
|
|
|
|
|
2020-01-09 12:47:44 +01:00
|
|
|
|
2020-01-03 Sergey Belyashov <sergey.belyashov@gmail.com>
|
|
|
|
|
|
|
|
|
|
PR 25224
|
|
|
|
|
* config/tc-z80.c (emit_ld_m_rr): Use integer types when checking
|
|
|
|
|
opcode byte values.
|
|
|
|
|
(emit_ld_r_r): Likewise.
|
|
|
|
|
(emit_ld_rr_m): Likewise.
|
|
|
|
|
(emit_ld_rr_nn): Likewise.
|
|
|
|
|
|
2020-01-09 11:40:04 +01:00
|
|
|
|
2020-01-09 Jan Beulich <jbeulich@suse.com>
|
|
|
|
|
|
|
|
|
|
* config/tc-i386.c (optimize_encoding): Add
|
|
|
|
|
is_any_vex_encoding() invocations. Drop respective
|
|
|
|
|
i.tm.extension_opcode == None checks.
|
|
|
|
|
|
2020-01-09 11:39:33 +01:00
|
|
|
|
2020-01-09 Jan Beulich <jbeulich@suse.com>
|
|
|
|
|
|
|
|
|
|
* config/tc-i386.c (md_assemble): Check RegRex is clear during
|
|
|
|
|
REX transformations. Correct comment indentation.
|
|
|
|
|
|
2020-01-09 11:38:59 +01:00
|
|
|
|
2020-01-09 Jan Beulich <jbeulich@suse.com>
|
|
|
|
|
|
|
|
|
|
* config/tc-i386.c (optimize_encoding): Generalize register
|
|
|
|
|
transformation for TEST optimization.
|
|
|
|
|
|
2020-01-09 11:38:01 +01:00
|
|
|
|
2020-01-09 Jan Beulich <jbeulich@suse.com>
|
|
|
|
|
|
|
|
|
|
* testsuite/gas/i386/x86-64-sysenter-amd.s,
|
|
|
|
|
testsuite/gas/i386/x86-64-sysenter-amd.d,
|
|
|
|
|
testsuite/gas/i386/x86-64-sysenter-amd.l,
|
|
|
|
|
testsuite/gas/i386/x86-64-sysenter-intel.d,
|
|
|
|
|
testsuite/gas/i386/x86-64-sysenter-mixed.d: New.
|
|
|
|
|
* testsuite/gas/i386/i386.exp: Run new tests.
|
|
|
|
|
|
2020-01-08 18:00:54 +01:00
|
|
|
|
2020-01-08 Nick Clifton <nickc@redhat.com>
|
|
|
|
|
|
|
|
|
|
PR 25284
|
|
|
|
|
* doc/as.texi (Align): Document the fact that all arguments can be
|
|
|
|
|
omitted.
|
|
|
|
|
(Balign): Likewise.
|
|
|
|
|
(P2align): Likewise.
|
|
|
|
|
|
2020-01-08 17:30:20 +01:00
|
|
|
|
2020-01-08 Nick Clifton <nickc@redhat.com>
|
|
|
|
|
|
|
|
|
|
PR 14891
|
|
|
|
|
* config/obj-elf.c (obj_elf_section): Fail if the section name is
|
|
|
|
|
already defined as a different symbol type.
|
|
|
|
|
* testsuite/gas/elf/pr14891.s: New test source file.
|
|
|
|
|
* testsuite/gas/elf/pr14891.d: New test driver.
|
|
|
|
|
* testsuite/gas/elf/pr14891.s: New test expected error output.
|
|
|
|
|
* testsuite/gas/elf/elf.exp: Run the new test.
|
|
|
|
|
|
2020-01-08 02:12:36 +01:00
|
|
|
|
2020-01-08 Alan Modra <amodra@gmail.com>
|
|
|
|
|
|
|
|
|
|
* config/tc-z8k.c (md_begin): Make idx unsigned.
|
|
|
|
|
(get_specific): Likewise for this_index.
|
|
|
|
|
|
2020-01-07 14:29:16 +01:00
|
|
|
|
2020-01-07 Claudiu Zissulescu <claziss@synopsys.com>
|
|
|
|
|
|
|
|
|
|
* onfig/tc-arc.c (parse_reloc_symbol): New function.
|
|
|
|
|
(tokenize_arguments): Clean up, use parse_reloc_symbol function.
|
|
|
|
|
(md_operand): Set X_md to absent.
|
|
|
|
|
(arc_parse_name): Check for X_md.
|
|
|
|
|
|
2020-01-03 17:23:19 +01:00
|
|
|
|
2020-01-03 Sergey Belyashov <sergey.belyashov@gmail.com>
|
|
|
|
|
|
|
|
|
|
PR 25311
|
|
|
|
|
* as.h (TC_STRING_ESCAPES): Provide a default definition.
|
|
|
|
|
* app.c (do_scrub_chars): Use TC_STRING_ESCAPES instead of
|
|
|
|
|
NO_STRING_ESCAPES.
|
|
|
|
|
* read.c (next_char_of_string): Likewise.
|
|
|
|
|
* config/tc-ppc.h (TC_STRING_ESCAPES): Define.
|
|
|
|
|
* config/tc-z80.h (TC_STRING_ESCAPES): Define.
|
|
|
|
|
|
2020-01-03 13:59:54 +01:00
|
|
|
|
2020-01-03 Nick Clifton <nickc@redhat.com>
|
|
|
|
|
|
|
|
|
|
* po/sv.po: Updated Swedish translation.
|
|
|
|
|
|
2020-01-03 10:16:44 +01:00
|
|
|
|
2020-01-03 Jan Beulich <jbeulich@suse.com>
|
|
|
|
|
|
|
|
|
|
* testsuite/gas/aarch64/f64mm.s: Scale index of LD1RO{H,W,D}.
|
|
|
|
|
* testsuite/gas/aarch64/f64mm.d: Adjust expectations.
|
|
|
|
|
|
2020-01-03 10:14:16 +01:00
|
|
|
|
2020-01-03 Jan Beulich <jbeulich@suse.com>
|
|
|
|
|
|
|
|
|
|
* testsuite/gas/aarch64/i8mm.s: Add 128-bit form tests for
|
|
|
|
|
by-element usdot. Add 64-bit form tests for by-element sudot.
|
|
|
|
|
* testsuite/gas/aarch64/i8mm.d: Adjust expectations.
|
|
|
|
|
|
2020-01-03 10:13:31 +01:00
|
|
|
|
2020-01-03 Jan Beulich <jbeulich@suse.com>
|
|
|
|
|
|
|
|
|
|
* testsuite/gas/aarch64/f64mm.s: Drop 'i' from uzip<n>.
|
|
|
|
|
* testsuite/gas/aarch64/f64mm.d: Adjust expectations.
|
|
|
|
|
|
2020-01-03 10:12:49 +01:00
|
|
|
|
2020-01-03 Jan Beulich <jbeulich@suse.com>
|
|
|
|
|
|
|
|
|
|
* testsuite/gas/aarch64/f64mm.d,
|
|
|
|
|
testsuite/gas/aarch64/sve-movprfx-mm.d: Adjust expectations.
|
|
|
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2020-01-02 15:10:40 +01:00
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2020-01-02 Sergey Belyashov <sergey.belyashov@gmail.com>
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* config/tc-z80.c: Add new architectures: Z180 and eZ80. Add
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support for assembler code generated by SDCC. Add new relocation
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types. Add z80-elf target support.
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* config/tc-z80.h: Add z80-elf target support. Enable dollar local
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labels. Local labels starts from ".L".
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* NEWS: Mention the new support.
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* testsuite/gas/all/fwdexp.d: Fix failure due to symbol conflict.
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* testsuite/gas/all/fwdexp.s: Likewise.
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* testsuite/gas/all/cond.l: Likewise.
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* testsuite/gas/all/cond.s: Likewise.
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* testsuite/gas/all/fwdexp.d: Likewise.
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* testsuite/gas/all/fwdexp.s: Likewise.
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* testsuite/gas/elf/section2.e-mips: Likewise.
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* testsuite/gas/elf/section2.l: Likewise.
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* testsuite/gas/elf/section2.s: Likewise.
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* testsuite/gas/macros/app1.d: Likewise.
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* testsuite/gas/macros/app1.s: Likewise.
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* testsuite/gas/macros/app2.d: Likewise.
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* testsuite/gas/macros/app2.s: Likewise.
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* testsuite/gas/macros/app3.d: Likewise.
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* testsuite/gas/macros/app3.s: Likewise.
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* testsuite/gas/macros/app4.d: Likewise.
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* testsuite/gas/macros/app4.s: Likewise.
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* testsuite/gas/macros/app4b.s: Likewise.
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* testsuite/gas/z80/suffix.d: Fix failure on ELF target.
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* testsuite/gas/z80/z80.exp: Add new tests
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* testsuite/gas/z80/dollar.d: New file.
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* testsuite/gas/z80/dollar.s: New file.
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* testsuite/gas/z80/ez80_adl_all.d: New file.
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* testsuite/gas/z80/ez80_adl_all.s: New file.
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* testsuite/gas/z80/ez80_adl_suf.d: New file.
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* testsuite/gas/z80/ez80_isuf.s: New file.
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* testsuite/gas/z80/ez80_z80_all.d: New file.
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* testsuite/gas/z80/ez80_z80_all.s: New file.
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* testsuite/gas/z80/ez80_z80_suf.d: New file.
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* testsuite/gas/z80/r800_extra.d: New file.
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* testsuite/gas/z80/r800_extra.s: New file.
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* testsuite/gas/z80/r800_ii8.d: New file.
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* testsuite/gas/z80/r800_z80_doc.d: New file.
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* testsuite/gas/z80/z180.d: New file.
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* testsuite/gas/z80/z180.s: New file.
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* testsuite/gas/z80/z180_z80_doc.d: New file.
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* testsuite/gas/z80/z80_doc.d: New file.
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* testsuite/gas/z80/z80_doc.s: New file.
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* testsuite/gas/z80/z80_ii8.d: New file.
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* testsuite/gas/z80/z80_ii8.s: New file.
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* testsuite/gas/z80/z80_in_f_c.d: New file.
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* testsuite/gas/z80/z80_in_f_c.s: New file.
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* testsuite/gas/z80/z80_op_ii_ld.d: New file.
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* testsuite/gas/z80/z80_op_ii_ld.s: New file.
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* testsuite/gas/z80/z80_out_c_0.d: New file.
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* testsuite/gas/z80/z80_out_c_0.s: New file.
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* testsuite/gas/z80/z80_reloc.d: New file.
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* testsuite/gas/z80/z80_reloc.s: New file.
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* testsuite/gas/z80/z80_sli.d: New file.
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* testsuite/gas/z80/z80_sli.s: New file.
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2019-10-21 17:59:11 +02:00
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2020-01-02 Szabolcs Nagy <szabolcs.nagy@arm.com>
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* config/tc-arm.c (parse_reg_list): Use REG_TYPE_RN instead of
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REGLIST_RN.
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2020-01-01 09:22:19 +01:00
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2020-01-01 Alan Modra <amodra@gmail.com>
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Update year range in copyright notice of all files.
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2020-01-01 08:37:11 +01:00
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For older changes see ChangeLog-2019
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2016-01-01 11:44:31 +01:00
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2020-01-01 08:37:11 +01:00
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Copyright (C) 2020 Free Software Foundation, Inc.
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2016-01-01 11:44:31 +01:00
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Copying and distribution of this file, with or without modification,
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are permitted in any medium without royalty provided the copyright
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notice and this notice are preserved.
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Local Variables:
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mode: change-log
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left-margin: 8
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fill-column: 74
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version-control: never
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End:
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