2005-09-03 00:53:35 +02:00
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/* Target-dependent code for the Matsushita MN10300 for GDB, the GNU debugger.
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2006-11-20 22:47:06 +01:00
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2018-01-01 05:43:02 +01:00
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Copyright (C) 2003-2018 Free Software Foundation, Inc.
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2005-09-03 00:53:35 +02:00
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This file is part of GDB.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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2007-08-23 20:08:50 +02:00
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the Free Software Foundation; either version 3 of the License, or
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2005-09-03 00:53:35 +02:00
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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2007-08-23 20:08:50 +02:00
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along with this program. If not, see <http://www.gnu.org/licenses/>. */
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2005-09-03 00:53:35 +02:00
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#include "defs.h"
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#include "gdbcore.h"
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#include "regcache.h"
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#include "mn10300-tdep.h"
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#include "bfd.h"
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#include "elf-bfd.h"
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#include "osabi.h"
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#include "regset.h"
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2005-09-07 01:14:44 +02:00
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#include "solib-svr4.h"
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2006-02-28 23:38:04 +01:00
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#include "frame.h"
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#include "trad-frame.h"
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#include "tramp-frame.h"
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2010-08-04 17:27:57 +02:00
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#include "linux-tdep.h"
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2005-09-03 00:53:35 +02:00
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/* Transliterated from <asm-mn10300/elf.h>... */
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#define MN10300_ELF_NGREG 28
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#define MN10300_ELF_NFPREG 32
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typedef gdb_byte mn10300_elf_greg_t[4];
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typedef mn10300_elf_greg_t mn10300_elf_gregset_t[MN10300_ELF_NGREG];
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typedef gdb_byte mn10300_elf_fpreg_t[4];
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typedef struct
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{
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mn10300_elf_fpreg_t fpregs[MN10300_ELF_NFPREG];
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gdb_byte fpcr[4];
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} mn10300_elf_fpregset_t;
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/* elf_gregset_t register indices stolen from include/asm-mn10300/ptrace.h. */
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#define MN10300_ELF_GREGSET_T_REG_INDEX_A3 0
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#define MN10300_ELF_GREGSET_T_REG_INDEX_A2 1
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#define MN10300_ELF_GREGSET_T_REG_INDEX_D3 2
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#define MN10300_ELF_GREGSET_T_REG_INDEX_D2 3
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#define MN10300_ELF_GREGSET_T_REG_INDEX_MCVF 4
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#define MN10300_ELF_GREGSET_T_REG_INDEX_MCRL 5
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#define MN10300_ELF_GREGSET_T_REG_INDEX_MCRH 6
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#define MN10300_ELF_GREGSET_T_REG_INDEX_MDRQ 7
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#define MN10300_ELF_GREGSET_T_REG_INDEX_E1 8
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#define MN10300_ELF_GREGSET_T_REG_INDEX_E0 9
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#define MN10300_ELF_GREGSET_T_REG_INDEX_E7 10
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#define MN10300_ELF_GREGSET_T_REG_INDEX_E6 11
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#define MN10300_ELF_GREGSET_T_REG_INDEX_E5 12
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#define MN10300_ELF_GREGSET_T_REG_INDEX_E4 13
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#define MN10300_ELF_GREGSET_T_REG_INDEX_E3 14
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#define MN10300_ELF_GREGSET_T_REG_INDEX_E2 15
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#define MN10300_ELF_GREGSET_T_REG_INDEX_SP 16
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#define MN10300_ELF_GREGSET_T_REG_INDEX_LAR 17
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#define MN10300_ELF_GREGSET_T_REG_INDEX_LIR 18
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#define MN10300_ELF_GREGSET_T_REG_INDEX_MDR 19
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#define MN10300_ELF_GREGSET_T_REG_INDEX_A1 20
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#define MN10300_ELF_GREGSET_T_REG_INDEX_A0 21
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#define MN10300_ELF_GREGSET_T_REG_INDEX_D1 22
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#define MN10300_ELF_GREGSET_T_REG_INDEX_D0 23
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#define MN10300_ELF_GREGSET_T_REG_INDEX_ORIG_D0 24
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#define MN10300_ELF_GREGSET_T_REG_INDEX_EPSW 25
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#define MN10300_ELF_GREGSET_T_REG_INDEX_PC 26
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/* New gdbarch API for corefile registers.
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Given a section name and size, create a struct reg object
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with a supply_register and a collect_register method. */
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2011-01-09 04:20:33 +01:00
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/* Copy register value of REGNUM from regset to regcache.
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2005-09-03 00:53:35 +02:00
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If REGNUM is -1, do this for all gp registers in regset. */
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static void
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am33_supply_gregset_method (const struct regset *regset,
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struct regcache *regcache,
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int regnum, const void *gregs, size_t len)
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{
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const mn10300_elf_greg_t *regp = (const mn10300_elf_greg_t *) gregs;
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int i;
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2015-01-14 13:01:38 +01:00
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gdb_assert (len >= sizeof (mn10300_elf_gregset_t));
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2005-09-03 00:53:35 +02:00
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switch (regnum) {
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case E_D0_REGNUM:
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2018-05-30 20:54:45 +02:00
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regcache->raw_supply (E_D0_REGNUM,
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(regp + MN10300_ELF_GREGSET_T_REG_INDEX_D0));
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2005-09-03 00:53:35 +02:00
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break;
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case E_D1_REGNUM:
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2018-05-30 20:54:45 +02:00
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regcache->raw_supply (E_D1_REGNUM,
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(regp + MN10300_ELF_GREGSET_T_REG_INDEX_D1));
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2005-09-03 00:53:35 +02:00
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break;
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case E_D2_REGNUM:
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2018-05-30 20:54:45 +02:00
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regcache->raw_supply (E_D2_REGNUM,
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(regp + MN10300_ELF_GREGSET_T_REG_INDEX_D2));
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2005-09-03 00:53:35 +02:00
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break;
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case E_D3_REGNUM:
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2018-05-30 20:54:45 +02:00
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regcache->raw_supply (E_D3_REGNUM,
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(regp + MN10300_ELF_GREGSET_T_REG_INDEX_D3));
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2005-09-03 00:53:35 +02:00
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break;
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case E_A0_REGNUM:
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2018-05-30 20:54:45 +02:00
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regcache->raw_supply (E_A0_REGNUM,
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(regp + MN10300_ELF_GREGSET_T_REG_INDEX_A0));
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2005-09-03 00:53:35 +02:00
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break;
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case E_A1_REGNUM:
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2018-05-30 20:54:45 +02:00
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regcache->raw_supply (E_A1_REGNUM,
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(regp + MN10300_ELF_GREGSET_T_REG_INDEX_A1));
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2005-09-03 00:53:35 +02:00
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break;
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case E_A2_REGNUM:
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2018-05-30 20:54:45 +02:00
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regcache->raw_supply (E_A2_REGNUM,
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(regp + MN10300_ELF_GREGSET_T_REG_INDEX_A2));
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2005-09-03 00:53:35 +02:00
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break;
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case E_A3_REGNUM:
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2018-05-30 20:54:45 +02:00
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regcache->raw_supply (E_A3_REGNUM,
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(regp + MN10300_ELF_GREGSET_T_REG_INDEX_A3));
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2005-09-03 00:53:35 +02:00
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break;
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case E_SP_REGNUM:
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2018-05-30 20:54:45 +02:00
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regcache->raw_supply (E_SP_REGNUM,
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(regp + MN10300_ELF_GREGSET_T_REG_INDEX_SP));
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2005-09-03 00:53:35 +02:00
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break;
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case E_PC_REGNUM:
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2018-05-30 20:54:45 +02:00
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regcache->raw_supply (E_PC_REGNUM,
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(regp + MN10300_ELF_GREGSET_T_REG_INDEX_PC));
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2005-09-03 00:53:35 +02:00
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break;
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case E_MDR_REGNUM:
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2018-05-30 20:54:45 +02:00
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regcache->raw_supply (E_MDR_REGNUM,
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(regp + MN10300_ELF_GREGSET_T_REG_INDEX_MDR));
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2005-09-03 00:53:35 +02:00
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break;
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case E_PSW_REGNUM:
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2018-05-30 20:54:45 +02:00
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regcache->raw_supply (E_PSW_REGNUM,
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(regp + MN10300_ELF_GREGSET_T_REG_INDEX_EPSW));
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2005-09-03 00:53:35 +02:00
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break;
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case E_LIR_REGNUM:
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2018-05-30 20:54:45 +02:00
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regcache->raw_supply (E_LIR_REGNUM,
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(regp + MN10300_ELF_GREGSET_T_REG_INDEX_LIR));
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2005-09-03 00:53:35 +02:00
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break;
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case E_LAR_REGNUM:
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2018-05-30 20:54:45 +02:00
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regcache->raw_supply (E_LAR_REGNUM,
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(regp + MN10300_ELF_GREGSET_T_REG_INDEX_LAR));
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2005-09-03 00:53:35 +02:00
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break;
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case E_MDRQ_REGNUM:
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2018-05-30 20:54:45 +02:00
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regcache->raw_supply (E_MDRQ_REGNUM,
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(regp + MN10300_ELF_GREGSET_T_REG_INDEX_MDRQ));
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2005-09-03 00:53:35 +02:00
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break;
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case E_E0_REGNUM:
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2018-05-30 20:54:45 +02:00
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regcache->raw_supply (E_E0_REGNUM,
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(regp + MN10300_ELF_GREGSET_T_REG_INDEX_E0));
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2005-09-03 00:53:35 +02:00
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break;
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case E_E1_REGNUM:
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2018-05-30 20:54:45 +02:00
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regcache->raw_supply (E_E1_REGNUM,
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(regp + MN10300_ELF_GREGSET_T_REG_INDEX_E1));
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2005-09-03 00:53:35 +02:00
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break;
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case E_E2_REGNUM:
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2018-05-30 20:54:45 +02:00
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regcache->raw_supply (E_E2_REGNUM,
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(regp + MN10300_ELF_GREGSET_T_REG_INDEX_E2));
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2005-09-03 00:53:35 +02:00
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break;
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case E_E3_REGNUM:
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2018-05-30 20:54:45 +02:00
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regcache->raw_supply (E_E3_REGNUM,
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(regp + MN10300_ELF_GREGSET_T_REG_INDEX_E3));
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2005-09-03 00:53:35 +02:00
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break;
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case E_E4_REGNUM:
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2018-05-30 20:54:45 +02:00
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regcache->raw_supply (E_E4_REGNUM,
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(regp + MN10300_ELF_GREGSET_T_REG_INDEX_E4));
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2005-09-03 00:53:35 +02:00
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break;
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case E_E5_REGNUM:
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2018-05-30 20:54:45 +02:00
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regcache->raw_supply (E_E5_REGNUM,
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(regp + MN10300_ELF_GREGSET_T_REG_INDEX_E5));
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2005-09-03 00:53:35 +02:00
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break;
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case E_E6_REGNUM:
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2018-05-30 20:54:45 +02:00
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regcache->raw_supply (E_E6_REGNUM,
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(regp + MN10300_ELF_GREGSET_T_REG_INDEX_E6));
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2005-09-03 00:53:35 +02:00
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break;
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case E_E7_REGNUM:
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2018-05-30 20:54:45 +02:00
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regcache->raw_supply (E_E7_REGNUM,
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(regp + MN10300_ELF_GREGSET_T_REG_INDEX_E7));
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2005-09-03 00:53:35 +02:00
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break;
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/* ssp, msp, and usp are inaccessible. */
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case E_E8_REGNUM:
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2017-05-08 10:35:45 +02:00
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regcache->raw_supply_zeroed (E_E8_REGNUM);
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2005-09-03 00:53:35 +02:00
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break;
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case E_E9_REGNUM:
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2017-05-08 10:35:45 +02:00
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regcache->raw_supply_zeroed (E_E9_REGNUM);
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2005-09-03 00:53:35 +02:00
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break;
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case E_E10_REGNUM:
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2017-05-08 10:35:45 +02:00
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regcache->raw_supply_zeroed (E_E10_REGNUM);
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2005-09-03 00:53:35 +02:00
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break;
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case E_MCRH_REGNUM:
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2018-05-30 20:54:45 +02:00
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regcache->raw_supply (E_MCRH_REGNUM,
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(regp + MN10300_ELF_GREGSET_T_REG_INDEX_MCRH));
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2005-09-03 00:53:35 +02:00
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break;
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case E_MCRL_REGNUM:
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2018-05-30 20:54:45 +02:00
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regcache->raw_supply (E_MCRL_REGNUM,
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(regp + MN10300_ELF_GREGSET_T_REG_INDEX_MCRL));
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2005-09-03 00:53:35 +02:00
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break;
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case E_MCVF_REGNUM:
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2018-05-30 20:54:45 +02:00
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regcache->raw_supply (E_MCVF_REGNUM,
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(regp + MN10300_ELF_GREGSET_T_REG_INDEX_MCVF));
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2005-09-03 00:53:35 +02:00
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break;
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case E_FPCR_REGNUM:
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/* FPCR is numbered among the GP regs, but handled as an FP reg.
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Do nothing. */
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break;
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case E_FPCR_REGNUM + 1:
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/* The two unused registers beyond fpcr are inaccessible. */
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2017-05-08 10:35:45 +02:00
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regcache->raw_supply_zeroed (E_FPCR_REGNUM + 1);
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2005-09-03 00:53:35 +02:00
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break;
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case E_FPCR_REGNUM + 2:
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2017-05-08 10:35:45 +02:00
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regcache->raw_supply_zeroed (E_FPCR_REGNUM + 2);
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2005-09-03 00:53:35 +02:00
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break;
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default: /* An error, obviously, but should we error out? */
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break;
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case -1:
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for (i = 0; i < MN10300_ELF_NGREG; i++)
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am33_supply_gregset_method (regset, regcache, i, gregs, len);
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break;
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}
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return;
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}
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|
2011-01-09 04:20:33 +01:00
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/* Copy fp register value of REGNUM from regset to regcache.
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If REGNUM is -1, do this for all fp registers in regset. */
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2005-09-03 00:53:35 +02:00
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static void
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am33_supply_fpregset_method (const struct regset *regset,
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struct regcache *regcache,
|
|
|
|
|
int regnum, const void *fpregs, size_t len)
|
|
|
|
|
{
|
2015-09-25 20:08:07 +02:00
|
|
|
|
const mn10300_elf_fpregset_t *fpregset
|
|
|
|
|
= (const mn10300_elf_fpregset_t *) fpregs;
|
2005-09-03 00:53:35 +02:00
|
|
|
|
|
2015-01-14 13:01:38 +01:00
|
|
|
|
gdb_assert (len >= sizeof (mn10300_elf_fpregset_t));
|
2005-09-03 00:53:35 +02:00
|
|
|
|
|
|
|
|
|
if (regnum == -1)
|
|
|
|
|
{
|
|
|
|
|
int i;
|
|
|
|
|
|
|
|
|
|
for (i = 0; i < MN10300_ELF_NFPREG; i++)
|
|
|
|
|
am33_supply_fpregset_method (regset, regcache,
|
|
|
|
|
E_FS0_REGNUM + i, fpregs, len);
|
|
|
|
|
am33_supply_fpregset_method (regset, regcache,
|
|
|
|
|
E_FPCR_REGNUM, fpregs, len);
|
|
|
|
|
}
|
|
|
|
|
else if (regnum == E_FPCR_REGNUM)
|
2018-05-30 20:54:45 +02:00
|
|
|
|
regcache->raw_supply (E_FPCR_REGNUM, &fpregset->fpcr);
|
2011-01-09 04:20:33 +01:00
|
|
|
|
else if (E_FS0_REGNUM <= regnum
|
|
|
|
|
&& regnum < E_FS0_REGNUM + MN10300_ELF_NFPREG)
|
2018-05-30 20:54:45 +02:00
|
|
|
|
regcache->raw_supply (regnum, &fpregset->fpregs[regnum - E_FS0_REGNUM]);
|
2005-09-03 00:53:35 +02:00
|
|
|
|
|
|
|
|
|
return;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Copy register values from regcache to regset. */
|
|
|
|
|
|
|
|
|
|
static void
|
|
|
|
|
am33_collect_gregset_method (const struct regset *regset,
|
|
|
|
|
const struct regcache *regcache,
|
|
|
|
|
int regnum, void *gregs, size_t len)
|
|
|
|
|
{
|
2015-09-25 20:08:07 +02:00
|
|
|
|
mn10300_elf_gregset_t *regp = (gdb_byte (*)[28][4]) gregs;
|
2005-09-03 00:53:35 +02:00
|
|
|
|
int i;
|
|
|
|
|
|
2015-01-14 13:01:38 +01:00
|
|
|
|
gdb_assert (len >= sizeof (mn10300_elf_gregset_t));
|
2005-09-03 00:53:35 +02:00
|
|
|
|
|
|
|
|
|
switch (regnum) {
|
|
|
|
|
case E_D0_REGNUM:
|
|
|
|
|
regcache_raw_collect (regcache, E_D0_REGNUM,
|
|
|
|
|
(regp + MN10300_ELF_GREGSET_T_REG_INDEX_D0));
|
|
|
|
|
break;
|
|
|
|
|
case E_D1_REGNUM:
|
|
|
|
|
regcache_raw_collect (regcache, E_D1_REGNUM,
|
|
|
|
|
(regp + MN10300_ELF_GREGSET_T_REG_INDEX_D1));
|
|
|
|
|
break;
|
|
|
|
|
case E_D2_REGNUM:
|
|
|
|
|
regcache_raw_collect (regcache, E_D2_REGNUM,
|
|
|
|
|
(regp + MN10300_ELF_GREGSET_T_REG_INDEX_D2));
|
|
|
|
|
break;
|
|
|
|
|
case E_D3_REGNUM:
|
|
|
|
|
regcache_raw_collect (regcache, E_D3_REGNUM,
|
|
|
|
|
(regp + MN10300_ELF_GREGSET_T_REG_INDEX_D3));
|
|
|
|
|
break;
|
|
|
|
|
case E_A0_REGNUM:
|
|
|
|
|
regcache_raw_collect (regcache, E_A0_REGNUM,
|
|
|
|
|
(regp + MN10300_ELF_GREGSET_T_REG_INDEX_A0));
|
|
|
|
|
break;
|
|
|
|
|
case E_A1_REGNUM:
|
|
|
|
|
regcache_raw_collect (regcache, E_A1_REGNUM,
|
|
|
|
|
(regp + MN10300_ELF_GREGSET_T_REG_INDEX_A1));
|
|
|
|
|
break;
|
|
|
|
|
case E_A2_REGNUM:
|
|
|
|
|
regcache_raw_collect (regcache, E_A2_REGNUM,
|
|
|
|
|
(regp + MN10300_ELF_GREGSET_T_REG_INDEX_A2));
|
|
|
|
|
break;
|
|
|
|
|
case E_A3_REGNUM:
|
|
|
|
|
regcache_raw_collect (regcache, E_A3_REGNUM,
|
|
|
|
|
(regp + MN10300_ELF_GREGSET_T_REG_INDEX_A3));
|
|
|
|
|
break;
|
|
|
|
|
case E_SP_REGNUM:
|
|
|
|
|
regcache_raw_collect (regcache, E_SP_REGNUM,
|
|
|
|
|
(regp + MN10300_ELF_GREGSET_T_REG_INDEX_SP));
|
|
|
|
|
break;
|
|
|
|
|
case E_PC_REGNUM:
|
|
|
|
|
regcache_raw_collect (regcache, E_PC_REGNUM,
|
|
|
|
|
(regp + MN10300_ELF_GREGSET_T_REG_INDEX_PC));
|
|
|
|
|
break;
|
|
|
|
|
case E_MDR_REGNUM:
|
|
|
|
|
regcache_raw_collect (regcache, E_MDR_REGNUM,
|
|
|
|
|
(regp + MN10300_ELF_GREGSET_T_REG_INDEX_MDR));
|
|
|
|
|
break;
|
|
|
|
|
case E_PSW_REGNUM:
|
|
|
|
|
regcache_raw_collect (regcache, E_PSW_REGNUM,
|
|
|
|
|
(regp + MN10300_ELF_GREGSET_T_REG_INDEX_EPSW));
|
|
|
|
|
break;
|
|
|
|
|
case E_LIR_REGNUM:
|
|
|
|
|
regcache_raw_collect (regcache, E_LIR_REGNUM,
|
|
|
|
|
(regp + MN10300_ELF_GREGSET_T_REG_INDEX_LIR));
|
|
|
|
|
break;
|
|
|
|
|
case E_LAR_REGNUM:
|
|
|
|
|
regcache_raw_collect (regcache, E_LAR_REGNUM,
|
|
|
|
|
(regp + MN10300_ELF_GREGSET_T_REG_INDEX_LAR));
|
|
|
|
|
break;
|
|
|
|
|
case E_MDRQ_REGNUM:
|
|
|
|
|
regcache_raw_collect (regcache, E_MDRQ_REGNUM,
|
|
|
|
|
(regp + MN10300_ELF_GREGSET_T_REG_INDEX_MDRQ));
|
|
|
|
|
break;
|
|
|
|
|
case E_E0_REGNUM:
|
|
|
|
|
regcache_raw_collect (regcache, E_E0_REGNUM,
|
|
|
|
|
(regp + MN10300_ELF_GREGSET_T_REG_INDEX_E0));
|
|
|
|
|
break;
|
|
|
|
|
case E_E1_REGNUM:
|
|
|
|
|
regcache_raw_collect (regcache, E_E1_REGNUM,
|
|
|
|
|
(regp + MN10300_ELF_GREGSET_T_REG_INDEX_E1));
|
|
|
|
|
break;
|
|
|
|
|
case E_E2_REGNUM:
|
|
|
|
|
regcache_raw_collect (regcache, E_E2_REGNUM,
|
|
|
|
|
(regp + MN10300_ELF_GREGSET_T_REG_INDEX_E2));
|
|
|
|
|
break;
|
|
|
|
|
case E_E3_REGNUM:
|
|
|
|
|
regcache_raw_collect (regcache, E_E3_REGNUM,
|
|
|
|
|
(regp + MN10300_ELF_GREGSET_T_REG_INDEX_E3));
|
|
|
|
|
break;
|
|
|
|
|
case E_E4_REGNUM:
|
|
|
|
|
regcache_raw_collect (regcache, E_E4_REGNUM,
|
|
|
|
|
(regp + MN10300_ELF_GREGSET_T_REG_INDEX_E4));
|
|
|
|
|
break;
|
|
|
|
|
case E_E5_REGNUM:
|
|
|
|
|
regcache_raw_collect (regcache, E_E5_REGNUM,
|
|
|
|
|
(regp + MN10300_ELF_GREGSET_T_REG_INDEX_E5));
|
|
|
|
|
break;
|
|
|
|
|
case E_E6_REGNUM:
|
|
|
|
|
regcache_raw_collect (regcache, E_E6_REGNUM,
|
|
|
|
|
(regp + MN10300_ELF_GREGSET_T_REG_INDEX_E6));
|
|
|
|
|
break;
|
|
|
|
|
case E_E7_REGNUM:
|
|
|
|
|
regcache_raw_collect (regcache, E_E7_REGNUM,
|
|
|
|
|
(regp + MN10300_ELF_GREGSET_T_REG_INDEX_E7));
|
|
|
|
|
break;
|
|
|
|
|
|
|
|
|
|
/* ssp, msp, and usp are inaccessible. */
|
|
|
|
|
case E_E8_REGNUM:
|
|
|
|
|
/* The gregset struct has noplace to put this: do nothing. */
|
|
|
|
|
break;
|
|
|
|
|
case E_E9_REGNUM:
|
|
|
|
|
/* The gregset struct has noplace to put this: do nothing. */
|
|
|
|
|
break;
|
|
|
|
|
case E_E10_REGNUM:
|
|
|
|
|
/* The gregset struct has noplace to put this: do nothing. */
|
|
|
|
|
break;
|
|
|
|
|
case E_MCRH_REGNUM:
|
|
|
|
|
regcache_raw_collect (regcache, E_MCRH_REGNUM,
|
|
|
|
|
(regp + MN10300_ELF_GREGSET_T_REG_INDEX_MCRH));
|
|
|
|
|
break;
|
|
|
|
|
case E_MCRL_REGNUM:
|
|
|
|
|
regcache_raw_collect (regcache, E_MCRL_REGNUM,
|
|
|
|
|
(regp + MN10300_ELF_GREGSET_T_REG_INDEX_MCRL));
|
|
|
|
|
break;
|
|
|
|
|
case E_MCVF_REGNUM:
|
|
|
|
|
regcache_raw_collect (regcache, E_MCVF_REGNUM,
|
|
|
|
|
(regp + MN10300_ELF_GREGSET_T_REG_INDEX_MCVF));
|
|
|
|
|
break;
|
|
|
|
|
case E_FPCR_REGNUM:
|
|
|
|
|
/* FPCR is numbered among the GP regs, but handled as an FP reg.
|
|
|
|
|
Do nothing. */
|
|
|
|
|
break;
|
|
|
|
|
case E_FPCR_REGNUM + 1:
|
|
|
|
|
/* The gregset struct has noplace to put this: do nothing. */
|
|
|
|
|
break;
|
|
|
|
|
case E_FPCR_REGNUM + 2:
|
|
|
|
|
/* The gregset struct has noplace to put this: do nothing. */
|
|
|
|
|
break;
|
|
|
|
|
default: /* An error, obviously, but should we error out? */
|
|
|
|
|
break;
|
|
|
|
|
case -1:
|
|
|
|
|
for (i = 0; i < MN10300_ELF_NGREG; i++)
|
|
|
|
|
am33_collect_gregset_method (regset, regcache, i, gregs, len);
|
|
|
|
|
break;
|
|
|
|
|
}
|
|
|
|
|
return;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Copy fp register values from regcache to regset. */
|
|
|
|
|
|
|
|
|
|
static void
|
|
|
|
|
am33_collect_fpregset_method (const struct regset *regset,
|
|
|
|
|
const struct regcache *regcache,
|
|
|
|
|
int regnum, void *fpregs, size_t len)
|
|
|
|
|
{
|
2015-09-25 20:08:07 +02:00
|
|
|
|
mn10300_elf_fpregset_t *fpregset = (mn10300_elf_fpregset_t *) fpregs;
|
2005-09-03 00:53:35 +02:00
|
|
|
|
|
2015-01-14 13:01:38 +01:00
|
|
|
|
gdb_assert (len >= sizeof (mn10300_elf_fpregset_t));
|
2005-09-03 00:53:35 +02:00
|
|
|
|
|
|
|
|
|
if (regnum == -1)
|
|
|
|
|
{
|
|
|
|
|
int i;
|
|
|
|
|
for (i = 0; i < MN10300_ELF_NFPREG; i++)
|
|
|
|
|
am33_collect_fpregset_method (regset, regcache, E_FS0_REGNUM + i,
|
|
|
|
|
fpregs, len);
|
|
|
|
|
am33_collect_fpregset_method (regset, regcache,
|
|
|
|
|
E_FPCR_REGNUM, fpregs, len);
|
|
|
|
|
}
|
|
|
|
|
else if (regnum == E_FPCR_REGNUM)
|
2007-06-16 00:34:13 +02:00
|
|
|
|
regcache_raw_collect (regcache, E_FPCR_REGNUM,
|
2005-09-03 00:53:35 +02:00
|
|
|
|
&fpregset->fpcr);
|
|
|
|
|
else if (E_FS0_REGNUM <= regnum
|
|
|
|
|
&& regnum < E_FS0_REGNUM + MN10300_ELF_NFPREG)
|
2007-06-16 00:34:13 +02:00
|
|
|
|
regcache_raw_collect (regcache, regnum,
|
2005-09-03 00:53:35 +02:00
|
|
|
|
&fpregset->fpregs[regnum - E_FS0_REGNUM]);
|
|
|
|
|
|
|
|
|
|
return;
|
|
|
|
|
}
|
|
|
|
|
|
2013-11-22 19:43:00 +01:00
|
|
|
|
static const struct regset am33_gregset =
|
|
|
|
|
{
|
|
|
|
|
NULL, am33_supply_gregset_method, am33_collect_gregset_method
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
static const struct regset am33_fpregset =
|
|
|
|
|
{
|
|
|
|
|
NULL, am33_supply_fpregset_method, am33_collect_fpregset_method
|
|
|
|
|
};
|
|
|
|
|
|
2013-11-29 17:51:36 +01:00
|
|
|
|
/* Iterate over core file register note sections. */
|
2005-09-03 00:53:35 +02:00
|
|
|
|
|
2013-11-29 17:51:36 +01:00
|
|
|
|
static void
|
|
|
|
|
am33_iterate_over_regset_sections (struct gdbarch *gdbarch,
|
|
|
|
|
iterate_over_regset_sections_cb *cb,
|
|
|
|
|
void *cb_data,
|
|
|
|
|
const struct regcache *regcache)
|
2005-09-03 00:53:35 +02:00
|
|
|
|
{
|
2013-11-29 17:51:36 +01:00
|
|
|
|
cb (".reg", sizeof (mn10300_elf_gregset_t), &am33_gregset,
|
|
|
|
|
NULL, cb_data);
|
|
|
|
|
cb (".reg2", sizeof(mn10300_elf_fpregset_t), &am33_fpregset,
|
|
|
|
|
NULL, cb_data);
|
2005-09-03 00:53:35 +02:00
|
|
|
|
}
|
2006-02-28 23:38:04 +01:00
|
|
|
|
|
|
|
|
|
static void
|
|
|
|
|
am33_linux_sigframe_cache_init (const struct tramp_frame *self,
|
2008-04-30 23:28:57 +02:00
|
|
|
|
struct frame_info *this_frame,
|
2006-02-28 23:38:04 +01:00
|
|
|
|
struct trad_frame_cache *this_cache,
|
|
|
|
|
CORE_ADDR func);
|
|
|
|
|
|
|
|
|
|
static const struct tramp_frame am33_linux_sigframe = {
|
|
|
|
|
SIGTRAMP_FRAME,
|
|
|
|
|
1,
|
|
|
|
|
{
|
|
|
|
|
/* mov 119,d0 */
|
|
|
|
|
{ 0x2c, -1 },
|
|
|
|
|
{ 0x77, -1 },
|
|
|
|
|
{ 0x00, -1 },
|
|
|
|
|
/* syscall 0 */
|
|
|
|
|
{ 0xf0, -1 },
|
|
|
|
|
{ 0xe0, -1 },
|
|
|
|
|
{ TRAMP_SENTINEL_INSN, -1 }
|
|
|
|
|
},
|
|
|
|
|
am33_linux_sigframe_cache_init
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
static const struct tramp_frame am33_linux_rt_sigframe = {
|
|
|
|
|
SIGTRAMP_FRAME,
|
|
|
|
|
1,
|
|
|
|
|
{
|
|
|
|
|
/* mov 173,d0 */
|
|
|
|
|
{ 0x2c, -1 },
|
|
|
|
|
{ 0xad, -1 },
|
|
|
|
|
{ 0x00, -1 },
|
|
|
|
|
/* syscall 0 */
|
|
|
|
|
{ 0xf0, -1 },
|
|
|
|
|
{ 0xe0, -1 },
|
|
|
|
|
{ TRAMP_SENTINEL_INSN, -1 }
|
|
|
|
|
},
|
|
|
|
|
am33_linux_sigframe_cache_init
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
/* Relevant struct definitions for signal handling...
|
|
|
|
|
|
|
|
|
|
From arch/mn10300/kernel/sigframe.h:
|
|
|
|
|
|
|
|
|
|
struct sigframe
|
|
|
|
|
{
|
|
|
|
|
void (*pretcode)(void);
|
|
|
|
|
int sig;
|
2008-01-22 02:17:25 +01:00
|
|
|
|
struct sigcontext *psc;
|
2006-02-28 23:38:04 +01:00
|
|
|
|
struct sigcontext sc;
|
|
|
|
|
struct fpucontext fpuctx;
|
|
|
|
|
unsigned long extramask[_NSIG_WORDS-1];
|
|
|
|
|
char retcode[8];
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
struct rt_sigframe
|
|
|
|
|
{
|
|
|
|
|
void (*pretcode)(void);
|
|
|
|
|
int sig;
|
|
|
|
|
struct siginfo *pinfo;
|
|
|
|
|
void *puc;
|
|
|
|
|
struct siginfo info;
|
|
|
|
|
struct ucontext uc;
|
|
|
|
|
struct fpucontext fpuctx;
|
|
|
|
|
char retcode[8];
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
From include/asm-mn10300/ucontext.h:
|
|
|
|
|
|
|
|
|
|
struct ucontext {
|
|
|
|
|
unsigned long uc_flags;
|
|
|
|
|
struct ucontext *uc_link;
|
|
|
|
|
stack_t uc_stack;
|
|
|
|
|
struct sigcontext uc_mcontext;
|
|
|
|
|
sigset_t uc_sigmask;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
From include/asm-mn10300/sigcontext.h:
|
|
|
|
|
|
|
|
|
|
struct fpucontext {
|
|
|
|
|
unsigned long fs[32];
|
|
|
|
|
unsigned long fpcr;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
struct sigcontext {
|
|
|
|
|
unsigned long d0;
|
|
|
|
|
unsigned long d1;
|
|
|
|
|
unsigned long d2;
|
|
|
|
|
unsigned long d3;
|
|
|
|
|
unsigned long a0;
|
|
|
|
|
unsigned long a1;
|
|
|
|
|
unsigned long a2;
|
|
|
|
|
unsigned long a3;
|
|
|
|
|
unsigned long e0;
|
|
|
|
|
unsigned long e1;
|
|
|
|
|
unsigned long e2;
|
|
|
|
|
unsigned long e3;
|
|
|
|
|
unsigned long e4;
|
|
|
|
|
unsigned long e5;
|
|
|
|
|
unsigned long e6;
|
|
|
|
|
unsigned long e7;
|
|
|
|
|
unsigned long lar;
|
|
|
|
|
unsigned long lir;
|
|
|
|
|
unsigned long mdr;
|
|
|
|
|
unsigned long mcvf;
|
|
|
|
|
unsigned long mcrl;
|
|
|
|
|
unsigned long mcrh;
|
|
|
|
|
unsigned long mdrq;
|
|
|
|
|
unsigned long sp;
|
|
|
|
|
unsigned long epsw;
|
|
|
|
|
unsigned long pc;
|
|
|
|
|
struct fpucontext *fpucontext;
|
|
|
|
|
unsigned long oldmask;
|
|
|
|
|
}; */
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
#define AM33_SIGCONTEXT_D0 0
|
|
|
|
|
#define AM33_SIGCONTEXT_D1 4
|
|
|
|
|
#define AM33_SIGCONTEXT_D2 8
|
|
|
|
|
#define AM33_SIGCONTEXT_D3 12
|
|
|
|
|
#define AM33_SIGCONTEXT_A0 16
|
|
|
|
|
#define AM33_SIGCONTEXT_A1 20
|
|
|
|
|
#define AM33_SIGCONTEXT_A2 24
|
|
|
|
|
#define AM33_SIGCONTEXT_A3 28
|
|
|
|
|
#define AM33_SIGCONTEXT_E0 32
|
|
|
|
|
#define AM33_SIGCONTEXT_E1 36
|
|
|
|
|
#define AM33_SIGCONTEXT_E2 40
|
|
|
|
|
#define AM33_SIGCONTEXT_E3 44
|
|
|
|
|
#define AM33_SIGCONTEXT_E4 48
|
|
|
|
|
#define AM33_SIGCONTEXT_E5 52
|
|
|
|
|
#define AM33_SIGCONTEXT_E6 56
|
|
|
|
|
#define AM33_SIGCONTEXT_E7 60
|
|
|
|
|
#define AM33_SIGCONTEXT_LAR 64
|
|
|
|
|
#define AM33_SIGCONTEXT_LIR 68
|
|
|
|
|
#define AM33_SIGCONTEXT_MDR 72
|
|
|
|
|
#define AM33_SIGCONTEXT_MCVF 76
|
|
|
|
|
#define AM33_SIGCONTEXT_MCRL 80
|
|
|
|
|
#define AM33_SIGCONTEXT_MCRH 84
|
|
|
|
|
#define AM33_SIGCONTEXT_MDRQ 88
|
|
|
|
|
#define AM33_SIGCONTEXT_SP 92
|
|
|
|
|
#define AM33_SIGCONTEXT_EPSW 96
|
|
|
|
|
#define AM33_SIGCONTEXT_PC 100
|
|
|
|
|
#define AM33_SIGCONTEXT_FPUCONTEXT 104
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
static void
|
|
|
|
|
am33_linux_sigframe_cache_init (const struct tramp_frame *self,
|
2008-04-30 23:28:57 +02:00
|
|
|
|
struct frame_info *this_frame,
|
2006-02-28 23:38:04 +01:00
|
|
|
|
struct trad_frame_cache *this_cache,
|
|
|
|
|
CORE_ADDR func)
|
|
|
|
|
{
|
|
|
|
|
CORE_ADDR sc_base, fpubase;
|
|
|
|
|
int i;
|
2005-09-03 00:53:35 +02:00
|
|
|
|
|
2008-04-30 23:28:57 +02:00
|
|
|
|
sc_base = get_frame_register_unsigned (this_frame, E_SP_REGNUM);
|
2006-02-28 23:38:04 +01:00
|
|
|
|
if (self == &am33_linux_sigframe)
|
|
|
|
|
{
|
|
|
|
|
sc_base += 8;
|
2008-04-30 23:28:57 +02:00
|
|
|
|
sc_base = get_frame_memory_unsigned (this_frame, sc_base, 4);
|
2006-02-28 23:38:04 +01:00
|
|
|
|
}
|
|
|
|
|
else
|
|
|
|
|
{
|
|
|
|
|
sc_base += 12;
|
2008-04-30 23:28:57 +02:00
|
|
|
|
sc_base = get_frame_memory_unsigned (this_frame, sc_base, 4);
|
2006-02-28 23:38:04 +01:00
|
|
|
|
sc_base += 20;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
trad_frame_set_reg_addr (this_cache, E_D0_REGNUM,
|
|
|
|
|
sc_base + AM33_SIGCONTEXT_D0);
|
|
|
|
|
trad_frame_set_reg_addr (this_cache, E_D1_REGNUM,
|
|
|
|
|
sc_base + AM33_SIGCONTEXT_D1);
|
|
|
|
|
trad_frame_set_reg_addr (this_cache, E_D2_REGNUM,
|
|
|
|
|
sc_base + AM33_SIGCONTEXT_D2);
|
|
|
|
|
trad_frame_set_reg_addr (this_cache, E_D3_REGNUM,
|
|
|
|
|
sc_base + AM33_SIGCONTEXT_D3);
|
|
|
|
|
|
|
|
|
|
trad_frame_set_reg_addr (this_cache, E_A0_REGNUM,
|
|
|
|
|
sc_base + AM33_SIGCONTEXT_A0);
|
|
|
|
|
trad_frame_set_reg_addr (this_cache, E_A1_REGNUM,
|
|
|
|
|
sc_base + AM33_SIGCONTEXT_A1);
|
|
|
|
|
trad_frame_set_reg_addr (this_cache, E_A2_REGNUM,
|
|
|
|
|
sc_base + AM33_SIGCONTEXT_A2);
|
|
|
|
|
trad_frame_set_reg_addr (this_cache, E_A3_REGNUM,
|
|
|
|
|
sc_base + AM33_SIGCONTEXT_A3);
|
|
|
|
|
|
|
|
|
|
trad_frame_set_reg_addr (this_cache, E_E0_REGNUM,
|
|
|
|
|
sc_base + AM33_SIGCONTEXT_E0);
|
|
|
|
|
trad_frame_set_reg_addr (this_cache, E_E1_REGNUM,
|
|
|
|
|
sc_base + AM33_SIGCONTEXT_E1);
|
|
|
|
|
trad_frame_set_reg_addr (this_cache, E_E2_REGNUM,
|
|
|
|
|
sc_base + AM33_SIGCONTEXT_E2);
|
|
|
|
|
trad_frame_set_reg_addr (this_cache, E_E3_REGNUM,
|
|
|
|
|
sc_base + AM33_SIGCONTEXT_E3);
|
|
|
|
|
trad_frame_set_reg_addr (this_cache, E_E4_REGNUM,
|
|
|
|
|
sc_base + AM33_SIGCONTEXT_E4);
|
|
|
|
|
trad_frame_set_reg_addr (this_cache, E_E5_REGNUM,
|
|
|
|
|
sc_base + AM33_SIGCONTEXT_E5);
|
|
|
|
|
trad_frame_set_reg_addr (this_cache, E_E6_REGNUM,
|
|
|
|
|
sc_base + AM33_SIGCONTEXT_E6);
|
|
|
|
|
trad_frame_set_reg_addr (this_cache, E_E7_REGNUM,
|
|
|
|
|
sc_base + AM33_SIGCONTEXT_E7);
|
|
|
|
|
|
|
|
|
|
trad_frame_set_reg_addr (this_cache, E_LAR_REGNUM,
|
|
|
|
|
sc_base + AM33_SIGCONTEXT_LAR);
|
|
|
|
|
trad_frame_set_reg_addr (this_cache, E_LIR_REGNUM,
|
|
|
|
|
sc_base + AM33_SIGCONTEXT_LIR);
|
|
|
|
|
trad_frame_set_reg_addr (this_cache, E_MDR_REGNUM,
|
|
|
|
|
sc_base + AM33_SIGCONTEXT_MDR);
|
|
|
|
|
trad_frame_set_reg_addr (this_cache, E_MCVF_REGNUM,
|
|
|
|
|
sc_base + AM33_SIGCONTEXT_MCVF);
|
|
|
|
|
trad_frame_set_reg_addr (this_cache, E_MCRL_REGNUM,
|
|
|
|
|
sc_base + AM33_SIGCONTEXT_MCRL);
|
|
|
|
|
trad_frame_set_reg_addr (this_cache, E_MDRQ_REGNUM,
|
|
|
|
|
sc_base + AM33_SIGCONTEXT_MDRQ);
|
|
|
|
|
|
|
|
|
|
trad_frame_set_reg_addr (this_cache, E_SP_REGNUM,
|
|
|
|
|
sc_base + AM33_SIGCONTEXT_SP);
|
|
|
|
|
trad_frame_set_reg_addr (this_cache, E_PSW_REGNUM,
|
|
|
|
|
sc_base + AM33_SIGCONTEXT_EPSW);
|
|
|
|
|
trad_frame_set_reg_addr (this_cache, E_PC_REGNUM,
|
|
|
|
|
sc_base + AM33_SIGCONTEXT_PC);
|
|
|
|
|
|
2008-04-30 23:28:57 +02:00
|
|
|
|
fpubase = get_frame_memory_unsigned (this_frame,
|
2011-01-09 04:20:33 +01:00
|
|
|
|
sc_base + AM33_SIGCONTEXT_FPUCONTEXT,
|
|
|
|
|
4);
|
2006-02-28 23:38:04 +01:00
|
|
|
|
if (fpubase)
|
|
|
|
|
{
|
|
|
|
|
for (i = 0; i < 32; i++)
|
|
|
|
|
{
|
|
|
|
|
trad_frame_set_reg_addr (this_cache, E_FS0_REGNUM + i,
|
|
|
|
|
fpubase + 4 * i);
|
|
|
|
|
}
|
|
|
|
|
trad_frame_set_reg_addr (this_cache, E_FPCR_REGNUM, fpubase + 4 * 32);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
trad_frame_set_id (this_cache, frame_id_build (sc_base, func));
|
|
|
|
|
}
|
|
|
|
|
|
2006-11-20 22:47:06 +01:00
|
|
|
|
/* AM33 GNU/Linux osabi has been recognized.
|
2005-09-03 00:53:35 +02:00
|
|
|
|
Now's our chance to register our corefile handling. */
|
|
|
|
|
|
|
|
|
|
static void
|
2010-08-04 17:27:57 +02:00
|
|
|
|
am33_linux_init_osabi (struct gdbarch_info info, struct gdbarch *gdbarch)
|
2005-09-03 00:53:35 +02:00
|
|
|
|
{
|
2010-08-04 17:27:57 +02:00
|
|
|
|
linux_init_abi (info, gdbarch);
|
|
|
|
|
|
2013-11-29 17:51:36 +01:00
|
|
|
|
set_gdbarch_iterate_over_regset_sections
|
|
|
|
|
(gdbarch, am33_iterate_over_regset_sections);
|
2005-09-07 01:14:44 +02:00
|
|
|
|
set_solib_svr4_fetch_link_map_offsets
|
2005-09-07 02:23:14 +02:00
|
|
|
|
(gdbarch, svr4_ilp32_fetch_link_map_offsets);
|
2006-02-28 23:38:04 +01:00
|
|
|
|
|
|
|
|
|
tramp_frame_prepend_unwinder (gdbarch, &am33_linux_sigframe);
|
|
|
|
|
tramp_frame_prepend_unwinder (gdbarch, &am33_linux_rt_sigframe);
|
2005-09-03 00:53:35 +02:00
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
_initialize_mn10300_linux_tdep (void)
|
|
|
|
|
{
|
|
|
|
|
gdbarch_register_osabi (bfd_arch_mn10300, 0,
|
|
|
|
|
GDB_OSABI_LINUX, am33_linux_init_osabi);
|
|
|
|
|
}
|
|
|
|
|
|