binutils-gdb/ld/testsuite/ld-powerpc/powerpc.exp

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# Expect script for ld-powerpc tests
# Copyright (C) 2002-2020 Free Software Foundation, Inc.
#
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# This file is part of the GNU Binutils.
#
# This program is free software; you can redistribute it and/or modify
# it under the terms of the GNU General Public License as published by
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# the Free Software Foundation; either version 3 of the License, or
# (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program; if not, write to the Free Software
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# Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
# MA 02110-1301, USA.
#
if { ![istarget "powerpc*-*-*"] } {
return
}
bfd/ * elf32-ppc.c (ppc_elf_plt_type): New enumeration. (ppc_elf_link_hash_table): Replace old_got and new_got with plt_type and can_use_new_plt. (ppc_elf_create_dynamic_sections): Add SEC_HAS_CONTENTS, SEC_LOAD and SEC_READONLY to the VxWorks .plt flags. (ppc_elf_check_relocs): Set can_use_new_plt instead of new_plt. Move from plt_type == PLT_UNSET to PLT_OLD instead of setting old_plt. (ppc_elf_select_plt_layout): Move from plt_type == PLT_UNSET to either plt_type == PLT_OLD or plt_type == PLT_NEW. Assert that this function should not be called for VxWorks targets. (ppc_elf_tls_setup): Use plt_type instead of old_got. (allocate_got): Likewise. Rearrange so that max_before_header is only used for PLT_OLD and PLT_NEW. (allocate_dynrelocs): Use plt_type instead of old_got and is_vxworks. (ppc_elf_size_dynamic_sections): Likewise. (ppc_elf_relax_section): Likewise. (ppc_elf_relocate_section): Likewise. (ppc_elf_finish_dynamic_symbol): Likewise. (ppc_elf_vxworks_link_hash_table_create): Initialize plt_type. ld/ * emulparams/elf32ppccommon.sh: New file, extracted from... * emulparams/elf32ppc.sh: ...here. * emulparams/elf32ppcvxworks.sh: Include elf32ppccommon.sh instead of elf32ppc.sh. (BSS_PLT): Remove override. * Makefile.am (eelf32lppc.c): Depend on elf32ppccommons.h. (eelf32lppcnto.c, eelf32lppcsim.c, eelf32ppcnto.c): Likewise. (eelf32ppc.c, eelf32ppc_fbsd.c, eelf32ppcsimm): Likewise. (eelf32ppclinux.c): Likewise. (eelf32ppcvxworks.c): Likewise. Add missing vxworks.sh dependency. * Makefile.in: Regenerate. ld/testsuite/ * ld-powerpc/vxworks1-lib.s, ld-powerpc/vxworks1-lib.dd, * ld-powerpc/vxworks1-lib.rd, ld-powerpc/vxworks1.s, * ld-powerpc/vxworks1.dd, ld-powerpc/vxworks1.rd, * ld-powerpc/vxworks1.ld, ld-powerpc/vxworks1.sd: New test. * ld-powerpc/powerpc.exp: Run it.
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if {[istarget "*-*-vxworks"]} {
set ppcvxtests {
* lib/ld-lib.exp (run_ld_link_tests): Add another argument, pass its contents to ar_simple_create and ld_simple_link after objfiles. * ld-aarch64/aarch64-elf.exp: Adjust accordingly. * ld-alpha/alpha.exp: Likewise. * ld-arm/arm-elf.exp: Likewise. * ld-arm/export-class.exp: Likewise. * ld-elf/comm-data.exp: Likewise. * ld-elf/eh-group.exp: Likewise. * ld-elf/elf.exp: Likewise. * ld-elf/export-class.exp: Likewise. * ld-elfvers/vers.exp: Likewise. * ld-frv/tls.exp: Likewise. * ld-i386/export-class.exp: Likewise. * ld-i386/i386.exp: Likewise. * ld-ia64/ia64.exp: Likewise. * ld-libs/libs.exp: Likewise. * ld-m68k/m68k.exp: Likewise. * ld-metag/metag.exp: Likewise. * ld-mips-elf/comm-data.exp: Likewise. * ld-mips-elf/export-class.exp: Likewise. * ld-mips-elf/mips-elf.exp: Likewise. * ld-mn10300/mn10300.exp: Likewise. * ld-pe/pe-compile.exp: Likewise. * ld-pe/pe.exp: Likewise. * ld-plugin/plugin.exp: Likewise. * ld-powerpc/aix52.exp: Likewise. * ld-powerpc/export-class.exp: Likewise. * ld-powerpc/powerpc.exp: Likewise. * ld-s390/s390.exp: Likewise. * ld-sh/sh-vxworks.exp: Likewise. * ld-sh/sh64/sh64.exp: Likewise. * ld-sparc/sparc.exp: Likewise. * ld-tic6x/tic6x.exp: Likewise. * ld-tilegx/tilegx.exp: Likewise. * ld-tilepro/tilepro.exp: Likewise. * ld-undefined/entry.exp: Likewise. * ld-vax-elf/vax-elf.exp: Likewise. * ld-x86-64/dwarfreloc.exp: Likewise. * ld-x86-64/export-class.exp: Likewise. * ld-x86-64/x86-64.exp: Likewise. * ld-xc16x/xc16x.exp: Likewise. * ld-xstormy16/xstormy16.exp: Likewise. * ld-xtensa/xtensa.exp: Likewise.
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{"VxWorks shared library test 1 (default script)" "-shared" ""
bfd/ * elf32-ppc.c (ppc_elf_plt_type): New enumeration. (ppc_elf_link_hash_table): Replace old_got and new_got with plt_type and can_use_new_plt. (ppc_elf_create_dynamic_sections): Add SEC_HAS_CONTENTS, SEC_LOAD and SEC_READONLY to the VxWorks .plt flags. (ppc_elf_check_relocs): Set can_use_new_plt instead of new_plt. Move from plt_type == PLT_UNSET to PLT_OLD instead of setting old_plt. (ppc_elf_select_plt_layout): Move from plt_type == PLT_UNSET to either plt_type == PLT_OLD or plt_type == PLT_NEW. Assert that this function should not be called for VxWorks targets. (ppc_elf_tls_setup): Use plt_type instead of old_got. (allocate_got): Likewise. Rearrange so that max_before_header is only used for PLT_OLD and PLT_NEW. (allocate_dynrelocs): Use plt_type instead of old_got and is_vxworks. (ppc_elf_size_dynamic_sections): Likewise. (ppc_elf_relax_section): Likewise. (ppc_elf_relocate_section): Likewise. (ppc_elf_finish_dynamic_symbol): Likewise. (ppc_elf_vxworks_link_hash_table_create): Initialize plt_type. ld/ * emulparams/elf32ppccommon.sh: New file, extracted from... * emulparams/elf32ppc.sh: ...here. * emulparams/elf32ppcvxworks.sh: Include elf32ppccommon.sh instead of elf32ppc.sh. (BSS_PLT): Remove override. * Makefile.am (eelf32lppc.c): Depend on elf32ppccommons.h. (eelf32lppcnto.c, eelf32lppcsim.c, eelf32ppcnto.c): Likewise. (eelf32ppc.c, eelf32ppc_fbsd.c, eelf32ppcsimm): Likewise. (eelf32ppclinux.c): Likewise. (eelf32ppcvxworks.c): Likewise. Add missing vxworks.sh dependency. * Makefile.in: Regenerate. ld/testsuite/ * ld-powerpc/vxworks1-lib.s, ld-powerpc/vxworks1-lib.dd, * ld-powerpc/vxworks1-lib.rd, ld-powerpc/vxworks1.s, * ld-powerpc/vxworks1.dd, ld-powerpc/vxworks1.rd, * ld-powerpc/vxworks1.ld, ld-powerpc/vxworks1.sd: New test. * ld-powerpc/powerpc.exp: Run it.
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"-mregnames" {vxworks1-lib.s}
{{readelf --segments vxworks1-lib.sd}}
"libvxworks1.so"}
Support different ld --hash-style in the ld testsuite When ld is running with something other than --hash-style=sysv by default, numerous tests need tweaking. Most of the changes just add --hash-style=sysv. I didn't want to make --hash-style=sysv global as that means --hash-style=gnu isn't well tested. * testsuite/ld-alpha/alpha.exp: Add --hash-style=sysv to various test's ld options. * testsuite/ld-arm/arm-elf.exp: Likewise. * testsuite/ld-elf/elf.exp: Likewise. * testsuite/ld-elf/readelf.exp: Likewise. * testsuite/ld-elfvsb/elfvsb.exp: Likewise. * testsuite/ld-i386/i386.exp: Likewise. * testsuite/ld-ia64/ia64.exp: Likewise. * testsuite/ld-m68k/m68k.exp: Likewise. * testsuite/ld-metag/metag.exp: Likewise. * testsuite/ld-powerpc/powerpc.exp: Likewise. * testsuite/ld-s390/s390.exp: Likewise. * testsuite/ld-sh/sh-vxworks.exp: Likewise. * testsuite/ld-shared/shared.exp: Likewise. * testsuite/ld-sparc/sparc.exp: Likewise. * testsuite/ld-tic6x/tic6x.exp: Likewise. * testsuite/ld-vax-elf/vax-elf.exp: Likewise. * testsuite/ld-x86-64/mpx.exp: Likewise. * testsuite/ld-x86-64/x86-64.exp: Likewise. * testsuite/ld-xtensa/xtensa.exp: Likewise. * testsuite/ld-elf/comm-data2.ld: Add .gnu.hash output section. * testsuite/ld-elf/pr20828-v.ld: Likewise. * testsuite/ld-elf/pr20828.ld: Likewise. * testsuite/ld-elf/pr21233.ld: Likewise. * testsuite/ld-elf/pr21384.ld: Likewise. * testsuite/ld-elf/provide-hidden-1.ld: Likewise. * testsuite/ld-elf/provide-hidden-2.ld: Likewise. * testsuite/ld-elf/provide-hidden-s.ld: Likewise. * testsuite/ld-scripts/cross1.t: Likewise. * testsuite/ld-elf/stab.d: Adjust allowed section indices. * testsuite/ld-i386/pie1.d: Don't match addresses. * testsuite/ld-i386/plt-pic2.dd: Likewise. * testsuite/ld-i386/pr19636-1d.d: Likewise. * testsuite/ld-i386/pr19636-2c.d: Likewise. * testsuite/ld-powerpc/elfv2so.d: Likewise. * testsuite/ld-powerpc/tlsopt5.d: Likewise. * testsuite/ld-powerpc/tlsopt5.wf: Likewise. * testsuite/ld-powerpc/tlsopt5_32.d: Likewise. * testsuite/ld-i386/pr19636-2b.d: Don't match _start. * testsuite/ld-powerpc/ambiguousv1.d: Relax symbol count, index and address match. * testsuite/ld-powerpc/ambiguousv1b.d: Likewise. * testsuite/ld-powerpc/ambiguousv2.d: Likewise. * testsuite/ld-powerpc/ambiguousv2b.d: Likewise. * testsuite/ld-aarch64/gc-plt-relocs.d: Run ld with --hash-style=sysv. * testsuite/ld-aarch64/ifunc-1.d: Likewise. * testsuite/ld-aarch64/ifunc-2.d: Likewise. * testsuite/ld-aarch64/ifunc-21.d: Likewise. * testsuite/ld-aarch64/relasz.d: Likewise. * testsuite/ld-aarch64/tls-small-ld.d: Likewise. * testsuite/ld-aarch64/tls-tiny-ld.d: Likewise. * testsuite/ld-arc/tls_gd-01.d: Likewise. * testsuite/ld-cris/libdso-10.d: Likewise. * testsuite/ld-cris/libdso-2.d: Likewise. * testsuite/ld-cris/pic-gc-72.d: Likewise. * testsuite/ld-cris/pic-gc-73.d: Likewise. * testsuite/ld-cris/tls-gd-1.d: Likewise. * testsuite/ld-cris/tls-gd-1h.d: Likewise. * testsuite/ld-cris/tls-gd-2.d: Likewise. * testsuite/ld-cris/tls-gd-2h.d: Likewise. * testsuite/ld-cris/tls-ie-10.d: Likewise. * testsuite/ld-cris/tls-ie-11.d: Likewise. * testsuite/ld-cris/tls-ie-8.d: Likewise. * testsuite/ld-cris/tls-ie-9.d: Likewise. * testsuite/ld-cris/tls-ld-4.d: Likewise. * testsuite/ld-cris/tls-ld-5.d: Likewise. * testsuite/ld-cris/tls-ld-6.d: Likewise. * testsuite/ld-cris/tls-ld-7.d: Likewise. * testsuite/ld-cris/tls-ldgd-14.d: Likewise. * testsuite/ld-cris/tls-ldgd-15.d: Likewise. * testsuite/ld-cris/tls-ldgdx-14.d: Likewise. * testsuite/ld-cris/tls-ldgdx-15.d: Likewise. * testsuite/ld-cris/tls-local-54.d: Likewise. * testsuite/ld-cris/tls-local-60.d: Likewise. * testsuite/ld-cris/tls-local-61.d: Likewise. * testsuite/ld-cris/weakhiddso.d: Likewise. * testsuite/ld-elf/linkinfo1a.d: Likewise. * testsuite/ld-elf/linkinfo1b.d: Likewise. * testsuite/ld-elf/pr19617a.d: Likewise. * testsuite/ld-elfvsb/hidden2.d: Likewise. * testsuite/ld-frv/fdpic-pie-6.d: Likewise. * testsuite/ld-frv/fdpic-shared-2.d: Likewise. * testsuite/ld-frv/fdpic-shared-5.d: Likewise. * testsuite/ld-frv/fdpic-shared-6.d: Likewise. * testsuite/ld-frv/fdpic-shared-8.d: Likewise. * testsuite/ld-frv/fdpic-shared-local-2.d: Likewise. * testsuite/ld-frv/fdpic-shared-local-8.d: Likewise. * testsuite/ld-frv/tls-dynamic-2.d: Likewise. * testsuite/ld-i386/ibt-plt-1.d: Likewise. * testsuite/ld-i386/ibt-plt-2a.d: Likewise. * testsuite/ld-i386/ibt-plt-2c.d: Likewise. * testsuite/ld-i386/ibt-plt-3a.d: Likewise. * testsuite/ld-i386/ibt-plt-3c.d: Likewise. * testsuite/ld-i386/pr20830.d: Likewise. * testsuite/ld-ia64/merge1.d: Likewise. * testsuite/ld-ia64/merge2.d: Likewise. * testsuite/ld-ia64/merge3.d: Likewise. * testsuite/ld-ia64/merge4.d: Likewise. * testsuite/ld-ia64/merge5.d: Likewise. * testsuite/ld-ifunc/ifunc-1-local-x86.d: Likewise. * testsuite/ld-ifunc/ifunc-1-x86.d: Likewise. * testsuite/ld-ifunc/ifunc-2-i386-now.d: Likewise. * testsuite/ld-ifunc/ifunc-2-local-i386-now.d: Likewise. * testsuite/ld-ifunc/ifunc-2-local-x86-64-now.d: Likewise. * testsuite/ld-ifunc/ifunc-2-local-x86-64.d: Likewise. * testsuite/ld-ifunc/ifunc-2-x86-64-now.d: Likewise. * testsuite/ld-ifunc/ifunc-2-x86-64.d: Likewise. * testsuite/ld-ifunc/ifunc-3a-x86.d: Likewise. * testsuite/ld-ifunc/pr17154-i386-now.d: Likewise. * testsuite/ld-ifunc/pr17154-i386.d: Likewise. * testsuite/ld-ifunc/pr17154-x86-64-now.d: Likewise. * testsuite/ld-ifunc/pr17154-x86-64.d: Likewise. * testsuite/ld-m68k/got-1.d: Likewise. * testsuite/ld-m68k/got-multigot-12-13-14-34-35-ok.d: Likewise. * testsuite/ld-m68k/got-multigot-14-ok.d: Likewise. * testsuite/ld-m68k/got-multigot-15-er.d: Likewise. * testsuite/ld-m68k/got-negative-12-13-14-34-ok.d: Likewise. * testsuite/ld-m68k/got-negative-12-13-14-35-er.d: Likewise. * testsuite/ld-m68k/got-negative-14-ok.d: Likewise. * testsuite/ld-m68k/got-negative-15-er.d: Likewise. * testsuite/ld-m68k/got-single-12-ok.d: Likewise. * testsuite/ld-m68k/got-single-13-er.d: Likewise. * testsuite/ld-m68k/got-xgot-12-13-14-15-34-35-ok.d: Likewise. * testsuite/ld-m68k/got-xgot-15-ok.d: Likewise. * testsuite/ld-m68k/tls-gd-1.d: Likewise. * testsuite/ld-m68k/tls-gd-2.d: Likewise. * testsuite/ld-m68k/tls-gd-ie-1.d: Likewise. * testsuite/ld-m68k/tls-ie-1.d: Likewise. * testsuite/ld-m68k/tls-ld-1.d: Likewise. * testsuite/ld-m68k/tls-ld-2.d: Likewise. * testsuite/ld-sh/shared-2.d: Likewise. * testsuite/ld-sh/tlsbin-2.d: Likewise. * testsuite/ld-sh/tlspic-2.d: Likewise. * testsuite/ld-x86-64/bnd-branch-1-now.d: Likewise. * testsuite/ld-x86-64/bnd-ifunc-1-now.d: Likewise. * testsuite/ld-x86-64/bnd-ifunc-1.d: Likewise. * testsuite/ld-x86-64/bnd-ifunc-2-now.d: Likewise. * testsuite/ld-x86-64/bnd-ifunc-2.d: Likewise. * testsuite/ld-x86-64/bnd-plt-1-now.d: Likewise. * testsuite/ld-x86-64/bnd-plt-1.d: Likewise. * testsuite/ld-x86-64/ibt-plt-1-x32.d: Likewise. * testsuite/ld-x86-64/ibt-plt-1.d: Likewise. * testsuite/ld-x86-64/ibt-plt-2a-x32.d: Likewise. * testsuite/ld-x86-64/ibt-plt-2a.d: Likewise. * testsuite/ld-x86-64/ibt-plt-2c-x32.d: Likewise. * testsuite/ld-x86-64/ibt-plt-2c.d: Likewise. * testsuite/ld-x86-64/ibt-plt-3a-x32.d: Likewise. * testsuite/ld-x86-64/ibt-plt-3a.d: Likewise. * testsuite/ld-x86-64/ibt-plt-3c-x32.d: Likewise. * testsuite/ld-x86-64/ibt-plt-3c.d: Likewise. * testsuite/ld-x86-64/ilp32-4-nacl.d: Likewise. * testsuite/ld-x86-64/ilp32-4.d: Likewise. * testsuite/ld-x86-64/load1c-nacl.d: Likewise. * testsuite/ld-x86-64/load1c.d: Likewise. * testsuite/ld-x86-64/load1d-nacl.d: Likewise. * testsuite/ld-x86-64/load1d.d: Likewise. * testsuite/ld-x86-64/pie3-nacl.d: Likewise. * testsuite/ld-x86-64/pie3.d: Likewise. * testsuite/ld-x86-64/pr14207.d: Likewise. * testsuite/ld-x86-64/pr19162.d: Likewise. * testsuite/ld-x86-64/pr19636-2d-nacl.d: Likewise. * testsuite/ld-x86-64/pr19636-2d.d: Likewise. * testsuite/ld-x86-64/pr20253-1d.d: Likewise. * testsuite/ld-x86-64/pr20253-1f.d: Likewise. * testsuite/ld-x86-64/pr20253-1j.d: Likewise. * testsuite/ld-x86-64/pr20253-1l.d: Likewise. * testsuite/ld-x86-64/pr20830a-now.d: Likewise. * testsuite/ld-x86-64/pr20830a.d: Likewise. * testsuite/ld-x86-64/pr20830b-now.d: Likewise. * testsuite/ld-x86-64/pr20830b.d: Likewise. * testsuite/ld-x86-64/pr21038a-now.d: Likewise. * testsuite/ld-x86-64/pr21038a.d: Likewise. * testsuite/ld-x86-64/pr21038b-now.d: Likewise. * testsuite/ld-x86-64/pr21038b.d: Likewise. * testsuite/ld-x86-64/pr21038c-now.d: Likewise. * testsuite/ld-x86-64/pr21038c.d: Likewise.
2017-08-06 14:34:25 +02:00
{"VxWorks shared library test 1"
"-shared --hash-style=sysv -Tvxworks1.ld" ""
bfd/ * elf32-ppc.c (ppc_elf_plt_type): New enumeration. (ppc_elf_link_hash_table): Replace old_got and new_got with plt_type and can_use_new_plt. (ppc_elf_create_dynamic_sections): Add SEC_HAS_CONTENTS, SEC_LOAD and SEC_READONLY to the VxWorks .plt flags. (ppc_elf_check_relocs): Set can_use_new_plt instead of new_plt. Move from plt_type == PLT_UNSET to PLT_OLD instead of setting old_plt. (ppc_elf_select_plt_layout): Move from plt_type == PLT_UNSET to either plt_type == PLT_OLD or plt_type == PLT_NEW. Assert that this function should not be called for VxWorks targets. (ppc_elf_tls_setup): Use plt_type instead of old_got. (allocate_got): Likewise. Rearrange so that max_before_header is only used for PLT_OLD and PLT_NEW. (allocate_dynrelocs): Use plt_type instead of old_got and is_vxworks. (ppc_elf_size_dynamic_sections): Likewise. (ppc_elf_relax_section): Likewise. (ppc_elf_relocate_section): Likewise. (ppc_elf_finish_dynamic_symbol): Likewise. (ppc_elf_vxworks_link_hash_table_create): Initialize plt_type. ld/ * emulparams/elf32ppccommon.sh: New file, extracted from... * emulparams/elf32ppc.sh: ...here. * emulparams/elf32ppcvxworks.sh: Include elf32ppccommon.sh instead of elf32ppc.sh. (BSS_PLT): Remove override. * Makefile.am (eelf32lppc.c): Depend on elf32ppccommons.h. (eelf32lppcnto.c, eelf32lppcsim.c, eelf32ppcnto.c): Likewise. (eelf32ppc.c, eelf32ppc_fbsd.c, eelf32ppcsimm): Likewise. (eelf32ppclinux.c): Likewise. (eelf32ppcvxworks.c): Likewise. Add missing vxworks.sh dependency. * Makefile.in: Regenerate. ld/testsuite/ * ld-powerpc/vxworks1-lib.s, ld-powerpc/vxworks1-lib.dd, * ld-powerpc/vxworks1-lib.rd, ld-powerpc/vxworks1.s, * ld-powerpc/vxworks1.dd, ld-powerpc/vxworks1.rd, * ld-powerpc/vxworks1.ld, ld-powerpc/vxworks1.sd: New test. * ld-powerpc/powerpc.exp: Run it.
2006-03-02 09:50:04 +01:00
"-mregnames" {vxworks1-lib.s}
{{readelf {--relocs -T} vxworks1-lib.rd} {objdump -dr vxworks1-lib.dd}
{readelf --symbols vxworks1-lib.nd} {readelf -d vxworks1-lib.td}}
bfd/ * elf32-ppc.c (ppc_elf_plt_type): New enumeration. (ppc_elf_link_hash_table): Replace old_got and new_got with plt_type and can_use_new_plt. (ppc_elf_create_dynamic_sections): Add SEC_HAS_CONTENTS, SEC_LOAD and SEC_READONLY to the VxWorks .plt flags. (ppc_elf_check_relocs): Set can_use_new_plt instead of new_plt. Move from plt_type == PLT_UNSET to PLT_OLD instead of setting old_plt. (ppc_elf_select_plt_layout): Move from plt_type == PLT_UNSET to either plt_type == PLT_OLD or plt_type == PLT_NEW. Assert that this function should not be called for VxWorks targets. (ppc_elf_tls_setup): Use plt_type instead of old_got. (allocate_got): Likewise. Rearrange so that max_before_header is only used for PLT_OLD and PLT_NEW. (allocate_dynrelocs): Use plt_type instead of old_got and is_vxworks. (ppc_elf_size_dynamic_sections): Likewise. (ppc_elf_relax_section): Likewise. (ppc_elf_relocate_section): Likewise. (ppc_elf_finish_dynamic_symbol): Likewise. (ppc_elf_vxworks_link_hash_table_create): Initialize plt_type. ld/ * emulparams/elf32ppccommon.sh: New file, extracted from... * emulparams/elf32ppc.sh: ...here. * emulparams/elf32ppcvxworks.sh: Include elf32ppccommon.sh instead of elf32ppc.sh. (BSS_PLT): Remove override. * Makefile.am (eelf32lppc.c): Depend on elf32ppccommons.h. (eelf32lppcnto.c, eelf32lppcsim.c, eelf32ppcnto.c): Likewise. (eelf32ppc.c, eelf32ppc_fbsd.c, eelf32ppcsimm): Likewise. (eelf32ppclinux.c): Likewise. (eelf32ppcvxworks.c): Likewise. Add missing vxworks.sh dependency. * Makefile.in: Regenerate. ld/testsuite/ * ld-powerpc/vxworks1-lib.s, ld-powerpc/vxworks1-lib.dd, * ld-powerpc/vxworks1-lib.rd, ld-powerpc/vxworks1.s, * ld-powerpc/vxworks1.dd, ld-powerpc/vxworks1.rd, * ld-powerpc/vxworks1.ld, ld-powerpc/vxworks1.sd: New test. * ld-powerpc/powerpc.exp: Run it.
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"libvxworks1.so"}
{"VxWorks executable test 1 (dynamic)" \
Support different ld --hash-style in the ld testsuite When ld is running with something other than --hash-style=sysv by default, numerous tests need tweaking. Most of the changes just add --hash-style=sysv. I didn't want to make --hash-style=sysv global as that means --hash-style=gnu isn't well tested. * testsuite/ld-alpha/alpha.exp: Add --hash-style=sysv to various test's ld options. * testsuite/ld-arm/arm-elf.exp: Likewise. * testsuite/ld-elf/elf.exp: Likewise. * testsuite/ld-elf/readelf.exp: Likewise. * testsuite/ld-elfvsb/elfvsb.exp: Likewise. * testsuite/ld-i386/i386.exp: Likewise. * testsuite/ld-ia64/ia64.exp: Likewise. * testsuite/ld-m68k/m68k.exp: Likewise. * testsuite/ld-metag/metag.exp: Likewise. * testsuite/ld-powerpc/powerpc.exp: Likewise. * testsuite/ld-s390/s390.exp: Likewise. * testsuite/ld-sh/sh-vxworks.exp: Likewise. * testsuite/ld-shared/shared.exp: Likewise. * testsuite/ld-sparc/sparc.exp: Likewise. * testsuite/ld-tic6x/tic6x.exp: Likewise. * testsuite/ld-vax-elf/vax-elf.exp: Likewise. * testsuite/ld-x86-64/mpx.exp: Likewise. * testsuite/ld-x86-64/x86-64.exp: Likewise. * testsuite/ld-xtensa/xtensa.exp: Likewise. * testsuite/ld-elf/comm-data2.ld: Add .gnu.hash output section. * testsuite/ld-elf/pr20828-v.ld: Likewise. * testsuite/ld-elf/pr20828.ld: Likewise. * testsuite/ld-elf/pr21233.ld: Likewise. * testsuite/ld-elf/pr21384.ld: Likewise. * testsuite/ld-elf/provide-hidden-1.ld: Likewise. * testsuite/ld-elf/provide-hidden-2.ld: Likewise. * testsuite/ld-elf/provide-hidden-s.ld: Likewise. * testsuite/ld-scripts/cross1.t: Likewise. * testsuite/ld-elf/stab.d: Adjust allowed section indices. * testsuite/ld-i386/pie1.d: Don't match addresses. * testsuite/ld-i386/plt-pic2.dd: Likewise. * testsuite/ld-i386/pr19636-1d.d: Likewise. * testsuite/ld-i386/pr19636-2c.d: Likewise. * testsuite/ld-powerpc/elfv2so.d: Likewise. * testsuite/ld-powerpc/tlsopt5.d: Likewise. * testsuite/ld-powerpc/tlsopt5.wf: Likewise. * testsuite/ld-powerpc/tlsopt5_32.d: Likewise. * testsuite/ld-i386/pr19636-2b.d: Don't match _start. * testsuite/ld-powerpc/ambiguousv1.d: Relax symbol count, index and address match. * testsuite/ld-powerpc/ambiguousv1b.d: Likewise. * testsuite/ld-powerpc/ambiguousv2.d: Likewise. * testsuite/ld-powerpc/ambiguousv2b.d: Likewise. * testsuite/ld-aarch64/gc-plt-relocs.d: Run ld with --hash-style=sysv. * testsuite/ld-aarch64/ifunc-1.d: Likewise. * testsuite/ld-aarch64/ifunc-2.d: Likewise. * testsuite/ld-aarch64/ifunc-21.d: Likewise. * testsuite/ld-aarch64/relasz.d: Likewise. * testsuite/ld-aarch64/tls-small-ld.d: Likewise. * testsuite/ld-aarch64/tls-tiny-ld.d: Likewise. * testsuite/ld-arc/tls_gd-01.d: Likewise. * testsuite/ld-cris/libdso-10.d: Likewise. * testsuite/ld-cris/libdso-2.d: Likewise. * testsuite/ld-cris/pic-gc-72.d: Likewise. * testsuite/ld-cris/pic-gc-73.d: Likewise. * testsuite/ld-cris/tls-gd-1.d: Likewise. * testsuite/ld-cris/tls-gd-1h.d: Likewise. * testsuite/ld-cris/tls-gd-2.d: Likewise. * testsuite/ld-cris/tls-gd-2h.d: Likewise. * testsuite/ld-cris/tls-ie-10.d: Likewise. * testsuite/ld-cris/tls-ie-11.d: Likewise. * testsuite/ld-cris/tls-ie-8.d: Likewise. * testsuite/ld-cris/tls-ie-9.d: Likewise. * testsuite/ld-cris/tls-ld-4.d: Likewise. * testsuite/ld-cris/tls-ld-5.d: Likewise. * testsuite/ld-cris/tls-ld-6.d: Likewise. * testsuite/ld-cris/tls-ld-7.d: Likewise. * testsuite/ld-cris/tls-ldgd-14.d: Likewise. * testsuite/ld-cris/tls-ldgd-15.d: Likewise. * testsuite/ld-cris/tls-ldgdx-14.d: Likewise. * testsuite/ld-cris/tls-ldgdx-15.d: Likewise. * testsuite/ld-cris/tls-local-54.d: Likewise. * testsuite/ld-cris/tls-local-60.d: Likewise. * testsuite/ld-cris/tls-local-61.d: Likewise. * testsuite/ld-cris/weakhiddso.d: Likewise. * testsuite/ld-elf/linkinfo1a.d: Likewise. * testsuite/ld-elf/linkinfo1b.d: Likewise. * testsuite/ld-elf/pr19617a.d: Likewise. * testsuite/ld-elfvsb/hidden2.d: Likewise. * testsuite/ld-frv/fdpic-pie-6.d: Likewise. * testsuite/ld-frv/fdpic-shared-2.d: Likewise. * testsuite/ld-frv/fdpic-shared-5.d: Likewise. * testsuite/ld-frv/fdpic-shared-6.d: Likewise. * testsuite/ld-frv/fdpic-shared-8.d: Likewise. * testsuite/ld-frv/fdpic-shared-local-2.d: Likewise. * testsuite/ld-frv/fdpic-shared-local-8.d: Likewise. * testsuite/ld-frv/tls-dynamic-2.d: Likewise. * testsuite/ld-i386/ibt-plt-1.d: Likewise. * testsuite/ld-i386/ibt-plt-2a.d: Likewise. * testsuite/ld-i386/ibt-plt-2c.d: Likewise. * testsuite/ld-i386/ibt-plt-3a.d: Likewise. * testsuite/ld-i386/ibt-plt-3c.d: Likewise. * testsuite/ld-i386/pr20830.d: Likewise. * testsuite/ld-ia64/merge1.d: Likewise. * testsuite/ld-ia64/merge2.d: Likewise. * testsuite/ld-ia64/merge3.d: Likewise. * testsuite/ld-ia64/merge4.d: Likewise. * testsuite/ld-ia64/merge5.d: Likewise. * testsuite/ld-ifunc/ifunc-1-local-x86.d: Likewise. * testsuite/ld-ifunc/ifunc-1-x86.d: Likewise. * testsuite/ld-ifunc/ifunc-2-i386-now.d: Likewise. * testsuite/ld-ifunc/ifunc-2-local-i386-now.d: Likewise. * testsuite/ld-ifunc/ifunc-2-local-x86-64-now.d: Likewise. * testsuite/ld-ifunc/ifunc-2-local-x86-64.d: Likewise. * testsuite/ld-ifunc/ifunc-2-x86-64-now.d: Likewise. * testsuite/ld-ifunc/ifunc-2-x86-64.d: Likewise. * testsuite/ld-ifunc/ifunc-3a-x86.d: Likewise. * testsuite/ld-ifunc/pr17154-i386-now.d: Likewise. * testsuite/ld-ifunc/pr17154-i386.d: Likewise. * testsuite/ld-ifunc/pr17154-x86-64-now.d: Likewise. * testsuite/ld-ifunc/pr17154-x86-64.d: Likewise. * testsuite/ld-m68k/got-1.d: Likewise. * testsuite/ld-m68k/got-multigot-12-13-14-34-35-ok.d: Likewise. * testsuite/ld-m68k/got-multigot-14-ok.d: Likewise. * testsuite/ld-m68k/got-multigot-15-er.d: Likewise. * testsuite/ld-m68k/got-negative-12-13-14-34-ok.d: Likewise. * testsuite/ld-m68k/got-negative-12-13-14-35-er.d: Likewise. * testsuite/ld-m68k/got-negative-14-ok.d: Likewise. * testsuite/ld-m68k/got-negative-15-er.d: Likewise. * testsuite/ld-m68k/got-single-12-ok.d: Likewise. * testsuite/ld-m68k/got-single-13-er.d: Likewise. * testsuite/ld-m68k/got-xgot-12-13-14-15-34-35-ok.d: Likewise. * testsuite/ld-m68k/got-xgot-15-ok.d: Likewise. * testsuite/ld-m68k/tls-gd-1.d: Likewise. * testsuite/ld-m68k/tls-gd-2.d: Likewise. * testsuite/ld-m68k/tls-gd-ie-1.d: Likewise. * testsuite/ld-m68k/tls-ie-1.d: Likewise. * testsuite/ld-m68k/tls-ld-1.d: Likewise. * testsuite/ld-m68k/tls-ld-2.d: Likewise. * testsuite/ld-sh/shared-2.d: Likewise. * testsuite/ld-sh/tlsbin-2.d: Likewise. * testsuite/ld-sh/tlspic-2.d: Likewise. * testsuite/ld-x86-64/bnd-branch-1-now.d: Likewise. * testsuite/ld-x86-64/bnd-ifunc-1-now.d: Likewise. * testsuite/ld-x86-64/bnd-ifunc-1.d: Likewise. * testsuite/ld-x86-64/bnd-ifunc-2-now.d: Likewise. * testsuite/ld-x86-64/bnd-ifunc-2.d: Likewise. * testsuite/ld-x86-64/bnd-plt-1-now.d: Likewise. * testsuite/ld-x86-64/bnd-plt-1.d: Likewise. * testsuite/ld-x86-64/ibt-plt-1-x32.d: Likewise. * testsuite/ld-x86-64/ibt-plt-1.d: Likewise. * testsuite/ld-x86-64/ibt-plt-2a-x32.d: Likewise. * testsuite/ld-x86-64/ibt-plt-2a.d: Likewise. * testsuite/ld-x86-64/ibt-plt-2c-x32.d: Likewise. * testsuite/ld-x86-64/ibt-plt-2c.d: Likewise. * testsuite/ld-x86-64/ibt-plt-3a-x32.d: Likewise. * testsuite/ld-x86-64/ibt-plt-3a.d: Likewise. * testsuite/ld-x86-64/ibt-plt-3c-x32.d: Likewise. * testsuite/ld-x86-64/ibt-plt-3c.d: Likewise. * testsuite/ld-x86-64/ilp32-4-nacl.d: Likewise. * testsuite/ld-x86-64/ilp32-4.d: Likewise. * testsuite/ld-x86-64/load1c-nacl.d: Likewise. * testsuite/ld-x86-64/load1c.d: Likewise. * testsuite/ld-x86-64/load1d-nacl.d: Likewise. * testsuite/ld-x86-64/load1d.d: Likewise. * testsuite/ld-x86-64/pie3-nacl.d: Likewise. * testsuite/ld-x86-64/pie3.d: Likewise. * testsuite/ld-x86-64/pr14207.d: Likewise. * testsuite/ld-x86-64/pr19162.d: Likewise. * testsuite/ld-x86-64/pr19636-2d-nacl.d: Likewise. * testsuite/ld-x86-64/pr19636-2d.d: Likewise. * testsuite/ld-x86-64/pr20253-1d.d: Likewise. * testsuite/ld-x86-64/pr20253-1f.d: Likewise. * testsuite/ld-x86-64/pr20253-1j.d: Likewise. * testsuite/ld-x86-64/pr20253-1l.d: Likewise. * testsuite/ld-x86-64/pr20830a-now.d: Likewise. * testsuite/ld-x86-64/pr20830a.d: Likewise. * testsuite/ld-x86-64/pr20830b-now.d: Likewise. * testsuite/ld-x86-64/pr20830b.d: Likewise. * testsuite/ld-x86-64/pr21038a-now.d: Likewise. * testsuite/ld-x86-64/pr21038a.d: Likewise. * testsuite/ld-x86-64/pr21038b-now.d: Likewise. * testsuite/ld-x86-64/pr21038b.d: Likewise. * testsuite/ld-x86-64/pr21038c-now.d: Likewise. * testsuite/ld-x86-64/pr21038c.d: Likewise.
2017-08-06 14:34:25 +02:00
"tmpdir/libvxworks1.so -Tvxworks1.ld -q --force-dynamic --hash-style=sysv" ""
"-mregnames" {vxworks1.s}
{{readelf {--relocs -T} vxworks1.rd} {objdump -dr vxworks1.dd}}
bfd/ * elf32-ppc.c (ppc_elf_plt_type): New enumeration. (ppc_elf_link_hash_table): Replace old_got and new_got with plt_type and can_use_new_plt. (ppc_elf_create_dynamic_sections): Add SEC_HAS_CONTENTS, SEC_LOAD and SEC_READONLY to the VxWorks .plt flags. (ppc_elf_check_relocs): Set can_use_new_plt instead of new_plt. Move from plt_type == PLT_UNSET to PLT_OLD instead of setting old_plt. (ppc_elf_select_plt_layout): Move from plt_type == PLT_UNSET to either plt_type == PLT_OLD or plt_type == PLT_NEW. Assert that this function should not be called for VxWorks targets. (ppc_elf_tls_setup): Use plt_type instead of old_got. (allocate_got): Likewise. Rearrange so that max_before_header is only used for PLT_OLD and PLT_NEW. (allocate_dynrelocs): Use plt_type instead of old_got and is_vxworks. (ppc_elf_size_dynamic_sections): Likewise. (ppc_elf_relax_section): Likewise. (ppc_elf_relocate_section): Likewise. (ppc_elf_finish_dynamic_symbol): Likewise. (ppc_elf_vxworks_link_hash_table_create): Initialize plt_type. ld/ * emulparams/elf32ppccommon.sh: New file, extracted from... * emulparams/elf32ppc.sh: ...here. * emulparams/elf32ppcvxworks.sh: Include elf32ppccommon.sh instead of elf32ppc.sh. (BSS_PLT): Remove override. * Makefile.am (eelf32lppc.c): Depend on elf32ppccommons.h. (eelf32lppcnto.c, eelf32lppcsim.c, eelf32ppcnto.c): Likewise. (eelf32ppc.c, eelf32ppc_fbsd.c, eelf32ppcsimm): Likewise. (eelf32ppclinux.c): Likewise. (eelf32ppcvxworks.c): Likewise. Add missing vxworks.sh dependency. * Makefile.in: Regenerate. ld/testsuite/ * ld-powerpc/vxworks1-lib.s, ld-powerpc/vxworks1-lib.dd, * ld-powerpc/vxworks1-lib.rd, ld-powerpc/vxworks1.s, * ld-powerpc/vxworks1.dd, ld-powerpc/vxworks1.rd, * ld-powerpc/vxworks1.ld, ld-powerpc/vxworks1.sd: New test. * ld-powerpc/powerpc.exp: Run it.
2006-03-02 09:50:04 +01:00
"vxworks1"}
{"VxWorks executable test 2 (dynamic)" \
Support different ld --hash-style in the ld testsuite When ld is running with something other than --hash-style=sysv by default, numerous tests need tweaking. Most of the changes just add --hash-style=sysv. I didn't want to make --hash-style=sysv global as that means --hash-style=gnu isn't well tested. * testsuite/ld-alpha/alpha.exp: Add --hash-style=sysv to various test's ld options. * testsuite/ld-arm/arm-elf.exp: Likewise. * testsuite/ld-elf/elf.exp: Likewise. * testsuite/ld-elf/readelf.exp: Likewise. * testsuite/ld-elfvsb/elfvsb.exp: Likewise. * testsuite/ld-i386/i386.exp: Likewise. * testsuite/ld-ia64/ia64.exp: Likewise. * testsuite/ld-m68k/m68k.exp: Likewise. * testsuite/ld-metag/metag.exp: Likewise. * testsuite/ld-powerpc/powerpc.exp: Likewise. * testsuite/ld-s390/s390.exp: Likewise. * testsuite/ld-sh/sh-vxworks.exp: Likewise. * testsuite/ld-shared/shared.exp: Likewise. * testsuite/ld-sparc/sparc.exp: Likewise. * testsuite/ld-tic6x/tic6x.exp: Likewise. * testsuite/ld-vax-elf/vax-elf.exp: Likewise. * testsuite/ld-x86-64/mpx.exp: Likewise. * testsuite/ld-x86-64/x86-64.exp: Likewise. * testsuite/ld-xtensa/xtensa.exp: Likewise. * testsuite/ld-elf/comm-data2.ld: Add .gnu.hash output section. * testsuite/ld-elf/pr20828-v.ld: Likewise. * testsuite/ld-elf/pr20828.ld: Likewise. * testsuite/ld-elf/pr21233.ld: Likewise. * testsuite/ld-elf/pr21384.ld: Likewise. * testsuite/ld-elf/provide-hidden-1.ld: Likewise. * testsuite/ld-elf/provide-hidden-2.ld: Likewise. * testsuite/ld-elf/provide-hidden-s.ld: Likewise. * testsuite/ld-scripts/cross1.t: Likewise. * testsuite/ld-elf/stab.d: Adjust allowed section indices. * testsuite/ld-i386/pie1.d: Don't match addresses. * testsuite/ld-i386/plt-pic2.dd: Likewise. * testsuite/ld-i386/pr19636-1d.d: Likewise. * testsuite/ld-i386/pr19636-2c.d: Likewise. * testsuite/ld-powerpc/elfv2so.d: Likewise. * testsuite/ld-powerpc/tlsopt5.d: Likewise. * testsuite/ld-powerpc/tlsopt5.wf: Likewise. * testsuite/ld-powerpc/tlsopt5_32.d: Likewise. * testsuite/ld-i386/pr19636-2b.d: Don't match _start. * testsuite/ld-powerpc/ambiguousv1.d: Relax symbol count, index and address match. * testsuite/ld-powerpc/ambiguousv1b.d: Likewise. * testsuite/ld-powerpc/ambiguousv2.d: Likewise. * testsuite/ld-powerpc/ambiguousv2b.d: Likewise. * testsuite/ld-aarch64/gc-plt-relocs.d: Run ld with --hash-style=sysv. * testsuite/ld-aarch64/ifunc-1.d: Likewise. * testsuite/ld-aarch64/ifunc-2.d: Likewise. * testsuite/ld-aarch64/ifunc-21.d: Likewise. * testsuite/ld-aarch64/relasz.d: Likewise. * testsuite/ld-aarch64/tls-small-ld.d: Likewise. * testsuite/ld-aarch64/tls-tiny-ld.d: Likewise. * testsuite/ld-arc/tls_gd-01.d: Likewise. * testsuite/ld-cris/libdso-10.d: Likewise. * testsuite/ld-cris/libdso-2.d: Likewise. * testsuite/ld-cris/pic-gc-72.d: Likewise. * testsuite/ld-cris/pic-gc-73.d: Likewise. * testsuite/ld-cris/tls-gd-1.d: Likewise. * testsuite/ld-cris/tls-gd-1h.d: Likewise. * testsuite/ld-cris/tls-gd-2.d: Likewise. * testsuite/ld-cris/tls-gd-2h.d: Likewise. * testsuite/ld-cris/tls-ie-10.d: Likewise. * testsuite/ld-cris/tls-ie-11.d: Likewise. * testsuite/ld-cris/tls-ie-8.d: Likewise. * testsuite/ld-cris/tls-ie-9.d: Likewise. * testsuite/ld-cris/tls-ld-4.d: Likewise. * testsuite/ld-cris/tls-ld-5.d: Likewise. * testsuite/ld-cris/tls-ld-6.d: Likewise. * testsuite/ld-cris/tls-ld-7.d: Likewise. * testsuite/ld-cris/tls-ldgd-14.d: Likewise. * testsuite/ld-cris/tls-ldgd-15.d: Likewise. * testsuite/ld-cris/tls-ldgdx-14.d: Likewise. * testsuite/ld-cris/tls-ldgdx-15.d: Likewise. * testsuite/ld-cris/tls-local-54.d: Likewise. * testsuite/ld-cris/tls-local-60.d: Likewise. * testsuite/ld-cris/tls-local-61.d: Likewise. * testsuite/ld-cris/weakhiddso.d: Likewise. * testsuite/ld-elf/linkinfo1a.d: Likewise. * testsuite/ld-elf/linkinfo1b.d: Likewise. * testsuite/ld-elf/pr19617a.d: Likewise. * testsuite/ld-elfvsb/hidden2.d: Likewise. * testsuite/ld-frv/fdpic-pie-6.d: Likewise. * testsuite/ld-frv/fdpic-shared-2.d: Likewise. * testsuite/ld-frv/fdpic-shared-5.d: Likewise. * testsuite/ld-frv/fdpic-shared-6.d: Likewise. * testsuite/ld-frv/fdpic-shared-8.d: Likewise. * testsuite/ld-frv/fdpic-shared-local-2.d: Likewise. * testsuite/ld-frv/fdpic-shared-local-8.d: Likewise. * testsuite/ld-frv/tls-dynamic-2.d: Likewise. * testsuite/ld-i386/ibt-plt-1.d: Likewise. * testsuite/ld-i386/ibt-plt-2a.d: Likewise. * testsuite/ld-i386/ibt-plt-2c.d: Likewise. * testsuite/ld-i386/ibt-plt-3a.d: Likewise. * testsuite/ld-i386/ibt-plt-3c.d: Likewise. * testsuite/ld-i386/pr20830.d: Likewise. * testsuite/ld-ia64/merge1.d: Likewise. * testsuite/ld-ia64/merge2.d: Likewise. * testsuite/ld-ia64/merge3.d: Likewise. * testsuite/ld-ia64/merge4.d: Likewise. * testsuite/ld-ia64/merge5.d: Likewise. * testsuite/ld-ifunc/ifunc-1-local-x86.d: Likewise. * testsuite/ld-ifunc/ifunc-1-x86.d: Likewise. * testsuite/ld-ifunc/ifunc-2-i386-now.d: Likewise. * testsuite/ld-ifunc/ifunc-2-local-i386-now.d: Likewise. * testsuite/ld-ifunc/ifunc-2-local-x86-64-now.d: Likewise. * testsuite/ld-ifunc/ifunc-2-local-x86-64.d: Likewise. * testsuite/ld-ifunc/ifunc-2-x86-64-now.d: Likewise. * testsuite/ld-ifunc/ifunc-2-x86-64.d: Likewise. * testsuite/ld-ifunc/ifunc-3a-x86.d: Likewise. * testsuite/ld-ifunc/pr17154-i386-now.d: Likewise. * testsuite/ld-ifunc/pr17154-i386.d: Likewise. * testsuite/ld-ifunc/pr17154-x86-64-now.d: Likewise. * testsuite/ld-ifunc/pr17154-x86-64.d: Likewise. * testsuite/ld-m68k/got-1.d: Likewise. * testsuite/ld-m68k/got-multigot-12-13-14-34-35-ok.d: Likewise. * testsuite/ld-m68k/got-multigot-14-ok.d: Likewise. * testsuite/ld-m68k/got-multigot-15-er.d: Likewise. * testsuite/ld-m68k/got-negative-12-13-14-34-ok.d: Likewise. * testsuite/ld-m68k/got-negative-12-13-14-35-er.d: Likewise. * testsuite/ld-m68k/got-negative-14-ok.d: Likewise. * testsuite/ld-m68k/got-negative-15-er.d: Likewise. * testsuite/ld-m68k/got-single-12-ok.d: Likewise. * testsuite/ld-m68k/got-single-13-er.d: Likewise. * testsuite/ld-m68k/got-xgot-12-13-14-15-34-35-ok.d: Likewise. * testsuite/ld-m68k/got-xgot-15-ok.d: Likewise. * testsuite/ld-m68k/tls-gd-1.d: Likewise. * testsuite/ld-m68k/tls-gd-2.d: Likewise. * testsuite/ld-m68k/tls-gd-ie-1.d: Likewise. * testsuite/ld-m68k/tls-ie-1.d: Likewise. * testsuite/ld-m68k/tls-ld-1.d: Likewise. * testsuite/ld-m68k/tls-ld-2.d: Likewise. * testsuite/ld-sh/shared-2.d: Likewise. * testsuite/ld-sh/tlsbin-2.d: Likewise. * testsuite/ld-sh/tlspic-2.d: Likewise. * testsuite/ld-x86-64/bnd-branch-1-now.d: Likewise. * testsuite/ld-x86-64/bnd-ifunc-1-now.d: Likewise. * testsuite/ld-x86-64/bnd-ifunc-1.d: Likewise. * testsuite/ld-x86-64/bnd-ifunc-2-now.d: Likewise. * testsuite/ld-x86-64/bnd-ifunc-2.d: Likewise. * testsuite/ld-x86-64/bnd-plt-1-now.d: Likewise. * testsuite/ld-x86-64/bnd-plt-1.d: Likewise. * testsuite/ld-x86-64/ibt-plt-1-x32.d: Likewise. * testsuite/ld-x86-64/ibt-plt-1.d: Likewise. * testsuite/ld-x86-64/ibt-plt-2a-x32.d: Likewise. * testsuite/ld-x86-64/ibt-plt-2a.d: Likewise. * testsuite/ld-x86-64/ibt-plt-2c-x32.d: Likewise. * testsuite/ld-x86-64/ibt-plt-2c.d: Likewise. * testsuite/ld-x86-64/ibt-plt-3a-x32.d: Likewise. * testsuite/ld-x86-64/ibt-plt-3a.d: Likewise. * testsuite/ld-x86-64/ibt-plt-3c-x32.d: Likewise. * testsuite/ld-x86-64/ibt-plt-3c.d: Likewise. * testsuite/ld-x86-64/ilp32-4-nacl.d: Likewise. * testsuite/ld-x86-64/ilp32-4.d: Likewise. * testsuite/ld-x86-64/load1c-nacl.d: Likewise. * testsuite/ld-x86-64/load1c.d: Likewise. * testsuite/ld-x86-64/load1d-nacl.d: Likewise. * testsuite/ld-x86-64/load1d.d: Likewise. * testsuite/ld-x86-64/pie3-nacl.d: Likewise. * testsuite/ld-x86-64/pie3.d: Likewise. * testsuite/ld-x86-64/pr14207.d: Likewise. * testsuite/ld-x86-64/pr19162.d: Likewise. * testsuite/ld-x86-64/pr19636-2d-nacl.d: Likewise. * testsuite/ld-x86-64/pr19636-2d.d: Likewise. * testsuite/ld-x86-64/pr20253-1d.d: Likewise. * testsuite/ld-x86-64/pr20253-1f.d: Likewise. * testsuite/ld-x86-64/pr20253-1j.d: Likewise. * testsuite/ld-x86-64/pr20253-1l.d: Likewise. * testsuite/ld-x86-64/pr20830a-now.d: Likewise. * testsuite/ld-x86-64/pr20830a.d: Likewise. * testsuite/ld-x86-64/pr20830b-now.d: Likewise. * testsuite/ld-x86-64/pr20830b.d: Likewise. * testsuite/ld-x86-64/pr21038a-now.d: Likewise. * testsuite/ld-x86-64/pr21038a.d: Likewise. * testsuite/ld-x86-64/pr21038b-now.d: Likewise. * testsuite/ld-x86-64/pr21038b.d: Likewise. * testsuite/ld-x86-64/pr21038c-now.d: Likewise. * testsuite/ld-x86-64/pr21038c.d: Likewise.
2017-08-06 14:34:25 +02:00
"-Tvxworks1.ld -q --force-dynamic --hash-style=sysv" ""
"-mregnames" {vxworks2.s}
{{readelf --segments vxworks2.sd}}
"vxworks2"}
{"VxWorks executable test 2 (static)"
Support different ld --hash-style in the ld testsuite When ld is running with something other than --hash-style=sysv by default, numerous tests need tweaking. Most of the changes just add --hash-style=sysv. I didn't want to make --hash-style=sysv global as that means --hash-style=gnu isn't well tested. * testsuite/ld-alpha/alpha.exp: Add --hash-style=sysv to various test's ld options. * testsuite/ld-arm/arm-elf.exp: Likewise. * testsuite/ld-elf/elf.exp: Likewise. * testsuite/ld-elf/readelf.exp: Likewise. * testsuite/ld-elfvsb/elfvsb.exp: Likewise. * testsuite/ld-i386/i386.exp: Likewise. * testsuite/ld-ia64/ia64.exp: Likewise. * testsuite/ld-m68k/m68k.exp: Likewise. * testsuite/ld-metag/metag.exp: Likewise. * testsuite/ld-powerpc/powerpc.exp: Likewise. * testsuite/ld-s390/s390.exp: Likewise. * testsuite/ld-sh/sh-vxworks.exp: Likewise. * testsuite/ld-shared/shared.exp: Likewise. * testsuite/ld-sparc/sparc.exp: Likewise. * testsuite/ld-tic6x/tic6x.exp: Likewise. * testsuite/ld-vax-elf/vax-elf.exp: Likewise. * testsuite/ld-x86-64/mpx.exp: Likewise. * testsuite/ld-x86-64/x86-64.exp: Likewise. * testsuite/ld-xtensa/xtensa.exp: Likewise. * testsuite/ld-elf/comm-data2.ld: Add .gnu.hash output section. * testsuite/ld-elf/pr20828-v.ld: Likewise. * testsuite/ld-elf/pr20828.ld: Likewise. * testsuite/ld-elf/pr21233.ld: Likewise. * testsuite/ld-elf/pr21384.ld: Likewise. * testsuite/ld-elf/provide-hidden-1.ld: Likewise. * testsuite/ld-elf/provide-hidden-2.ld: Likewise. * testsuite/ld-elf/provide-hidden-s.ld: Likewise. * testsuite/ld-scripts/cross1.t: Likewise. * testsuite/ld-elf/stab.d: Adjust allowed section indices. * testsuite/ld-i386/pie1.d: Don't match addresses. * testsuite/ld-i386/plt-pic2.dd: Likewise. * testsuite/ld-i386/pr19636-1d.d: Likewise. * testsuite/ld-i386/pr19636-2c.d: Likewise. * testsuite/ld-powerpc/elfv2so.d: Likewise. * testsuite/ld-powerpc/tlsopt5.d: Likewise. * testsuite/ld-powerpc/tlsopt5.wf: Likewise. * testsuite/ld-powerpc/tlsopt5_32.d: Likewise. * testsuite/ld-i386/pr19636-2b.d: Don't match _start. * testsuite/ld-powerpc/ambiguousv1.d: Relax symbol count, index and address match. * testsuite/ld-powerpc/ambiguousv1b.d: Likewise. * testsuite/ld-powerpc/ambiguousv2.d: Likewise. * testsuite/ld-powerpc/ambiguousv2b.d: Likewise. * testsuite/ld-aarch64/gc-plt-relocs.d: Run ld with --hash-style=sysv. * testsuite/ld-aarch64/ifunc-1.d: Likewise. * testsuite/ld-aarch64/ifunc-2.d: Likewise. * testsuite/ld-aarch64/ifunc-21.d: Likewise. * testsuite/ld-aarch64/relasz.d: Likewise. * testsuite/ld-aarch64/tls-small-ld.d: Likewise. * testsuite/ld-aarch64/tls-tiny-ld.d: Likewise. * testsuite/ld-arc/tls_gd-01.d: Likewise. * testsuite/ld-cris/libdso-10.d: Likewise. * testsuite/ld-cris/libdso-2.d: Likewise. * testsuite/ld-cris/pic-gc-72.d: Likewise. * testsuite/ld-cris/pic-gc-73.d: Likewise. * testsuite/ld-cris/tls-gd-1.d: Likewise. * testsuite/ld-cris/tls-gd-1h.d: Likewise. * testsuite/ld-cris/tls-gd-2.d: Likewise. * testsuite/ld-cris/tls-gd-2h.d: Likewise. * testsuite/ld-cris/tls-ie-10.d: Likewise. * testsuite/ld-cris/tls-ie-11.d: Likewise. * testsuite/ld-cris/tls-ie-8.d: Likewise. * testsuite/ld-cris/tls-ie-9.d: Likewise. * testsuite/ld-cris/tls-ld-4.d: Likewise. * testsuite/ld-cris/tls-ld-5.d: Likewise. * testsuite/ld-cris/tls-ld-6.d: Likewise. * testsuite/ld-cris/tls-ld-7.d: Likewise. * testsuite/ld-cris/tls-ldgd-14.d: Likewise. * testsuite/ld-cris/tls-ldgd-15.d: Likewise. * testsuite/ld-cris/tls-ldgdx-14.d: Likewise. * testsuite/ld-cris/tls-ldgdx-15.d: Likewise. * testsuite/ld-cris/tls-local-54.d: Likewise. * testsuite/ld-cris/tls-local-60.d: Likewise. * testsuite/ld-cris/tls-local-61.d: Likewise. * testsuite/ld-cris/weakhiddso.d: Likewise. * testsuite/ld-elf/linkinfo1a.d: Likewise. * testsuite/ld-elf/linkinfo1b.d: Likewise. * testsuite/ld-elf/pr19617a.d: Likewise. * testsuite/ld-elfvsb/hidden2.d: Likewise. * testsuite/ld-frv/fdpic-pie-6.d: Likewise. * testsuite/ld-frv/fdpic-shared-2.d: Likewise. * testsuite/ld-frv/fdpic-shared-5.d: Likewise. * testsuite/ld-frv/fdpic-shared-6.d: Likewise. * testsuite/ld-frv/fdpic-shared-8.d: Likewise. * testsuite/ld-frv/fdpic-shared-local-2.d: Likewise. * testsuite/ld-frv/fdpic-shared-local-8.d: Likewise. * testsuite/ld-frv/tls-dynamic-2.d: Likewise. * testsuite/ld-i386/ibt-plt-1.d: Likewise. * testsuite/ld-i386/ibt-plt-2a.d: Likewise. * testsuite/ld-i386/ibt-plt-2c.d: Likewise. * testsuite/ld-i386/ibt-plt-3a.d: Likewise. * testsuite/ld-i386/ibt-plt-3c.d: Likewise. * testsuite/ld-i386/pr20830.d: Likewise. * testsuite/ld-ia64/merge1.d: Likewise. * testsuite/ld-ia64/merge2.d: Likewise. * testsuite/ld-ia64/merge3.d: Likewise. * testsuite/ld-ia64/merge4.d: Likewise. * testsuite/ld-ia64/merge5.d: Likewise. * testsuite/ld-ifunc/ifunc-1-local-x86.d: Likewise. * testsuite/ld-ifunc/ifunc-1-x86.d: Likewise. * testsuite/ld-ifunc/ifunc-2-i386-now.d: Likewise. * testsuite/ld-ifunc/ifunc-2-local-i386-now.d: Likewise. * testsuite/ld-ifunc/ifunc-2-local-x86-64-now.d: Likewise. * testsuite/ld-ifunc/ifunc-2-local-x86-64.d: Likewise. * testsuite/ld-ifunc/ifunc-2-x86-64-now.d: Likewise. * testsuite/ld-ifunc/ifunc-2-x86-64.d: Likewise. * testsuite/ld-ifunc/ifunc-3a-x86.d: Likewise. * testsuite/ld-ifunc/pr17154-i386-now.d: Likewise. * testsuite/ld-ifunc/pr17154-i386.d: Likewise. * testsuite/ld-ifunc/pr17154-x86-64-now.d: Likewise. * testsuite/ld-ifunc/pr17154-x86-64.d: Likewise. * testsuite/ld-m68k/got-1.d: Likewise. * testsuite/ld-m68k/got-multigot-12-13-14-34-35-ok.d: Likewise. * testsuite/ld-m68k/got-multigot-14-ok.d: Likewise. * testsuite/ld-m68k/got-multigot-15-er.d: Likewise. * testsuite/ld-m68k/got-negative-12-13-14-34-ok.d: Likewise. * testsuite/ld-m68k/got-negative-12-13-14-35-er.d: Likewise. * testsuite/ld-m68k/got-negative-14-ok.d: Likewise. * testsuite/ld-m68k/got-negative-15-er.d: Likewise. * testsuite/ld-m68k/got-single-12-ok.d: Likewise. * testsuite/ld-m68k/got-single-13-er.d: Likewise. * testsuite/ld-m68k/got-xgot-12-13-14-15-34-35-ok.d: Likewise. * testsuite/ld-m68k/got-xgot-15-ok.d: Likewise. * testsuite/ld-m68k/tls-gd-1.d: Likewise. * testsuite/ld-m68k/tls-gd-2.d: Likewise. * testsuite/ld-m68k/tls-gd-ie-1.d: Likewise. * testsuite/ld-m68k/tls-ie-1.d: Likewise. * testsuite/ld-m68k/tls-ld-1.d: Likewise. * testsuite/ld-m68k/tls-ld-2.d: Likewise. * testsuite/ld-sh/shared-2.d: Likewise. * testsuite/ld-sh/tlsbin-2.d: Likewise. * testsuite/ld-sh/tlspic-2.d: Likewise. * testsuite/ld-x86-64/bnd-branch-1-now.d: Likewise. * testsuite/ld-x86-64/bnd-ifunc-1-now.d: Likewise. * testsuite/ld-x86-64/bnd-ifunc-1.d: Likewise. * testsuite/ld-x86-64/bnd-ifunc-2-now.d: Likewise. * testsuite/ld-x86-64/bnd-ifunc-2.d: Likewise. * testsuite/ld-x86-64/bnd-plt-1-now.d: Likewise. * testsuite/ld-x86-64/bnd-plt-1.d: Likewise. * testsuite/ld-x86-64/ibt-plt-1-x32.d: Likewise. * testsuite/ld-x86-64/ibt-plt-1.d: Likewise. * testsuite/ld-x86-64/ibt-plt-2a-x32.d: Likewise. * testsuite/ld-x86-64/ibt-plt-2a.d: Likewise. * testsuite/ld-x86-64/ibt-plt-2c-x32.d: Likewise. * testsuite/ld-x86-64/ibt-plt-2c.d: Likewise. * testsuite/ld-x86-64/ibt-plt-3a-x32.d: Likewise. * testsuite/ld-x86-64/ibt-plt-3a.d: Likewise. * testsuite/ld-x86-64/ibt-plt-3c-x32.d: Likewise. * testsuite/ld-x86-64/ibt-plt-3c.d: Likewise. * testsuite/ld-x86-64/ilp32-4-nacl.d: Likewise. * testsuite/ld-x86-64/ilp32-4.d: Likewise. * testsuite/ld-x86-64/load1c-nacl.d: Likewise. * testsuite/ld-x86-64/load1c.d: Likewise. * testsuite/ld-x86-64/load1d-nacl.d: Likewise. * testsuite/ld-x86-64/load1d.d: Likewise. * testsuite/ld-x86-64/pie3-nacl.d: Likewise. * testsuite/ld-x86-64/pie3.d: Likewise. * testsuite/ld-x86-64/pr14207.d: Likewise. * testsuite/ld-x86-64/pr19162.d: Likewise. * testsuite/ld-x86-64/pr19636-2d-nacl.d: Likewise. * testsuite/ld-x86-64/pr19636-2d.d: Likewise. * testsuite/ld-x86-64/pr20253-1d.d: Likewise. * testsuite/ld-x86-64/pr20253-1f.d: Likewise. * testsuite/ld-x86-64/pr20253-1j.d: Likewise. * testsuite/ld-x86-64/pr20253-1l.d: Likewise. * testsuite/ld-x86-64/pr20830a-now.d: Likewise. * testsuite/ld-x86-64/pr20830a.d: Likewise. * testsuite/ld-x86-64/pr20830b-now.d: Likewise. * testsuite/ld-x86-64/pr20830b.d: Likewise. * testsuite/ld-x86-64/pr21038a-now.d: Likewise. * testsuite/ld-x86-64/pr21038a.d: Likewise. * testsuite/ld-x86-64/pr21038b-now.d: Likewise. * testsuite/ld-x86-64/pr21038b.d: Likewise. * testsuite/ld-x86-64/pr21038c-now.d: Likewise. * testsuite/ld-x86-64/pr21038c.d: Likewise.
2017-08-06 14:34:25 +02:00
"-Tvxworks1.ld --hash-style=sysv" ""
"-mregnames" {vxworks2.s}
{{readelf --segments vxworks2-static.sd}}
"vxworks2"}
{"VxWorks relax test"
Support different ld --hash-style in the ld testsuite When ld is running with something other than --hash-style=sysv by default, numerous tests need tweaking. Most of the changes just add --hash-style=sysv. I didn't want to make --hash-style=sysv global as that means --hash-style=gnu isn't well tested. * testsuite/ld-alpha/alpha.exp: Add --hash-style=sysv to various test's ld options. * testsuite/ld-arm/arm-elf.exp: Likewise. * testsuite/ld-elf/elf.exp: Likewise. * testsuite/ld-elf/readelf.exp: Likewise. * testsuite/ld-elfvsb/elfvsb.exp: Likewise. * testsuite/ld-i386/i386.exp: Likewise. * testsuite/ld-ia64/ia64.exp: Likewise. * testsuite/ld-m68k/m68k.exp: Likewise. * testsuite/ld-metag/metag.exp: Likewise. * testsuite/ld-powerpc/powerpc.exp: Likewise. * testsuite/ld-s390/s390.exp: Likewise. * testsuite/ld-sh/sh-vxworks.exp: Likewise. * testsuite/ld-shared/shared.exp: Likewise. * testsuite/ld-sparc/sparc.exp: Likewise. * testsuite/ld-tic6x/tic6x.exp: Likewise. * testsuite/ld-vax-elf/vax-elf.exp: Likewise. * testsuite/ld-x86-64/mpx.exp: Likewise. * testsuite/ld-x86-64/x86-64.exp: Likewise. * testsuite/ld-xtensa/xtensa.exp: Likewise. * testsuite/ld-elf/comm-data2.ld: Add .gnu.hash output section. * testsuite/ld-elf/pr20828-v.ld: Likewise. * testsuite/ld-elf/pr20828.ld: Likewise. * testsuite/ld-elf/pr21233.ld: Likewise. * testsuite/ld-elf/pr21384.ld: Likewise. * testsuite/ld-elf/provide-hidden-1.ld: Likewise. * testsuite/ld-elf/provide-hidden-2.ld: Likewise. * testsuite/ld-elf/provide-hidden-s.ld: Likewise. * testsuite/ld-scripts/cross1.t: Likewise. * testsuite/ld-elf/stab.d: Adjust allowed section indices. * testsuite/ld-i386/pie1.d: Don't match addresses. * testsuite/ld-i386/plt-pic2.dd: Likewise. * testsuite/ld-i386/pr19636-1d.d: Likewise. * testsuite/ld-i386/pr19636-2c.d: Likewise. * testsuite/ld-powerpc/elfv2so.d: Likewise. * testsuite/ld-powerpc/tlsopt5.d: Likewise. * testsuite/ld-powerpc/tlsopt5.wf: Likewise. * testsuite/ld-powerpc/tlsopt5_32.d: Likewise. * testsuite/ld-i386/pr19636-2b.d: Don't match _start. * testsuite/ld-powerpc/ambiguousv1.d: Relax symbol count, index and address match. * testsuite/ld-powerpc/ambiguousv1b.d: Likewise. * testsuite/ld-powerpc/ambiguousv2.d: Likewise. * testsuite/ld-powerpc/ambiguousv2b.d: Likewise. * testsuite/ld-aarch64/gc-plt-relocs.d: Run ld with --hash-style=sysv. * testsuite/ld-aarch64/ifunc-1.d: Likewise. * testsuite/ld-aarch64/ifunc-2.d: Likewise. * testsuite/ld-aarch64/ifunc-21.d: Likewise. * testsuite/ld-aarch64/relasz.d: Likewise. * testsuite/ld-aarch64/tls-small-ld.d: Likewise. * testsuite/ld-aarch64/tls-tiny-ld.d: Likewise. * testsuite/ld-arc/tls_gd-01.d: Likewise. * testsuite/ld-cris/libdso-10.d: Likewise. * testsuite/ld-cris/libdso-2.d: Likewise. * testsuite/ld-cris/pic-gc-72.d: Likewise. * testsuite/ld-cris/pic-gc-73.d: Likewise. * testsuite/ld-cris/tls-gd-1.d: Likewise. * testsuite/ld-cris/tls-gd-1h.d: Likewise. * testsuite/ld-cris/tls-gd-2.d: Likewise. * testsuite/ld-cris/tls-gd-2h.d: Likewise. * testsuite/ld-cris/tls-ie-10.d: Likewise. * testsuite/ld-cris/tls-ie-11.d: Likewise. * testsuite/ld-cris/tls-ie-8.d: Likewise. * testsuite/ld-cris/tls-ie-9.d: Likewise. * testsuite/ld-cris/tls-ld-4.d: Likewise. * testsuite/ld-cris/tls-ld-5.d: Likewise. * testsuite/ld-cris/tls-ld-6.d: Likewise. * testsuite/ld-cris/tls-ld-7.d: Likewise. * testsuite/ld-cris/tls-ldgd-14.d: Likewise. * testsuite/ld-cris/tls-ldgd-15.d: Likewise. * testsuite/ld-cris/tls-ldgdx-14.d: Likewise. * testsuite/ld-cris/tls-ldgdx-15.d: Likewise. * testsuite/ld-cris/tls-local-54.d: Likewise. * testsuite/ld-cris/tls-local-60.d: Likewise. * testsuite/ld-cris/tls-local-61.d: Likewise. * testsuite/ld-cris/weakhiddso.d: Likewise. * testsuite/ld-elf/linkinfo1a.d: Likewise. * testsuite/ld-elf/linkinfo1b.d: Likewise. * testsuite/ld-elf/pr19617a.d: Likewise. * testsuite/ld-elfvsb/hidden2.d: Likewise. * testsuite/ld-frv/fdpic-pie-6.d: Likewise. * testsuite/ld-frv/fdpic-shared-2.d: Likewise. * testsuite/ld-frv/fdpic-shared-5.d: Likewise. * testsuite/ld-frv/fdpic-shared-6.d: Likewise. * testsuite/ld-frv/fdpic-shared-8.d: Likewise. * testsuite/ld-frv/fdpic-shared-local-2.d: Likewise. * testsuite/ld-frv/fdpic-shared-local-8.d: Likewise. * testsuite/ld-frv/tls-dynamic-2.d: Likewise. * testsuite/ld-i386/ibt-plt-1.d: Likewise. * testsuite/ld-i386/ibt-plt-2a.d: Likewise. * testsuite/ld-i386/ibt-plt-2c.d: Likewise. * testsuite/ld-i386/ibt-plt-3a.d: Likewise. * testsuite/ld-i386/ibt-plt-3c.d: Likewise. * testsuite/ld-i386/pr20830.d: Likewise. * testsuite/ld-ia64/merge1.d: Likewise. * testsuite/ld-ia64/merge2.d: Likewise. * testsuite/ld-ia64/merge3.d: Likewise. * testsuite/ld-ia64/merge4.d: Likewise. * testsuite/ld-ia64/merge5.d: Likewise. * testsuite/ld-ifunc/ifunc-1-local-x86.d: Likewise. * testsuite/ld-ifunc/ifunc-1-x86.d: Likewise. * testsuite/ld-ifunc/ifunc-2-i386-now.d: Likewise. * testsuite/ld-ifunc/ifunc-2-local-i386-now.d: Likewise. * testsuite/ld-ifunc/ifunc-2-local-x86-64-now.d: Likewise. * testsuite/ld-ifunc/ifunc-2-local-x86-64.d: Likewise. * testsuite/ld-ifunc/ifunc-2-x86-64-now.d: Likewise. * testsuite/ld-ifunc/ifunc-2-x86-64.d: Likewise. * testsuite/ld-ifunc/ifunc-3a-x86.d: Likewise. * testsuite/ld-ifunc/pr17154-i386-now.d: Likewise. * testsuite/ld-ifunc/pr17154-i386.d: Likewise. * testsuite/ld-ifunc/pr17154-x86-64-now.d: Likewise. * testsuite/ld-ifunc/pr17154-x86-64.d: Likewise. * testsuite/ld-m68k/got-1.d: Likewise. * testsuite/ld-m68k/got-multigot-12-13-14-34-35-ok.d: Likewise. * testsuite/ld-m68k/got-multigot-14-ok.d: Likewise. * testsuite/ld-m68k/got-multigot-15-er.d: Likewise. * testsuite/ld-m68k/got-negative-12-13-14-34-ok.d: Likewise. * testsuite/ld-m68k/got-negative-12-13-14-35-er.d: Likewise. * testsuite/ld-m68k/got-negative-14-ok.d: Likewise. * testsuite/ld-m68k/got-negative-15-er.d: Likewise. * testsuite/ld-m68k/got-single-12-ok.d: Likewise. * testsuite/ld-m68k/got-single-13-er.d: Likewise. * testsuite/ld-m68k/got-xgot-12-13-14-15-34-35-ok.d: Likewise. * testsuite/ld-m68k/got-xgot-15-ok.d: Likewise. * testsuite/ld-m68k/tls-gd-1.d: Likewise. * testsuite/ld-m68k/tls-gd-2.d: Likewise. * testsuite/ld-m68k/tls-gd-ie-1.d: Likewise. * testsuite/ld-m68k/tls-ie-1.d: Likewise. * testsuite/ld-m68k/tls-ld-1.d: Likewise. * testsuite/ld-m68k/tls-ld-2.d: Likewise. * testsuite/ld-sh/shared-2.d: Likewise. * testsuite/ld-sh/tlsbin-2.d: Likewise. * testsuite/ld-sh/tlspic-2.d: Likewise. * testsuite/ld-x86-64/bnd-branch-1-now.d: Likewise. * testsuite/ld-x86-64/bnd-ifunc-1-now.d: Likewise. * testsuite/ld-x86-64/bnd-ifunc-1.d: Likewise. * testsuite/ld-x86-64/bnd-ifunc-2-now.d: Likewise. * testsuite/ld-x86-64/bnd-ifunc-2.d: Likewise. * testsuite/ld-x86-64/bnd-plt-1-now.d: Likewise. * testsuite/ld-x86-64/bnd-plt-1.d: Likewise. * testsuite/ld-x86-64/ibt-plt-1-x32.d: Likewise. * testsuite/ld-x86-64/ibt-plt-1.d: Likewise. * testsuite/ld-x86-64/ibt-plt-2a-x32.d: Likewise. * testsuite/ld-x86-64/ibt-plt-2a.d: Likewise. * testsuite/ld-x86-64/ibt-plt-2c-x32.d: Likewise. * testsuite/ld-x86-64/ibt-plt-2c.d: Likewise. * testsuite/ld-x86-64/ibt-plt-3a-x32.d: Likewise. * testsuite/ld-x86-64/ibt-plt-3a.d: Likewise. * testsuite/ld-x86-64/ibt-plt-3c-x32.d: Likewise. * testsuite/ld-x86-64/ibt-plt-3c.d: Likewise. * testsuite/ld-x86-64/ilp32-4-nacl.d: Likewise. * testsuite/ld-x86-64/ilp32-4.d: Likewise. * testsuite/ld-x86-64/load1c-nacl.d: Likewise. * testsuite/ld-x86-64/load1c.d: Likewise. * testsuite/ld-x86-64/load1d-nacl.d: Likewise. * testsuite/ld-x86-64/load1d.d: Likewise. * testsuite/ld-x86-64/pie3-nacl.d: Likewise. * testsuite/ld-x86-64/pie3.d: Likewise. * testsuite/ld-x86-64/pr14207.d: Likewise. * testsuite/ld-x86-64/pr19162.d: Likewise. * testsuite/ld-x86-64/pr19636-2d-nacl.d: Likewise. * testsuite/ld-x86-64/pr19636-2d.d: Likewise. * testsuite/ld-x86-64/pr20253-1d.d: Likewise. * testsuite/ld-x86-64/pr20253-1f.d: Likewise. * testsuite/ld-x86-64/pr20253-1j.d: Likewise. * testsuite/ld-x86-64/pr20253-1l.d: Likewise. * testsuite/ld-x86-64/pr20830a-now.d: Likewise. * testsuite/ld-x86-64/pr20830a.d: Likewise. * testsuite/ld-x86-64/pr20830b-now.d: Likewise. * testsuite/ld-x86-64/pr20830b.d: Likewise. * testsuite/ld-x86-64/pr21038a-now.d: Likewise. * testsuite/ld-x86-64/pr21038a.d: Likewise. * testsuite/ld-x86-64/pr21038b-now.d: Likewise. * testsuite/ld-x86-64/pr21038b.d: Likewise. * testsuite/ld-x86-64/pr21038c-now.d: Likewise. * testsuite/ld-x86-64/pr21038c.d: Likewise.
2017-08-06 14:34:25 +02:00
"-Tvxworks1.ld --relax -q --hash-style=sysv" ""
"-mregnames" {vxworks-relax.s}
{{readelf --relocs vxworks-relax.rd}}
"vxworks-relax"}
{"VxWorks relocatable relax test"
Support different ld --hash-style in the ld testsuite When ld is running with something other than --hash-style=sysv by default, numerous tests need tweaking. Most of the changes just add --hash-style=sysv. I didn't want to make --hash-style=sysv global as that means --hash-style=gnu isn't well tested. * testsuite/ld-alpha/alpha.exp: Add --hash-style=sysv to various test's ld options. * testsuite/ld-arm/arm-elf.exp: Likewise. * testsuite/ld-elf/elf.exp: Likewise. * testsuite/ld-elf/readelf.exp: Likewise. * testsuite/ld-elfvsb/elfvsb.exp: Likewise. * testsuite/ld-i386/i386.exp: Likewise. * testsuite/ld-ia64/ia64.exp: Likewise. * testsuite/ld-m68k/m68k.exp: Likewise. * testsuite/ld-metag/metag.exp: Likewise. * testsuite/ld-powerpc/powerpc.exp: Likewise. * testsuite/ld-s390/s390.exp: Likewise. * testsuite/ld-sh/sh-vxworks.exp: Likewise. * testsuite/ld-shared/shared.exp: Likewise. * testsuite/ld-sparc/sparc.exp: Likewise. * testsuite/ld-tic6x/tic6x.exp: Likewise. * testsuite/ld-vax-elf/vax-elf.exp: Likewise. * testsuite/ld-x86-64/mpx.exp: Likewise. * testsuite/ld-x86-64/x86-64.exp: Likewise. * testsuite/ld-xtensa/xtensa.exp: Likewise. * testsuite/ld-elf/comm-data2.ld: Add .gnu.hash output section. * testsuite/ld-elf/pr20828-v.ld: Likewise. * testsuite/ld-elf/pr20828.ld: Likewise. * testsuite/ld-elf/pr21233.ld: Likewise. * testsuite/ld-elf/pr21384.ld: Likewise. * testsuite/ld-elf/provide-hidden-1.ld: Likewise. * testsuite/ld-elf/provide-hidden-2.ld: Likewise. * testsuite/ld-elf/provide-hidden-s.ld: Likewise. * testsuite/ld-scripts/cross1.t: Likewise. * testsuite/ld-elf/stab.d: Adjust allowed section indices. * testsuite/ld-i386/pie1.d: Don't match addresses. * testsuite/ld-i386/plt-pic2.dd: Likewise. * testsuite/ld-i386/pr19636-1d.d: Likewise. * testsuite/ld-i386/pr19636-2c.d: Likewise. * testsuite/ld-powerpc/elfv2so.d: Likewise. * testsuite/ld-powerpc/tlsopt5.d: Likewise. * testsuite/ld-powerpc/tlsopt5.wf: Likewise. * testsuite/ld-powerpc/tlsopt5_32.d: Likewise. * testsuite/ld-i386/pr19636-2b.d: Don't match _start. * testsuite/ld-powerpc/ambiguousv1.d: Relax symbol count, index and address match. * testsuite/ld-powerpc/ambiguousv1b.d: Likewise. * testsuite/ld-powerpc/ambiguousv2.d: Likewise. * testsuite/ld-powerpc/ambiguousv2b.d: Likewise. * testsuite/ld-aarch64/gc-plt-relocs.d: Run ld with --hash-style=sysv. * testsuite/ld-aarch64/ifunc-1.d: Likewise. * testsuite/ld-aarch64/ifunc-2.d: Likewise. * testsuite/ld-aarch64/ifunc-21.d: Likewise. * testsuite/ld-aarch64/relasz.d: Likewise. * testsuite/ld-aarch64/tls-small-ld.d: Likewise. * testsuite/ld-aarch64/tls-tiny-ld.d: Likewise. * testsuite/ld-arc/tls_gd-01.d: Likewise. * testsuite/ld-cris/libdso-10.d: Likewise. * testsuite/ld-cris/libdso-2.d: Likewise. * testsuite/ld-cris/pic-gc-72.d: Likewise. * testsuite/ld-cris/pic-gc-73.d: Likewise. * testsuite/ld-cris/tls-gd-1.d: Likewise. * testsuite/ld-cris/tls-gd-1h.d: Likewise. * testsuite/ld-cris/tls-gd-2.d: Likewise. * testsuite/ld-cris/tls-gd-2h.d: Likewise. * testsuite/ld-cris/tls-ie-10.d: Likewise. * testsuite/ld-cris/tls-ie-11.d: Likewise. * testsuite/ld-cris/tls-ie-8.d: Likewise. * testsuite/ld-cris/tls-ie-9.d: Likewise. * testsuite/ld-cris/tls-ld-4.d: Likewise. * testsuite/ld-cris/tls-ld-5.d: Likewise. * testsuite/ld-cris/tls-ld-6.d: Likewise. * testsuite/ld-cris/tls-ld-7.d: Likewise. * testsuite/ld-cris/tls-ldgd-14.d: Likewise. * testsuite/ld-cris/tls-ldgd-15.d: Likewise. * testsuite/ld-cris/tls-ldgdx-14.d: Likewise. * testsuite/ld-cris/tls-ldgdx-15.d: Likewise. * testsuite/ld-cris/tls-local-54.d: Likewise. * testsuite/ld-cris/tls-local-60.d: Likewise. * testsuite/ld-cris/tls-local-61.d: Likewise. * testsuite/ld-cris/weakhiddso.d: Likewise. * testsuite/ld-elf/linkinfo1a.d: Likewise. * testsuite/ld-elf/linkinfo1b.d: Likewise. * testsuite/ld-elf/pr19617a.d: Likewise. * testsuite/ld-elfvsb/hidden2.d: Likewise. * testsuite/ld-frv/fdpic-pie-6.d: Likewise. * testsuite/ld-frv/fdpic-shared-2.d: Likewise. * testsuite/ld-frv/fdpic-shared-5.d: Likewise. * testsuite/ld-frv/fdpic-shared-6.d: Likewise. * testsuite/ld-frv/fdpic-shared-8.d: Likewise. * testsuite/ld-frv/fdpic-shared-local-2.d: Likewise. * testsuite/ld-frv/fdpic-shared-local-8.d: Likewise. * testsuite/ld-frv/tls-dynamic-2.d: Likewise. * testsuite/ld-i386/ibt-plt-1.d: Likewise. * testsuite/ld-i386/ibt-plt-2a.d: Likewise. * testsuite/ld-i386/ibt-plt-2c.d: Likewise. * testsuite/ld-i386/ibt-plt-3a.d: Likewise. * testsuite/ld-i386/ibt-plt-3c.d: Likewise. * testsuite/ld-i386/pr20830.d: Likewise. * testsuite/ld-ia64/merge1.d: Likewise. * testsuite/ld-ia64/merge2.d: Likewise. * testsuite/ld-ia64/merge3.d: Likewise. * testsuite/ld-ia64/merge4.d: Likewise. * testsuite/ld-ia64/merge5.d: Likewise. * testsuite/ld-ifunc/ifunc-1-local-x86.d: Likewise. * testsuite/ld-ifunc/ifunc-1-x86.d: Likewise. * testsuite/ld-ifunc/ifunc-2-i386-now.d: Likewise. * testsuite/ld-ifunc/ifunc-2-local-i386-now.d: Likewise. * testsuite/ld-ifunc/ifunc-2-local-x86-64-now.d: Likewise. * testsuite/ld-ifunc/ifunc-2-local-x86-64.d: Likewise. * testsuite/ld-ifunc/ifunc-2-x86-64-now.d: Likewise. * testsuite/ld-ifunc/ifunc-2-x86-64.d: Likewise. * testsuite/ld-ifunc/ifunc-3a-x86.d: Likewise. * testsuite/ld-ifunc/pr17154-i386-now.d: Likewise. * testsuite/ld-ifunc/pr17154-i386.d: Likewise. * testsuite/ld-ifunc/pr17154-x86-64-now.d: Likewise. * testsuite/ld-ifunc/pr17154-x86-64.d: Likewise. * testsuite/ld-m68k/got-1.d: Likewise. * testsuite/ld-m68k/got-multigot-12-13-14-34-35-ok.d: Likewise. * testsuite/ld-m68k/got-multigot-14-ok.d: Likewise. * testsuite/ld-m68k/got-multigot-15-er.d: Likewise. * testsuite/ld-m68k/got-negative-12-13-14-34-ok.d: Likewise. * testsuite/ld-m68k/got-negative-12-13-14-35-er.d: Likewise. * testsuite/ld-m68k/got-negative-14-ok.d: Likewise. * testsuite/ld-m68k/got-negative-15-er.d: Likewise. * testsuite/ld-m68k/got-single-12-ok.d: Likewise. * testsuite/ld-m68k/got-single-13-er.d: Likewise. * testsuite/ld-m68k/got-xgot-12-13-14-15-34-35-ok.d: Likewise. * testsuite/ld-m68k/got-xgot-15-ok.d: Likewise. * testsuite/ld-m68k/tls-gd-1.d: Likewise. * testsuite/ld-m68k/tls-gd-2.d: Likewise. * testsuite/ld-m68k/tls-gd-ie-1.d: Likewise. * testsuite/ld-m68k/tls-ie-1.d: Likewise. * testsuite/ld-m68k/tls-ld-1.d: Likewise. * testsuite/ld-m68k/tls-ld-2.d: Likewise. * testsuite/ld-sh/shared-2.d: Likewise. * testsuite/ld-sh/tlsbin-2.d: Likewise. * testsuite/ld-sh/tlspic-2.d: Likewise. * testsuite/ld-x86-64/bnd-branch-1-now.d: Likewise. * testsuite/ld-x86-64/bnd-ifunc-1-now.d: Likewise. * testsuite/ld-x86-64/bnd-ifunc-1.d: Likewise. * testsuite/ld-x86-64/bnd-ifunc-2-now.d: Likewise. * testsuite/ld-x86-64/bnd-ifunc-2.d: Likewise. * testsuite/ld-x86-64/bnd-plt-1-now.d: Likewise. * testsuite/ld-x86-64/bnd-plt-1.d: Likewise. * testsuite/ld-x86-64/ibt-plt-1-x32.d: Likewise. * testsuite/ld-x86-64/ibt-plt-1.d: Likewise. * testsuite/ld-x86-64/ibt-plt-2a-x32.d: Likewise. * testsuite/ld-x86-64/ibt-plt-2a.d: Likewise. * testsuite/ld-x86-64/ibt-plt-2c-x32.d: Likewise. * testsuite/ld-x86-64/ibt-plt-2c.d: Likewise. * testsuite/ld-x86-64/ibt-plt-3a-x32.d: Likewise. * testsuite/ld-x86-64/ibt-plt-3a.d: Likewise. * testsuite/ld-x86-64/ibt-plt-3c-x32.d: Likewise. * testsuite/ld-x86-64/ibt-plt-3c.d: Likewise. * testsuite/ld-x86-64/ilp32-4-nacl.d: Likewise. * testsuite/ld-x86-64/ilp32-4.d: Likewise. * testsuite/ld-x86-64/load1c-nacl.d: Likewise. * testsuite/ld-x86-64/load1c.d: Likewise. * testsuite/ld-x86-64/load1d-nacl.d: Likewise. * testsuite/ld-x86-64/load1d.d: Likewise. * testsuite/ld-x86-64/pie3-nacl.d: Likewise. * testsuite/ld-x86-64/pie3.d: Likewise. * testsuite/ld-x86-64/pr14207.d: Likewise. * testsuite/ld-x86-64/pr19162.d: Likewise. * testsuite/ld-x86-64/pr19636-2d-nacl.d: Likewise. * testsuite/ld-x86-64/pr19636-2d.d: Likewise. * testsuite/ld-x86-64/pr20253-1d.d: Likewise. * testsuite/ld-x86-64/pr20253-1f.d: Likewise. * testsuite/ld-x86-64/pr20253-1j.d: Likewise. * testsuite/ld-x86-64/pr20253-1l.d: Likewise. * testsuite/ld-x86-64/pr20830a-now.d: Likewise. * testsuite/ld-x86-64/pr20830a.d: Likewise. * testsuite/ld-x86-64/pr20830b-now.d: Likewise. * testsuite/ld-x86-64/pr20830b.d: Likewise. * testsuite/ld-x86-64/pr21038a-now.d: Likewise. * testsuite/ld-x86-64/pr21038a.d: Likewise. * testsuite/ld-x86-64/pr21038b-now.d: Likewise. * testsuite/ld-x86-64/pr21038b.d: Likewise. * testsuite/ld-x86-64/pr21038c-now.d: Likewise. * testsuite/ld-x86-64/pr21038c.d: Likewise.
2017-08-06 14:34:25 +02:00
"-Tvxworks1.ld -r --relax -q --hash-style=sysv" ""
"-mregnames" {vxworks-relax-2.s}
{{readelf {--relocs -T} vxworks-relax-2.rd}}
"vxworks-relax-2"}
bfd/ * elf32-ppc.c (ppc_elf_plt_type): New enumeration. (ppc_elf_link_hash_table): Replace old_got and new_got with plt_type and can_use_new_plt. (ppc_elf_create_dynamic_sections): Add SEC_HAS_CONTENTS, SEC_LOAD and SEC_READONLY to the VxWorks .plt flags. (ppc_elf_check_relocs): Set can_use_new_plt instead of new_plt. Move from plt_type == PLT_UNSET to PLT_OLD instead of setting old_plt. (ppc_elf_select_plt_layout): Move from plt_type == PLT_UNSET to either plt_type == PLT_OLD or plt_type == PLT_NEW. Assert that this function should not be called for VxWorks targets. (ppc_elf_tls_setup): Use plt_type instead of old_got. (allocate_got): Likewise. Rearrange so that max_before_header is only used for PLT_OLD and PLT_NEW. (allocate_dynrelocs): Use plt_type instead of old_got and is_vxworks. (ppc_elf_size_dynamic_sections): Likewise. (ppc_elf_relax_section): Likewise. (ppc_elf_relocate_section): Likewise. (ppc_elf_finish_dynamic_symbol): Likewise. (ppc_elf_vxworks_link_hash_table_create): Initialize plt_type. ld/ * emulparams/elf32ppccommon.sh: New file, extracted from... * emulparams/elf32ppc.sh: ...here. * emulparams/elf32ppcvxworks.sh: Include elf32ppccommon.sh instead of elf32ppc.sh. (BSS_PLT): Remove override. * Makefile.am (eelf32lppc.c): Depend on elf32ppccommons.h. (eelf32lppcnto.c, eelf32lppcsim.c, eelf32ppcnto.c): Likewise. (eelf32ppc.c, eelf32ppc_fbsd.c, eelf32ppcsimm): Likewise. (eelf32ppclinux.c): Likewise. (eelf32ppcvxworks.c): Likewise. Add missing vxworks.sh dependency. * Makefile.in: Regenerate. ld/testsuite/ * ld-powerpc/vxworks1-lib.s, ld-powerpc/vxworks1-lib.dd, * ld-powerpc/vxworks1-lib.rd, ld-powerpc/vxworks1.s, * ld-powerpc/vxworks1.dd, ld-powerpc/vxworks1.rd, * ld-powerpc/vxworks1.ld, ld-powerpc/vxworks1.sd: New test. * ld-powerpc/powerpc.exp: Run it.
2006-03-02 09:50:04 +01:00
}
run_ld_link_tests $ppcvxtests
run_dump_test "vxworks1-static"
bfd/ * elf32-ppc.c (ppc_elf_plt_type): New enumeration. (ppc_elf_link_hash_table): Replace old_got and new_got with plt_type and can_use_new_plt. (ppc_elf_create_dynamic_sections): Add SEC_HAS_CONTENTS, SEC_LOAD and SEC_READONLY to the VxWorks .plt flags. (ppc_elf_check_relocs): Set can_use_new_plt instead of new_plt. Move from plt_type == PLT_UNSET to PLT_OLD instead of setting old_plt. (ppc_elf_select_plt_layout): Move from plt_type == PLT_UNSET to either plt_type == PLT_OLD or plt_type == PLT_NEW. Assert that this function should not be called for VxWorks targets. (ppc_elf_tls_setup): Use plt_type instead of old_got. (allocate_got): Likewise. Rearrange so that max_before_header is only used for PLT_OLD and PLT_NEW. (allocate_dynrelocs): Use plt_type instead of old_got and is_vxworks. (ppc_elf_size_dynamic_sections): Likewise. (ppc_elf_relax_section): Likewise. (ppc_elf_relocate_section): Likewise. (ppc_elf_finish_dynamic_symbol): Likewise. (ppc_elf_vxworks_link_hash_table_create): Initialize plt_type. ld/ * emulparams/elf32ppccommon.sh: New file, extracted from... * emulparams/elf32ppc.sh: ...here. * emulparams/elf32ppcvxworks.sh: Include elf32ppccommon.sh instead of elf32ppc.sh. (BSS_PLT): Remove override. * Makefile.am (eelf32lppc.c): Depend on elf32ppccommons.h. (eelf32lppcnto.c, eelf32lppcsim.c, eelf32ppcnto.c): Likewise. (eelf32ppc.c, eelf32ppc_fbsd.c, eelf32ppcsimm): Likewise. (eelf32ppclinux.c): Likewise. (eelf32ppcvxworks.c): Likewise. Add missing vxworks.sh dependency. * Makefile.in: Regenerate. ld/testsuite/ * ld-powerpc/vxworks1-lib.s, ld-powerpc/vxworks1-lib.dd, * ld-powerpc/vxworks1-lib.rd, ld-powerpc/vxworks1.s, * ld-powerpc/vxworks1.dd, ld-powerpc/vxworks1.rd, * ld-powerpc/vxworks1.ld, ld-powerpc/vxworks1.sd: New test. * ld-powerpc/powerpc.exp: Run it.
2006-03-02 09:50:04 +01:00
return
}
# powerpc ELF only at the moment. Disable for nto too, even though it
# is ELF, because we pass -melf32ppc to ld and powerpc-nto-ld wants
# -melf32ppcnto.
Remove netware support include/ * nlm/ChangeLog-9315: Delete. * nlm/alpha-ext.h: Delete. * nlm/common.h: Delete. * nlm/external.h: Delete. * nlm/i386-ext.h: Delete. * nlm/internal.h: Delete. * nlm/ppc-ext.h: Delete. * nlm/sparc32-ext.h: Delete. bfd/ * Makefile.am: Remove netware support. * bfd-in.h: Likewise. * bfd.c: Likewise. * config.bfd: Likewise. * configure.ac: Likewise. * doc/bfdint.texi: Likewise. * ecoff.c: Likewise. * targets.c: Likewise. * libnlm.h: Delete. * nlm-target.h: Delete. * nlm.c: Delete. * nlm32-alpha.c: Delete. * nlm32-i386.c: Delete. * nlm32-ppc.c: Delete. * nlm32-sparc.c: Delete. * nlm32.c: Delete. * nlm64.c: Delete. * nlmcode.h: Delete. * nlmswap.h: Delete. * Makefile.in: Regenerate. * bfd-in2.h: Regenerate. * configure: Regenerate. * po/SRC-POTFILES.in: Regenerate. binutils/ * .gitignore: Remove netware support. * Makefile.am: Likewise. * configure.ac: Likewise. * doc/Makefile.am: Likewise. * doc/binutils.texi: Likewise. * testsuite/binutils-all/nm.exp: Likewise. * nlmconv.c: Delete. * nlmconv.h: Delete. * nlmheader.y: Delete. * Makefile.in: Regenerate. * configure: Regenerate. * doc/Makefile.in: Regenerate. * po/POTFILES.in: Regenerate. gas/ * Makefile.am: Remove netware support. * config/tc-i386.c: Likewise. * configure.tgt: Likewise. * config/te-netware.h: Delete. * Makefile.in: Regenerate. * po/POTFILES.in: Regenerate. gprof/ * corefile.c: Remove netware support. ld/ * Makefile.am: Remove netware support. * configure.tgt: Likewise. * testsuite/ld-powerpc/powerpc.exp: Likewise. * emulparams/i386nw.sh: Delete. * emulparams/ppcnw.sh: Delete. * scripttempl/nw.sc: Delete. * Makefile.in: Regenerate. * po/BLD-POTFILES.in: Regenerate.
2018-04-16 07:41:22 +02:00
if { [istarget "*-*-macos*"]
|| [istarget "*-*-pe"] || [istarget "*-*-winnt*"]
|| [istarget "*-*-cygwin*"] || [istarget "*-*-aix*"]
|| [istarget "*-*-beos*"] || [istarget "*-*-lynxos*"]
|| [istarget "*-*-nto*"] } {
return
}
2003-02-04 15:52:11 +01:00
proc supports_ppc64 { } {
global ld
catch "exec $ld --help | grep emulations" tmp
if [ regexp "elf64l?ppc" $tmp ] then {
2003-02-04 15:52:11 +01:00
return 1
} else {
return 0
}
}
# List contains test-items with 3 items followed by 2 lists:
* lib/ld-lib.exp (run_ld_link_tests): Add another argument, pass its contents to ar_simple_create and ld_simple_link after objfiles. * ld-aarch64/aarch64-elf.exp: Adjust accordingly. * ld-alpha/alpha.exp: Likewise. * ld-arm/arm-elf.exp: Likewise. * ld-arm/export-class.exp: Likewise. * ld-elf/comm-data.exp: Likewise. * ld-elf/eh-group.exp: Likewise. * ld-elf/elf.exp: Likewise. * ld-elf/export-class.exp: Likewise. * ld-elfvers/vers.exp: Likewise. * ld-frv/tls.exp: Likewise. * ld-i386/export-class.exp: Likewise. * ld-i386/i386.exp: Likewise. * ld-ia64/ia64.exp: Likewise. * ld-libs/libs.exp: Likewise. * ld-m68k/m68k.exp: Likewise. * ld-metag/metag.exp: Likewise. * ld-mips-elf/comm-data.exp: Likewise. * ld-mips-elf/export-class.exp: Likewise. * ld-mips-elf/mips-elf.exp: Likewise. * ld-mn10300/mn10300.exp: Likewise. * ld-pe/pe-compile.exp: Likewise. * ld-pe/pe.exp: Likewise. * ld-plugin/plugin.exp: Likewise. * ld-powerpc/aix52.exp: Likewise. * ld-powerpc/export-class.exp: Likewise. * ld-powerpc/powerpc.exp: Likewise. * ld-s390/s390.exp: Likewise. * ld-sh/sh-vxworks.exp: Likewise. * ld-sh/sh64/sh64.exp: Likewise. * ld-sparc/sparc.exp: Likewise. * ld-tic6x/tic6x.exp: Likewise. * ld-tilegx/tilegx.exp: Likewise. * ld-tilepro/tilepro.exp: Likewise. * ld-undefined/entry.exp: Likewise. * ld-vax-elf/vax-elf.exp: Likewise. * ld-x86-64/dwarfreloc.exp: Likewise. * ld-x86-64/export-class.exp: Likewise. * ld-x86-64/x86-64.exp: Likewise. * ld-xc16x/xc16x.exp: Likewise. * ld-xstormy16/xstormy16.exp: Likewise. * ld-xtensa/xtensa.exp: Likewise.
2013-02-19 02:10:06 +01:00
# 0:name 1:ld early options 2:ld late options 3:assembler options
# 4:filenames of assembler files 5: action and options. 6: name of output file
# Actions:
# objdump: Apply objdump options on result. Compare with regex (last arg).
# nm: Apply nm options on result. Compare with regex (last arg).
# readelf: Apply readelf options on result. Compare with regex (last arg).
set ppcelftests {
* lib/ld-lib.exp (run_ld_link_tests): Add another argument, pass its contents to ar_simple_create and ld_simple_link after objfiles. * ld-aarch64/aarch64-elf.exp: Adjust accordingly. * ld-alpha/alpha.exp: Likewise. * ld-arm/arm-elf.exp: Likewise. * ld-arm/export-class.exp: Likewise. * ld-elf/comm-data.exp: Likewise. * ld-elf/eh-group.exp: Likewise. * ld-elf/elf.exp: Likewise. * ld-elf/export-class.exp: Likewise. * ld-elfvers/vers.exp: Likewise. * ld-frv/tls.exp: Likewise. * ld-i386/export-class.exp: Likewise. * ld-i386/i386.exp: Likewise. * ld-ia64/ia64.exp: Likewise. * ld-libs/libs.exp: Likewise. * ld-m68k/m68k.exp: Likewise. * ld-metag/metag.exp: Likewise. * ld-mips-elf/comm-data.exp: Likewise. * ld-mips-elf/export-class.exp: Likewise. * ld-mips-elf/mips-elf.exp: Likewise. * ld-mn10300/mn10300.exp: Likewise. * ld-pe/pe-compile.exp: Likewise. * ld-pe/pe.exp: Likewise. * ld-plugin/plugin.exp: Likewise. * ld-powerpc/aix52.exp: Likewise. * ld-powerpc/export-class.exp: Likewise. * ld-powerpc/powerpc.exp: Likewise. * ld-s390/s390.exp: Likewise. * ld-sh/sh-vxworks.exp: Likewise. * ld-sh/sh64/sh64.exp: Likewise. * ld-sparc/sparc.exp: Likewise. * ld-tic6x/tic6x.exp: Likewise. * ld-tilegx/tilegx.exp: Likewise. * ld-tilepro/tilepro.exp: Likewise. * ld-undefined/entry.exp: Likewise. * ld-vax-elf/vax-elf.exp: Likewise. * ld-x86-64/dwarfreloc.exp: Likewise. * ld-x86-64/export-class.exp: Likewise. * ld-x86-64/x86-64.exp: Likewise. * ld-xc16x/xc16x.exp: Likewise. * ld-xstormy16/xstormy16.exp: Likewise. * ld-xtensa/xtensa.exp: Likewise.
2013-02-19 02:10:06 +01:00
{"Reloc section order" "-melf32ppc -shared -z nocombreloc" "" "-a32" {reloc.s}
{{objdump -hw reloc.d}} "reloc.so"}
* lib/ld-lib.exp (run_ld_link_tests): Add another argument, pass its contents to ar_simple_create and ld_simple_link after objfiles. * ld-aarch64/aarch64-elf.exp: Adjust accordingly. * ld-alpha/alpha.exp: Likewise. * ld-arm/arm-elf.exp: Likewise. * ld-arm/export-class.exp: Likewise. * ld-elf/comm-data.exp: Likewise. * ld-elf/eh-group.exp: Likewise. * ld-elf/elf.exp: Likewise. * ld-elf/export-class.exp: Likewise. * ld-elfvers/vers.exp: Likewise. * ld-frv/tls.exp: Likewise. * ld-i386/export-class.exp: Likewise. * ld-i386/i386.exp: Likewise. * ld-ia64/ia64.exp: Likewise. * ld-libs/libs.exp: Likewise. * ld-m68k/m68k.exp: Likewise. * ld-metag/metag.exp: Likewise. * ld-mips-elf/comm-data.exp: Likewise. * ld-mips-elf/export-class.exp: Likewise. * ld-mips-elf/mips-elf.exp: Likewise. * ld-mn10300/mn10300.exp: Likewise. * ld-pe/pe-compile.exp: Likewise. * ld-pe/pe.exp: Likewise. * ld-plugin/plugin.exp: Likewise. * ld-powerpc/aix52.exp: Likewise. * ld-powerpc/export-class.exp: Likewise. * ld-powerpc/powerpc.exp: Likewise. * ld-s390/s390.exp: Likewise. * ld-sh/sh-vxworks.exp: Likewise. * ld-sh/sh64/sh64.exp: Likewise. * ld-sparc/sparc.exp: Likewise. * ld-tic6x/tic6x.exp: Likewise. * ld-tilegx/tilegx.exp: Likewise. * ld-tilepro/tilepro.exp: Likewise. * ld-undefined/entry.exp: Likewise. * ld-vax-elf/vax-elf.exp: Likewise. * ld-x86-64/dwarfreloc.exp: Likewise. * ld-x86-64/export-class.exp: Likewise. * ld-x86-64/x86-64.exp: Likewise. * ld-xc16x/xc16x.exp: Likewise. * ld-xstormy16/xstormy16.exp: Likewise. * ld-xtensa/xtensa.exp: Likewise.
2013-02-19 02:10:06 +01:00
{"APUinfo section processing" "-melf32ppc" ""
"-a32 -me500" {apuinfo1.s apuinfo-nul.s apuinfo2.s}
{{readelf -x.PPC.EMB.apuinfo apuinfo.rd}} "apuinfo"}
{"APUinfo VLE section processing" "-melf32ppc" ""
PowerPC VLE VLE is an encoding, not a particular processor architecture, so it isn't really proper to select insns based on PPC_OPCODE_VLE. For example {"evaddw", VX (4, 512), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {RS, RA, RB}}, {"vaddubs", VX (4, 512), VX_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VA, VB}}, shows two insns that have the same encoding, both available with VLE. Enabling both with VLE means we can't disassemble the second variant even if -Maltivec is given rather than -Mspe. Also, we don't check user assembly against the processor type as well as we could. Another problem is that when using the VLE encoding, insns from the main ppc opcode table are not available, except those using opcode 4 and 31. Correcting this revealed two errors in the ld testsuite, use of "nop" and "rfmci" when -mvle. This patch fixes those problems in the opcode table, and removes PPCNONE. I find a plain 0 distracts less from other values. In addition, I've implemented code to recognize some machine values from the apuinfo note present in ppc32 objects. It's not a complete disambiguation since we're lacking info to detect newer chips, but what we have should help with disassembly. include/ * elf/ppc.h (APUINFO_SECTION_NAME, APUINFO_LABEL, PPC_APUINFO_ISEL, PPC_APUINFO_PMR, PPC_APUINFO_RFMCI, PPC_APUINFO_CACHELCK, PPC_APUINFO_SPE, PPC_APUINFO_EFS, PPC_APUINFO_BRLOCK, PPC_APUINFO_VLE: Define. opcodes/ * ppc-dis.c (ppc_opts): Delete extraneous parentheses. Default cpu for "vle" to e500. * ppc-opc.c (ALLOW8_SPRG): Remove PPC_OPCODE_VLE. (NO371, PPCSPE, PPCISEL, PPCEFS, MULHW, DCBT_EO): Likewise. (PPCNONE): Delete, substitute throughout. (powerpc_opcodes): Remove PPCVLE from "flags". Add to "deprecated" except for major opcode 4 and 31. (vle_opcodes <se_rfmci>): Add PPCRFMCI to flags. bfd/ * cpu-powerpc.c (powerpc_compatible): Allow bfd_mach_ppc_vle entry to match other 32-bit archs. * elf32-ppc.c (_bfd_elf_ppc_set_arch): New function. (ppc_elf_object_p): Call it. (ppc_elf_special_sections): Use APUINFO_SECTION_NAME. Fix overlong line. (APUINFO_SECTION_NAME, APUINFO_LABEL): Don't define here. * elf64-ppc.c (ppc64_elf_object_p): Call _bfd_elf_ppc_set_arch. * bfd-in.h (_bfd_elf_ppc_at_tls_transform, _bfd_elf_ppc_at_tprel_transform): Move to.. * elf-bfd.h: ..here. (_bfd_elf_ppc_set_arch): Declare. * bfd-in2.h: Regenerate. gas/ * config/tc-ppc.c (PPC_APUINFO_ISEL, PPC_APUINFO_PMR, PPC_APUINFO_RFMCI, PPC_APUINFO_CACHELCK, PPC_APUINFO_SPE, PPC_APUINFO_EFS, PPC_APUINFO_BRLOCK, PPC_APUINFO_VLE): Don't define. (ppc_setup_opcodes): Check vle disables powerpc_opcodes overridden by vle_opcodes, and that vle flag doesn't enable opcodes. Don't add vle_opcodes twice. (ppc_cleanup): Use APUINFO_SECTION_NAME and APUINFO_LABEL. ld/ * testsuite/ld-powerpc/apuinfo1.s: Delete nop. * testsuite/ld-powerpc/apuinfo-vle2.s: New. * testsuite/ld-powerpc/powerpc.exp: Use apuinfo-vle2.s.
2016-06-07 14:34:38 +02:00
"-a32 -me500 -mvle" {apuinfo1.s apuinfo-vle.s apuinfo-vle2.s}
{{readelf -x.PPC.EMB.apuinfo apuinfo-vle.rd}} "apuinfo-vle"}
* lib/ld-lib.exp (run_ld_link_tests): Add another argument, pass its contents to ar_simple_create and ld_simple_link after objfiles. * ld-aarch64/aarch64-elf.exp: Adjust accordingly. * ld-alpha/alpha.exp: Likewise. * ld-arm/arm-elf.exp: Likewise. * ld-arm/export-class.exp: Likewise. * ld-elf/comm-data.exp: Likewise. * ld-elf/eh-group.exp: Likewise. * ld-elf/elf.exp: Likewise. * ld-elf/export-class.exp: Likewise. * ld-elfvers/vers.exp: Likewise. * ld-frv/tls.exp: Likewise. * ld-i386/export-class.exp: Likewise. * ld-i386/i386.exp: Likewise. * ld-ia64/ia64.exp: Likewise. * ld-libs/libs.exp: Likewise. * ld-m68k/m68k.exp: Likewise. * ld-metag/metag.exp: Likewise. * ld-mips-elf/comm-data.exp: Likewise. * ld-mips-elf/export-class.exp: Likewise. * ld-mips-elf/mips-elf.exp: Likewise. * ld-mn10300/mn10300.exp: Likewise. * ld-pe/pe-compile.exp: Likewise. * ld-pe/pe.exp: Likewise. * ld-plugin/plugin.exp: Likewise. * ld-powerpc/aix52.exp: Likewise. * ld-powerpc/export-class.exp: Likewise. * ld-powerpc/powerpc.exp: Likewise. * ld-s390/s390.exp: Likewise. * ld-sh/sh-vxworks.exp: Likewise. * ld-sh/sh64/sh64.exp: Likewise. * ld-sparc/sparc.exp: Likewise. * ld-tic6x/tic6x.exp: Likewise. * ld-tilegx/tilegx.exp: Likewise. * ld-tilepro/tilepro.exp: Likewise. * ld-undefined/entry.exp: Likewise. * ld-vax-elf/vax-elf.exp: Likewise. * ld-x86-64/dwarfreloc.exp: Likewise. * ld-x86-64/export-class.exp: Likewise. * ld-x86-64/x86-64.exp: Likewise. * ld-xc16x/xc16x.exp: Likewise. * ld-xstormy16/xstormy16.exp: Likewise. * ld-xtensa/xtensa.exp: Likewise.
2013-02-19 02:10:06 +01:00
{"APUinfo NULL section processing" "-melf32ppc" ""
"-a32 -me500" {apuinfo-nul1.s apuinfo-nul.s}
{{readelf -x.PPC.EMB.apuinfo apuinfo-nul.rd}} "apuinfo"}
PowerPC TPREL16_HA/LO reloc optimization In the TLS GD/LD to LE optimization, ld replaces a sequence like addi 3,2,x@got@tlsgd R_PPC64_GOT_TLSGD16 x bl __tls_get_addr(x@tlsgd) R_PPC64_TLSGD x R_PPC64_REL24 __tls_get_addr nop with addis 3,13,x@tprel@ha R_PPC64_TPREL16_HA x addi 3,3,x@tprel@l R_PPC64_TPREL16_LO x nop When the tprel offset is small, this can be further optimized to nop addi 3,13,x@tprel nop bfd/ * elf64-ppc.c (struct ppc_link_hash_table): Add do_tls_opt. (ppc64_elf_tls_optimize): Set it. (ppc64_elf_relocate_section): Nop addis on TPREL16_HA, and convert insn on TPREL16_LO and TPREL16_LO_DS relocs to use r13 when addis would add zero. * elf32-ppc.c (struct ppc_elf_link_hash_table): Add do_tls_opt. (ppc_elf_tls_optimize): Set it. (ppc_elf_relocate_section): Nop addis on TPREL16_HA, and convert insn on TPREL16_LO relocs to use r2 when addis would add zero. gold/ * powerpc.cc (Target_powerpc::Relocate::relocate): Nop addis on TPREL16_HA, and convert insn on TPREL16_LO and TPREL16_LO_DS relocs to use r2/r13 when addis would add zero. ld/ * testsuite/ld-powerpc/tls.s: Add calls with tls markers. * testsuite/ld-powerpc/tls32.s: Likewise. * testsuite/ld-powerpc/powerpc.exp: Run tls marker tests. * testsuite/ld-powerpc/tls.d: Adjust for TPREL16_HA/LO optimization. * testsuite/ld-powerpc/tlsexe.d: Likewise. * testsuite/ld-powerpc/tlsexetoc.d: Likewise. * testsuite/ld-powerpc/tlsld.d: Likewise. * testsuite/ld-powerpc/tlsmark.d: Likewise. * testsuite/ld-powerpc/tlsopt4.d: Likewise. * testsuite/ld-powerpc/tlstoc.d: Likewise.
2017-08-30 13:05:35 +02:00
{"TLS32 static exec (markers)" "-melf32ppc" ""
"-a32 --defsym TLSMARK=1" {tls32.s tlslib32.s}
{{objdump -dr tls32.d} {objdump -sj.got tls32.g}
{objdump -sj.tdata tls32.t}}
"tls32m"}
* lib/ld-lib.exp (run_ld_link_tests): Add another argument, pass its contents to ar_simple_create and ld_simple_link after objfiles. * ld-aarch64/aarch64-elf.exp: Adjust accordingly. * ld-alpha/alpha.exp: Likewise. * ld-arm/arm-elf.exp: Likewise. * ld-arm/export-class.exp: Likewise. * ld-elf/comm-data.exp: Likewise. * ld-elf/eh-group.exp: Likewise. * ld-elf/elf.exp: Likewise. * ld-elf/export-class.exp: Likewise. * ld-elfvers/vers.exp: Likewise. * ld-frv/tls.exp: Likewise. * ld-i386/export-class.exp: Likewise. * ld-i386/i386.exp: Likewise. * ld-ia64/ia64.exp: Likewise. * ld-libs/libs.exp: Likewise. * ld-m68k/m68k.exp: Likewise. * ld-metag/metag.exp: Likewise. * ld-mips-elf/comm-data.exp: Likewise. * ld-mips-elf/export-class.exp: Likewise. * ld-mips-elf/mips-elf.exp: Likewise. * ld-mn10300/mn10300.exp: Likewise. * ld-pe/pe-compile.exp: Likewise. * ld-pe/pe.exp: Likewise. * ld-plugin/plugin.exp: Likewise. * ld-powerpc/aix52.exp: Likewise. * ld-powerpc/export-class.exp: Likewise. * ld-powerpc/powerpc.exp: Likewise. * ld-s390/s390.exp: Likewise. * ld-sh/sh-vxworks.exp: Likewise. * ld-sh/sh64/sh64.exp: Likewise. * ld-sparc/sparc.exp: Likewise. * ld-tic6x/tic6x.exp: Likewise. * ld-tilegx/tilegx.exp: Likewise. * ld-tilepro/tilepro.exp: Likewise. * ld-undefined/entry.exp: Likewise. * ld-vax-elf/vax-elf.exp: Likewise. * ld-x86-64/dwarfreloc.exp: Likewise. * ld-x86-64/export-class.exp: Likewise. * ld-x86-64/x86-64.exp: Likewise. * ld-xc16x/xc16x.exp: Likewise. * ld-xstormy16/xstormy16.exp: Likewise. * ld-xtensa/xtensa.exp: Likewise.
2013-02-19 02:10:06 +01:00
{"TLS32 static exec" "-melf32ppc" "" "-a32" {tls32.s tlslib32.s}
2003-02-18 07:11:32 +01:00
{{objdump -dr tls32.d} {objdump -sj.got tls32.g}
{objdump -sj.tdata tls32.t}}
"tls32"}
{"TLS32 static exec (--no-tls-optimize)" "-melf32ppc --no-tls-optimize" ""
"-a32 --defsym TLSMARK=1" {tls32.s tlslib32.s}
{{objdump -dr tls32no.d} {objdump -sj.got tls32no.g}
{objdump -sj.tdata tls32.t}}
"tls32no"}
* lib/ld-lib.exp (run_ld_link_tests): Add another argument, pass its contents to ar_simple_create and ld_simple_link after objfiles. * ld-aarch64/aarch64-elf.exp: Adjust accordingly. * ld-alpha/alpha.exp: Likewise. * ld-arm/arm-elf.exp: Likewise. * ld-arm/export-class.exp: Likewise. * ld-elf/comm-data.exp: Likewise. * ld-elf/eh-group.exp: Likewise. * ld-elf/elf.exp: Likewise. * ld-elf/export-class.exp: Likewise. * ld-elfvers/vers.exp: Likewise. * ld-frv/tls.exp: Likewise. * ld-i386/export-class.exp: Likewise. * ld-i386/i386.exp: Likewise. * ld-ia64/ia64.exp: Likewise. * ld-libs/libs.exp: Likewise. * ld-m68k/m68k.exp: Likewise. * ld-metag/metag.exp: Likewise. * ld-mips-elf/comm-data.exp: Likewise. * ld-mips-elf/export-class.exp: Likewise. * ld-mips-elf/mips-elf.exp: Likewise. * ld-mn10300/mn10300.exp: Likewise. * ld-pe/pe-compile.exp: Likewise. * ld-pe/pe.exp: Likewise. * ld-plugin/plugin.exp: Likewise. * ld-powerpc/aix52.exp: Likewise. * ld-powerpc/export-class.exp: Likewise. * ld-powerpc/powerpc.exp: Likewise. * ld-s390/s390.exp: Likewise. * ld-sh/sh-vxworks.exp: Likewise. * ld-sh/sh64/sh64.exp: Likewise. * ld-sparc/sparc.exp: Likewise. * ld-tic6x/tic6x.exp: Likewise. * ld-tilegx/tilegx.exp: Likewise. * ld-tilepro/tilepro.exp: Likewise. * ld-undefined/entry.exp: Likewise. * ld-vax-elf/vax-elf.exp: Likewise. * ld-x86-64/dwarfreloc.exp: Likewise. * ld-x86-64/export-class.exp: Likewise. * ld-x86-64/x86-64.exp: Likewise. * ld-xc16x/xc16x.exp: Likewise. * ld-xstormy16/xstormy16.exp: Likewise. * ld-xtensa/xtensa.exp: Likewise.
2013-02-19 02:10:06 +01:00
{"TLS32 helper shared library" "-shared -melf32ppc tmpdir/tlslib32.o" "" "" {}
2003-02-18 07:11:32 +01:00
{} "libtlslib32.so"}
{"TLS32 dynamic exec" "-melf32ppc --no-plt-align --no-ld-generated-unwind-info --hash-style=sysv tmpdir/tls32.o tmpdir/libtlslib32.so" "" "" {}
2003-02-18 07:11:32 +01:00
{{readelf -WSsrl tlsexe32.r} {objdump -dr tlsexe32.d}
{objdump -sj.got tlsexe32.g} {objdump -sj.tdata tlsexe32.t}}
PowerPC TPREL16_HA/LO reloc optimization In the TLS GD/LD to LE optimization, ld replaces a sequence like addi 3,2,x@got@tlsgd R_PPC64_GOT_TLSGD16 x bl __tls_get_addr(x@tlsgd) R_PPC64_TLSGD x R_PPC64_REL24 __tls_get_addr nop with addis 3,13,x@tprel@ha R_PPC64_TPREL16_HA x addi 3,3,x@tprel@l R_PPC64_TPREL16_LO x nop When the tprel offset is small, this can be further optimized to nop addi 3,13,x@tprel nop bfd/ * elf64-ppc.c (struct ppc_link_hash_table): Add do_tls_opt. (ppc64_elf_tls_optimize): Set it. (ppc64_elf_relocate_section): Nop addis on TPREL16_HA, and convert insn on TPREL16_LO and TPREL16_LO_DS relocs to use r13 when addis would add zero. * elf32-ppc.c (struct ppc_elf_link_hash_table): Add do_tls_opt. (ppc_elf_tls_optimize): Set it. (ppc_elf_relocate_section): Nop addis on TPREL16_HA, and convert insn on TPREL16_LO relocs to use r2 when addis would add zero. gold/ * powerpc.cc (Target_powerpc::Relocate::relocate): Nop addis on TPREL16_HA, and convert insn on TPREL16_LO and TPREL16_LO_DS relocs to use r2/r13 when addis would add zero. ld/ * testsuite/ld-powerpc/tls.s: Add calls with tls markers. * testsuite/ld-powerpc/tls32.s: Likewise. * testsuite/ld-powerpc/powerpc.exp: Run tls marker tests. * testsuite/ld-powerpc/tls.d: Adjust for TPREL16_HA/LO optimization. * testsuite/ld-powerpc/tlsexe.d: Likewise. * testsuite/ld-powerpc/tlsexetoc.d: Likewise. * testsuite/ld-powerpc/tlsld.d: Likewise. * testsuite/ld-powerpc/tlsmark.d: Likewise. * testsuite/ld-powerpc/tlsopt4.d: Likewise. * testsuite/ld-powerpc/tlstoc.d: Likewise.
2017-08-30 13:05:35 +02:00
"tlsexe32"}
{"TLS32 dynamic exec (--no-tls-optimize)" "-melf32ppc --no-tls-optimize --no-plt-align --no-ld-generated-unwind-info --hash-style=sysv tmpdir/tls32.o tmpdir/libtlslib32.so" "" "" {}
{{readelf -WSsrl tlsexe32no.r} {objdump -dr tlsexe32no.d}
{objdump -sj.got tlsexe32no.g} {objdump -sj.tdata tlsexe32.t}}
"tlsexe32no"}
{"TLS32 shared" "-shared -melf32ppc --no-plt-align --no-ld-generated-unwind-info --hash-style=sysv tmpdir/tls32.o" "" "" {}
2003-02-18 07:11:32 +01:00
{{readelf -WSsrl tlsso32.r} {objdump -dr tlsso32.d}
{objdump -sj.got tlsso32.g} {objdump -sj.tdata tlsso32.t}}
PowerPC TPREL16_HA/LO reloc optimization In the TLS GD/LD to LE optimization, ld replaces a sequence like addi 3,2,x@got@tlsgd R_PPC64_GOT_TLSGD16 x bl __tls_get_addr(x@tlsgd) R_PPC64_TLSGD x R_PPC64_REL24 __tls_get_addr nop with addis 3,13,x@tprel@ha R_PPC64_TPREL16_HA x addi 3,3,x@tprel@l R_PPC64_TPREL16_LO x nop When the tprel offset is small, this can be further optimized to nop addi 3,13,x@tprel nop bfd/ * elf64-ppc.c (struct ppc_link_hash_table): Add do_tls_opt. (ppc64_elf_tls_optimize): Set it. (ppc64_elf_relocate_section): Nop addis on TPREL16_HA, and convert insn on TPREL16_LO and TPREL16_LO_DS relocs to use r13 when addis would add zero. * elf32-ppc.c (struct ppc_elf_link_hash_table): Add do_tls_opt. (ppc_elf_tls_optimize): Set it. (ppc_elf_relocate_section): Nop addis on TPREL16_HA, and convert insn on TPREL16_LO relocs to use r2 when addis would add zero. gold/ * powerpc.cc (Target_powerpc::Relocate::relocate): Nop addis on TPREL16_HA, and convert insn on TPREL16_LO and TPREL16_LO_DS relocs to use r2/r13 when addis would add zero. ld/ * testsuite/ld-powerpc/tls.s: Add calls with tls markers. * testsuite/ld-powerpc/tls32.s: Likewise. * testsuite/ld-powerpc/powerpc.exp: Run tls marker tests. * testsuite/ld-powerpc/tls.d: Adjust for TPREL16_HA/LO optimization. * testsuite/ld-powerpc/tlsexe.d: Likewise. * testsuite/ld-powerpc/tlsexetoc.d: Likewise. * testsuite/ld-powerpc/tlsld.d: Likewise. * testsuite/ld-powerpc/tlsmark.d: Likewise. * testsuite/ld-powerpc/tlsopt4.d: Likewise. * testsuite/ld-powerpc/tlstoc.d: Likewise.
2017-08-30 13:05:35 +02:00
"tls32.so"}
* lib/ld-lib.exp (run_ld_link_tests): Add another argument, pass its contents to ar_simple_create and ld_simple_link after objfiles. * ld-aarch64/aarch64-elf.exp: Adjust accordingly. * ld-alpha/alpha.exp: Likewise. * ld-arm/arm-elf.exp: Likewise. * ld-arm/export-class.exp: Likewise. * ld-elf/comm-data.exp: Likewise. * ld-elf/eh-group.exp: Likewise. * ld-elf/elf.exp: Likewise. * ld-elf/export-class.exp: Likewise. * ld-elfvers/vers.exp: Likewise. * ld-frv/tls.exp: Likewise. * ld-i386/export-class.exp: Likewise. * ld-i386/i386.exp: Likewise. * ld-ia64/ia64.exp: Likewise. * ld-libs/libs.exp: Likewise. * ld-m68k/m68k.exp: Likewise. * ld-metag/metag.exp: Likewise. * ld-mips-elf/comm-data.exp: Likewise. * ld-mips-elf/export-class.exp: Likewise. * ld-mips-elf/mips-elf.exp: Likewise. * ld-mn10300/mn10300.exp: Likewise. * ld-pe/pe-compile.exp: Likewise. * ld-pe/pe.exp: Likewise. * ld-plugin/plugin.exp: Likewise. * ld-powerpc/aix52.exp: Likewise. * ld-powerpc/export-class.exp: Likewise. * ld-powerpc/powerpc.exp: Likewise. * ld-s390/s390.exp: Likewise. * ld-sh/sh-vxworks.exp: Likewise. * ld-sh/sh64/sh64.exp: Likewise. * ld-sparc/sparc.exp: Likewise. * ld-tic6x/tic6x.exp: Likewise. * ld-tilegx/tilegx.exp: Likewise. * ld-tilepro/tilepro.exp: Likewise. * ld-undefined/entry.exp: Likewise. * ld-vax-elf/vax-elf.exp: Likewise. * ld-x86-64/dwarfreloc.exp: Likewise. * ld-x86-64/export-class.exp: Likewise. * ld-x86-64/x86-64.exp: Likewise. * ld-xc16x/xc16x.exp: Likewise. * ld-xstormy16/xstormy16.exp: Likewise. * ld-xtensa/xtensa.exp: Likewise.
2013-02-19 02:10:06 +01:00
{"TLS32 markers" "-melf32ppc" "" "-a32" {tlsmark32.s tlslib32.s}
include/elf/ * ppc.h (R_PPC_TLSGD, R_PPC_TLSLD): Add new relocs. * ppc64.h (R_PPC64_TLSGD, R_PPC64_TLSLD): Add new relocs. bfd/ * reloc.c (BFD_RELOC_PPC_TLSGD, BFD_RELOC_PPC_TLSLD): New. * section.c (struct bfd_section): Add has_tls_get_addr_call. (BFD_FAKE_SECTION): Init new flag. * ecoff.c (bfd_debug_section): Likewise. * bfd-in2.h: Regenerate. * libbfd.h: Regenerate. * elf32-ppc.c (ppc_elf_howto_raw): Add R_PPC_TLSGD and R_PPC_TLSLD. (ppc_elf_reloc_type_lookup): Handle new relocs. (ppc_elf_check_relocs): Set has_tls_get_addr_call on finding such without marker relocs. (ppc_elf_tls_optimize): Allow out-of-order __tls_get_addr relocs if section has no old-style calls. (ppc_elf_relocate_section): Set tls_mask for non-tls relocs too. Don't try to optimize new-style __tls_get_addr call when handling arg setup relocs. Instead do so for R_PPC_TLSGD and R_PPC_TLSLD relocs. * elf64-ppc.c (ppc64_elf_howto_raw): Add R_PPC64_TLSGD, R_PPC64_TLSLD. (ppc64_elf_reloc_type_lookup): Handle new relocs. (ppc64_elf_check_relocs): Set has_tls_get_addr_call on finding such without marker relocs. (ppc64_elf_tls_optimize): Allow out-of-order __tls_get_addr relocs if section has no old-style calls. Set toc_ref for new relocs as appropriate. (ppc64_elf_relocate_section): Set tls_mask for non-tls relocs too. Don't try to optimize new-style __tls_get_addr call when handling arg setup relocs. Instead do so for R_PPC_TLSGD and R_PPC_TLSLD relocs. gas/ * config/tc-ppc.c (ppc_elf_suffix): Error if ppc32 tls got relocs have non-zero addend. (md_assemble): Parse args of __tls_get_addr calls. (md_apply_fix): Handle BFD_RELOC_PPC_TLSGD and BFD_RELOC_PPC_TLSLD. ld/testsuite/ * ld-powerpc/tlsmark.s, * ld-powerpc/tlsmark.d: New test. * ld-powerpc/tlsmark32.s, * ld-powerpc/tlsmark32.d: New test. * ld-powerpc/powerpc.exp: Run them.
2009-03-04 06:50:50 +01:00
{{objdump -dr tlsmark32.d}}
PowerPC TPREL16_HA/LO reloc optimization In the TLS GD/LD to LE optimization, ld replaces a sequence like addi 3,2,x@got@tlsgd R_PPC64_GOT_TLSGD16 x bl __tls_get_addr(x@tlsgd) R_PPC64_TLSGD x R_PPC64_REL24 __tls_get_addr nop with addis 3,13,x@tprel@ha R_PPC64_TPREL16_HA x addi 3,3,x@tprel@l R_PPC64_TPREL16_LO x nop When the tprel offset is small, this can be further optimized to nop addi 3,13,x@tprel nop bfd/ * elf64-ppc.c (struct ppc_link_hash_table): Add do_tls_opt. (ppc64_elf_tls_optimize): Set it. (ppc64_elf_relocate_section): Nop addis on TPREL16_HA, and convert insn on TPREL16_LO and TPREL16_LO_DS relocs to use r13 when addis would add zero. * elf32-ppc.c (struct ppc_elf_link_hash_table): Add do_tls_opt. (ppc_elf_tls_optimize): Set it. (ppc_elf_relocate_section): Nop addis on TPREL16_HA, and convert insn on TPREL16_LO relocs to use r2 when addis would add zero. gold/ * powerpc.cc (Target_powerpc::Relocate::relocate): Nop addis on TPREL16_HA, and convert insn on TPREL16_LO and TPREL16_LO_DS relocs to use r2/r13 when addis would add zero. ld/ * testsuite/ld-powerpc/tls.s: Add calls with tls markers. * testsuite/ld-powerpc/tls32.s: Likewise. * testsuite/ld-powerpc/powerpc.exp: Run tls marker tests. * testsuite/ld-powerpc/tls.d: Adjust for TPREL16_HA/LO optimization. * testsuite/ld-powerpc/tlsexe.d: Likewise. * testsuite/ld-powerpc/tlsexetoc.d: Likewise. * testsuite/ld-powerpc/tlsld.d: Likewise. * testsuite/ld-powerpc/tlsmark.d: Likewise. * testsuite/ld-powerpc/tlsopt4.d: Likewise. * testsuite/ld-powerpc/tlstoc.d: Likewise.
2017-08-30 13:05:35 +02:00
"tlsmark32"}
* lib/ld-lib.exp (run_ld_link_tests): Add another argument, pass its contents to ar_simple_create and ld_simple_link after objfiles. * ld-aarch64/aarch64-elf.exp: Adjust accordingly. * ld-alpha/alpha.exp: Likewise. * ld-arm/arm-elf.exp: Likewise. * ld-arm/export-class.exp: Likewise. * ld-elf/comm-data.exp: Likewise. * ld-elf/eh-group.exp: Likewise. * ld-elf/elf.exp: Likewise. * ld-elf/export-class.exp: Likewise. * ld-elfvers/vers.exp: Likewise. * ld-frv/tls.exp: Likewise. * ld-i386/export-class.exp: Likewise. * ld-i386/i386.exp: Likewise. * ld-ia64/ia64.exp: Likewise. * ld-libs/libs.exp: Likewise. * ld-m68k/m68k.exp: Likewise. * ld-metag/metag.exp: Likewise. * ld-mips-elf/comm-data.exp: Likewise. * ld-mips-elf/export-class.exp: Likewise. * ld-mips-elf/mips-elf.exp: Likewise. * ld-mn10300/mn10300.exp: Likewise. * ld-pe/pe-compile.exp: Likewise. * ld-pe/pe.exp: Likewise. * ld-plugin/plugin.exp: Likewise. * ld-powerpc/aix52.exp: Likewise. * ld-powerpc/export-class.exp: Likewise. * ld-powerpc/powerpc.exp: Likewise. * ld-s390/s390.exp: Likewise. * ld-sh/sh-vxworks.exp: Likewise. * ld-sh/sh64/sh64.exp: Likewise. * ld-sparc/sparc.exp: Likewise. * ld-tic6x/tic6x.exp: Likewise. * ld-tilegx/tilegx.exp: Likewise. * ld-tilepro/tilepro.exp: Likewise. * ld-undefined/entry.exp: Likewise. * ld-vax-elf/vax-elf.exp: Likewise. * ld-x86-64/dwarfreloc.exp: Likewise. * ld-x86-64/export-class.exp: Likewise. * ld-x86-64/x86-64.exp: Likewise. * ld-xc16x/xc16x.exp: Likewise. * ld-xstormy16/xstormy16.exp: Likewise. * ld-xtensa/xtensa.exp: Likewise.
2013-02-19 02:10:06 +01:00
{"TLS32 opt 1" "-melf32ppc" "" "-a32" {tlsopt1_32.s tlslib32.s}
{{objdump -dr tlsopt1_32.d}}
PowerPC TPREL16_HA/LO reloc optimization In the TLS GD/LD to LE optimization, ld replaces a sequence like addi 3,2,x@got@tlsgd R_PPC64_GOT_TLSGD16 x bl __tls_get_addr(x@tlsgd) R_PPC64_TLSGD x R_PPC64_REL24 __tls_get_addr nop with addis 3,13,x@tprel@ha R_PPC64_TPREL16_HA x addi 3,3,x@tprel@l R_PPC64_TPREL16_LO x nop When the tprel offset is small, this can be further optimized to nop addi 3,13,x@tprel nop bfd/ * elf64-ppc.c (struct ppc_link_hash_table): Add do_tls_opt. (ppc64_elf_tls_optimize): Set it. (ppc64_elf_relocate_section): Nop addis on TPREL16_HA, and convert insn on TPREL16_LO and TPREL16_LO_DS relocs to use r13 when addis would add zero. * elf32-ppc.c (struct ppc_elf_link_hash_table): Add do_tls_opt. (ppc_elf_tls_optimize): Set it. (ppc_elf_relocate_section): Nop addis on TPREL16_HA, and convert insn on TPREL16_LO relocs to use r2 when addis would add zero. gold/ * powerpc.cc (Target_powerpc::Relocate::relocate): Nop addis on TPREL16_HA, and convert insn on TPREL16_LO and TPREL16_LO_DS relocs to use r2/r13 when addis would add zero. ld/ * testsuite/ld-powerpc/tls.s: Add calls with tls markers. * testsuite/ld-powerpc/tls32.s: Likewise. * testsuite/ld-powerpc/powerpc.exp: Run tls marker tests. * testsuite/ld-powerpc/tls.d: Adjust for TPREL16_HA/LO optimization. * testsuite/ld-powerpc/tlsexe.d: Likewise. * testsuite/ld-powerpc/tlsexetoc.d: Likewise. * testsuite/ld-powerpc/tlsld.d: Likewise. * testsuite/ld-powerpc/tlsmark.d: Likewise. * testsuite/ld-powerpc/tlsopt4.d: Likewise. * testsuite/ld-powerpc/tlstoc.d: Likewise.
2017-08-30 13:05:35 +02:00
"tlsopt1_32"}
* lib/ld-lib.exp (run_ld_link_tests): Add another argument, pass its contents to ar_simple_create and ld_simple_link after objfiles. * ld-aarch64/aarch64-elf.exp: Adjust accordingly. * ld-alpha/alpha.exp: Likewise. * ld-arm/arm-elf.exp: Likewise. * ld-arm/export-class.exp: Likewise. * ld-elf/comm-data.exp: Likewise. * ld-elf/eh-group.exp: Likewise. * ld-elf/elf.exp: Likewise. * ld-elf/export-class.exp: Likewise. * ld-elfvers/vers.exp: Likewise. * ld-frv/tls.exp: Likewise. * ld-i386/export-class.exp: Likewise. * ld-i386/i386.exp: Likewise. * ld-ia64/ia64.exp: Likewise. * ld-libs/libs.exp: Likewise. * ld-m68k/m68k.exp: Likewise. * ld-metag/metag.exp: Likewise. * ld-mips-elf/comm-data.exp: Likewise. * ld-mips-elf/export-class.exp: Likewise. * ld-mips-elf/mips-elf.exp: Likewise. * ld-mn10300/mn10300.exp: Likewise. * ld-pe/pe-compile.exp: Likewise. * ld-pe/pe.exp: Likewise. * ld-plugin/plugin.exp: Likewise. * ld-powerpc/aix52.exp: Likewise. * ld-powerpc/export-class.exp: Likewise. * ld-powerpc/powerpc.exp: Likewise. * ld-s390/s390.exp: Likewise. * ld-sh/sh-vxworks.exp: Likewise. * ld-sh/sh64/sh64.exp: Likewise. * ld-sparc/sparc.exp: Likewise. * ld-tic6x/tic6x.exp: Likewise. * ld-tilegx/tilegx.exp: Likewise. * ld-tilepro/tilepro.exp: Likewise. * ld-undefined/entry.exp: Likewise. * ld-vax-elf/vax-elf.exp: Likewise. * ld-x86-64/dwarfreloc.exp: Likewise. * ld-x86-64/export-class.exp: Likewise. * ld-x86-64/x86-64.exp: Likewise. * ld-xc16x/xc16x.exp: Likewise. * ld-xstormy16/xstormy16.exp: Likewise. * ld-xtensa/xtensa.exp: Likewise.
2013-02-19 02:10:06 +01:00
{"TLS32 opt 2" "-melf32ppc" "" "-a32" {tlsopt2_32.s tlslib32.s}
{{objdump -dr tlsopt2_32.d}}
PowerPC TPREL16_HA/LO reloc optimization In the TLS GD/LD to LE optimization, ld replaces a sequence like addi 3,2,x@got@tlsgd R_PPC64_GOT_TLSGD16 x bl __tls_get_addr(x@tlsgd) R_PPC64_TLSGD x R_PPC64_REL24 __tls_get_addr nop with addis 3,13,x@tprel@ha R_PPC64_TPREL16_HA x addi 3,3,x@tprel@l R_PPC64_TPREL16_LO x nop When the tprel offset is small, this can be further optimized to nop addi 3,13,x@tprel nop bfd/ * elf64-ppc.c (struct ppc_link_hash_table): Add do_tls_opt. (ppc64_elf_tls_optimize): Set it. (ppc64_elf_relocate_section): Nop addis on TPREL16_HA, and convert insn on TPREL16_LO and TPREL16_LO_DS relocs to use r13 when addis would add zero. * elf32-ppc.c (struct ppc_elf_link_hash_table): Add do_tls_opt. (ppc_elf_tls_optimize): Set it. (ppc_elf_relocate_section): Nop addis on TPREL16_HA, and convert insn on TPREL16_LO relocs to use r2 when addis would add zero. gold/ * powerpc.cc (Target_powerpc::Relocate::relocate): Nop addis on TPREL16_HA, and convert insn on TPREL16_LO and TPREL16_LO_DS relocs to use r2/r13 when addis would add zero. ld/ * testsuite/ld-powerpc/tls.s: Add calls with tls markers. * testsuite/ld-powerpc/tls32.s: Likewise. * testsuite/ld-powerpc/powerpc.exp: Run tls marker tests. * testsuite/ld-powerpc/tls.d: Adjust for TPREL16_HA/LO optimization. * testsuite/ld-powerpc/tlsexe.d: Likewise. * testsuite/ld-powerpc/tlsexetoc.d: Likewise. * testsuite/ld-powerpc/tlsld.d: Likewise. * testsuite/ld-powerpc/tlsmark.d: Likewise. * testsuite/ld-powerpc/tlsopt4.d: Likewise. * testsuite/ld-powerpc/tlstoc.d: Likewise.
2017-08-30 13:05:35 +02:00
"tlsopt2_32"}
* lib/ld-lib.exp (run_ld_link_tests): Add another argument, pass its contents to ar_simple_create and ld_simple_link after objfiles. * ld-aarch64/aarch64-elf.exp: Adjust accordingly. * ld-alpha/alpha.exp: Likewise. * ld-arm/arm-elf.exp: Likewise. * ld-arm/export-class.exp: Likewise. * ld-elf/comm-data.exp: Likewise. * ld-elf/eh-group.exp: Likewise. * ld-elf/elf.exp: Likewise. * ld-elf/export-class.exp: Likewise. * ld-elfvers/vers.exp: Likewise. * ld-frv/tls.exp: Likewise. * ld-i386/export-class.exp: Likewise. * ld-i386/i386.exp: Likewise. * ld-ia64/ia64.exp: Likewise. * ld-libs/libs.exp: Likewise. * ld-m68k/m68k.exp: Likewise. * ld-metag/metag.exp: Likewise. * ld-mips-elf/comm-data.exp: Likewise. * ld-mips-elf/export-class.exp: Likewise. * ld-mips-elf/mips-elf.exp: Likewise. * ld-mn10300/mn10300.exp: Likewise. * ld-pe/pe-compile.exp: Likewise. * ld-pe/pe.exp: Likewise. * ld-plugin/plugin.exp: Likewise. * ld-powerpc/aix52.exp: Likewise. * ld-powerpc/export-class.exp: Likewise. * ld-powerpc/powerpc.exp: Likewise. * ld-s390/s390.exp: Likewise. * ld-sh/sh-vxworks.exp: Likewise. * ld-sh/sh64/sh64.exp: Likewise. * ld-sparc/sparc.exp: Likewise. * ld-tic6x/tic6x.exp: Likewise. * ld-tilegx/tilegx.exp: Likewise. * ld-tilepro/tilepro.exp: Likewise. * ld-undefined/entry.exp: Likewise. * ld-vax-elf/vax-elf.exp: Likewise. * ld-x86-64/dwarfreloc.exp: Likewise. * ld-x86-64/export-class.exp: Likewise. * ld-x86-64/x86-64.exp: Likewise. * ld-xc16x/xc16x.exp: Likewise. * ld-xstormy16/xstormy16.exp: Likewise. * ld-xtensa/xtensa.exp: Likewise.
2013-02-19 02:10:06 +01:00
{"TLS32 opt 3" "-melf32ppc" "" "-a32" {tlsopt3_32.s tlslib32.s}
{{objdump -dr tlsopt3_32.d}}
"tlsopt3_32"}
* lib/ld-lib.exp (run_ld_link_tests): Add another argument, pass its contents to ar_simple_create and ld_simple_link after objfiles. * ld-aarch64/aarch64-elf.exp: Adjust accordingly. * ld-alpha/alpha.exp: Likewise. * ld-arm/arm-elf.exp: Likewise. * ld-arm/export-class.exp: Likewise. * ld-elf/comm-data.exp: Likewise. * ld-elf/eh-group.exp: Likewise. * ld-elf/elf.exp: Likewise. * ld-elf/export-class.exp: Likewise. * ld-elfvers/vers.exp: Likewise. * ld-frv/tls.exp: Likewise. * ld-i386/export-class.exp: Likewise. * ld-i386/i386.exp: Likewise. * ld-ia64/ia64.exp: Likewise. * ld-libs/libs.exp: Likewise. * ld-m68k/m68k.exp: Likewise. * ld-metag/metag.exp: Likewise. * ld-mips-elf/comm-data.exp: Likewise. * ld-mips-elf/export-class.exp: Likewise. * ld-mips-elf/mips-elf.exp: Likewise. * ld-mn10300/mn10300.exp: Likewise. * ld-pe/pe-compile.exp: Likewise. * ld-pe/pe.exp: Likewise. * ld-plugin/plugin.exp: Likewise. * ld-powerpc/aix52.exp: Likewise. * ld-powerpc/export-class.exp: Likewise. * ld-powerpc/powerpc.exp: Likewise. * ld-s390/s390.exp: Likewise. * ld-sh/sh-vxworks.exp: Likewise. * ld-sh/sh64/sh64.exp: Likewise. * ld-sparc/sparc.exp: Likewise. * ld-tic6x/tic6x.exp: Likewise. * ld-tilegx/tilegx.exp: Likewise. * ld-tilepro/tilepro.exp: Likewise. * ld-undefined/entry.exp: Likewise. * ld-vax-elf/vax-elf.exp: Likewise. * ld-x86-64/dwarfreloc.exp: Likewise. * ld-x86-64/export-class.exp: Likewise. * ld-x86-64/x86-64.exp: Likewise. * ld-xc16x/xc16x.exp: Likewise. * ld-xstormy16/xstormy16.exp: Likewise. * ld-xtensa/xtensa.exp: Likewise.
2013-02-19 02:10:06 +01:00
{"TLS32 opt 4" "-melf32ppc" "" "-a32" {tlsopt4_32.s tlslib32.s}
{{objdump -dr tlsopt4_32.d}}
PowerPC TPREL16_HA/LO reloc optimization In the TLS GD/LD to LE optimization, ld replaces a sequence like addi 3,2,x@got@tlsgd R_PPC64_GOT_TLSGD16 x bl __tls_get_addr(x@tlsgd) R_PPC64_TLSGD x R_PPC64_REL24 __tls_get_addr nop with addis 3,13,x@tprel@ha R_PPC64_TPREL16_HA x addi 3,3,x@tprel@l R_PPC64_TPREL16_LO x nop When the tprel offset is small, this can be further optimized to nop addi 3,13,x@tprel nop bfd/ * elf64-ppc.c (struct ppc_link_hash_table): Add do_tls_opt. (ppc64_elf_tls_optimize): Set it. (ppc64_elf_relocate_section): Nop addis on TPREL16_HA, and convert insn on TPREL16_LO and TPREL16_LO_DS relocs to use r13 when addis would add zero. * elf32-ppc.c (struct ppc_elf_link_hash_table): Add do_tls_opt. (ppc_elf_tls_optimize): Set it. (ppc_elf_relocate_section): Nop addis on TPREL16_HA, and convert insn on TPREL16_LO relocs to use r2 when addis would add zero. gold/ * powerpc.cc (Target_powerpc::Relocate::relocate): Nop addis on TPREL16_HA, and convert insn on TPREL16_LO and TPREL16_LO_DS relocs to use r2/r13 when addis would add zero. ld/ * testsuite/ld-powerpc/tls.s: Add calls with tls markers. * testsuite/ld-powerpc/tls32.s: Likewise. * testsuite/ld-powerpc/powerpc.exp: Run tls marker tests. * testsuite/ld-powerpc/tls.d: Adjust for TPREL16_HA/LO optimization. * testsuite/ld-powerpc/tlsexe.d: Likewise. * testsuite/ld-powerpc/tlsexetoc.d: Likewise. * testsuite/ld-powerpc/tlsld.d: Likewise. * testsuite/ld-powerpc/tlsmark.d: Likewise. * testsuite/ld-powerpc/tlsopt4.d: Likewise. * testsuite/ld-powerpc/tlstoc.d: Likewise.
2017-08-30 13:05:35 +02:00
"tlsopt4_32"}
{"TLS32 DLL" "-shared -melf32ppc --version-script tlsdll.ver" ""
"-a32" {tlsdll_32.s}
{} "tlsdll32.so"}
{"TLS32 opt 5" "-melf32ppc -shared --gc-sections --secure-plt --no-plt-align tmpdir/tlsdll32.so" "" "-a32" {tlsopt5_32.s}
{{objdump -dr tlsopt5_32.d}}
PowerPC TPREL16_HA/LO reloc optimization In the TLS GD/LD to LE optimization, ld replaces a sequence like addi 3,2,x@got@tlsgd R_PPC64_GOT_TLSGD16 x bl __tls_get_addr(x@tlsgd) R_PPC64_TLSGD x R_PPC64_REL24 __tls_get_addr nop with addis 3,13,x@tprel@ha R_PPC64_TPREL16_HA x addi 3,3,x@tprel@l R_PPC64_TPREL16_LO x nop When the tprel offset is small, this can be further optimized to nop addi 3,13,x@tprel nop bfd/ * elf64-ppc.c (struct ppc_link_hash_table): Add do_tls_opt. (ppc64_elf_tls_optimize): Set it. (ppc64_elf_relocate_section): Nop addis on TPREL16_HA, and convert insn on TPREL16_LO and TPREL16_LO_DS relocs to use r13 when addis would add zero. * elf32-ppc.c (struct ppc_elf_link_hash_table): Add do_tls_opt. (ppc_elf_tls_optimize): Set it. (ppc_elf_relocate_section): Nop addis on TPREL16_HA, and convert insn on TPREL16_LO relocs to use r2 when addis would add zero. gold/ * powerpc.cc (Target_powerpc::Relocate::relocate): Nop addis on TPREL16_HA, and convert insn on TPREL16_LO and TPREL16_LO_DS relocs to use r2/r13 when addis would add zero. ld/ * testsuite/ld-powerpc/tls.s: Add calls with tls markers. * testsuite/ld-powerpc/tls32.s: Likewise. * testsuite/ld-powerpc/powerpc.exp: Run tls marker tests. * testsuite/ld-powerpc/tls.d: Adjust for TPREL16_HA/LO optimization. * testsuite/ld-powerpc/tlsexe.d: Likewise. * testsuite/ld-powerpc/tlsexetoc.d: Likewise. * testsuite/ld-powerpc/tlsld.d: Likewise. * testsuite/ld-powerpc/tlsmark.d: Likewise. * testsuite/ld-powerpc/tlsopt4.d: Likewise. * testsuite/ld-powerpc/tlstoc.d: Likewise.
2017-08-30 13:05:35 +02:00
"tlsopt5_32"}
* lib/ld-lib.exp (run_ld_link_tests): Add another argument, pass its contents to ar_simple_create and ld_simple_link after objfiles. * ld-aarch64/aarch64-elf.exp: Adjust accordingly. * ld-alpha/alpha.exp: Likewise. * ld-arm/arm-elf.exp: Likewise. * ld-arm/export-class.exp: Likewise. * ld-elf/comm-data.exp: Likewise. * ld-elf/eh-group.exp: Likewise. * ld-elf/elf.exp: Likewise. * ld-elf/export-class.exp: Likewise. * ld-elfvers/vers.exp: Likewise. * ld-frv/tls.exp: Likewise. * ld-i386/export-class.exp: Likewise. * ld-i386/i386.exp: Likewise. * ld-ia64/ia64.exp: Likewise. * ld-libs/libs.exp: Likewise. * ld-m68k/m68k.exp: Likewise. * ld-metag/metag.exp: Likewise. * ld-mips-elf/comm-data.exp: Likewise. * ld-mips-elf/export-class.exp: Likewise. * ld-mips-elf/mips-elf.exp: Likewise. * ld-mn10300/mn10300.exp: Likewise. * ld-pe/pe-compile.exp: Likewise. * ld-pe/pe.exp: Likewise. * ld-plugin/plugin.exp: Likewise. * ld-powerpc/aix52.exp: Likewise. * ld-powerpc/export-class.exp: Likewise. * ld-powerpc/powerpc.exp: Likewise. * ld-s390/s390.exp: Likewise. * ld-sh/sh-vxworks.exp: Likewise. * ld-sh/sh64/sh64.exp: Likewise. * ld-sparc/sparc.exp: Likewise. * ld-tic6x/tic6x.exp: Likewise. * ld-tilegx/tilegx.exp: Likewise. * ld-tilepro/tilepro.exp: Likewise. * ld-undefined/entry.exp: Likewise. * ld-vax-elf/vax-elf.exp: Likewise. * ld-x86-64/dwarfreloc.exp: Likewise. * ld-x86-64/export-class.exp: Likewise. * ld-x86-64/x86-64.exp: Likewise. * ld-xc16x/xc16x.exp: Likewise. * ld-xstormy16/xstormy16.exp: Likewise. * ld-xtensa/xtensa.exp: Likewise.
2013-02-19 02:10:06 +01:00
{"Shared library with global symbol" "-shared -melf32ppc" "" "-a32" {sdalib.s}
{} "sdalib.so"}
* lib/ld-lib.exp (run_ld_link_tests): Add another argument, pass its contents to ar_simple_create and ld_simple_link after objfiles. * ld-aarch64/aarch64-elf.exp: Adjust accordingly. * ld-alpha/alpha.exp: Likewise. * ld-arm/arm-elf.exp: Likewise. * ld-arm/export-class.exp: Likewise. * ld-elf/comm-data.exp: Likewise. * ld-elf/eh-group.exp: Likewise. * ld-elf/elf.exp: Likewise. * ld-elf/export-class.exp: Likewise. * ld-elfvers/vers.exp: Likewise. * ld-frv/tls.exp: Likewise. * ld-i386/export-class.exp: Likewise. * ld-i386/i386.exp: Likewise. * ld-ia64/ia64.exp: Likewise. * ld-libs/libs.exp: Likewise. * ld-m68k/m68k.exp: Likewise. * ld-metag/metag.exp: Likewise. * ld-mips-elf/comm-data.exp: Likewise. * ld-mips-elf/export-class.exp: Likewise. * ld-mips-elf/mips-elf.exp: Likewise. * ld-mn10300/mn10300.exp: Likewise. * ld-pe/pe-compile.exp: Likewise. * ld-pe/pe.exp: Likewise. * ld-plugin/plugin.exp: Likewise. * ld-powerpc/aix52.exp: Likewise. * ld-powerpc/export-class.exp: Likewise. * ld-powerpc/powerpc.exp: Likewise. * ld-s390/s390.exp: Likewise. * ld-sh/sh-vxworks.exp: Likewise. * ld-sh/sh64/sh64.exp: Likewise. * ld-sparc/sparc.exp: Likewise. * ld-tic6x/tic6x.exp: Likewise. * ld-tilegx/tilegx.exp: Likewise. * ld-tilepro/tilepro.exp: Likewise. * ld-undefined/entry.exp: Likewise. * ld-vax-elf/vax-elf.exp: Likewise. * ld-x86-64/dwarfreloc.exp: Likewise. * ld-x86-64/export-class.exp: Likewise. * ld-x86-64/x86-64.exp: Likewise. * ld-xc16x/xc16x.exp: Likewise. * ld-xstormy16/xstormy16.exp: Likewise. * ld-xtensa/xtensa.exp: Likewise.
2013-02-19 02:10:06 +01:00
{"Dynamic application with SDA" "-melf32ppc tmpdir/sdalib.so" "" "-a32" {sdadyn.s}
{{objdump -R sdadyn.d}} "sdadyn"}
* lib/ld-lib.exp (run_ld_link_tests): Add another argument, pass its contents to ar_simple_create and ld_simple_link after objfiles. * ld-aarch64/aarch64-elf.exp: Adjust accordingly. * ld-alpha/alpha.exp: Likewise. * ld-arm/arm-elf.exp: Likewise. * ld-arm/export-class.exp: Likewise. * ld-elf/comm-data.exp: Likewise. * ld-elf/eh-group.exp: Likewise. * ld-elf/elf.exp: Likewise. * ld-elf/export-class.exp: Likewise. * ld-elfvers/vers.exp: Likewise. * ld-frv/tls.exp: Likewise. * ld-i386/export-class.exp: Likewise. * ld-i386/i386.exp: Likewise. * ld-ia64/ia64.exp: Likewise. * ld-libs/libs.exp: Likewise. * ld-m68k/m68k.exp: Likewise. * ld-metag/metag.exp: Likewise. * ld-mips-elf/comm-data.exp: Likewise. * ld-mips-elf/export-class.exp: Likewise. * ld-mips-elf/mips-elf.exp: Likewise. * ld-mn10300/mn10300.exp: Likewise. * ld-pe/pe-compile.exp: Likewise. * ld-pe/pe.exp: Likewise. * ld-plugin/plugin.exp: Likewise. * ld-powerpc/aix52.exp: Likewise. * ld-powerpc/export-class.exp: Likewise. * ld-powerpc/powerpc.exp: Likewise. * ld-s390/s390.exp: Likewise. * ld-sh/sh-vxworks.exp: Likewise. * ld-sh/sh64/sh64.exp: Likewise. * ld-sparc/sparc.exp: Likewise. * ld-tic6x/tic6x.exp: Likewise. * ld-tilegx/tilegx.exp: Likewise. * ld-tilepro/tilepro.exp: Likewise. * ld-undefined/entry.exp: Likewise. * ld-vax-elf/vax-elf.exp: Likewise. * ld-x86-64/dwarfreloc.exp: Likewise. * ld-x86-64/export-class.exp: Likewise. * ld-x86-64/x86-64.exp: Likewise. * ld-xc16x/xc16x.exp: Likewise. * ld-xstormy16/xstormy16.exp: Likewise. * ld-xtensa/xtensa.exp: Likewise.
2013-02-19 02:10:06 +01:00
{"relaxing" "-melf32ppc --relax -Ttext=0 --defsym far=0x80001234 --defsym near=0x00004320" "" "-a32" "relax.s"
{{objdump -dr relax.d}}
PowerPC TPREL16_HA/LO reloc optimization In the TLS GD/LD to LE optimization, ld replaces a sequence like addi 3,2,x@got@tlsgd R_PPC64_GOT_TLSGD16 x bl __tls_get_addr(x@tlsgd) R_PPC64_TLSGD x R_PPC64_REL24 __tls_get_addr nop with addis 3,13,x@tprel@ha R_PPC64_TPREL16_HA x addi 3,3,x@tprel@l R_PPC64_TPREL16_LO x nop When the tprel offset is small, this can be further optimized to nop addi 3,13,x@tprel nop bfd/ * elf64-ppc.c (struct ppc_link_hash_table): Add do_tls_opt. (ppc64_elf_tls_optimize): Set it. (ppc64_elf_relocate_section): Nop addis on TPREL16_HA, and convert insn on TPREL16_LO and TPREL16_LO_DS relocs to use r13 when addis would add zero. * elf32-ppc.c (struct ppc_elf_link_hash_table): Add do_tls_opt. (ppc_elf_tls_optimize): Set it. (ppc_elf_relocate_section): Nop addis on TPREL16_HA, and convert insn on TPREL16_LO relocs to use r2 when addis would add zero. gold/ * powerpc.cc (Target_powerpc::Relocate::relocate): Nop addis on TPREL16_HA, and convert insn on TPREL16_LO and TPREL16_LO_DS relocs to use r2/r13 when addis would add zero. ld/ * testsuite/ld-powerpc/tls.s: Add calls with tls markers. * testsuite/ld-powerpc/tls32.s: Likewise. * testsuite/ld-powerpc/powerpc.exp: Run tls marker tests. * testsuite/ld-powerpc/tls.d: Adjust for TPREL16_HA/LO optimization. * testsuite/ld-powerpc/tlsexe.d: Likewise. * testsuite/ld-powerpc/tlsexetoc.d: Likewise. * testsuite/ld-powerpc/tlsld.d: Likewise. * testsuite/ld-powerpc/tlsmark.d: Likewise. * testsuite/ld-powerpc/tlsopt4.d: Likewise. * testsuite/ld-powerpc/tlstoc.d: Likewise.
2017-08-30 13:05:35 +02:00
"relax"}
* lib/ld-lib.exp (run_ld_link_tests): Add another argument, pass its contents to ar_simple_create and ld_simple_link after objfiles. * ld-aarch64/aarch64-elf.exp: Adjust accordingly. * ld-alpha/alpha.exp: Likewise. * ld-arm/arm-elf.exp: Likewise. * ld-arm/export-class.exp: Likewise. * ld-elf/comm-data.exp: Likewise. * ld-elf/eh-group.exp: Likewise. * ld-elf/elf.exp: Likewise. * ld-elf/export-class.exp: Likewise. * ld-elfvers/vers.exp: Likewise. * ld-frv/tls.exp: Likewise. * ld-i386/export-class.exp: Likewise. * ld-i386/i386.exp: Likewise. * ld-ia64/ia64.exp: Likewise. * ld-libs/libs.exp: Likewise. * ld-m68k/m68k.exp: Likewise. * ld-metag/metag.exp: Likewise. * ld-mips-elf/comm-data.exp: Likewise. * ld-mips-elf/export-class.exp: Likewise. * ld-mips-elf/mips-elf.exp: Likewise. * ld-mn10300/mn10300.exp: Likewise. * ld-pe/pe-compile.exp: Likewise. * ld-pe/pe.exp: Likewise. * ld-plugin/plugin.exp: Likewise. * ld-powerpc/aix52.exp: Likewise. * ld-powerpc/export-class.exp: Likewise. * ld-powerpc/powerpc.exp: Likewise. * ld-s390/s390.exp: Likewise. * ld-sh/sh-vxworks.exp: Likewise. * ld-sh/sh64/sh64.exp: Likewise. * ld-sparc/sparc.exp: Likewise. * ld-tic6x/tic6x.exp: Likewise. * ld-tilegx/tilegx.exp: Likewise. * ld-tilepro/tilepro.exp: Likewise. * ld-undefined/entry.exp: Likewise. * ld-vax-elf/vax-elf.exp: Likewise. * ld-x86-64/dwarfreloc.exp: Likewise. * ld-x86-64/export-class.exp: Likewise. * ld-x86-64/x86-64.exp: Likewise. * ld-xc16x/xc16x.exp: Likewise. * ld-xstormy16/xstormy16.exp: Likewise. * ld-xtensa/xtensa.exp: Likewise.
2013-02-19 02:10:06 +01:00
{"relocatable relaxing" "-melf32ppc -r --relax" "" "-a32" "relax.s"
{{objdump -dr relaxr.d}}
PowerPC TPREL16_HA/LO reloc optimization In the TLS GD/LD to LE optimization, ld replaces a sequence like addi 3,2,x@got@tlsgd R_PPC64_GOT_TLSGD16 x bl __tls_get_addr(x@tlsgd) R_PPC64_TLSGD x R_PPC64_REL24 __tls_get_addr nop with addis 3,13,x@tprel@ha R_PPC64_TPREL16_HA x addi 3,3,x@tprel@l R_PPC64_TPREL16_LO x nop When the tprel offset is small, this can be further optimized to nop addi 3,13,x@tprel nop bfd/ * elf64-ppc.c (struct ppc_link_hash_table): Add do_tls_opt. (ppc64_elf_tls_optimize): Set it. (ppc64_elf_relocate_section): Nop addis on TPREL16_HA, and convert insn on TPREL16_LO and TPREL16_LO_DS relocs to use r13 when addis would add zero. * elf32-ppc.c (struct ppc_elf_link_hash_table): Add do_tls_opt. (ppc_elf_tls_optimize): Set it. (ppc_elf_relocate_section): Nop addis on TPREL16_HA, and convert insn on TPREL16_LO relocs to use r2 when addis would add zero. gold/ * powerpc.cc (Target_powerpc::Relocate::relocate): Nop addis on TPREL16_HA, and convert insn on TPREL16_LO and TPREL16_LO_DS relocs to use r2/r13 when addis would add zero. ld/ * testsuite/ld-powerpc/tls.s: Add calls with tls markers. * testsuite/ld-powerpc/tls32.s: Likewise. * testsuite/ld-powerpc/powerpc.exp: Run tls marker tests. * testsuite/ld-powerpc/tls.d: Adjust for TPREL16_HA/LO optimization. * testsuite/ld-powerpc/tlsexe.d: Likewise. * testsuite/ld-powerpc/tlsexetoc.d: Likewise. * testsuite/ld-powerpc/tlsld.d: Likewise. * testsuite/ld-powerpc/tlsmark.d: Likewise. * testsuite/ld-powerpc/tlsopt4.d: Likewise. * testsuite/ld-powerpc/tlstoc.d: Likewise.
2017-08-30 13:05:35 +02:00
"rrelax"}
{"relocatable relaxing large" "-melf32ppc -r --relax" "" "-a32" "relax.s big.s"
{{objdump -dr relaxrl.d}}
"rrelax"}
}
2003-02-04 15:52:11 +01:00
set ppc64elftests {
{"TLS static exec (markers)" "-melf64ppc --no-plt-align" ""
PowerPC TPREL16_HA/LO reloc optimization In the TLS GD/LD to LE optimization, ld replaces a sequence like addi 3,2,x@got@tlsgd R_PPC64_GOT_TLSGD16 x bl __tls_get_addr(x@tlsgd) R_PPC64_TLSGD x R_PPC64_REL24 __tls_get_addr nop with addis 3,13,x@tprel@ha R_PPC64_TPREL16_HA x addi 3,3,x@tprel@l R_PPC64_TPREL16_LO x nop When the tprel offset is small, this can be further optimized to nop addi 3,13,x@tprel nop bfd/ * elf64-ppc.c (struct ppc_link_hash_table): Add do_tls_opt. (ppc64_elf_tls_optimize): Set it. (ppc64_elf_relocate_section): Nop addis on TPREL16_HA, and convert insn on TPREL16_LO and TPREL16_LO_DS relocs to use r13 when addis would add zero. * elf32-ppc.c (struct ppc_elf_link_hash_table): Add do_tls_opt. (ppc_elf_tls_optimize): Set it. (ppc_elf_relocate_section): Nop addis on TPREL16_HA, and convert insn on TPREL16_LO relocs to use r2 when addis would add zero. gold/ * powerpc.cc (Target_powerpc::Relocate::relocate): Nop addis on TPREL16_HA, and convert insn on TPREL16_LO and TPREL16_LO_DS relocs to use r2/r13 when addis would add zero. ld/ * testsuite/ld-powerpc/tls.s: Add calls with tls markers. * testsuite/ld-powerpc/tls32.s: Likewise. * testsuite/ld-powerpc/powerpc.exp: Run tls marker tests. * testsuite/ld-powerpc/tls.d: Adjust for TPREL16_HA/LO optimization. * testsuite/ld-powerpc/tlsexe.d: Likewise. * testsuite/ld-powerpc/tlsexetoc.d: Likewise. * testsuite/ld-powerpc/tlsld.d: Likewise. * testsuite/ld-powerpc/tlsmark.d: Likewise. * testsuite/ld-powerpc/tlsopt4.d: Likewise. * testsuite/ld-powerpc/tlstoc.d: Likewise.
2017-08-30 13:05:35 +02:00
"-a64 --defsym TLSMARK=1" {tls.s tlslib.s}
{{objdump -dr tls.d} {objdump -sj.got tls.g} {objdump -sj.tdata tls.t}}
"tlsm"}
{"TLS static exec" "-melf64ppc --no-plt-align" "" "-a64" {tls.s tlslib.s}
2003-02-04 15:52:11 +01:00
{{objdump -dr tls.d} {objdump -sj.got tls.g} {objdump -sj.tdata tls.t}}
PowerPC TPREL16_HA/LO reloc optimization In the TLS GD/LD to LE optimization, ld replaces a sequence like addi 3,2,x@got@tlsgd R_PPC64_GOT_TLSGD16 x bl __tls_get_addr(x@tlsgd) R_PPC64_TLSGD x R_PPC64_REL24 __tls_get_addr nop with addis 3,13,x@tprel@ha R_PPC64_TPREL16_HA x addi 3,3,x@tprel@l R_PPC64_TPREL16_LO x nop When the tprel offset is small, this can be further optimized to nop addi 3,13,x@tprel nop bfd/ * elf64-ppc.c (struct ppc_link_hash_table): Add do_tls_opt. (ppc64_elf_tls_optimize): Set it. (ppc64_elf_relocate_section): Nop addis on TPREL16_HA, and convert insn on TPREL16_LO and TPREL16_LO_DS relocs to use r13 when addis would add zero. * elf32-ppc.c (struct ppc_elf_link_hash_table): Add do_tls_opt. (ppc_elf_tls_optimize): Set it. (ppc_elf_relocate_section): Nop addis on TPREL16_HA, and convert insn on TPREL16_LO relocs to use r2 when addis would add zero. gold/ * powerpc.cc (Target_powerpc::Relocate::relocate): Nop addis on TPREL16_HA, and convert insn on TPREL16_LO and TPREL16_LO_DS relocs to use r2/r13 when addis would add zero. ld/ * testsuite/ld-powerpc/tls.s: Add calls with tls markers. * testsuite/ld-powerpc/tls32.s: Likewise. * testsuite/ld-powerpc/powerpc.exp: Run tls marker tests. * testsuite/ld-powerpc/tls.d: Adjust for TPREL16_HA/LO optimization. * testsuite/ld-powerpc/tlsexe.d: Likewise. * testsuite/ld-powerpc/tlsexetoc.d: Likewise. * testsuite/ld-powerpc/tlsld.d: Likewise. * testsuite/ld-powerpc/tlsmark.d: Likewise. * testsuite/ld-powerpc/tlsopt4.d: Likewise. * testsuite/ld-powerpc/tlstoc.d: Likewise.
2017-08-30 13:05:35 +02:00
"tls"}
{"TLS static exec (--no-tls-optimize)" "-melf64ppc --no-tls-optimize --no-plt-align" ""
"-a64 --defsym TLSMARK=1" {tls.s tlslib.s}
{{objdump -dr tlsno.d} {objdump -sj.got tlsno.g} {objdump -sj.tdata tls.t}}
"tlsno"}
* lib/ld-lib.exp (run_ld_link_tests): Add another argument, pass its contents to ar_simple_create and ld_simple_link after objfiles. * ld-aarch64/aarch64-elf.exp: Adjust accordingly. * ld-alpha/alpha.exp: Likewise. * ld-arm/arm-elf.exp: Likewise. * ld-arm/export-class.exp: Likewise. * ld-elf/comm-data.exp: Likewise. * ld-elf/eh-group.exp: Likewise. * ld-elf/elf.exp: Likewise. * ld-elf/export-class.exp: Likewise. * ld-elfvers/vers.exp: Likewise. * ld-frv/tls.exp: Likewise. * ld-i386/export-class.exp: Likewise. * ld-i386/i386.exp: Likewise. * ld-ia64/ia64.exp: Likewise. * ld-libs/libs.exp: Likewise. * ld-m68k/m68k.exp: Likewise. * ld-metag/metag.exp: Likewise. * ld-mips-elf/comm-data.exp: Likewise. * ld-mips-elf/export-class.exp: Likewise. * ld-mips-elf/mips-elf.exp: Likewise. * ld-mn10300/mn10300.exp: Likewise. * ld-pe/pe-compile.exp: Likewise. * ld-pe/pe.exp: Likewise. * ld-plugin/plugin.exp: Likewise. * ld-powerpc/aix52.exp: Likewise. * ld-powerpc/export-class.exp: Likewise. * ld-powerpc/powerpc.exp: Likewise. * ld-s390/s390.exp: Likewise. * ld-sh/sh-vxworks.exp: Likewise. * ld-sh/sh64/sh64.exp: Likewise. * ld-sparc/sparc.exp: Likewise. * ld-tic6x/tic6x.exp: Likewise. * ld-tilegx/tilegx.exp: Likewise. * ld-tilepro/tilepro.exp: Likewise. * ld-undefined/entry.exp: Likewise. * ld-vax-elf/vax-elf.exp: Likewise. * ld-x86-64/dwarfreloc.exp: Likewise. * ld-x86-64/export-class.exp: Likewise. * ld-x86-64/x86-64.exp: Likewise. * ld-xc16x/xc16x.exp: Likewise. * ld-xstormy16/xstormy16.exp: Likewise. * ld-xtensa/xtensa.exp: Likewise.
2013-02-19 02:10:06 +01:00
{"TLS helper shared library" "-shared -melf64ppc tmpdir/tlslib.o" "" "" {}
2003-02-04 15:52:11 +01:00
{} "libtlslib.so"}
* lib/ld-lib.exp (run_ld_link_tests): Add another argument, pass its contents to ar_simple_create and ld_simple_link after objfiles. * ld-aarch64/aarch64-elf.exp: Adjust accordingly. * ld-alpha/alpha.exp: Likewise. * ld-arm/arm-elf.exp: Likewise. * ld-arm/export-class.exp: Likewise. * ld-elf/comm-data.exp: Likewise. * ld-elf/eh-group.exp: Likewise. * ld-elf/elf.exp: Likewise. * ld-elf/export-class.exp: Likewise. * ld-elfvers/vers.exp: Likewise. * ld-frv/tls.exp: Likewise. * ld-i386/export-class.exp: Likewise. * ld-i386/i386.exp: Likewise. * ld-ia64/ia64.exp: Likewise. * ld-libs/libs.exp: Likewise. * ld-m68k/m68k.exp: Likewise. * ld-metag/metag.exp: Likewise. * ld-mips-elf/comm-data.exp: Likewise. * ld-mips-elf/export-class.exp: Likewise. * ld-mips-elf/mips-elf.exp: Likewise. * ld-mn10300/mn10300.exp: Likewise. * ld-pe/pe-compile.exp: Likewise. * ld-pe/pe.exp: Likewise. * ld-plugin/plugin.exp: Likewise. * ld-powerpc/aix52.exp: Likewise. * ld-powerpc/export-class.exp: Likewise. * ld-powerpc/powerpc.exp: Likewise. * ld-s390/s390.exp: Likewise. * ld-sh/sh-vxworks.exp: Likewise. * ld-sh/sh64/sh64.exp: Likewise. * ld-sparc/sparc.exp: Likewise. * ld-tic6x/tic6x.exp: Likewise. * ld-tilegx/tilegx.exp: Likewise. * ld-tilepro/tilepro.exp: Likewise. * ld-undefined/entry.exp: Likewise. * ld-vax-elf/vax-elf.exp: Likewise. * ld-x86-64/dwarfreloc.exp: Likewise. * ld-x86-64/export-class.exp: Likewise. * ld-x86-64/x86-64.exp: Likewise. * ld-xc16x/xc16x.exp: Likewise. * ld-xstormy16/xstormy16.exp: Likewise. * ld-xtensa/xtensa.exp: Likewise.
2013-02-19 02:10:06 +01:00
{"TLS helper old shared lib" "-shared -melf64ppc" "" "-a64" {oldtlslib.s}
include/elf/ * ppc.h (DT_PPC_TLSOPT): Define. * ppc64.h (DT_PPC64_TLSOPT): Define. bfd/ * elf32-ppc.c (TLS_GET_ADDR_GLINK_SIZE): Define. (ADD_3_12_2, BEQLR, CMPWI_11_0, LWZ_11_3, LWZ_12_3): Define. (MR_0_3, MR_3_0): Define. (struct ppc_elf_link_hash_table): Add no_tls_get_addr_opt. (ppc_elf_select_plt_layout): Save emit_stub_syms param earlier. (ppc_elf_tls_setup): Add no_tls_get_addr_opt param and save to hash table. Check for presense of __tls_get_addr_opt (allocate_dynrelocs): Increase glink entry size for __tls_get_addr. (ppc_elf_size_dynamic_sections): Add DT_PPC_TLS_OPT tag. (write_glink_stub): Add param p. (ppc_elf_relocate_section): Adjust write_glink_stub call. (ppc_elf_finish_dynamic_symbol): Emit special glink call stub for __tls_get_addr. * elf32-ppc.h (ppc_elf_tls_setup): Update prototype. * elf64-ppc.c (struct ppc_link_hash_table): Add no_tls_get_addr_opt. (ppc64_elf_tls_setup): Add no_tls_get_addr_opt param and save to hash table. Check for presense of __tls_get_addr_opt. (ppc64_elf_size_dynamic_sections): Add DT_PPC64_TLS_OPT tag. (LD_R11_0R3, LD_R12_0R3, MR_R0_R3, CMPDI_R11_0, ADD_R3_R12_R13, BEQLR, MR_R3_R0, MFLR_R11, STD_R11_0R1, BCTRL, LD_R11_0R1, LD_R2_0R1, MTLR_R11): Define. (build_tls_get_addr_stub): New function. (ppc_build_one_stub): Call it. (ppc_size_one_stub): Add extra size for __tls_get_addr stub. (ppc64_elf_relocate_section): Don't change nop to ld 2,40(1) for __tls_get_addr plt call. * elf64-ppc.h (ppc64_elf_tls_setup): Update prototype. binutils/ * readelf.c (get_ppc_dynamic_type): Add TLSOPT. (get_ppc64_dynamic_type): Likewise. ld/ * emultempl/ppc32elf.em (no_tls_get_addr_opt): New var. (ppc_before_allocation): Pass to ppc_elf_tls_setup. (OPTION_NO_TLS_GET_ADDR_OPT): Define. Redefine other options in terms of previous option. (PARSE_AND_LIST_LONGOPTS, PARSE_AND_LIST_OPTIONS): Add --no-tls-get-addr-optimize. (PARSE_AND_LIST_ARGS_CASES): Handle it. * emultempl/ppc64elf.em (no_tls_get_addr_opt): New var. (ppc_before_allocation): Pass to ppc64_elf_tls_setup. (OPTION_NO_TLS_GET_ADDR_OPT): Define. (PARSE_AND_LIST_LONGOPTS, PARSE_AND_LIST_OPTIONS): Add --no-tls-get-addr-optimize. (PARSE_AND_LIST_ARGS_CASES): Handle it. ld/testsuite/ * ld-powerpc/tlslib.s: Delete dot-symbol entry syms. Add __tls_get_addr_opt. * ld-powerpc/tlslib32.s: Add __tls_get_addr_opt. * ld-powerpc/oldtlslib.s: New file, old-abi version of tlslib.s. * ld-powerpc/powerpc.exp: Build old-abi library and use it in two new link tests. * ld-powerpc/tlsexe.d: Update for new __tls_get_addr stub. * ld-powerpc/tlsexe.g, * ld-powerpc/tlsexe.r, *ld-powerpc/tlsexe32.d, * ld-powerpc/tlsexe32.g, * ld-powerpc/tlsexe32.r, * ld-powerpc/tlsexetoc.d, * ld-powerpc/tlsexetoc.g, * ld-powerpc/tlsexetoc.r: Likewise.
2009-09-21 13:51:02 +02:00
{} "liboldlib.so"}
{"TLS dynamic exec" "-melf64ppc --no-plt-align --no-ld-generated-unwind-info --hash-style=sysv tmpdir/tls.o tmpdir/libtlslib.so" "" "" {}
2003-02-04 15:52:11 +01:00
{{readelf -WSsrl tlsexe.r} {objdump -dr tlsexe.d}
{objdump -sj.got tlsexe.g} {objdump -sj.tdata tlsexe.t}}
PowerPC TPREL16_HA/LO reloc optimization In the TLS GD/LD to LE optimization, ld replaces a sequence like addi 3,2,x@got@tlsgd R_PPC64_GOT_TLSGD16 x bl __tls_get_addr(x@tlsgd) R_PPC64_TLSGD x R_PPC64_REL24 __tls_get_addr nop with addis 3,13,x@tprel@ha R_PPC64_TPREL16_HA x addi 3,3,x@tprel@l R_PPC64_TPREL16_LO x nop When the tprel offset is small, this can be further optimized to nop addi 3,13,x@tprel nop bfd/ * elf64-ppc.c (struct ppc_link_hash_table): Add do_tls_opt. (ppc64_elf_tls_optimize): Set it. (ppc64_elf_relocate_section): Nop addis on TPREL16_HA, and convert insn on TPREL16_LO and TPREL16_LO_DS relocs to use r13 when addis would add zero. * elf32-ppc.c (struct ppc_elf_link_hash_table): Add do_tls_opt. (ppc_elf_tls_optimize): Set it. (ppc_elf_relocate_section): Nop addis on TPREL16_HA, and convert insn on TPREL16_LO relocs to use r2 when addis would add zero. gold/ * powerpc.cc (Target_powerpc::Relocate::relocate): Nop addis on TPREL16_HA, and convert insn on TPREL16_LO and TPREL16_LO_DS relocs to use r2/r13 when addis would add zero. ld/ * testsuite/ld-powerpc/tls.s: Add calls with tls markers. * testsuite/ld-powerpc/tls32.s: Likewise. * testsuite/ld-powerpc/powerpc.exp: Run tls marker tests. * testsuite/ld-powerpc/tls.d: Adjust for TPREL16_HA/LO optimization. * testsuite/ld-powerpc/tlsexe.d: Likewise. * testsuite/ld-powerpc/tlsexetoc.d: Likewise. * testsuite/ld-powerpc/tlsld.d: Likewise. * testsuite/ld-powerpc/tlsmark.d: Likewise. * testsuite/ld-powerpc/tlsopt4.d: Likewise. * testsuite/ld-powerpc/tlstoc.d: Likewise.
2017-08-30 13:05:35 +02:00
"tlsexe"}
{"TLS dynamic old" "-melf64ppc --no-plt-align --no-ld-generated-unwind-info --hash-style=sysv tmpdir/tls.o tmpdir/liboldlib.so" "" "" {}
include/elf/ * ppc.h (DT_PPC_TLSOPT): Define. * ppc64.h (DT_PPC64_TLSOPT): Define. bfd/ * elf32-ppc.c (TLS_GET_ADDR_GLINK_SIZE): Define. (ADD_3_12_2, BEQLR, CMPWI_11_0, LWZ_11_3, LWZ_12_3): Define. (MR_0_3, MR_3_0): Define. (struct ppc_elf_link_hash_table): Add no_tls_get_addr_opt. (ppc_elf_select_plt_layout): Save emit_stub_syms param earlier. (ppc_elf_tls_setup): Add no_tls_get_addr_opt param and save to hash table. Check for presense of __tls_get_addr_opt (allocate_dynrelocs): Increase glink entry size for __tls_get_addr. (ppc_elf_size_dynamic_sections): Add DT_PPC_TLS_OPT tag. (write_glink_stub): Add param p. (ppc_elf_relocate_section): Adjust write_glink_stub call. (ppc_elf_finish_dynamic_symbol): Emit special glink call stub for __tls_get_addr. * elf32-ppc.h (ppc_elf_tls_setup): Update prototype. * elf64-ppc.c (struct ppc_link_hash_table): Add no_tls_get_addr_opt. (ppc64_elf_tls_setup): Add no_tls_get_addr_opt param and save to hash table. Check for presense of __tls_get_addr_opt. (ppc64_elf_size_dynamic_sections): Add DT_PPC64_TLS_OPT tag. (LD_R11_0R3, LD_R12_0R3, MR_R0_R3, CMPDI_R11_0, ADD_R3_R12_R13, BEQLR, MR_R3_R0, MFLR_R11, STD_R11_0R1, BCTRL, LD_R11_0R1, LD_R2_0R1, MTLR_R11): Define. (build_tls_get_addr_stub): New function. (ppc_build_one_stub): Call it. (ppc_size_one_stub): Add extra size for __tls_get_addr stub. (ppc64_elf_relocate_section): Don't change nop to ld 2,40(1) for __tls_get_addr plt call. * elf64-ppc.h (ppc64_elf_tls_setup): Update prototype. binutils/ * readelf.c (get_ppc_dynamic_type): Add TLSOPT. (get_ppc64_dynamic_type): Likewise. ld/ * emultempl/ppc32elf.em (no_tls_get_addr_opt): New var. (ppc_before_allocation): Pass to ppc_elf_tls_setup. (OPTION_NO_TLS_GET_ADDR_OPT): Define. Redefine other options in terms of previous option. (PARSE_AND_LIST_LONGOPTS, PARSE_AND_LIST_OPTIONS): Add --no-tls-get-addr-optimize. (PARSE_AND_LIST_ARGS_CASES): Handle it. * emultempl/ppc64elf.em (no_tls_get_addr_opt): New var. (ppc_before_allocation): Pass to ppc64_elf_tls_setup. (OPTION_NO_TLS_GET_ADDR_OPT): Define. (PARSE_AND_LIST_LONGOPTS, PARSE_AND_LIST_OPTIONS): Add --no-tls-get-addr-optimize. (PARSE_AND_LIST_ARGS_CASES): Handle it. ld/testsuite/ * ld-powerpc/tlslib.s: Delete dot-symbol entry syms. Add __tls_get_addr_opt. * ld-powerpc/tlslib32.s: Add __tls_get_addr_opt. * ld-powerpc/oldtlslib.s: New file, old-abi version of tlslib.s. * ld-powerpc/powerpc.exp: Build old-abi library and use it in two new link tests. * ld-powerpc/tlsexe.d: Update for new __tls_get_addr stub. * ld-powerpc/tlsexe.g, * ld-powerpc/tlsexe.r, *ld-powerpc/tlsexe32.d, * ld-powerpc/tlsexe32.g, * ld-powerpc/tlsexe32.r, * ld-powerpc/tlsexetoc.d, * ld-powerpc/tlsexetoc.g, * ld-powerpc/tlsexetoc.r: Likewise.
2009-09-21 13:51:02 +02:00
{{readelf -WSsrl tlsexe.r} {objdump -dr tlsexe.d}
{objdump -sj.got tlsexe.g} {objdump -sj.tdata tlsexe.t}}
PowerPC TPREL16_HA/LO reloc optimization In the TLS GD/LD to LE optimization, ld replaces a sequence like addi 3,2,x@got@tlsgd R_PPC64_GOT_TLSGD16 x bl __tls_get_addr(x@tlsgd) R_PPC64_TLSGD x R_PPC64_REL24 __tls_get_addr nop with addis 3,13,x@tprel@ha R_PPC64_TPREL16_HA x addi 3,3,x@tprel@l R_PPC64_TPREL16_LO x nop When the tprel offset is small, this can be further optimized to nop addi 3,13,x@tprel nop bfd/ * elf64-ppc.c (struct ppc_link_hash_table): Add do_tls_opt. (ppc64_elf_tls_optimize): Set it. (ppc64_elf_relocate_section): Nop addis on TPREL16_HA, and convert insn on TPREL16_LO and TPREL16_LO_DS relocs to use r13 when addis would add zero. * elf32-ppc.c (struct ppc_elf_link_hash_table): Add do_tls_opt. (ppc_elf_tls_optimize): Set it. (ppc_elf_relocate_section): Nop addis on TPREL16_HA, and convert insn on TPREL16_LO relocs to use r2 when addis would add zero. gold/ * powerpc.cc (Target_powerpc::Relocate::relocate): Nop addis on TPREL16_HA, and convert insn on TPREL16_LO and TPREL16_LO_DS relocs to use r2/r13 when addis would add zero. ld/ * testsuite/ld-powerpc/tls.s: Add calls with tls markers. * testsuite/ld-powerpc/tls32.s: Likewise. * testsuite/ld-powerpc/powerpc.exp: Run tls marker tests. * testsuite/ld-powerpc/tls.d: Adjust for TPREL16_HA/LO optimization. * testsuite/ld-powerpc/tlsexe.d: Likewise. * testsuite/ld-powerpc/tlsexetoc.d: Likewise. * testsuite/ld-powerpc/tlsld.d: Likewise. * testsuite/ld-powerpc/tlsmark.d: Likewise. * testsuite/ld-powerpc/tlsopt4.d: Likewise. * testsuite/ld-powerpc/tlstoc.d: Likewise.
2017-08-30 13:05:35 +02:00
"tlsexeold"}
{"TLS dynamic exec (--no-tls-optimize)" "-melf64ppc --no-tls-optimize --no-plt-align --no-ld-generated-unwind-info --hash-style=sysv tmpdir/tls.o tmpdir/libtlslib.so" "" "" {}
{{readelf -WSsrl tlsexeno.r} {objdump -dr tlsexeno.d}
{objdump -sj.got tlsexeno.g} {objdump -sj.tdata tlsexe.t}}
"tlsexeno"}
{"TLS shared" "-shared -melf64ppc --no-plt-align --no-ld-generated-unwind-info --hash-style=sysv tmpdir/tls.o" "" "" {}
2003-02-04 15:52:11 +01:00
{{readelf -WSsrl tlsso.r} {objdump -dr tlsso.d}
{objdump -sj.got tlsso.g} {objdump -sj.tdata tlsso.t}}
PowerPC TPREL16_HA/LO reloc optimization In the TLS GD/LD to LE optimization, ld replaces a sequence like addi 3,2,x@got@tlsgd R_PPC64_GOT_TLSGD16 x bl __tls_get_addr(x@tlsgd) R_PPC64_TLSGD x R_PPC64_REL24 __tls_get_addr nop with addis 3,13,x@tprel@ha R_PPC64_TPREL16_HA x addi 3,3,x@tprel@l R_PPC64_TPREL16_LO x nop When the tprel offset is small, this can be further optimized to nop addi 3,13,x@tprel nop bfd/ * elf64-ppc.c (struct ppc_link_hash_table): Add do_tls_opt. (ppc64_elf_tls_optimize): Set it. (ppc64_elf_relocate_section): Nop addis on TPREL16_HA, and convert insn on TPREL16_LO and TPREL16_LO_DS relocs to use r13 when addis would add zero. * elf32-ppc.c (struct ppc_elf_link_hash_table): Add do_tls_opt. (ppc_elf_tls_optimize): Set it. (ppc_elf_relocate_section): Nop addis on TPREL16_HA, and convert insn on TPREL16_LO relocs to use r2 when addis would add zero. gold/ * powerpc.cc (Target_powerpc::Relocate::relocate): Nop addis on TPREL16_HA, and convert insn on TPREL16_LO and TPREL16_LO_DS relocs to use r2/r13 when addis would add zero. ld/ * testsuite/ld-powerpc/tls.s: Add calls with tls markers. * testsuite/ld-powerpc/tls32.s: Likewise. * testsuite/ld-powerpc/powerpc.exp: Run tls marker tests. * testsuite/ld-powerpc/tls.d: Adjust for TPREL16_HA/LO optimization. * testsuite/ld-powerpc/tlsexe.d: Likewise. * testsuite/ld-powerpc/tlsexetoc.d: Likewise. * testsuite/ld-powerpc/tlsld.d: Likewise. * testsuite/ld-powerpc/tlsmark.d: Likewise. * testsuite/ld-powerpc/tlsopt4.d: Likewise. * testsuite/ld-powerpc/tlstoc.d: Likewise.
2017-08-30 13:05:35 +02:00
"tls.so"}
{"TLSTOC static exec" "-melf64ppc tmpdir/tlslib.o" "" "-a64" {tlstoc.s}
{{objdump -dr tlstoc.d} {objdump -sj.got tlstoc.g}
2003-02-04 15:52:11 +01:00
{objdump -sj.tdata tlstoc.t}}
PowerPC TPREL16_HA/LO reloc optimization In the TLS GD/LD to LE optimization, ld replaces a sequence like addi 3,2,x@got@tlsgd R_PPC64_GOT_TLSGD16 x bl __tls_get_addr(x@tlsgd) R_PPC64_TLSGD x R_PPC64_REL24 __tls_get_addr nop with addis 3,13,x@tprel@ha R_PPC64_TPREL16_HA x addi 3,3,x@tprel@l R_PPC64_TPREL16_LO x nop When the tprel offset is small, this can be further optimized to nop addi 3,13,x@tprel nop bfd/ * elf64-ppc.c (struct ppc_link_hash_table): Add do_tls_opt. (ppc64_elf_tls_optimize): Set it. (ppc64_elf_relocate_section): Nop addis on TPREL16_HA, and convert insn on TPREL16_LO and TPREL16_LO_DS relocs to use r13 when addis would add zero. * elf32-ppc.c (struct ppc_elf_link_hash_table): Add do_tls_opt. (ppc_elf_tls_optimize): Set it. (ppc_elf_relocate_section): Nop addis on TPREL16_HA, and convert insn on TPREL16_LO relocs to use r2 when addis would add zero. gold/ * powerpc.cc (Target_powerpc::Relocate::relocate): Nop addis on TPREL16_HA, and convert insn on TPREL16_LO and TPREL16_LO_DS relocs to use r2/r13 when addis would add zero. ld/ * testsuite/ld-powerpc/tls.s: Add calls with tls markers. * testsuite/ld-powerpc/tls32.s: Likewise. * testsuite/ld-powerpc/powerpc.exp: Run tls marker tests. * testsuite/ld-powerpc/tls.d: Adjust for TPREL16_HA/LO optimization. * testsuite/ld-powerpc/tlsexe.d: Likewise. * testsuite/ld-powerpc/tlsexetoc.d: Likewise. * testsuite/ld-powerpc/tlsld.d: Likewise. * testsuite/ld-powerpc/tlsmark.d: Likewise. * testsuite/ld-powerpc/tlsopt4.d: Likewise. * testsuite/ld-powerpc/tlstoc.d: Likewise.
2017-08-30 13:05:35 +02:00
"tlstoc"}
{"TLSTOC static exec (--no-tls-optimize)" "-melf64ppc --no-tls-optimize tmpdir/tlslib.o tmpdir/tlstoc.o" "" "" {}
{{objdump -dr tlstocno.d} {objdump -sj.got tlstocno.g}
{objdump -sj.tdata tlstoc.t}}
"tlstocno"}
{"TLSTOC dynamic exec" "-melf64ppc --no-plt-align --no-ld-generated-unwind-info --hash-style=sysv tmpdir/tlstoc.o tmpdir/libtlslib.so" ""
2003-02-04 15:52:11 +01:00
"" {}
{{readelf -WSsrl tlsexetoc.r} {objdump -dr tlsexetoc.d}
{objdump -sj.got tlsexetoc.g} {objdump -sj.tdata tlsexetoc.t}}
PowerPC TPREL16_HA/LO reloc optimization In the TLS GD/LD to LE optimization, ld replaces a sequence like addi 3,2,x@got@tlsgd R_PPC64_GOT_TLSGD16 x bl __tls_get_addr(x@tlsgd) R_PPC64_TLSGD x R_PPC64_REL24 __tls_get_addr nop with addis 3,13,x@tprel@ha R_PPC64_TPREL16_HA x addi 3,3,x@tprel@l R_PPC64_TPREL16_LO x nop When the tprel offset is small, this can be further optimized to nop addi 3,13,x@tprel nop bfd/ * elf64-ppc.c (struct ppc_link_hash_table): Add do_tls_opt. (ppc64_elf_tls_optimize): Set it. (ppc64_elf_relocate_section): Nop addis on TPREL16_HA, and convert insn on TPREL16_LO and TPREL16_LO_DS relocs to use r13 when addis would add zero. * elf32-ppc.c (struct ppc_elf_link_hash_table): Add do_tls_opt. (ppc_elf_tls_optimize): Set it. (ppc_elf_relocate_section): Nop addis on TPREL16_HA, and convert insn on TPREL16_LO relocs to use r2 when addis would add zero. gold/ * powerpc.cc (Target_powerpc::Relocate::relocate): Nop addis on TPREL16_HA, and convert insn on TPREL16_LO and TPREL16_LO_DS relocs to use r2/r13 when addis would add zero. ld/ * testsuite/ld-powerpc/tls.s: Add calls with tls markers. * testsuite/ld-powerpc/tls32.s: Likewise. * testsuite/ld-powerpc/powerpc.exp: Run tls marker tests. * testsuite/ld-powerpc/tls.d: Adjust for TPREL16_HA/LO optimization. * testsuite/ld-powerpc/tlsexe.d: Likewise. * testsuite/ld-powerpc/tlsexetoc.d: Likewise. * testsuite/ld-powerpc/tlsld.d: Likewise. * testsuite/ld-powerpc/tlsmark.d: Likewise. * testsuite/ld-powerpc/tlsopt4.d: Likewise. * testsuite/ld-powerpc/tlstoc.d: Likewise.
2017-08-30 13:05:35 +02:00
"tlsexetoc"}
{"TLSTOC dynamic old" "-melf64ppc --no-plt-align --no-ld-generated-unwind-info --hash-style=sysv tmpdir/tlstoc.o tmpdir/liboldlib.so" ""
include/elf/ * ppc.h (DT_PPC_TLSOPT): Define. * ppc64.h (DT_PPC64_TLSOPT): Define. bfd/ * elf32-ppc.c (TLS_GET_ADDR_GLINK_SIZE): Define. (ADD_3_12_2, BEQLR, CMPWI_11_0, LWZ_11_3, LWZ_12_3): Define. (MR_0_3, MR_3_0): Define. (struct ppc_elf_link_hash_table): Add no_tls_get_addr_opt. (ppc_elf_select_plt_layout): Save emit_stub_syms param earlier. (ppc_elf_tls_setup): Add no_tls_get_addr_opt param and save to hash table. Check for presense of __tls_get_addr_opt (allocate_dynrelocs): Increase glink entry size for __tls_get_addr. (ppc_elf_size_dynamic_sections): Add DT_PPC_TLS_OPT tag. (write_glink_stub): Add param p. (ppc_elf_relocate_section): Adjust write_glink_stub call. (ppc_elf_finish_dynamic_symbol): Emit special glink call stub for __tls_get_addr. * elf32-ppc.h (ppc_elf_tls_setup): Update prototype. * elf64-ppc.c (struct ppc_link_hash_table): Add no_tls_get_addr_opt. (ppc64_elf_tls_setup): Add no_tls_get_addr_opt param and save to hash table. Check for presense of __tls_get_addr_opt. (ppc64_elf_size_dynamic_sections): Add DT_PPC64_TLS_OPT tag. (LD_R11_0R3, LD_R12_0R3, MR_R0_R3, CMPDI_R11_0, ADD_R3_R12_R13, BEQLR, MR_R3_R0, MFLR_R11, STD_R11_0R1, BCTRL, LD_R11_0R1, LD_R2_0R1, MTLR_R11): Define. (build_tls_get_addr_stub): New function. (ppc_build_one_stub): Call it. (ppc_size_one_stub): Add extra size for __tls_get_addr stub. (ppc64_elf_relocate_section): Don't change nop to ld 2,40(1) for __tls_get_addr plt call. * elf64-ppc.h (ppc64_elf_tls_setup): Update prototype. binutils/ * readelf.c (get_ppc_dynamic_type): Add TLSOPT. (get_ppc64_dynamic_type): Likewise. ld/ * emultempl/ppc32elf.em (no_tls_get_addr_opt): New var. (ppc_before_allocation): Pass to ppc_elf_tls_setup. (OPTION_NO_TLS_GET_ADDR_OPT): Define. Redefine other options in terms of previous option. (PARSE_AND_LIST_LONGOPTS, PARSE_AND_LIST_OPTIONS): Add --no-tls-get-addr-optimize. (PARSE_AND_LIST_ARGS_CASES): Handle it. * emultempl/ppc64elf.em (no_tls_get_addr_opt): New var. (ppc_before_allocation): Pass to ppc64_elf_tls_setup. (OPTION_NO_TLS_GET_ADDR_OPT): Define. (PARSE_AND_LIST_LONGOPTS, PARSE_AND_LIST_OPTIONS): Add --no-tls-get-addr-optimize. (PARSE_AND_LIST_ARGS_CASES): Handle it. ld/testsuite/ * ld-powerpc/tlslib.s: Delete dot-symbol entry syms. Add __tls_get_addr_opt. * ld-powerpc/tlslib32.s: Add __tls_get_addr_opt. * ld-powerpc/oldtlslib.s: New file, old-abi version of tlslib.s. * ld-powerpc/powerpc.exp: Build old-abi library and use it in two new link tests. * ld-powerpc/tlsexe.d: Update for new __tls_get_addr stub. * ld-powerpc/tlsexe.g, * ld-powerpc/tlsexe.r, *ld-powerpc/tlsexe32.d, * ld-powerpc/tlsexe32.g, * ld-powerpc/tlsexe32.r, * ld-powerpc/tlsexetoc.d, * ld-powerpc/tlsexetoc.g, * ld-powerpc/tlsexetoc.r: Likewise.
2009-09-21 13:51:02 +02:00
"" {}
{{readelf -WSsrl tlsexetoc.r} {objdump -dr tlsexetoc.d}
{objdump -sj.got tlsexetoc.g} {objdump -sj.tdata tlsexetoc.t}}
PowerPC TPREL16_HA/LO reloc optimization In the TLS GD/LD to LE optimization, ld replaces a sequence like addi 3,2,x@got@tlsgd R_PPC64_GOT_TLSGD16 x bl __tls_get_addr(x@tlsgd) R_PPC64_TLSGD x R_PPC64_REL24 __tls_get_addr nop with addis 3,13,x@tprel@ha R_PPC64_TPREL16_HA x addi 3,3,x@tprel@l R_PPC64_TPREL16_LO x nop When the tprel offset is small, this can be further optimized to nop addi 3,13,x@tprel nop bfd/ * elf64-ppc.c (struct ppc_link_hash_table): Add do_tls_opt. (ppc64_elf_tls_optimize): Set it. (ppc64_elf_relocate_section): Nop addis on TPREL16_HA, and convert insn on TPREL16_LO and TPREL16_LO_DS relocs to use r13 when addis would add zero. * elf32-ppc.c (struct ppc_elf_link_hash_table): Add do_tls_opt. (ppc_elf_tls_optimize): Set it. (ppc_elf_relocate_section): Nop addis on TPREL16_HA, and convert insn on TPREL16_LO relocs to use r2 when addis would add zero. gold/ * powerpc.cc (Target_powerpc::Relocate::relocate): Nop addis on TPREL16_HA, and convert insn on TPREL16_LO and TPREL16_LO_DS relocs to use r2/r13 when addis would add zero. ld/ * testsuite/ld-powerpc/tls.s: Add calls with tls markers. * testsuite/ld-powerpc/tls32.s: Likewise. * testsuite/ld-powerpc/powerpc.exp: Run tls marker tests. * testsuite/ld-powerpc/tls.d: Adjust for TPREL16_HA/LO optimization. * testsuite/ld-powerpc/tlsexe.d: Likewise. * testsuite/ld-powerpc/tlsexetoc.d: Likewise. * testsuite/ld-powerpc/tlsld.d: Likewise. * testsuite/ld-powerpc/tlsmark.d: Likewise. * testsuite/ld-powerpc/tlsopt4.d: Likewise. * testsuite/ld-powerpc/tlstoc.d: Likewise.
2017-08-30 13:05:35 +02:00
"tlsexetocold"}
{"TLSTOC dynamic exec (--no-tls-optimize)" "-melf64ppc --no-tls-optimize --no-plt-align --no-ld-generated-unwind-info --hash-style=sysv tmpdir/tlstoc.o tmpdir/libtlslib.so" ""
"" {}
{{readelf -WSsrl tlsexetoc.r} {objdump -dr tlsexetocno.d}
{objdump -sj.got tlsexetocno.g} {objdump -sj.tdata tlsexetoc.t}}
"tlsexetocno"}
{"TLSTOC shared" "-shared -melf64ppc --no-plt-align --no-ld-generated-unwind-info --hash-style=sysv tmpdir/tlstoc.o" "" "" {}
2003-02-04 15:52:11 +01:00
{{readelf -WSsrl tlstocso.r} {objdump -dr tlstocso.d}
{objdump -sj.got tlstocso.g} {objdump -sj.tdata tlstocso.t}}
PowerPC TPREL16_HA/LO reloc optimization In the TLS GD/LD to LE optimization, ld replaces a sequence like addi 3,2,x@got@tlsgd R_PPC64_GOT_TLSGD16 x bl __tls_get_addr(x@tlsgd) R_PPC64_TLSGD x R_PPC64_REL24 __tls_get_addr nop with addis 3,13,x@tprel@ha R_PPC64_TPREL16_HA x addi 3,3,x@tprel@l R_PPC64_TPREL16_LO x nop When the tprel offset is small, this can be further optimized to nop addi 3,13,x@tprel nop bfd/ * elf64-ppc.c (struct ppc_link_hash_table): Add do_tls_opt. (ppc64_elf_tls_optimize): Set it. (ppc64_elf_relocate_section): Nop addis on TPREL16_HA, and convert insn on TPREL16_LO and TPREL16_LO_DS relocs to use r13 when addis would add zero. * elf32-ppc.c (struct ppc_elf_link_hash_table): Add do_tls_opt. (ppc_elf_tls_optimize): Set it. (ppc_elf_relocate_section): Nop addis on TPREL16_HA, and convert insn on TPREL16_LO relocs to use r2 when addis would add zero. gold/ * powerpc.cc (Target_powerpc::Relocate::relocate): Nop addis on TPREL16_HA, and convert insn on TPREL16_LO and TPREL16_LO_DS relocs to use r2/r13 when addis would add zero. ld/ * testsuite/ld-powerpc/tls.s: Add calls with tls markers. * testsuite/ld-powerpc/tls32.s: Likewise. * testsuite/ld-powerpc/powerpc.exp: Run tls marker tests. * testsuite/ld-powerpc/tls.d: Adjust for TPREL16_HA/LO optimization. * testsuite/ld-powerpc/tlsexe.d: Likewise. * testsuite/ld-powerpc/tlsexetoc.d: Likewise. * testsuite/ld-powerpc/tlsld.d: Likewise. * testsuite/ld-powerpc/tlsmark.d: Likewise. * testsuite/ld-powerpc/tlsopt4.d: Likewise. * testsuite/ld-powerpc/tlstoc.d: Likewise.
2017-08-30 13:05:35 +02:00
"tlstoc.so"}
PowerPC64 __tls_get_addr_desc This implements register saving and restoring in the __tls_get_addr call stub, so that when glibc supports the optimized tls call stub gcc can generate code that assumes only r0, r12 and of course r3 are changed on a __tls_get_addr call. When gcc expects __tls_get_addr calls to preserve registers the call will be to __tls_get_addr_desc, which will be translated by the linker to a call to __tls_get_addr_opt. bfd/ * elf64-ppc.h (struct ppc64_elf_params): Add no_tls_get_addr_regsave. * elf64-ppc.c (struct ppc_link_hash_table): Add tga_desc and tga_desc_fd. (is_tls_get_addr): Match tga_desc and tga_desc_df too. (STDU_R1_0R1, ADDI_R1_R1): Define. (tls_get_addr_prologue, tls_get_addr_epilogue): New functions. (ppc64_elf_tls_setup): Set up tga_desc and tga_desc_fd. Indirect tga_desc_fd to opt_fd, and tga_desc to opt. Set no_tls_get_addr_regsave. (branch_reloc_hash_match): Add hash3 and hash4. (ppc64_elf_tls_optimize): Handle tga_desc_fd and tga_desc too. (ppc64_elf_size_dynamic_sections): Likewise. (ppc64_elf_relocate_section): Likewise. (plt_stub_size, build_plt_stub): Likewise. Size regsave __tls_get_addr stub. (build_tls_get_addr_stub): Build regsave __tls_get_addr stub and eh_frame. (ppc_size_one_stub): Handle tga_desc_fd and tga_desc too. Size eh_frame for regsave __tls_get_addr. gas/ * config/tc-ppc.c (parse_tls_arg): Handle tls arg for __tls_get_addr_desc and __tls_get_addr_opt. ld/ * emultempl/ppc64elf.em (ppc64_opt, PARSE_AND_LIST_LONGOPTS), (PARSE_AND_LIST_OPTIONS, PARSE_AND_LIST_ARGS_CASES): Support --tls-get-addr-regsave and --no-tls-get-addr-regsave. (params): Init new field. * ld.texi (--tls-get-addr-regsave, --no-tls-get-addr-regsave): Document. * testsuite/ld-powerpc/tlsdesc.s, * testsuite/ld-powerpc/tlsdesc.d, * testsuite/ld-powerpc/tlsdesc.wf, * testsuite/ld-powerpc/tlsdesc2.d, * testsuite/ld-powerpc/tlsdesc2.wf, * testsuite/ld-powerpc/tlsexenors.d, * testsuite/ld-powerpc/tlsexenors.r, * testsuite/ld-powerpc/tlsexers.d, * testsuite/ld-powerpc/tlsexers.r, * testsuite/ld-powerpc/tlsexetocnors.d, * testsuite/ld-powerpc/tlsexetocrs.d, * testsuite/ld-powerpc/tlsexetocrs.r, * testsuite/ld-powerpc/tlsopt6.d, * testsuite/ld-powerpc/tlsopt6.wf: New. * testsuite/ld-powerpc/powerpc.exp: Run new tests.
2020-01-20 03:08:00 +01:00
{"TLS dynamic exec (--tls-get-addr-regsave)" "-melf64ppc --no-plt-align --no-ld-generated-unwind-info --hash-style=sysv --tls-get-addr-regsave tmpdir/tls.o tmpdir/libtlslib.so" "" "" {}
{{readelf -WSsrl tlsexers.r} {objdump -dr tlsexers.d}
{objdump -sj.got tlsexe.g} {objdump -sj.tdata tlsexe.t}}
"tlsexers"}
{"TLS dynamic exec (--no-tls-optimize --tls-get-addr-regsave)" "-melf64ppc --no-tls-optimize --tls-get-addr-regsave --no-plt-align --no-ld-generated-unwind-info --hash-style=sysv tmpdir/tls.o tmpdir/libtlslib.so" "" "" {}
{{readelf -WSsrl tlsexenors.r} {objdump -dr tlsexenors.d}
{objdump -sj.got tlsexeno.g} {objdump -sj.tdata tlsexe.t}}
"tlsexenors"}
{"TLSTOC dynamic exec (--tls-get-addr-regsave)" "-melf64ppc --tls-get-addr-regsave --no-plt-align --no-ld-generated-unwind-info --hash-style=sysv tmpdir/tlstoc.o tmpdir/libtlslib.so" ""
"" {}
{{readelf -WSsrl tlsexetocrs.r} {objdump -dr tlsexetocrs.d}
{objdump -sj.got tlsexetoc.g} {objdump -sj.tdata tlsexetoc.t}}
"tlsexetocrs"}
{"TLSTOC dynamic exec (--no-tls-optimize --tls-get-addr-regsave)" "-melf64ppc --no-tls-optimize --tls-get-addr-regsave --no-plt-align --no-ld-generated-unwind-info --hash-style=sysv tmpdir/tlstoc.o tmpdir/libtlslib.so" ""
"" {}
{{readelf -WSsrl tlsexetocrs.r} {objdump -dr tlsexetocnors.d}
{objdump -sj.got tlsexetocno.g} {objdump -sj.tdata tlsexetoc.t}}
"tlsexetocnors"}
* lib/ld-lib.exp (run_ld_link_tests): Add another argument, pass its contents to ar_simple_create and ld_simple_link after objfiles. * ld-aarch64/aarch64-elf.exp: Adjust accordingly. * ld-alpha/alpha.exp: Likewise. * ld-arm/arm-elf.exp: Likewise. * ld-arm/export-class.exp: Likewise. * ld-elf/comm-data.exp: Likewise. * ld-elf/eh-group.exp: Likewise. * ld-elf/elf.exp: Likewise. * ld-elf/export-class.exp: Likewise. * ld-elfvers/vers.exp: Likewise. * ld-frv/tls.exp: Likewise. * ld-i386/export-class.exp: Likewise. * ld-i386/i386.exp: Likewise. * ld-ia64/ia64.exp: Likewise. * ld-libs/libs.exp: Likewise. * ld-m68k/m68k.exp: Likewise. * ld-metag/metag.exp: Likewise. * ld-mips-elf/comm-data.exp: Likewise. * ld-mips-elf/export-class.exp: Likewise. * ld-mips-elf/mips-elf.exp: Likewise. * ld-mn10300/mn10300.exp: Likewise. * ld-pe/pe-compile.exp: Likewise. * ld-pe/pe.exp: Likewise. * ld-plugin/plugin.exp: Likewise. * ld-powerpc/aix52.exp: Likewise. * ld-powerpc/export-class.exp: Likewise. * ld-powerpc/powerpc.exp: Likewise. * ld-s390/s390.exp: Likewise. * ld-sh/sh-vxworks.exp: Likewise. * ld-sh/sh64/sh64.exp: Likewise. * ld-sparc/sparc.exp: Likewise. * ld-tic6x/tic6x.exp: Likewise. * ld-tilegx/tilegx.exp: Likewise. * ld-tilepro/tilepro.exp: Likewise. * ld-undefined/entry.exp: Likewise. * ld-vax-elf/vax-elf.exp: Likewise. * ld-x86-64/dwarfreloc.exp: Likewise. * ld-x86-64/export-class.exp: Likewise. * ld-x86-64/x86-64.exp: Likewise. * ld-xc16x/xc16x.exp: Likewise. * ld-xstormy16/xstormy16.exp: Likewise. * ld-xtensa/xtensa.exp: Likewise.
2013-02-19 02:10:06 +01:00
{"TLS markers" "-melf64ppc" "" "-a64" {tlsmark.s tlslib.s}
include/elf/ * ppc.h (R_PPC_TLSGD, R_PPC_TLSLD): Add new relocs. * ppc64.h (R_PPC64_TLSGD, R_PPC64_TLSLD): Add new relocs. bfd/ * reloc.c (BFD_RELOC_PPC_TLSGD, BFD_RELOC_PPC_TLSLD): New. * section.c (struct bfd_section): Add has_tls_get_addr_call. (BFD_FAKE_SECTION): Init new flag. * ecoff.c (bfd_debug_section): Likewise. * bfd-in2.h: Regenerate. * libbfd.h: Regenerate. * elf32-ppc.c (ppc_elf_howto_raw): Add R_PPC_TLSGD and R_PPC_TLSLD. (ppc_elf_reloc_type_lookup): Handle new relocs. (ppc_elf_check_relocs): Set has_tls_get_addr_call on finding such without marker relocs. (ppc_elf_tls_optimize): Allow out-of-order __tls_get_addr relocs if section has no old-style calls. (ppc_elf_relocate_section): Set tls_mask for non-tls relocs too. Don't try to optimize new-style __tls_get_addr call when handling arg setup relocs. Instead do so for R_PPC_TLSGD and R_PPC_TLSLD relocs. * elf64-ppc.c (ppc64_elf_howto_raw): Add R_PPC64_TLSGD, R_PPC64_TLSLD. (ppc64_elf_reloc_type_lookup): Handle new relocs. (ppc64_elf_check_relocs): Set has_tls_get_addr_call on finding such without marker relocs. (ppc64_elf_tls_optimize): Allow out-of-order __tls_get_addr relocs if section has no old-style calls. Set toc_ref for new relocs as appropriate. (ppc64_elf_relocate_section): Set tls_mask for non-tls relocs too. Don't try to optimize new-style __tls_get_addr call when handling arg setup relocs. Instead do so for R_PPC_TLSGD and R_PPC_TLSLD relocs. gas/ * config/tc-ppc.c (ppc_elf_suffix): Error if ppc32 tls got relocs have non-zero addend. (md_assemble): Parse args of __tls_get_addr calls. (md_apply_fix): Handle BFD_RELOC_PPC_TLSGD and BFD_RELOC_PPC_TLSLD. ld/testsuite/ * ld-powerpc/tlsmark.s, * ld-powerpc/tlsmark.d: New test. * ld-powerpc/tlsmark32.s, * ld-powerpc/tlsmark32.d: New test. * ld-powerpc/powerpc.exp: Run them.
2009-03-04 06:50:50 +01:00
{{objdump -dr tlsmark.d}}
PowerPC TPREL16_HA/LO reloc optimization In the TLS GD/LD to LE optimization, ld replaces a sequence like addi 3,2,x@got@tlsgd R_PPC64_GOT_TLSGD16 x bl __tls_get_addr(x@tlsgd) R_PPC64_TLSGD x R_PPC64_REL24 __tls_get_addr nop with addis 3,13,x@tprel@ha R_PPC64_TPREL16_HA x addi 3,3,x@tprel@l R_PPC64_TPREL16_LO x nop When the tprel offset is small, this can be further optimized to nop addi 3,13,x@tprel nop bfd/ * elf64-ppc.c (struct ppc_link_hash_table): Add do_tls_opt. (ppc64_elf_tls_optimize): Set it. (ppc64_elf_relocate_section): Nop addis on TPREL16_HA, and convert insn on TPREL16_LO and TPREL16_LO_DS relocs to use r13 when addis would add zero. * elf32-ppc.c (struct ppc_elf_link_hash_table): Add do_tls_opt. (ppc_elf_tls_optimize): Set it. (ppc_elf_relocate_section): Nop addis on TPREL16_HA, and convert insn on TPREL16_LO relocs to use r2 when addis would add zero. gold/ * powerpc.cc (Target_powerpc::Relocate::relocate): Nop addis on TPREL16_HA, and convert insn on TPREL16_LO and TPREL16_LO_DS relocs to use r2/r13 when addis would add zero. ld/ * testsuite/ld-powerpc/tls.s: Add calls with tls markers. * testsuite/ld-powerpc/tls32.s: Likewise. * testsuite/ld-powerpc/powerpc.exp: Run tls marker tests. * testsuite/ld-powerpc/tls.d: Adjust for TPREL16_HA/LO optimization. * testsuite/ld-powerpc/tlsexe.d: Likewise. * testsuite/ld-powerpc/tlsexetoc.d: Likewise. * testsuite/ld-powerpc/tlsld.d: Likewise. * testsuite/ld-powerpc/tlsmark.d: Likewise. * testsuite/ld-powerpc/tlsopt4.d: Likewise. * testsuite/ld-powerpc/tlstoc.d: Likewise.
2017-08-30 13:05:35 +02:00
"tlsmark"}
* lib/ld-lib.exp (run_ld_link_tests): Add another argument, pass its contents to ar_simple_create and ld_simple_link after objfiles. * ld-aarch64/aarch64-elf.exp: Adjust accordingly. * ld-alpha/alpha.exp: Likewise. * ld-arm/arm-elf.exp: Likewise. * ld-arm/export-class.exp: Likewise. * ld-elf/comm-data.exp: Likewise. * ld-elf/eh-group.exp: Likewise. * ld-elf/elf.exp: Likewise. * ld-elf/export-class.exp: Likewise. * ld-elfvers/vers.exp: Likewise. * ld-frv/tls.exp: Likewise. * ld-i386/export-class.exp: Likewise. * ld-i386/i386.exp: Likewise. * ld-ia64/ia64.exp: Likewise. * ld-libs/libs.exp: Likewise. * ld-m68k/m68k.exp: Likewise. * ld-metag/metag.exp: Likewise. * ld-mips-elf/comm-data.exp: Likewise. * ld-mips-elf/export-class.exp: Likewise. * ld-mips-elf/mips-elf.exp: Likewise. * ld-mn10300/mn10300.exp: Likewise. * ld-pe/pe-compile.exp: Likewise. * ld-pe/pe.exp: Likewise. * ld-plugin/plugin.exp: Likewise. * ld-powerpc/aix52.exp: Likewise. * ld-powerpc/export-class.exp: Likewise. * ld-powerpc/powerpc.exp: Likewise. * ld-s390/s390.exp: Likewise. * ld-sh/sh-vxworks.exp: Likewise. * ld-sh/sh64/sh64.exp: Likewise. * ld-sparc/sparc.exp: Likewise. * ld-tic6x/tic6x.exp: Likewise. * ld-tilegx/tilegx.exp: Likewise. * ld-tilepro/tilepro.exp: Likewise. * ld-undefined/entry.exp: Likewise. * ld-vax-elf/vax-elf.exp: Likewise. * ld-x86-64/dwarfreloc.exp: Likewise. * ld-x86-64/export-class.exp: Likewise. * ld-x86-64/x86-64.exp: Likewise. * ld-xc16x/xc16x.exp: Likewise. * ld-xstormy16/xstormy16.exp: Likewise. * ld-xtensa/xtensa.exp: Likewise.
2013-02-19 02:10:06 +01:00
{"TLS opt 1" "-melf64ppc" "" "-a64" {tlsopt1.s tlslib.s}
{{objdump -dr tlsopt1.d}}
PowerPC TPREL16_HA/LO reloc optimization In the TLS GD/LD to LE optimization, ld replaces a sequence like addi 3,2,x@got@tlsgd R_PPC64_GOT_TLSGD16 x bl __tls_get_addr(x@tlsgd) R_PPC64_TLSGD x R_PPC64_REL24 __tls_get_addr nop with addis 3,13,x@tprel@ha R_PPC64_TPREL16_HA x addi 3,3,x@tprel@l R_PPC64_TPREL16_LO x nop When the tprel offset is small, this can be further optimized to nop addi 3,13,x@tprel nop bfd/ * elf64-ppc.c (struct ppc_link_hash_table): Add do_tls_opt. (ppc64_elf_tls_optimize): Set it. (ppc64_elf_relocate_section): Nop addis on TPREL16_HA, and convert insn on TPREL16_LO and TPREL16_LO_DS relocs to use r13 when addis would add zero. * elf32-ppc.c (struct ppc_elf_link_hash_table): Add do_tls_opt. (ppc_elf_tls_optimize): Set it. (ppc_elf_relocate_section): Nop addis on TPREL16_HA, and convert insn on TPREL16_LO relocs to use r2 when addis would add zero. gold/ * powerpc.cc (Target_powerpc::Relocate::relocate): Nop addis on TPREL16_HA, and convert insn on TPREL16_LO and TPREL16_LO_DS relocs to use r2/r13 when addis would add zero. ld/ * testsuite/ld-powerpc/tls.s: Add calls with tls markers. * testsuite/ld-powerpc/tls32.s: Likewise. * testsuite/ld-powerpc/powerpc.exp: Run tls marker tests. * testsuite/ld-powerpc/tls.d: Adjust for TPREL16_HA/LO optimization. * testsuite/ld-powerpc/tlsexe.d: Likewise. * testsuite/ld-powerpc/tlsexetoc.d: Likewise. * testsuite/ld-powerpc/tlsld.d: Likewise. * testsuite/ld-powerpc/tlsmark.d: Likewise. * testsuite/ld-powerpc/tlsopt4.d: Likewise. * testsuite/ld-powerpc/tlstoc.d: Likewise.
2017-08-30 13:05:35 +02:00
"tlsopt1"}
* lib/ld-lib.exp (run_ld_link_tests): Add another argument, pass its contents to ar_simple_create and ld_simple_link after objfiles. * ld-aarch64/aarch64-elf.exp: Adjust accordingly. * ld-alpha/alpha.exp: Likewise. * ld-arm/arm-elf.exp: Likewise. * ld-arm/export-class.exp: Likewise. * ld-elf/comm-data.exp: Likewise. * ld-elf/eh-group.exp: Likewise. * ld-elf/elf.exp: Likewise. * ld-elf/export-class.exp: Likewise. * ld-elfvers/vers.exp: Likewise. * ld-frv/tls.exp: Likewise. * ld-i386/export-class.exp: Likewise. * ld-i386/i386.exp: Likewise. * ld-ia64/ia64.exp: Likewise. * ld-libs/libs.exp: Likewise. * ld-m68k/m68k.exp: Likewise. * ld-metag/metag.exp: Likewise. * ld-mips-elf/comm-data.exp: Likewise. * ld-mips-elf/export-class.exp: Likewise. * ld-mips-elf/mips-elf.exp: Likewise. * ld-mn10300/mn10300.exp: Likewise. * ld-pe/pe-compile.exp: Likewise. * ld-pe/pe.exp: Likewise. * ld-plugin/plugin.exp: Likewise. * ld-powerpc/aix52.exp: Likewise. * ld-powerpc/export-class.exp: Likewise. * ld-powerpc/powerpc.exp: Likewise. * ld-s390/s390.exp: Likewise. * ld-sh/sh-vxworks.exp: Likewise. * ld-sh/sh64/sh64.exp: Likewise. * ld-sparc/sparc.exp: Likewise. * ld-tic6x/tic6x.exp: Likewise. * ld-tilegx/tilegx.exp: Likewise. * ld-tilepro/tilepro.exp: Likewise. * ld-undefined/entry.exp: Likewise. * ld-vax-elf/vax-elf.exp: Likewise. * ld-x86-64/dwarfreloc.exp: Likewise. * ld-x86-64/export-class.exp: Likewise. * ld-x86-64/x86-64.exp: Likewise. * ld-xc16x/xc16x.exp: Likewise. * ld-xstormy16/xstormy16.exp: Likewise. * ld-xtensa/xtensa.exp: Likewise.
2013-02-19 02:10:06 +01:00
{"TLS opt 2" "-melf64ppc" "" "-a64" {tlsopt2.s tlslib.s}
{{objdump -dr tlsopt2.d}}
PowerPC TPREL16_HA/LO reloc optimization In the TLS GD/LD to LE optimization, ld replaces a sequence like addi 3,2,x@got@tlsgd R_PPC64_GOT_TLSGD16 x bl __tls_get_addr(x@tlsgd) R_PPC64_TLSGD x R_PPC64_REL24 __tls_get_addr nop with addis 3,13,x@tprel@ha R_PPC64_TPREL16_HA x addi 3,3,x@tprel@l R_PPC64_TPREL16_LO x nop When the tprel offset is small, this can be further optimized to nop addi 3,13,x@tprel nop bfd/ * elf64-ppc.c (struct ppc_link_hash_table): Add do_tls_opt. (ppc64_elf_tls_optimize): Set it. (ppc64_elf_relocate_section): Nop addis on TPREL16_HA, and convert insn on TPREL16_LO and TPREL16_LO_DS relocs to use r13 when addis would add zero. * elf32-ppc.c (struct ppc_elf_link_hash_table): Add do_tls_opt. (ppc_elf_tls_optimize): Set it. (ppc_elf_relocate_section): Nop addis on TPREL16_HA, and convert insn on TPREL16_LO relocs to use r2 when addis would add zero. gold/ * powerpc.cc (Target_powerpc::Relocate::relocate): Nop addis on TPREL16_HA, and convert insn on TPREL16_LO and TPREL16_LO_DS relocs to use r2/r13 when addis would add zero. ld/ * testsuite/ld-powerpc/tls.s: Add calls with tls markers. * testsuite/ld-powerpc/tls32.s: Likewise. * testsuite/ld-powerpc/powerpc.exp: Run tls marker tests. * testsuite/ld-powerpc/tls.d: Adjust for TPREL16_HA/LO optimization. * testsuite/ld-powerpc/tlsexe.d: Likewise. * testsuite/ld-powerpc/tlsexetoc.d: Likewise. * testsuite/ld-powerpc/tlsld.d: Likewise. * testsuite/ld-powerpc/tlsmark.d: Likewise. * testsuite/ld-powerpc/tlsopt4.d: Likewise. * testsuite/ld-powerpc/tlstoc.d: Likewise.
2017-08-30 13:05:35 +02:00
"tlsopt2"}
* lib/ld-lib.exp (run_ld_link_tests): Add another argument, pass its contents to ar_simple_create and ld_simple_link after objfiles. * ld-aarch64/aarch64-elf.exp: Adjust accordingly. * ld-alpha/alpha.exp: Likewise. * ld-arm/arm-elf.exp: Likewise. * ld-arm/export-class.exp: Likewise. * ld-elf/comm-data.exp: Likewise. * ld-elf/eh-group.exp: Likewise. * ld-elf/elf.exp: Likewise. * ld-elf/export-class.exp: Likewise. * ld-elfvers/vers.exp: Likewise. * ld-frv/tls.exp: Likewise. * ld-i386/export-class.exp: Likewise. * ld-i386/i386.exp: Likewise. * ld-ia64/ia64.exp: Likewise. * ld-libs/libs.exp: Likewise. * ld-m68k/m68k.exp: Likewise. * ld-metag/metag.exp: Likewise. * ld-mips-elf/comm-data.exp: Likewise. * ld-mips-elf/export-class.exp: Likewise. * ld-mips-elf/mips-elf.exp: Likewise. * ld-mn10300/mn10300.exp: Likewise. * ld-pe/pe-compile.exp: Likewise. * ld-pe/pe.exp: Likewise. * ld-plugin/plugin.exp: Likewise. * ld-powerpc/aix52.exp: Likewise. * ld-powerpc/export-class.exp: Likewise. * ld-powerpc/powerpc.exp: Likewise. * ld-s390/s390.exp: Likewise. * ld-sh/sh-vxworks.exp: Likewise. * ld-sh/sh64/sh64.exp: Likewise. * ld-sparc/sparc.exp: Likewise. * ld-tic6x/tic6x.exp: Likewise. * ld-tilegx/tilegx.exp: Likewise. * ld-tilepro/tilepro.exp: Likewise. * ld-undefined/entry.exp: Likewise. * ld-vax-elf/vax-elf.exp: Likewise. * ld-x86-64/dwarfreloc.exp: Likewise. * ld-x86-64/export-class.exp: Likewise. * ld-x86-64/x86-64.exp: Likewise. * ld-xc16x/xc16x.exp: Likewise. * ld-xstormy16/xstormy16.exp: Likewise. * ld-xtensa/xtensa.exp: Likewise.
2013-02-19 02:10:06 +01:00
{"TLS opt 3" "-melf64ppc" "" "-a64" {tlsopt3.s tlslib.s}
{{objdump -dr tlsopt3.d}}
PowerPC TPREL16_HA/LO reloc optimization In the TLS GD/LD to LE optimization, ld replaces a sequence like addi 3,2,x@got@tlsgd R_PPC64_GOT_TLSGD16 x bl __tls_get_addr(x@tlsgd) R_PPC64_TLSGD x R_PPC64_REL24 __tls_get_addr nop with addis 3,13,x@tprel@ha R_PPC64_TPREL16_HA x addi 3,3,x@tprel@l R_PPC64_TPREL16_LO x nop When the tprel offset is small, this can be further optimized to nop addi 3,13,x@tprel nop bfd/ * elf64-ppc.c (struct ppc_link_hash_table): Add do_tls_opt. (ppc64_elf_tls_optimize): Set it. (ppc64_elf_relocate_section): Nop addis on TPREL16_HA, and convert insn on TPREL16_LO and TPREL16_LO_DS relocs to use r13 when addis would add zero. * elf32-ppc.c (struct ppc_elf_link_hash_table): Add do_tls_opt. (ppc_elf_tls_optimize): Set it. (ppc_elf_relocate_section): Nop addis on TPREL16_HA, and convert insn on TPREL16_LO relocs to use r2 when addis would add zero. gold/ * powerpc.cc (Target_powerpc::Relocate::relocate): Nop addis on TPREL16_HA, and convert insn on TPREL16_LO and TPREL16_LO_DS relocs to use r2/r13 when addis would add zero. ld/ * testsuite/ld-powerpc/tls.s: Add calls with tls markers. * testsuite/ld-powerpc/tls32.s: Likewise. * testsuite/ld-powerpc/powerpc.exp: Run tls marker tests. * testsuite/ld-powerpc/tls.d: Adjust for TPREL16_HA/LO optimization. * testsuite/ld-powerpc/tlsexe.d: Likewise. * testsuite/ld-powerpc/tlsexetoc.d: Likewise. * testsuite/ld-powerpc/tlsld.d: Likewise. * testsuite/ld-powerpc/tlsmark.d: Likewise. * testsuite/ld-powerpc/tlsopt4.d: Likewise. * testsuite/ld-powerpc/tlstoc.d: Likewise.
2017-08-30 13:05:35 +02:00
"tlsopt3"}
* lib/ld-lib.exp (run_ld_link_tests): Add another argument, pass its contents to ar_simple_create and ld_simple_link after objfiles. * ld-aarch64/aarch64-elf.exp: Adjust accordingly. * ld-alpha/alpha.exp: Likewise. * ld-arm/arm-elf.exp: Likewise. * ld-arm/export-class.exp: Likewise. * ld-elf/comm-data.exp: Likewise. * ld-elf/eh-group.exp: Likewise. * ld-elf/elf.exp: Likewise. * ld-elf/export-class.exp: Likewise. * ld-elfvers/vers.exp: Likewise. * ld-frv/tls.exp: Likewise. * ld-i386/export-class.exp: Likewise. * ld-i386/i386.exp: Likewise. * ld-ia64/ia64.exp: Likewise. * ld-libs/libs.exp: Likewise. * ld-m68k/m68k.exp: Likewise. * ld-metag/metag.exp: Likewise. * ld-mips-elf/comm-data.exp: Likewise. * ld-mips-elf/export-class.exp: Likewise. * ld-mips-elf/mips-elf.exp: Likewise. * ld-mn10300/mn10300.exp: Likewise. * ld-pe/pe-compile.exp: Likewise. * ld-pe/pe.exp: Likewise. * ld-plugin/plugin.exp: Likewise. * ld-powerpc/aix52.exp: Likewise. * ld-powerpc/export-class.exp: Likewise. * ld-powerpc/powerpc.exp: Likewise. * ld-s390/s390.exp: Likewise. * ld-sh/sh-vxworks.exp: Likewise. * ld-sh/sh64/sh64.exp: Likewise. * ld-sparc/sparc.exp: Likewise. * ld-tic6x/tic6x.exp: Likewise. * ld-tilegx/tilegx.exp: Likewise. * ld-tilepro/tilepro.exp: Likewise. * ld-undefined/entry.exp: Likewise. * ld-vax-elf/vax-elf.exp: Likewise. * ld-x86-64/dwarfreloc.exp: Likewise. * ld-x86-64/export-class.exp: Likewise. * ld-x86-64/x86-64.exp: Likewise. * ld-xc16x/xc16x.exp: Likewise. * ld-xstormy16/xstormy16.exp: Likewise. * ld-xtensa/xtensa.exp: Likewise.
2013-02-19 02:10:06 +01:00
{"TLS opt 4" "-melf64ppc" "" "-a64" {tlsopt4.s tlslib.s}
{{objdump -dr tlsopt4.d}}
PowerPC TPREL16_HA/LO reloc optimization In the TLS GD/LD to LE optimization, ld replaces a sequence like addi 3,2,x@got@tlsgd R_PPC64_GOT_TLSGD16 x bl __tls_get_addr(x@tlsgd) R_PPC64_TLSGD x R_PPC64_REL24 __tls_get_addr nop with addis 3,13,x@tprel@ha R_PPC64_TPREL16_HA x addi 3,3,x@tprel@l R_PPC64_TPREL16_LO x nop When the tprel offset is small, this can be further optimized to nop addi 3,13,x@tprel nop bfd/ * elf64-ppc.c (struct ppc_link_hash_table): Add do_tls_opt. (ppc64_elf_tls_optimize): Set it. (ppc64_elf_relocate_section): Nop addis on TPREL16_HA, and convert insn on TPREL16_LO and TPREL16_LO_DS relocs to use r13 when addis would add zero. * elf32-ppc.c (struct ppc_elf_link_hash_table): Add do_tls_opt. (ppc_elf_tls_optimize): Set it. (ppc_elf_relocate_section): Nop addis on TPREL16_HA, and convert insn on TPREL16_LO relocs to use r2 when addis would add zero. gold/ * powerpc.cc (Target_powerpc::Relocate::relocate): Nop addis on TPREL16_HA, and convert insn on TPREL16_LO and TPREL16_LO_DS relocs to use r2/r13 when addis would add zero. ld/ * testsuite/ld-powerpc/tls.s: Add calls with tls markers. * testsuite/ld-powerpc/tls32.s: Likewise. * testsuite/ld-powerpc/powerpc.exp: Run tls marker tests. * testsuite/ld-powerpc/tls.d: Adjust for TPREL16_HA/LO optimization. * testsuite/ld-powerpc/tlsexe.d: Likewise. * testsuite/ld-powerpc/tlsexetoc.d: Likewise. * testsuite/ld-powerpc/tlsld.d: Likewise. * testsuite/ld-powerpc/tlsmark.d: Likewise. * testsuite/ld-powerpc/tlsopt4.d: Likewise. * testsuite/ld-powerpc/tlstoc.d: Likewise.
2017-08-30 13:05:35 +02:00
"tlsopt4"}
{"TLS DLL" "-shared -melf64ppc --version-script tlsdll.ver" "" "-a64" {tlsdll.s}
{} "tlsdll.so"}
{"TLS opt 5" "-melf64ppc -shared --hash-style=both --gc-sections --no-plt-localentry tmpdir/tlsdll.so" "" "-a64" {tlsopt5.s}
{{objdump -dr tlsopt5.d} {readelf -wf tlsopt5.wf}}
PowerPC TPREL16_HA/LO reloc optimization In the TLS GD/LD to LE optimization, ld replaces a sequence like addi 3,2,x@got@tlsgd R_PPC64_GOT_TLSGD16 x bl __tls_get_addr(x@tlsgd) R_PPC64_TLSGD x R_PPC64_REL24 __tls_get_addr nop with addis 3,13,x@tprel@ha R_PPC64_TPREL16_HA x addi 3,3,x@tprel@l R_PPC64_TPREL16_LO x nop When the tprel offset is small, this can be further optimized to nop addi 3,13,x@tprel nop bfd/ * elf64-ppc.c (struct ppc_link_hash_table): Add do_tls_opt. (ppc64_elf_tls_optimize): Set it. (ppc64_elf_relocate_section): Nop addis on TPREL16_HA, and convert insn on TPREL16_LO and TPREL16_LO_DS relocs to use r13 when addis would add zero. * elf32-ppc.c (struct ppc_elf_link_hash_table): Add do_tls_opt. (ppc_elf_tls_optimize): Set it. (ppc_elf_relocate_section): Nop addis on TPREL16_HA, and convert insn on TPREL16_LO relocs to use r2 when addis would add zero. gold/ * powerpc.cc (Target_powerpc::Relocate::relocate): Nop addis on TPREL16_HA, and convert insn on TPREL16_LO and TPREL16_LO_DS relocs to use r2/r13 when addis would add zero. ld/ * testsuite/ld-powerpc/tls.s: Add calls with tls markers. * testsuite/ld-powerpc/tls32.s: Likewise. * testsuite/ld-powerpc/powerpc.exp: Run tls marker tests. * testsuite/ld-powerpc/tls.d: Adjust for TPREL16_HA/LO optimization. * testsuite/ld-powerpc/tlsexe.d: Likewise. * testsuite/ld-powerpc/tlsexetoc.d: Likewise. * testsuite/ld-powerpc/tlsld.d: Likewise. * testsuite/ld-powerpc/tlsmark.d: Likewise. * testsuite/ld-powerpc/tlsopt4.d: Likewise. * testsuite/ld-powerpc/tlstoc.d: Likewise.
2017-08-30 13:05:35 +02:00
"tlsopt5"}
PowerPC64 __tls_get_addr_desc This implements register saving and restoring in the __tls_get_addr call stub, so that when glibc supports the optimized tls call stub gcc can generate code that assumes only r0, r12 and of course r3 are changed on a __tls_get_addr call. When gcc expects __tls_get_addr calls to preserve registers the call will be to __tls_get_addr_desc, which will be translated by the linker to a call to __tls_get_addr_opt. bfd/ * elf64-ppc.h (struct ppc64_elf_params): Add no_tls_get_addr_regsave. * elf64-ppc.c (struct ppc_link_hash_table): Add tga_desc and tga_desc_fd. (is_tls_get_addr): Match tga_desc and tga_desc_df too. (STDU_R1_0R1, ADDI_R1_R1): Define. (tls_get_addr_prologue, tls_get_addr_epilogue): New functions. (ppc64_elf_tls_setup): Set up tga_desc and tga_desc_fd. Indirect tga_desc_fd to opt_fd, and tga_desc to opt. Set no_tls_get_addr_regsave. (branch_reloc_hash_match): Add hash3 and hash4. (ppc64_elf_tls_optimize): Handle tga_desc_fd and tga_desc too. (ppc64_elf_size_dynamic_sections): Likewise. (ppc64_elf_relocate_section): Likewise. (plt_stub_size, build_plt_stub): Likewise. Size regsave __tls_get_addr stub. (build_tls_get_addr_stub): Build regsave __tls_get_addr stub and eh_frame. (ppc_size_one_stub): Handle tga_desc_fd and tga_desc too. Size eh_frame for regsave __tls_get_addr. gas/ * config/tc-ppc.c (parse_tls_arg): Handle tls arg for __tls_get_addr_desc and __tls_get_addr_opt. ld/ * emultempl/ppc64elf.em (ppc64_opt, PARSE_AND_LIST_LONGOPTS), (PARSE_AND_LIST_OPTIONS, PARSE_AND_LIST_ARGS_CASES): Support --tls-get-addr-regsave and --no-tls-get-addr-regsave. (params): Init new field. * ld.texi (--tls-get-addr-regsave, --no-tls-get-addr-regsave): Document. * testsuite/ld-powerpc/tlsdesc.s, * testsuite/ld-powerpc/tlsdesc.d, * testsuite/ld-powerpc/tlsdesc.wf, * testsuite/ld-powerpc/tlsdesc2.d, * testsuite/ld-powerpc/tlsdesc2.wf, * testsuite/ld-powerpc/tlsexenors.d, * testsuite/ld-powerpc/tlsexenors.r, * testsuite/ld-powerpc/tlsexers.d, * testsuite/ld-powerpc/tlsexers.r, * testsuite/ld-powerpc/tlsexetocnors.d, * testsuite/ld-powerpc/tlsexetocrs.d, * testsuite/ld-powerpc/tlsexetocrs.r, * testsuite/ld-powerpc/tlsopt6.d, * testsuite/ld-powerpc/tlsopt6.wf: New. * testsuite/ld-powerpc/powerpc.exp: Run new tests.
2020-01-20 03:08:00 +01:00
{"TLS opt 6" "-melf64ppc -shared --hash-style=both --gc-sections --no-plt-localentry --tls-get-addr-regsave tmpdir/tlsdll.so" "" "-a64" {tlsopt5.s}
{{objdump -dr tlsopt6.d} {readelf -wf tlsopt6.wf}}
"tlsopt6"}
{"TLSdesc" "-melf64ppc -shared --hash-style=both --no-plt-localentry tmpdir/libtlslib.so" "" "-a64" {tlsdesc.s}
{{objdump -dr tlsdesc.d} {readelf -wf tlsdesc.wf}}
"tlsdesc"}
{"TLSdesc2" "-melf64ppc -shared --hash-style=both --no-plt-localentry tmpdir/tlsdll.so" "" "-a64" {tlsdesc.s}
{{objdump -dr tlsdesc2.d} {readelf -wf tlsdesc2.wf}}
"tlsdesc2"}
{"TLSdesc3" "-melf64ppc --no-tls-optimize tmpdir/tlsdll.o" "" "-a64" {tlsdesc.s}
{{objdump -dr tlsdesc3.d} {readelf -wf tlsdesc3.wf}}
"tlsdesc3"}
{"TLSdesc4" "-melf64ppc --no-tls-optimize tmpdir/tlsdll.o" "" "-a64" {tlsdesc4.s}
{{objdump -dr tlsdesc4.d} {readelf -wf tlsdesc4.wf}}
"tlsdesc4"}
* lib/ld-lib.exp (run_ld_link_tests): Add another argument, pass its contents to ar_simple_create and ld_simple_link after objfiles. * ld-aarch64/aarch64-elf.exp: Adjust accordingly. * ld-alpha/alpha.exp: Likewise. * ld-arm/arm-elf.exp: Likewise. * ld-arm/export-class.exp: Likewise. * ld-elf/comm-data.exp: Likewise. * ld-elf/eh-group.exp: Likewise. * ld-elf/elf.exp: Likewise. * ld-elf/export-class.exp: Likewise. * ld-elfvers/vers.exp: Likewise. * ld-frv/tls.exp: Likewise. * ld-i386/export-class.exp: Likewise. * ld-i386/i386.exp: Likewise. * ld-ia64/ia64.exp: Likewise. * ld-libs/libs.exp: Likewise. * ld-m68k/m68k.exp: Likewise. * ld-metag/metag.exp: Likewise. * ld-mips-elf/comm-data.exp: Likewise. * ld-mips-elf/export-class.exp: Likewise. * ld-mips-elf/mips-elf.exp: Likewise. * ld-mn10300/mn10300.exp: Likewise. * ld-pe/pe-compile.exp: Likewise. * ld-pe/pe.exp: Likewise. * ld-plugin/plugin.exp: Likewise. * ld-powerpc/aix52.exp: Likewise. * ld-powerpc/export-class.exp: Likewise. * ld-powerpc/powerpc.exp: Likewise. * ld-s390/s390.exp: Likewise. * ld-sh/sh-vxworks.exp: Likewise. * ld-sh/sh64/sh64.exp: Likewise. * ld-sparc/sparc.exp: Likewise. * ld-tic6x/tic6x.exp: Likewise. * ld-tilegx/tilegx.exp: Likewise. * ld-tilepro/tilepro.exp: Likewise. * ld-undefined/entry.exp: Likewise. * ld-vax-elf/vax-elf.exp: Likewise. * ld-x86-64/dwarfreloc.exp: Likewise. * ld-x86-64/export-class.exp: Likewise. * ld-x86-64/x86-64.exp: Likewise. * ld-xc16x/xc16x.exp: Likewise. * ld-xstormy16/xstormy16.exp: Likewise. * ld-xtensa/xtensa.exp: Likewise.
2013-02-19 02:10:06 +01:00
{"sym@tocbase" "-shared -melf64ppc" "" "-a64" {symtocbase-1.s symtocbase-2.s}
{{objdump -dj.data symtocbase.d}} "symtocbase.so"}
* lib/ld-lib.exp (run_ld_link_tests): Add another argument, pass its contents to ar_simple_create and ld_simple_link after objfiles. * ld-aarch64/aarch64-elf.exp: Adjust accordingly. * ld-alpha/alpha.exp: Likewise. * ld-arm/arm-elf.exp: Likewise. * ld-arm/export-class.exp: Likewise. * ld-elf/comm-data.exp: Likewise. * ld-elf/eh-group.exp: Likewise. * ld-elf/elf.exp: Likewise. * ld-elf/export-class.exp: Likewise. * ld-elfvers/vers.exp: Likewise. * ld-frv/tls.exp: Likewise. * ld-i386/export-class.exp: Likewise. * ld-i386/i386.exp: Likewise. * ld-ia64/ia64.exp: Likewise. * ld-libs/libs.exp: Likewise. * ld-m68k/m68k.exp: Likewise. * ld-metag/metag.exp: Likewise. * ld-mips-elf/comm-data.exp: Likewise. * ld-mips-elf/export-class.exp: Likewise. * ld-mips-elf/mips-elf.exp: Likewise. * ld-mn10300/mn10300.exp: Likewise. * ld-pe/pe-compile.exp: Likewise. * ld-pe/pe.exp: Likewise. * ld-plugin/plugin.exp: Likewise. * ld-powerpc/aix52.exp: Likewise. * ld-powerpc/export-class.exp: Likewise. * ld-powerpc/powerpc.exp: Likewise. * ld-s390/s390.exp: Likewise. * ld-sh/sh-vxworks.exp: Likewise. * ld-sh/sh64/sh64.exp: Likewise. * ld-sparc/sparc.exp: Likewise. * ld-tic6x/tic6x.exp: Likewise. * ld-tilegx/tilegx.exp: Likewise. * ld-tilepro/tilepro.exp: Likewise. * ld-undefined/entry.exp: Likewise. * ld-vax-elf/vax-elf.exp: Likewise. * ld-x86-64/dwarfreloc.exp: Likewise. * ld-x86-64/export-class.exp: Likewise. * ld-x86-64/x86-64.exp: Likewise. * ld-xc16x/xc16x.exp: Likewise. * ld-xstormy16/xstormy16.exp: Likewise. * ld-xtensa/xtensa.exp: Likewise.
2013-02-19 02:10:06 +01:00
{"TOC opt" "-melf64ppc" "" "-a64" {tocopt.s}
{{ld tocopt.out} {objdump -s tocopt.d}} "tocopt"}
* lib/ld-lib.exp (run_ld_link_tests): Add another argument, pass its contents to ar_simple_create and ld_simple_link after objfiles. * ld-aarch64/aarch64-elf.exp: Adjust accordingly. * ld-alpha/alpha.exp: Likewise. * ld-arm/arm-elf.exp: Likewise. * ld-arm/export-class.exp: Likewise. * ld-elf/comm-data.exp: Likewise. * ld-elf/eh-group.exp: Likewise. * ld-elf/elf.exp: Likewise. * ld-elf/export-class.exp: Likewise. * ld-elfvers/vers.exp: Likewise. * ld-frv/tls.exp: Likewise. * ld-i386/export-class.exp: Likewise. * ld-i386/i386.exp: Likewise. * ld-ia64/ia64.exp: Likewise. * ld-libs/libs.exp: Likewise. * ld-m68k/m68k.exp: Likewise. * ld-metag/metag.exp: Likewise. * ld-mips-elf/comm-data.exp: Likewise. * ld-mips-elf/export-class.exp: Likewise. * ld-mips-elf/mips-elf.exp: Likewise. * ld-mn10300/mn10300.exp: Likewise. * ld-pe/pe-compile.exp: Likewise. * ld-pe/pe.exp: Likewise. * ld-plugin/plugin.exp: Likewise. * ld-powerpc/aix52.exp: Likewise. * ld-powerpc/export-class.exp: Likewise. * ld-powerpc/powerpc.exp: Likewise. * ld-s390/s390.exp: Likewise. * ld-sh/sh-vxworks.exp: Likewise. * ld-sh/sh64/sh64.exp: Likewise. * ld-sparc/sparc.exp: Likewise. * ld-tic6x/tic6x.exp: Likewise. * ld-tilegx/tilegx.exp: Likewise. * ld-tilepro/tilepro.exp: Likewise. * ld-undefined/entry.exp: Likewise. * ld-vax-elf/vax-elf.exp: Likewise. * ld-x86-64/dwarfreloc.exp: Likewise. * ld-x86-64/export-class.exp: Likewise. * ld-x86-64/x86-64.exp: Likewise. * ld-xc16x/xc16x.exp: Likewise. * ld-xstormy16/xstormy16.exp: Likewise. * ld-xtensa/xtensa.exp: Likewise.
2013-02-19 02:10:06 +01:00
{"TOC opt2" "-melf64ppc --defsym x=2" "" "-a64" {tocopt2.s}
{{ld tocopt2.out} {objdump -s tocopt2.d}} "tocopt2"}
* lib/ld-lib.exp (run_ld_link_tests): Add another argument, pass its contents to ar_simple_create and ld_simple_link after objfiles. * ld-aarch64/aarch64-elf.exp: Adjust accordingly. * ld-alpha/alpha.exp: Likewise. * ld-arm/arm-elf.exp: Likewise. * ld-arm/export-class.exp: Likewise. * ld-elf/comm-data.exp: Likewise. * ld-elf/eh-group.exp: Likewise. * ld-elf/elf.exp: Likewise. * ld-elf/export-class.exp: Likewise. * ld-elfvers/vers.exp: Likewise. * ld-frv/tls.exp: Likewise. * ld-i386/export-class.exp: Likewise. * ld-i386/i386.exp: Likewise. * ld-ia64/ia64.exp: Likewise. * ld-libs/libs.exp: Likewise. * ld-m68k/m68k.exp: Likewise. * ld-metag/metag.exp: Likewise. * ld-mips-elf/comm-data.exp: Likewise. * ld-mips-elf/export-class.exp: Likewise. * ld-mips-elf/mips-elf.exp: Likewise. * ld-mn10300/mn10300.exp: Likewise. * ld-pe/pe-compile.exp: Likewise. * ld-pe/pe.exp: Likewise. * ld-plugin/plugin.exp: Likewise. * ld-powerpc/aix52.exp: Likewise. * ld-powerpc/export-class.exp: Likewise. * ld-powerpc/powerpc.exp: Likewise. * ld-s390/s390.exp: Likewise. * ld-sh/sh-vxworks.exp: Likewise. * ld-sh/sh64/sh64.exp: Likewise. * ld-sparc/sparc.exp: Likewise. * ld-tic6x/tic6x.exp: Likewise. * ld-tilegx/tilegx.exp: Likewise. * ld-tilepro/tilepro.exp: Likewise. * ld-undefined/entry.exp: Likewise. * ld-vax-elf/vax-elf.exp: Likewise. * ld-x86-64/dwarfreloc.exp: Likewise. * ld-x86-64/export-class.exp: Likewise. * ld-x86-64/x86-64.exp: Likewise. * ld-xc16x/xc16x.exp: Likewise. * ld-xstormy16/xstormy16.exp: Likewise. * ld-xtensa/xtensa.exp: Likewise.
2013-02-19 02:10:06 +01:00
{"TOC opt3" "-melf64ppc -no-keep-memory --defsym x=2" "" "-a64" {tocopt3.s}
{{objdump -s tocopt3.d}} "tocopt3"}
* lib/ld-lib.exp (run_ld_link_tests): Add another argument, pass its contents to ar_simple_create and ld_simple_link after objfiles. * ld-aarch64/aarch64-elf.exp: Adjust accordingly. * ld-alpha/alpha.exp: Likewise. * ld-arm/arm-elf.exp: Likewise. * ld-arm/export-class.exp: Likewise. * ld-elf/comm-data.exp: Likewise. * ld-elf/eh-group.exp: Likewise. * ld-elf/elf.exp: Likewise. * ld-elf/export-class.exp: Likewise. * ld-elfvers/vers.exp: Likewise. * ld-frv/tls.exp: Likewise. * ld-i386/export-class.exp: Likewise. * ld-i386/i386.exp: Likewise. * ld-ia64/ia64.exp: Likewise. * ld-libs/libs.exp: Likewise. * ld-m68k/m68k.exp: Likewise. * ld-metag/metag.exp: Likewise. * ld-mips-elf/comm-data.exp: Likewise. * ld-mips-elf/export-class.exp: Likewise. * ld-mips-elf/mips-elf.exp: Likewise. * ld-mn10300/mn10300.exp: Likewise. * ld-pe/pe-compile.exp: Likewise. * ld-pe/pe.exp: Likewise. * ld-plugin/plugin.exp: Likewise. * ld-powerpc/aix52.exp: Likewise. * ld-powerpc/export-class.exp: Likewise. * ld-powerpc/powerpc.exp: Likewise. * ld-s390/s390.exp: Likewise. * ld-sh/sh-vxworks.exp: Likewise. * ld-sh/sh64/sh64.exp: Likewise. * ld-sparc/sparc.exp: Likewise. * ld-tic6x/tic6x.exp: Likewise. * ld-tilegx/tilegx.exp: Likewise. * ld-tilepro/tilepro.exp: Likewise. * ld-undefined/entry.exp: Likewise. * ld-vax-elf/vax-elf.exp: Likewise. * ld-x86-64/dwarfreloc.exp: Likewise. * ld-x86-64/export-class.exp: Likewise. * ld-x86-64/x86-64.exp: Likewise. * ld-xc16x/xc16x.exp: Likewise. * ld-xstormy16/xstormy16.exp: Likewise. * ld-xtensa/xtensa.exp: Likewise.
2013-02-19 02:10:06 +01:00
{"TOC opt4" "-melf64ppc -no-keep-memory --defsym x=2" "" "-a64"
{tocopt4a.s tocopt4b.s} {{objdump -s tocopt4.d}} "tocopt4"}
* lib/ld-lib.exp (run_ld_link_tests): Add another argument, pass its contents to ar_simple_create and ld_simple_link after objfiles. * ld-aarch64/aarch64-elf.exp: Adjust accordingly. * ld-alpha/alpha.exp: Likewise. * ld-arm/arm-elf.exp: Likewise. * ld-arm/export-class.exp: Likewise. * ld-elf/comm-data.exp: Likewise. * ld-elf/eh-group.exp: Likewise. * ld-elf/elf.exp: Likewise. * ld-elf/export-class.exp: Likewise. * ld-elfvers/vers.exp: Likewise. * ld-frv/tls.exp: Likewise. * ld-i386/export-class.exp: Likewise. * ld-i386/i386.exp: Likewise. * ld-ia64/ia64.exp: Likewise. * ld-libs/libs.exp: Likewise. * ld-m68k/m68k.exp: Likewise. * ld-metag/metag.exp: Likewise. * ld-mips-elf/comm-data.exp: Likewise. * ld-mips-elf/export-class.exp: Likewise. * ld-mips-elf/mips-elf.exp: Likewise. * ld-mn10300/mn10300.exp: Likewise. * ld-pe/pe-compile.exp: Likewise. * ld-pe/pe.exp: Likewise. * ld-plugin/plugin.exp: Likewise. * ld-powerpc/aix52.exp: Likewise. * ld-powerpc/export-class.exp: Likewise. * ld-powerpc/powerpc.exp: Likewise. * ld-s390/s390.exp: Likewise. * ld-sh/sh-vxworks.exp: Likewise. * ld-sh/sh64/sh64.exp: Likewise. * ld-sparc/sparc.exp: Likewise. * ld-tic6x/tic6x.exp: Likewise. * ld-tilegx/tilegx.exp: Likewise. * ld-tilepro/tilepro.exp: Likewise. * ld-undefined/entry.exp: Likewise. * ld-vax-elf/vax-elf.exp: Likewise. * ld-x86-64/dwarfreloc.exp: Likewise. * ld-x86-64/export-class.exp: Likewise. * ld-x86-64/x86-64.exp: Likewise. * ld-xc16x/xc16x.exp: Likewise. * ld-xstormy16/xstormy16.exp: Likewise. * ld-xtensa/xtensa.exp: Likewise.
2013-02-19 02:10:06 +01:00
{"TOC opt5" "-melf64ppc" "" "-a64" {tocopt5.s}
{{objdump -s tocopt5.d}} "tocopt5"}
{"TOC opt6" "-melf64ppc" "" "-a64" {tocopt6a.s tocopt6b.s tocopt6c.s}
{{objdump -d tocopt6.d}} "tocopt6"}
{"TOC opt7" "-melf64ppc" "" "-a64 -mpower9" {tocopt7.s}
{{ld tocopt7.out} {objdump -s tocopt7.d}} "tocopt7"}
{"TOC opt8" "-melf64ppc" "" "-a64 -mpower9" {tocopt8.s}
{{objdump -s tocopt8.d}} "tocopt8"}
{"tocsave lib" "-shared -melf64ppc" "" "-a64" {tocsavelib.s}
{} "tocsavelib.so"}
{"tocsave1 shared" "-melf64ppc" "tmpdir/tocsavelib.so" "-a64" {tocsave1.s}
{{objdump -dr tocsave1s.d}} "tocsave1s"}
{"tocsave1 static" "-melf64ppc" "tmpdir/tocsavelib.o" "-a64" {tocsave1.s}
{{objdump -dr tocsave1a.d}} "tocsave1a"}
{"tocsave2 shared" "-melf64ppc" "tmpdir/tocsavelib.so" "-a64" {tocsave2.s}
{{objdump -dr tocsave2s.d}} "tocsave2s"}
{"tocsave2 static" "-melf64ppc" "tmpdir/tocsavelib.o" "-a64" {tocsave2.s}
{{objdump -dr tocsave2a.d}} "tocsave2a"}
{"ambig shared v1" "-shared -melf64ppc" "" "-a64" {funv1.s} {} "funv1.so"}
{"ambig shared v2" "-shared -melf64ppc" "" "-a64" {funv2.s} {} "funv2.so"}
PowerPC64 EH info for _notoc linkage stubs This patch generates EH info for the new _notoc linkage stubs, to support unwinding from asynchronous signal handlers. Unwinding through the __tls_get_addr_opt stub was already supported, but that was just a single stub. With multiple stubs the EH opcodes need to be emitted and sized when iterating over stubs, so this is done when emitting and sizing the stub code. Emitting the CIEs and FDEs is done when sizing the stubs, as we did before in order to have the linker generated FDEs indexed in .eh_frame_hdr. I moved the final tweaks to FDEs from ppc64_elf_finish_dynamic_sections to ppc64_elf_build_stubs simply because it's tidier to be done with them at that point. bfd/ * elf64-ppc.c (struct map_stub): Delete tls_get_addr_opt_bctrl. Add lr_restore, eh_size and eh_base. (eh_advance, eh_advance_size): New functions. (build_tls_get_addr_stub): Emit EH info for stub. (ppc_build_one_stub): Likewise for _notoc stubs. (ppc_size_one_stub): Size EH info for stub. (group_sections): Init new map_stub fields. (stub_eh_frame_size): Delete. (ppc64_elf_size_stubs): Size EH info for stubs. Set up dummy EH program for stubs. (ppc64_elf_build_stubs): Reinit new map_stub fields. Set FDE offset to stub section here.. (ppc64_elf_finish_dynamic_sections): ..rather than here. ld/ * testsuite/ld-powerpc/notoc.s: Generate some cfi. * testsuite/ld-powerpc/notoc.d: Adjust. * testsuite/ld-powerpc/notoc.wf: New file. * testsuite/ld-powerpc/powerpc.exp: Run "ext" and "notoc" tests as run_ld_link_tests rather than run_dump_test.
2018-08-06 14:13:51 +02:00
{"notoc ext" "" "" "-a64" {ext.s} {} ""}
Power10 stub selection This patch better supports mixing of power10 and non-power10 code, as might be seen in a cpu-optimized library using ifuncs to select functions optimized for a given cpu. Using -Wl,--no-power10-stubs isn't that good in this situation since non-power10 notoc stubs are slower and larger than the power10 variants, which you'd like to use on power10 code paths. With this change, power10 pc-relative code that makes calls marked @notoc uses power10 stubs if stubs are necessary, and other calls use non-power10 instructions in stubs. This will mean that if gcc is generating code for -mcpu=power10 but with pc-rel disabled then you'll get the older stubs even on power10 (unless you force with -Wl,--power10-stubs). That shouldn't be too big a problem: stubs that use r2 are reasonable. It's just the ones that set up addressing using "mflr 12; bcl 20,31,.+4; mflr 11; mtlr 12" that should be avoided if possible. bfd/ * elf64-ppc.c (struct ppc_link_hash_table): Add has_power10_relocs. (select_alt_stub): New function. (ppc_get_stub_entry): Use it here. (ppc64_elf_check_relocs): Set had_power10_relocs rather than power10_stubs. (ppc64_elf_size_stubs): Clear power10_stubs here instead. Don't merge notoc stubs with other varieties when power10_stubs is "auto". Instead dup the stub hash table entry. (plt_stub_size, ppc_build_one_stub, ppc_size_one_stub): Adjust tests of power10_stubs. ld/ * emultempl/ppc64elf.em (power10-stubs): Accept optional "auto" arg. * ld.texi (power10-stubs): Update. * testsuite/ld-powerpc/callstub-1.d: Force --power10-stubs. * testsuite/ld-powerpc/callstub-2.d: Relax branch offset comparison. * testsuite/ld-powerpc/callstub-4.d: New test. * testsuite/ld-powerpc/notoc.d: Force --no-power10-stubs. * testsuite/ld-powerpc/notoc3.d, * testsuite/ld-powerpc/notoc3.s, * testsuite/ld-powerpc/notoc3.wf: New test. * testsuite/ld-powerpc/powerpc.exp: Run new tests. Pass --no-power10-stubs for notoc link. (cherry picked from commit e10a07b32dc1faed25b5bbcbbc47d68e2ff537b9)
2020-07-17 09:17:28 +02:00
{"notoc" "-melf64ppc --no-plt-localentry --no-power10-stubs -T ext.lnk"
"" "-a64" {notoc.s}
PowerPC64 EH info for _notoc linkage stubs This patch generates EH info for the new _notoc linkage stubs, to support unwinding from asynchronous signal handlers. Unwinding through the __tls_get_addr_opt stub was already supported, but that was just a single stub. With multiple stubs the EH opcodes need to be emitted and sized when iterating over stubs, so this is done when emitting and sizing the stub code. Emitting the CIEs and FDEs is done when sizing the stubs, as we did before in order to have the linker generated FDEs indexed in .eh_frame_hdr. I moved the final tweaks to FDEs from ppc64_elf_finish_dynamic_sections to ppc64_elf_build_stubs simply because it's tidier to be done with them at that point. bfd/ * elf64-ppc.c (struct map_stub): Delete tls_get_addr_opt_bctrl. Add lr_restore, eh_size and eh_base. (eh_advance, eh_advance_size): New functions. (build_tls_get_addr_stub): Emit EH info for stub. (ppc_build_one_stub): Likewise for _notoc stubs. (ppc_size_one_stub): Size EH info for stub. (group_sections): Init new map_stub fields. (stub_eh_frame_size): Delete. (ppc64_elf_size_stubs): Size EH info for stubs. Set up dummy EH program for stubs. (ppc64_elf_build_stubs): Reinit new map_stub fields. Set FDE offset to stub section here.. (ppc64_elf_finish_dynamic_sections): ..rather than here. ld/ * testsuite/ld-powerpc/notoc.s: Generate some cfi. * testsuite/ld-powerpc/notoc.d: Adjust. * testsuite/ld-powerpc/notoc.wf: New file. * testsuite/ld-powerpc/powerpc.exp: Run "ext" and "notoc" tests as run_ld_link_tests rather than run_dump_test.
2018-08-06 14:13:51 +02:00
{{objdump -d notoc.d} {readelf {-wf -W} notoc.wf}} "notoc"}
{"notoc2" "-melf64ppc -shared" "" "-a64 -mpower10" {notoc2.s}
{{objdump {-d -Mpower10} notoc2.d}} "notoc2"}
Power10 stub selection This patch better supports mixing of power10 and non-power10 code, as might be seen in a cpu-optimized library using ifuncs to select functions optimized for a given cpu. Using -Wl,--no-power10-stubs isn't that good in this situation since non-power10 notoc stubs are slower and larger than the power10 variants, which you'd like to use on power10 code paths. With this change, power10 pc-relative code that makes calls marked @notoc uses power10 stubs if stubs are necessary, and other calls use non-power10 instructions in stubs. This will mean that if gcc is generating code for -mcpu=power10 but with pc-rel disabled then you'll get the older stubs even on power10 (unless you force with -Wl,--power10-stubs). That shouldn't be too big a problem: stubs that use r2 are reasonable. It's just the ones that set up addressing using "mflr 12; bcl 20,31,.+4; mflr 11; mtlr 12" that should be avoided if possible. bfd/ * elf64-ppc.c (struct ppc_link_hash_table): Add has_power10_relocs. (select_alt_stub): New function. (ppc_get_stub_entry): Use it here. (ppc64_elf_check_relocs): Set had_power10_relocs rather than power10_stubs. (ppc64_elf_size_stubs): Clear power10_stubs here instead. Don't merge notoc stubs with other varieties when power10_stubs is "auto". Instead dup the stub hash table entry. (plt_stub_size, ppc_build_one_stub, ppc_size_one_stub): Adjust tests of power10_stubs. ld/ * emultempl/ppc64elf.em (power10-stubs): Accept optional "auto" arg. * ld.texi (power10-stubs): Update. * testsuite/ld-powerpc/callstub-1.d: Force --power10-stubs. * testsuite/ld-powerpc/callstub-2.d: Relax branch offset comparison. * testsuite/ld-powerpc/callstub-4.d: New test. * testsuite/ld-powerpc/notoc.d: Force --no-power10-stubs. * testsuite/ld-powerpc/notoc3.d, * testsuite/ld-powerpc/notoc3.s, * testsuite/ld-powerpc/notoc3.wf: New test. * testsuite/ld-powerpc/powerpc.exp: Run new tests. Pass --no-power10-stubs for notoc link. (cherry picked from commit e10a07b32dc1faed25b5bbcbbc47d68e2ff537b9)
2020-07-17 09:17:28 +02:00
{"notoc3" "-melf64ppc --no-plt-localentry -T ext.lnk" ""
"-a64 -mpower10" {notoc3.s}
{{objdump -d notoc3.d} {readelf {-wf -W} notoc3.wf}} "notoc3"}
{"pcrelopt" "-melf64ppc --hash-style=gnu" "tmpdir/symtocbase.so"
"-a64 -mpower10" {pcrelopt.s}
{{objdump {-d -Mpower10} pcrelopt.d}
{readelf {-S --wide} pcrelopt.sec}} "pcrelopt" }
2003-02-04 15:52:11 +01:00
}
Add support for PowerPC VLE. 2012-05-14 Catherine Moore <clm@codesourcery.com> * NEWS: Mention PowerPC VLE port. 2012-05-14 James Lemke <jwlemke@codesourcery.com> Catherine Moore <clm@codesourcery.com> bfd/ * bfd.c (bfd_lookup_section_flags): Add section parm. * ecoff.c (bfd_debug_section): Remove flag_info initializer. * elf-bfd.h (bfd_elf_section_data): Move in section_flag_info. (bfd_elf_lookup_section_flags): Add section parm. * elf32-ppc.c (is_ppc_vle): New function. (ppc_elf_modify_segment_map): New function. (elf_backend_modify_segment_map): Define. (has_vle_insns): New define. * elf32-ppc.h (ppc_elf_modify_segment_map): Declare. * elflink.c (bfd_elf_lookup_section_flags): Add return value & parm. Move in logic to omit / include a section. * libbfd-in.h (bfd_link_info): Add section parm. (bfd_generic_lookup_section_flags): Likewise. * reloc.c (bfd_generic_lookup_section_flags): Likewise. * section.c (bfd_section): Move out section_flag_info. (BFD_FAKE_SECTION): Remove flag_info initializer. * targets.c (_bfd_lookup_section_flags): Add section parm. 2012-05-14 Catherine Moore <clm@codesourcery.com> bfd/ * archures.c (bfd_mach_ppc_vle): New. * bfd-in2.h: Regenerated. * cpu-powerpc.c (bfd_powerpc_archs): New entry for vle. * elf32-ppc.c (split16_format_type): New enumeration. (ppc_elf_vle_split16): New function. (HOWTO): Add entries for R_PPC_VLE relocations. (ppc_elf_reloc_type_lookup): Handle PPC_VLE relocations. (ppc_elf_section_flags): New function. (ppc_elf_lookup_section_flags): New function. (ppc_elf_section_processing): New function. (ppc_elf_check_relocs): Handle PPC_VLE relocations. (ppc_elf_relocation_section): Likewise. (elf_backend_lookup_section_flags_hook): Define. (elf_backend_section_flags): Define. (elf_backend_section_processing): Define. * elf32-ppc.h (ppc_elf_section_processing): Declare. * libbfd.h: Regenerated. * reloc.c (BFD_RELOC_PPC_VLE_REL8, BFD_RELOC_PPC_VLE_REL15, BFD_RELOC_PPC_VLE_REL24, BFD_RELOC_PPC_VLE_LO16A, BFD_RELOC_PPC_VLE_LO16D, BFD_RELOC_PPC_VLE_HI16A, BFD_RELOC_PPC_VLE_HI16D, BFD_RELOC_PPC_VLE_HA16A, BFD_RELOC_PPC_VLE_HA16D, BFD_RELOC_PPC_VLE_SDA21, BFD_RELOC_PPC_VLE_SDA21_LO, BFD_RELOC_PPC_VLE_SDAREL_LO16A, BFD_RELOC_PPC_VLE_SDAREL_LO16D, BFD_RELOC_PPC_VLE_SDAREL_HI16A, BFD_RELOC_PPC_VLE_SDAREL_HI16D, BFD_RELOC_PPC_VLE_SDAREL_HA16A, BFD_RELOC_PPC_VLE_SDAREL_HA16D): New bfd relocations. 2012-05-14 James Lemke <jwlemke@codesourcery.com> gas/ * config/tc-ppc.c (insn_validate): New func of existing code to call.. (ppc_setup_opcodes): ..from 2 places here. Revise for second (VLE) opcode table. Add #ifdef'd code to print opcode tables. 2012-05-14 James Lemke <jwlemke@codesourcery.com> gas/ * config/tc-ppc.c (ppc_setup_opcodes): Allow out-of-order for the VLE conditional branches. 2012-05-14 Catherine Moore <clm@codesourcery.com> Maciej W. Rozycki <macro@codesourcery.com> Rhonda Wittels <rhonda@codesourcery.com> gas/ * config/tc-ppc.c (PPC_VLE_SPLIT16A): New macro. (PPC_VLE_SPLIT16D): New macro. (PPC_VLE_LO16A): New macro. (PPC_VLE_LO16D): New macro. (PPC_VLE_HI16A): New macro. (PPC_VLE_HI16D): New macro. (PPC_VLE_HA16A): New macro. (PPC_VLE_HA16D): New macro. (PPC_APUINFO_VLE): New definition. (md_chars_to_number): New function. (md_parse_option): Check for combinations of little endian and -mvle. (md_show_usage): Document -mvle. (ppc_arch): Recognize VLE. (ppc_mach): Recognize bfd_mach_ppc_vle. (ppc_setup_opcodes): Print the opcode table if * config/tc-ppc.h (ppc_frag_check): Declare. * doc/c-ppc.texi: Document -mvle. * NEWS: Mention PowerPC VLE port. 2012-05-14 Catherine Moore <clm@codesourcery.com> gas/ * config/tc-ppc.h (ppc_dw2_line_min_insn_length): Declare. (DWARF2_LINE_MIN_INSN_LENGTH): Redefine. * config/tc-ppc.c (ppc_dw2_line_min_insn_length): New. * dwarf2dbg.c (scale_addr_delta): Handle values of 1 for DWARF2_LINE_MIN_INSN_LENGTH. 2012-05-14 Catherine Moore <clm@codesourcery.com> Maciej W. Rozycki <macro@codesourcery.com> Rhonda Wittels <rhonda@codesourcery.com> gas/testsuite/ * gas/ppc/ppc.exp: Run new tests. * gas/ppc/vle-reloc.d: New test. * gas/ppc/vle-reloc.s: New test. * gas/ppc/vle-simple-1.d: New test. * gas/ppc/vle-simple-1.s: New test. * gas/ppc/vle-simple-2.d: New test. * gas/ppc/vle-simple-2.s: New test. * gas/ppc/vle-simple-3.d: New test. * gas/ppc/vle-simple-3.s: New test. * gas/ppc/vle-simple-4.d: New test. * gas/ppc/vle-simple-4.s: New test. * gas/ppc/vle-simple-5.d: New test. * gas/ppc/vle-simple-5.s: New test. * gas/ppc/vle-simple-6.d: New test. * gas/ppc/vle-simple-6.s: New test. * gas/ppc/vle.d: New test. * gas/ppc/vle.s: New test. 2012-05-14 James Lemke <jwlemke@codesourcery.com> include/elf/ * ppc.h (SEC_PPC_VLE): Remove. 2012-05-14 Catherine Moore <clm@codesourcery.com> James Lemke <jwlemke@codesourcery.com> include/elf/ * ppc.h (R_PPC_VLE_REL8): New reloction. (R_PPC_VLE_REL15): Likewise. (R_PPC_VLE_REL24): Likewise. (R_PPC_VLE_LO16A): Likewise. (R_PPC_VLE_LO16D): Likewise. (R_PPC_VLE_HI16A): Likewise. (R_PPC_VLE_HI16D): Likewise. (R_PPC_VLE_HA16A): Likewise. (R_PPC_VLE_HA16D): Likewise. (R_PPC_VLE_SDA21): Likewise. (R_PPC_VLE_SDA21_LO): Likewise. (R_PPC_VLE_SDAREL_LO16A): Likewise. (R_PPC_VLE_SDAREL_LO16D): Likewise. (R_PPC_VLE_SDAREL_HI16A): Likewise. (R_PPC_VLE_SDAREL_HI16D): Likewise. (R_PPC_VLE_SDAREL_HA16A): Likewise. (R_PPC_VLE_SDAREL_HA16D): Likewise. (SEC_PPC_VLE): Remove. (PF_PPC_VLE): New program header flag. (SHF_PPC_VLE): New section header flag. (vle_opcodes, vle_num_opcodes): New. (VLE_OP): New macro. (VLE_OP_TO_SEG): New macro. 2012-05-14 Catherine Moore <clm@codesourcery.com> Maciej W. Rozycki <macro@codesourcery.com> Rhonda Wittels <rhonda@codesourcery.com> include/opcode/ * ppc.h (PPC_OPCODE_VLE): New definition. (PPC_OP_SA): New macro. (PPC_OP_SE_VLE): New macro. (PPC_OP): Use a variable shift amount. (powerpc_operand): Update comments. (PPC_OPSHIFT_INV): New macro. (PPC_OPERAND_CR): Replace with... (PPC_OPERAND_CR_BIT): ...this and (PPC_OPERAND_CR_REG): ...this. 2012-05-14 James Lemke <jwlemke@codesourcery.com> ld/ * ldlang.c (walk_wild_consider_section): Don't copy section_flag_list. Pass it to callback. (walk_wild_section_general): Pass section_flag_list to callback. (lang_add_section): Add sflag_list parm. Move out logic to keep / omit a section & call bfd_lookup_section_flags. (output_section_callback_fast): Add sflag_list parm. Add new parm to lang_add_section calls. (output_section_callback): Likewise. (check_section_callback): Add sflag_list parm. (lang_place_orphans): Add new parm to lang_add_section calls. (gc_section_callback): Add sflag_list parm. (find_relro_section_callback): Likewise. * ldlang.h (callback_t): Add flag_info parm. (lang_add_section): Add sflag_list parm. * emultempl/armelf.em (elf32_arm_add_stub_section): Add lang_add_section parm. * emultempl/beos.em (gld*_place_orphan): Likewise. * emultempl/elf32.em (gld*_place_orphan): Likewise. * emultempl/hppaelf.em (hppaelf_add_stub_section): Likewise. * emultempl/m68hc1xelf.em (m68hc11elf_add_stub_section): Likewise. * emultempl/mipself.em (mips_add_stub_section): Likewise. * emultempl/mmo.em (mmo_place_orphan): Likewise. * emultempl/pe.em (gld_*_place_orphan): Likewise. * emultempl/pep.em (gld_*_place_orphan): Likewise. * emultempl/ppc64elf.em (ppc_add_stub_section): Likewise. * emultempl/spuelf.em (spu_place_special_section): Likewise. * emultempl/vms.em (vms_place_orphan): Likewise. 2012-05-14 James Lemke <jwlemke@codesourcery.com> ld/testsuite/ * ld-powerpc/powerpc.exp: Create ppceabitests. * ld-powerpc/vle-multiseg.s: New. * ld-powerpc/vle-multiseg-1.d: New. * ld-powerpc/vle-multiseg-1.ld: New. * ld-powerpc/vle-multiseg-2.d: New. * ld-powerpc/vle-multiseg-2.ld: New. * ld-powerpc/vle-multiseg-3.d: New. * ld-powerpc/vle-multiseg-3.ld: New. * ld-powerpc/vle-multiseg-4.d: New. * ld-powerpc/vle-multiseg-4.ld: New. * ld-powerpc/vle-multiseg-5.d: New. * ld-powerpc/vle-multiseg-5.ld: New. * ld-powerpc/vle-multiseg-6.d: New. * ld-powerpc/vle-multiseg-6.ld: New. * ld-powerpc/vle-multiseg-6a.s: New. * ld-powerpc/vle-multiseg-6b.s: New. * ld-powerpc/vle-multiseg-6c.s: New. * ld-powerpc/vle-multiseg-6d.s: New. * ld-powerpc/powerpc.exp: Run new tests. 2012-05-14 Catherine Moore <clm@codesourcery.com> ld/ * NEWS: Mention PowerPC VLE port. 2012-05-14 Catherine Moore <clm@codesourcery.com> ld/testsuite/ * ld-powerpc/apuinfo.rd: Update for VLE. * ld-powerpc/vle-reloc-1.d: New. * ld-powerpc/vle-reloc-1.s: New. * ld-powerpc/vle-reloc-2.d: New. * ld-powerpc/vle-reloc-2.s: New. * ld-powerpc/vle-reloc-3.d: New. * ld-powerpc/vle-reloc-3.s: New. * ld-powerpc/vle-reloc-def-1.s: New. * ld-powerpc/vle-reloc-def-2.s: New. * ld-powerpc/vle-reloc-def-3.s: New. 2012-05-14 James Lemke <jwlemke@codesourcery.com> opcodes/ * ppc-dis.c (get_powerpc_dialect): Use is_ppc_vle. (PPC_OPCD_SEGS, VLE_OPCD_SEGS): New defines. (vle_opcd_indices): New array. (lookup_vle): New function. (disassemble_init_powerpc): Revise for second (VLE) opcode table. (print_insn_powerpc): Likewise. * ppc-opc.c: Likewise. 2012-05-14 Catherine Moore <clm@codesourcery.com> Maciej W. Rozycki <macro@codesourcery.com> Rhonda Wittels <rhonda@codesourcery.com> Nathan Froyd <froydnj@codesourcery.com> opcodes/ * ppc-opc.c (insert_arx, extract_arx): New functions. (insert_ary, extract_ary): New functions. (insert_li20, extract_li20): New functions. (insert_rx, extract_rx): New functions. (insert_ry, extract_ry): New functions. (insert_sci8, extract_sci8): New functions. (insert_sci8n, extract_sci8n): New functions. (insert_sd4h, extract_sd4h): New functions. (insert_sd4w, extract_sd4w): New functions. (insert_vlesi, extract_vlesi): New functions. (insert_vlensi, extract_vlensi): New functions. (insert_vleui, extract_vleui): New functions. (insert_vleil, extract_vleil): New functions. (BI_MASK, BB_MASK, BT): Use PPC_OPERAND_CR_BIT. (BI16, BI32, BO32, B8): New. (B15, B24, CRD32, CRS): New. (CRD, OBF, BFA, CR, CRFS): Use PPC_OPERAND_CR_REG. (DB, IMM20, RD, Rx, ARX, RY, RZ): New. (ARY, SCLSCI8, SCLSCI8N, SE_SD, SE_SDH): New. (SH6_MASK): Use PPC_OPSHIFT_INV. (SI8, UI5, OIMM5, UI7, BO16): New. (VLESIMM, VLENSIMM, VLEUIMM, VLEUIMML): New. (XT6, XA6, XB6, XB6S, XC6): Use PPC_OPSHIFT_INV. (ALLOW8_SPRG): New. (insert_sprg, extract_sprg): Check ALLOW8_SPRG. (OPVUP, OPVUP_MASK OPVUP): New (BD8, BD8_MASK, BD8IO, BD8IO_MASK): New. (EBD8IO, EBD8IO1_MASK, EBD8IO2_MASK, EBD8IO3_MASK): New. (BD15, BD15_MASK, EBD15, EBD15_MASK, EBD15BI, EBD15BI_MASK): New. (BD24,BD24_MASK, C_LK, C_LK_MASK, C, C_MASK): New. (IA16, IA16_MASK, I16A, I16A_MASK, I16L, I16L_MASK): New. (IM7, IM7_MASK, LI20, LI20_MASK, SCI8, SCI8_MASK): New. (SCI8BF, SCI8BF_MASK, SD4, SD4_MASK): New. (SE_IM5, SE_IM5_MASK): New. (SE_R, SE_R_MASK, SE_RR, SE_RR_MASK): New. (EX, EX_MASK, BO16F, BO16T, BO32F, BO32T): New. (BO32DNZ, BO32DZ): New. (NO371, PPCSPE, PPCISEL, PPCEFS, MULHW): Include PPC_OPCODE_VLE. (PPCVLE): New. (powerpc_opcodes): Add new VLE instructions. Update existing instruction to include PPCVLE if supported. * ppc-dis.c (ppc_opts): Add vle entry. (get_powerpc_dialect): New function. (powerpc_init_dialect): VLE support. (print_insn_big_powerpc): Call get_powerpc_dialect. (print_insn_little_powerpc): Likewise. (operand_value_powerpc): Handle negative shift counts. (print_insn_powerpc): Handle 2-byte instruction lengths.
2012-05-14 21:45:30 +02:00
set ppceabitests {
{"VLE multiple segments 1" "-melf32ppc -T vle-multiseg-1.ld" ""
"-a32 -mbig -mregnames -mvle" {vle-multiseg.s}
Add support for PowerPC VLE. 2012-05-14 Catherine Moore <clm@codesourcery.com> * NEWS: Mention PowerPC VLE port. 2012-05-14 James Lemke <jwlemke@codesourcery.com> Catherine Moore <clm@codesourcery.com> bfd/ * bfd.c (bfd_lookup_section_flags): Add section parm. * ecoff.c (bfd_debug_section): Remove flag_info initializer. * elf-bfd.h (bfd_elf_section_data): Move in section_flag_info. (bfd_elf_lookup_section_flags): Add section parm. * elf32-ppc.c (is_ppc_vle): New function. (ppc_elf_modify_segment_map): New function. (elf_backend_modify_segment_map): Define. (has_vle_insns): New define. * elf32-ppc.h (ppc_elf_modify_segment_map): Declare. * elflink.c (bfd_elf_lookup_section_flags): Add return value & parm. Move in logic to omit / include a section. * libbfd-in.h (bfd_link_info): Add section parm. (bfd_generic_lookup_section_flags): Likewise. * reloc.c (bfd_generic_lookup_section_flags): Likewise. * section.c (bfd_section): Move out section_flag_info. (BFD_FAKE_SECTION): Remove flag_info initializer. * targets.c (_bfd_lookup_section_flags): Add section parm. 2012-05-14 Catherine Moore <clm@codesourcery.com> bfd/ * archures.c (bfd_mach_ppc_vle): New. * bfd-in2.h: Regenerated. * cpu-powerpc.c (bfd_powerpc_archs): New entry for vle. * elf32-ppc.c (split16_format_type): New enumeration. (ppc_elf_vle_split16): New function. (HOWTO): Add entries for R_PPC_VLE relocations. (ppc_elf_reloc_type_lookup): Handle PPC_VLE relocations. (ppc_elf_section_flags): New function. (ppc_elf_lookup_section_flags): New function. (ppc_elf_section_processing): New function. (ppc_elf_check_relocs): Handle PPC_VLE relocations. (ppc_elf_relocation_section): Likewise. (elf_backend_lookup_section_flags_hook): Define. (elf_backend_section_flags): Define. (elf_backend_section_processing): Define. * elf32-ppc.h (ppc_elf_section_processing): Declare. * libbfd.h: Regenerated. * reloc.c (BFD_RELOC_PPC_VLE_REL8, BFD_RELOC_PPC_VLE_REL15, BFD_RELOC_PPC_VLE_REL24, BFD_RELOC_PPC_VLE_LO16A, BFD_RELOC_PPC_VLE_LO16D, BFD_RELOC_PPC_VLE_HI16A, BFD_RELOC_PPC_VLE_HI16D, BFD_RELOC_PPC_VLE_HA16A, BFD_RELOC_PPC_VLE_HA16D, BFD_RELOC_PPC_VLE_SDA21, BFD_RELOC_PPC_VLE_SDA21_LO, BFD_RELOC_PPC_VLE_SDAREL_LO16A, BFD_RELOC_PPC_VLE_SDAREL_LO16D, BFD_RELOC_PPC_VLE_SDAREL_HI16A, BFD_RELOC_PPC_VLE_SDAREL_HI16D, BFD_RELOC_PPC_VLE_SDAREL_HA16A, BFD_RELOC_PPC_VLE_SDAREL_HA16D): New bfd relocations. 2012-05-14 James Lemke <jwlemke@codesourcery.com> gas/ * config/tc-ppc.c (insn_validate): New func of existing code to call.. (ppc_setup_opcodes): ..from 2 places here. Revise for second (VLE) opcode table. Add #ifdef'd code to print opcode tables. 2012-05-14 James Lemke <jwlemke@codesourcery.com> gas/ * config/tc-ppc.c (ppc_setup_opcodes): Allow out-of-order for the VLE conditional branches. 2012-05-14 Catherine Moore <clm@codesourcery.com> Maciej W. Rozycki <macro@codesourcery.com> Rhonda Wittels <rhonda@codesourcery.com> gas/ * config/tc-ppc.c (PPC_VLE_SPLIT16A): New macro. (PPC_VLE_SPLIT16D): New macro. (PPC_VLE_LO16A): New macro. (PPC_VLE_LO16D): New macro. (PPC_VLE_HI16A): New macro. (PPC_VLE_HI16D): New macro. (PPC_VLE_HA16A): New macro. (PPC_VLE_HA16D): New macro. (PPC_APUINFO_VLE): New definition. (md_chars_to_number): New function. (md_parse_option): Check for combinations of little endian and -mvle. (md_show_usage): Document -mvle. (ppc_arch): Recognize VLE. (ppc_mach): Recognize bfd_mach_ppc_vle. (ppc_setup_opcodes): Print the opcode table if * config/tc-ppc.h (ppc_frag_check): Declare. * doc/c-ppc.texi: Document -mvle. * NEWS: Mention PowerPC VLE port. 2012-05-14 Catherine Moore <clm@codesourcery.com> gas/ * config/tc-ppc.h (ppc_dw2_line_min_insn_length): Declare. (DWARF2_LINE_MIN_INSN_LENGTH): Redefine. * config/tc-ppc.c (ppc_dw2_line_min_insn_length): New. * dwarf2dbg.c (scale_addr_delta): Handle values of 1 for DWARF2_LINE_MIN_INSN_LENGTH. 2012-05-14 Catherine Moore <clm@codesourcery.com> Maciej W. Rozycki <macro@codesourcery.com> Rhonda Wittels <rhonda@codesourcery.com> gas/testsuite/ * gas/ppc/ppc.exp: Run new tests. * gas/ppc/vle-reloc.d: New test. * gas/ppc/vle-reloc.s: New test. * gas/ppc/vle-simple-1.d: New test. * gas/ppc/vle-simple-1.s: New test. * gas/ppc/vle-simple-2.d: New test. * gas/ppc/vle-simple-2.s: New test. * gas/ppc/vle-simple-3.d: New test. * gas/ppc/vle-simple-3.s: New test. * gas/ppc/vle-simple-4.d: New test. * gas/ppc/vle-simple-4.s: New test. * gas/ppc/vle-simple-5.d: New test. * gas/ppc/vle-simple-5.s: New test. * gas/ppc/vle-simple-6.d: New test. * gas/ppc/vle-simple-6.s: New test. * gas/ppc/vle.d: New test. * gas/ppc/vle.s: New test. 2012-05-14 James Lemke <jwlemke@codesourcery.com> include/elf/ * ppc.h (SEC_PPC_VLE): Remove. 2012-05-14 Catherine Moore <clm@codesourcery.com> James Lemke <jwlemke@codesourcery.com> include/elf/ * ppc.h (R_PPC_VLE_REL8): New reloction. (R_PPC_VLE_REL15): Likewise. (R_PPC_VLE_REL24): Likewise. (R_PPC_VLE_LO16A): Likewise. (R_PPC_VLE_LO16D): Likewise. (R_PPC_VLE_HI16A): Likewise. (R_PPC_VLE_HI16D): Likewise. (R_PPC_VLE_HA16A): Likewise. (R_PPC_VLE_HA16D): Likewise. (R_PPC_VLE_SDA21): Likewise. (R_PPC_VLE_SDA21_LO): Likewise. (R_PPC_VLE_SDAREL_LO16A): Likewise. (R_PPC_VLE_SDAREL_LO16D): Likewise. (R_PPC_VLE_SDAREL_HI16A): Likewise. (R_PPC_VLE_SDAREL_HI16D): Likewise. (R_PPC_VLE_SDAREL_HA16A): Likewise. (R_PPC_VLE_SDAREL_HA16D): Likewise. (SEC_PPC_VLE): Remove. (PF_PPC_VLE): New program header flag. (SHF_PPC_VLE): New section header flag. (vle_opcodes, vle_num_opcodes): New. (VLE_OP): New macro. (VLE_OP_TO_SEG): New macro. 2012-05-14 Catherine Moore <clm@codesourcery.com> Maciej W. Rozycki <macro@codesourcery.com> Rhonda Wittels <rhonda@codesourcery.com> include/opcode/ * ppc.h (PPC_OPCODE_VLE): New definition. (PPC_OP_SA): New macro. (PPC_OP_SE_VLE): New macro. (PPC_OP): Use a variable shift amount. (powerpc_operand): Update comments. (PPC_OPSHIFT_INV): New macro. (PPC_OPERAND_CR): Replace with... (PPC_OPERAND_CR_BIT): ...this and (PPC_OPERAND_CR_REG): ...this. 2012-05-14 James Lemke <jwlemke@codesourcery.com> ld/ * ldlang.c (walk_wild_consider_section): Don't copy section_flag_list. Pass it to callback. (walk_wild_section_general): Pass section_flag_list to callback. (lang_add_section): Add sflag_list parm. Move out logic to keep / omit a section & call bfd_lookup_section_flags. (output_section_callback_fast): Add sflag_list parm. Add new parm to lang_add_section calls. (output_section_callback): Likewise. (check_section_callback): Add sflag_list parm. (lang_place_orphans): Add new parm to lang_add_section calls. (gc_section_callback): Add sflag_list parm. (find_relro_section_callback): Likewise. * ldlang.h (callback_t): Add flag_info parm. (lang_add_section): Add sflag_list parm. * emultempl/armelf.em (elf32_arm_add_stub_section): Add lang_add_section parm. * emultempl/beos.em (gld*_place_orphan): Likewise. * emultempl/elf32.em (gld*_place_orphan): Likewise. * emultempl/hppaelf.em (hppaelf_add_stub_section): Likewise. * emultempl/m68hc1xelf.em (m68hc11elf_add_stub_section): Likewise. * emultempl/mipself.em (mips_add_stub_section): Likewise. * emultempl/mmo.em (mmo_place_orphan): Likewise. * emultempl/pe.em (gld_*_place_orphan): Likewise. * emultempl/pep.em (gld_*_place_orphan): Likewise. * emultempl/ppc64elf.em (ppc_add_stub_section): Likewise. * emultempl/spuelf.em (spu_place_special_section): Likewise. * emultempl/vms.em (vms_place_orphan): Likewise. 2012-05-14 James Lemke <jwlemke@codesourcery.com> ld/testsuite/ * ld-powerpc/powerpc.exp: Create ppceabitests. * ld-powerpc/vle-multiseg.s: New. * ld-powerpc/vle-multiseg-1.d: New. * ld-powerpc/vle-multiseg-1.ld: New. * ld-powerpc/vle-multiseg-2.d: New. * ld-powerpc/vle-multiseg-2.ld: New. * ld-powerpc/vle-multiseg-3.d: New. * ld-powerpc/vle-multiseg-3.ld: New. * ld-powerpc/vle-multiseg-4.d: New. * ld-powerpc/vle-multiseg-4.ld: New. * ld-powerpc/vle-multiseg-5.d: New. * ld-powerpc/vle-multiseg-5.ld: New. * ld-powerpc/vle-multiseg-6.d: New. * ld-powerpc/vle-multiseg-6.ld: New. * ld-powerpc/vle-multiseg-6a.s: New. * ld-powerpc/vle-multiseg-6b.s: New. * ld-powerpc/vle-multiseg-6c.s: New. * ld-powerpc/vle-multiseg-6d.s: New. * ld-powerpc/powerpc.exp: Run new tests. 2012-05-14 Catherine Moore <clm@codesourcery.com> ld/ * NEWS: Mention PowerPC VLE port. 2012-05-14 Catherine Moore <clm@codesourcery.com> ld/testsuite/ * ld-powerpc/apuinfo.rd: Update for VLE. * ld-powerpc/vle-reloc-1.d: New. * ld-powerpc/vle-reloc-1.s: New. * ld-powerpc/vle-reloc-2.d: New. * ld-powerpc/vle-reloc-2.s: New. * ld-powerpc/vle-reloc-3.d: New. * ld-powerpc/vle-reloc-3.s: New. * ld-powerpc/vle-reloc-def-1.s: New. * ld-powerpc/vle-reloc-def-2.s: New. * ld-powerpc/vle-reloc-def-3.s: New. 2012-05-14 James Lemke <jwlemke@codesourcery.com> opcodes/ * ppc-dis.c (get_powerpc_dialect): Use is_ppc_vle. (PPC_OPCD_SEGS, VLE_OPCD_SEGS): New defines. (vle_opcd_indices): New array. (lookup_vle): New function. (disassemble_init_powerpc): Revise for second (VLE) opcode table. (print_insn_powerpc): Likewise. * ppc-opc.c: Likewise. 2012-05-14 Catherine Moore <clm@codesourcery.com> Maciej W. Rozycki <macro@codesourcery.com> Rhonda Wittels <rhonda@codesourcery.com> Nathan Froyd <froydnj@codesourcery.com> opcodes/ * ppc-opc.c (insert_arx, extract_arx): New functions. (insert_ary, extract_ary): New functions. (insert_li20, extract_li20): New functions. (insert_rx, extract_rx): New functions. (insert_ry, extract_ry): New functions. (insert_sci8, extract_sci8): New functions. (insert_sci8n, extract_sci8n): New functions. (insert_sd4h, extract_sd4h): New functions. (insert_sd4w, extract_sd4w): New functions. (insert_vlesi, extract_vlesi): New functions. (insert_vlensi, extract_vlensi): New functions. (insert_vleui, extract_vleui): New functions. (insert_vleil, extract_vleil): New functions. (BI_MASK, BB_MASK, BT): Use PPC_OPERAND_CR_BIT. (BI16, BI32, BO32, B8): New. (B15, B24, CRD32, CRS): New. (CRD, OBF, BFA, CR, CRFS): Use PPC_OPERAND_CR_REG. (DB, IMM20, RD, Rx, ARX, RY, RZ): New. (ARY, SCLSCI8, SCLSCI8N, SE_SD, SE_SDH): New. (SH6_MASK): Use PPC_OPSHIFT_INV. (SI8, UI5, OIMM5, UI7, BO16): New. (VLESIMM, VLENSIMM, VLEUIMM, VLEUIMML): New. (XT6, XA6, XB6, XB6S, XC6): Use PPC_OPSHIFT_INV. (ALLOW8_SPRG): New. (insert_sprg, extract_sprg): Check ALLOW8_SPRG. (OPVUP, OPVUP_MASK OPVUP): New (BD8, BD8_MASK, BD8IO, BD8IO_MASK): New. (EBD8IO, EBD8IO1_MASK, EBD8IO2_MASK, EBD8IO3_MASK): New. (BD15, BD15_MASK, EBD15, EBD15_MASK, EBD15BI, EBD15BI_MASK): New. (BD24,BD24_MASK, C_LK, C_LK_MASK, C, C_MASK): New. (IA16, IA16_MASK, I16A, I16A_MASK, I16L, I16L_MASK): New. (IM7, IM7_MASK, LI20, LI20_MASK, SCI8, SCI8_MASK): New. (SCI8BF, SCI8BF_MASK, SD4, SD4_MASK): New. (SE_IM5, SE_IM5_MASK): New. (SE_R, SE_R_MASK, SE_RR, SE_RR_MASK): New. (EX, EX_MASK, BO16F, BO16T, BO32F, BO32T): New. (BO32DNZ, BO32DZ): New. (NO371, PPCSPE, PPCISEL, PPCEFS, MULHW): Include PPC_OPCODE_VLE. (PPCVLE): New. (powerpc_opcodes): Add new VLE instructions. Update existing instruction to include PPCVLE if supported. * ppc-dis.c (ppc_opts): Add vle entry. (get_powerpc_dialect): New function. (powerpc_init_dialect): VLE support. (print_insn_big_powerpc): Call get_powerpc_dialect. (print_insn_little_powerpc): Likewise. (operand_value_powerpc): Handle negative shift counts. (print_insn_powerpc): Handle 2-byte instruction lengths.
2012-05-14 21:45:30 +02:00
{{readelf "-l" vle-multiseg-1.d}} "vle-multiseg-1"}
{"VLE multiple segments 2" "-melf32ppc -T vle-multiseg-2.ld" ""
"-a32 -mbig -mregnames -mvle" {vle-multiseg.s}
Add support for PowerPC VLE. 2012-05-14 Catherine Moore <clm@codesourcery.com> * NEWS: Mention PowerPC VLE port. 2012-05-14 James Lemke <jwlemke@codesourcery.com> Catherine Moore <clm@codesourcery.com> bfd/ * bfd.c (bfd_lookup_section_flags): Add section parm. * ecoff.c (bfd_debug_section): Remove flag_info initializer. * elf-bfd.h (bfd_elf_section_data): Move in section_flag_info. (bfd_elf_lookup_section_flags): Add section parm. * elf32-ppc.c (is_ppc_vle): New function. (ppc_elf_modify_segment_map): New function. (elf_backend_modify_segment_map): Define. (has_vle_insns): New define. * elf32-ppc.h (ppc_elf_modify_segment_map): Declare. * elflink.c (bfd_elf_lookup_section_flags): Add return value & parm. Move in logic to omit / include a section. * libbfd-in.h (bfd_link_info): Add section parm. (bfd_generic_lookup_section_flags): Likewise. * reloc.c (bfd_generic_lookup_section_flags): Likewise. * section.c (bfd_section): Move out section_flag_info. (BFD_FAKE_SECTION): Remove flag_info initializer. * targets.c (_bfd_lookup_section_flags): Add section parm. 2012-05-14 Catherine Moore <clm@codesourcery.com> bfd/ * archures.c (bfd_mach_ppc_vle): New. * bfd-in2.h: Regenerated. * cpu-powerpc.c (bfd_powerpc_archs): New entry for vle. * elf32-ppc.c (split16_format_type): New enumeration. (ppc_elf_vle_split16): New function. (HOWTO): Add entries for R_PPC_VLE relocations. (ppc_elf_reloc_type_lookup): Handle PPC_VLE relocations. (ppc_elf_section_flags): New function. (ppc_elf_lookup_section_flags): New function. (ppc_elf_section_processing): New function. (ppc_elf_check_relocs): Handle PPC_VLE relocations. (ppc_elf_relocation_section): Likewise. (elf_backend_lookup_section_flags_hook): Define. (elf_backend_section_flags): Define. (elf_backend_section_processing): Define. * elf32-ppc.h (ppc_elf_section_processing): Declare. * libbfd.h: Regenerated. * reloc.c (BFD_RELOC_PPC_VLE_REL8, BFD_RELOC_PPC_VLE_REL15, BFD_RELOC_PPC_VLE_REL24, BFD_RELOC_PPC_VLE_LO16A, BFD_RELOC_PPC_VLE_LO16D, BFD_RELOC_PPC_VLE_HI16A, BFD_RELOC_PPC_VLE_HI16D, BFD_RELOC_PPC_VLE_HA16A, BFD_RELOC_PPC_VLE_HA16D, BFD_RELOC_PPC_VLE_SDA21, BFD_RELOC_PPC_VLE_SDA21_LO, BFD_RELOC_PPC_VLE_SDAREL_LO16A, BFD_RELOC_PPC_VLE_SDAREL_LO16D, BFD_RELOC_PPC_VLE_SDAREL_HI16A, BFD_RELOC_PPC_VLE_SDAREL_HI16D, BFD_RELOC_PPC_VLE_SDAREL_HA16A, BFD_RELOC_PPC_VLE_SDAREL_HA16D): New bfd relocations. 2012-05-14 James Lemke <jwlemke@codesourcery.com> gas/ * config/tc-ppc.c (insn_validate): New func of existing code to call.. (ppc_setup_opcodes): ..from 2 places here. Revise for second (VLE) opcode table. Add #ifdef'd code to print opcode tables. 2012-05-14 James Lemke <jwlemke@codesourcery.com> gas/ * config/tc-ppc.c (ppc_setup_opcodes): Allow out-of-order for the VLE conditional branches. 2012-05-14 Catherine Moore <clm@codesourcery.com> Maciej W. Rozycki <macro@codesourcery.com> Rhonda Wittels <rhonda@codesourcery.com> gas/ * config/tc-ppc.c (PPC_VLE_SPLIT16A): New macro. (PPC_VLE_SPLIT16D): New macro. (PPC_VLE_LO16A): New macro. (PPC_VLE_LO16D): New macro. (PPC_VLE_HI16A): New macro. (PPC_VLE_HI16D): New macro. (PPC_VLE_HA16A): New macro. (PPC_VLE_HA16D): New macro. (PPC_APUINFO_VLE): New definition. (md_chars_to_number): New function. (md_parse_option): Check for combinations of little endian and -mvle. (md_show_usage): Document -mvle. (ppc_arch): Recognize VLE. (ppc_mach): Recognize bfd_mach_ppc_vle. (ppc_setup_opcodes): Print the opcode table if * config/tc-ppc.h (ppc_frag_check): Declare. * doc/c-ppc.texi: Document -mvle. * NEWS: Mention PowerPC VLE port. 2012-05-14 Catherine Moore <clm@codesourcery.com> gas/ * config/tc-ppc.h (ppc_dw2_line_min_insn_length): Declare. (DWARF2_LINE_MIN_INSN_LENGTH): Redefine. * config/tc-ppc.c (ppc_dw2_line_min_insn_length): New. * dwarf2dbg.c (scale_addr_delta): Handle values of 1 for DWARF2_LINE_MIN_INSN_LENGTH. 2012-05-14 Catherine Moore <clm@codesourcery.com> Maciej W. Rozycki <macro@codesourcery.com> Rhonda Wittels <rhonda@codesourcery.com> gas/testsuite/ * gas/ppc/ppc.exp: Run new tests. * gas/ppc/vle-reloc.d: New test. * gas/ppc/vle-reloc.s: New test. * gas/ppc/vle-simple-1.d: New test. * gas/ppc/vle-simple-1.s: New test. * gas/ppc/vle-simple-2.d: New test. * gas/ppc/vle-simple-2.s: New test. * gas/ppc/vle-simple-3.d: New test. * gas/ppc/vle-simple-3.s: New test. * gas/ppc/vle-simple-4.d: New test. * gas/ppc/vle-simple-4.s: New test. * gas/ppc/vle-simple-5.d: New test. * gas/ppc/vle-simple-5.s: New test. * gas/ppc/vle-simple-6.d: New test. * gas/ppc/vle-simple-6.s: New test. * gas/ppc/vle.d: New test. * gas/ppc/vle.s: New test. 2012-05-14 James Lemke <jwlemke@codesourcery.com> include/elf/ * ppc.h (SEC_PPC_VLE): Remove. 2012-05-14 Catherine Moore <clm@codesourcery.com> James Lemke <jwlemke@codesourcery.com> include/elf/ * ppc.h (R_PPC_VLE_REL8): New reloction. (R_PPC_VLE_REL15): Likewise. (R_PPC_VLE_REL24): Likewise. (R_PPC_VLE_LO16A): Likewise. (R_PPC_VLE_LO16D): Likewise. (R_PPC_VLE_HI16A): Likewise. (R_PPC_VLE_HI16D): Likewise. (R_PPC_VLE_HA16A): Likewise. (R_PPC_VLE_HA16D): Likewise. (R_PPC_VLE_SDA21): Likewise. (R_PPC_VLE_SDA21_LO): Likewise. (R_PPC_VLE_SDAREL_LO16A): Likewise. (R_PPC_VLE_SDAREL_LO16D): Likewise. (R_PPC_VLE_SDAREL_HI16A): Likewise. (R_PPC_VLE_SDAREL_HI16D): Likewise. (R_PPC_VLE_SDAREL_HA16A): Likewise. (R_PPC_VLE_SDAREL_HA16D): Likewise. (SEC_PPC_VLE): Remove. (PF_PPC_VLE): New program header flag. (SHF_PPC_VLE): New section header flag. (vle_opcodes, vle_num_opcodes): New. (VLE_OP): New macro. (VLE_OP_TO_SEG): New macro. 2012-05-14 Catherine Moore <clm@codesourcery.com> Maciej W. Rozycki <macro@codesourcery.com> Rhonda Wittels <rhonda@codesourcery.com> include/opcode/ * ppc.h (PPC_OPCODE_VLE): New definition. (PPC_OP_SA): New macro. (PPC_OP_SE_VLE): New macro. (PPC_OP): Use a variable shift amount. (powerpc_operand): Update comments. (PPC_OPSHIFT_INV): New macro. (PPC_OPERAND_CR): Replace with... (PPC_OPERAND_CR_BIT): ...this and (PPC_OPERAND_CR_REG): ...this. 2012-05-14 James Lemke <jwlemke@codesourcery.com> ld/ * ldlang.c (walk_wild_consider_section): Don't copy section_flag_list. Pass it to callback. (walk_wild_section_general): Pass section_flag_list to callback. (lang_add_section): Add sflag_list parm. Move out logic to keep / omit a section & call bfd_lookup_section_flags. (output_section_callback_fast): Add sflag_list parm. Add new parm to lang_add_section calls. (output_section_callback): Likewise. (check_section_callback): Add sflag_list parm. (lang_place_orphans): Add new parm to lang_add_section calls. (gc_section_callback): Add sflag_list parm. (find_relro_section_callback): Likewise. * ldlang.h (callback_t): Add flag_info parm. (lang_add_section): Add sflag_list parm. * emultempl/armelf.em (elf32_arm_add_stub_section): Add lang_add_section parm. * emultempl/beos.em (gld*_place_orphan): Likewise. * emultempl/elf32.em (gld*_place_orphan): Likewise. * emultempl/hppaelf.em (hppaelf_add_stub_section): Likewise. * emultempl/m68hc1xelf.em (m68hc11elf_add_stub_section): Likewise. * emultempl/mipself.em (mips_add_stub_section): Likewise. * emultempl/mmo.em (mmo_place_orphan): Likewise. * emultempl/pe.em (gld_*_place_orphan): Likewise. * emultempl/pep.em (gld_*_place_orphan): Likewise. * emultempl/ppc64elf.em (ppc_add_stub_section): Likewise. * emultempl/spuelf.em (spu_place_special_section): Likewise. * emultempl/vms.em (vms_place_orphan): Likewise. 2012-05-14 James Lemke <jwlemke@codesourcery.com> ld/testsuite/ * ld-powerpc/powerpc.exp: Create ppceabitests. * ld-powerpc/vle-multiseg.s: New. * ld-powerpc/vle-multiseg-1.d: New. * ld-powerpc/vle-multiseg-1.ld: New. * ld-powerpc/vle-multiseg-2.d: New. * ld-powerpc/vle-multiseg-2.ld: New. * ld-powerpc/vle-multiseg-3.d: New. * ld-powerpc/vle-multiseg-3.ld: New. * ld-powerpc/vle-multiseg-4.d: New. * ld-powerpc/vle-multiseg-4.ld: New. * ld-powerpc/vle-multiseg-5.d: New. * ld-powerpc/vle-multiseg-5.ld: New. * ld-powerpc/vle-multiseg-6.d: New. * ld-powerpc/vle-multiseg-6.ld: New. * ld-powerpc/vle-multiseg-6a.s: New. * ld-powerpc/vle-multiseg-6b.s: New. * ld-powerpc/vle-multiseg-6c.s: New. * ld-powerpc/vle-multiseg-6d.s: New. * ld-powerpc/powerpc.exp: Run new tests. 2012-05-14 Catherine Moore <clm@codesourcery.com> ld/ * NEWS: Mention PowerPC VLE port. 2012-05-14 Catherine Moore <clm@codesourcery.com> ld/testsuite/ * ld-powerpc/apuinfo.rd: Update for VLE. * ld-powerpc/vle-reloc-1.d: New. * ld-powerpc/vle-reloc-1.s: New. * ld-powerpc/vle-reloc-2.d: New. * ld-powerpc/vle-reloc-2.s: New. * ld-powerpc/vle-reloc-3.d: New. * ld-powerpc/vle-reloc-3.s: New. * ld-powerpc/vle-reloc-def-1.s: New. * ld-powerpc/vle-reloc-def-2.s: New. * ld-powerpc/vle-reloc-def-3.s: New. 2012-05-14 James Lemke <jwlemke@codesourcery.com> opcodes/ * ppc-dis.c (get_powerpc_dialect): Use is_ppc_vle. (PPC_OPCD_SEGS, VLE_OPCD_SEGS): New defines. (vle_opcd_indices): New array. (lookup_vle): New function. (disassemble_init_powerpc): Revise for second (VLE) opcode table. (print_insn_powerpc): Likewise. * ppc-opc.c: Likewise. 2012-05-14 Catherine Moore <clm@codesourcery.com> Maciej W. Rozycki <macro@codesourcery.com> Rhonda Wittels <rhonda@codesourcery.com> Nathan Froyd <froydnj@codesourcery.com> opcodes/ * ppc-opc.c (insert_arx, extract_arx): New functions. (insert_ary, extract_ary): New functions. (insert_li20, extract_li20): New functions. (insert_rx, extract_rx): New functions. (insert_ry, extract_ry): New functions. (insert_sci8, extract_sci8): New functions. (insert_sci8n, extract_sci8n): New functions. (insert_sd4h, extract_sd4h): New functions. (insert_sd4w, extract_sd4w): New functions. (insert_vlesi, extract_vlesi): New functions. (insert_vlensi, extract_vlensi): New functions. (insert_vleui, extract_vleui): New functions. (insert_vleil, extract_vleil): New functions. (BI_MASK, BB_MASK, BT): Use PPC_OPERAND_CR_BIT. (BI16, BI32, BO32, B8): New. (B15, B24, CRD32, CRS): New. (CRD, OBF, BFA, CR, CRFS): Use PPC_OPERAND_CR_REG. (DB, IMM20, RD, Rx, ARX, RY, RZ): New. (ARY, SCLSCI8, SCLSCI8N, SE_SD, SE_SDH): New. (SH6_MASK): Use PPC_OPSHIFT_INV. (SI8, UI5, OIMM5, UI7, BO16): New. (VLESIMM, VLENSIMM, VLEUIMM, VLEUIMML): New. (XT6, XA6, XB6, XB6S, XC6): Use PPC_OPSHIFT_INV. (ALLOW8_SPRG): New. (insert_sprg, extract_sprg): Check ALLOW8_SPRG. (OPVUP, OPVUP_MASK OPVUP): New (BD8, BD8_MASK, BD8IO, BD8IO_MASK): New. (EBD8IO, EBD8IO1_MASK, EBD8IO2_MASK, EBD8IO3_MASK): New. (BD15, BD15_MASK, EBD15, EBD15_MASK, EBD15BI, EBD15BI_MASK): New. (BD24,BD24_MASK, C_LK, C_LK_MASK, C, C_MASK): New. (IA16, IA16_MASK, I16A, I16A_MASK, I16L, I16L_MASK): New. (IM7, IM7_MASK, LI20, LI20_MASK, SCI8, SCI8_MASK): New. (SCI8BF, SCI8BF_MASK, SD4, SD4_MASK): New. (SE_IM5, SE_IM5_MASK): New. (SE_R, SE_R_MASK, SE_RR, SE_RR_MASK): New. (EX, EX_MASK, BO16F, BO16T, BO32F, BO32T): New. (BO32DNZ, BO32DZ): New. (NO371, PPCSPE, PPCISEL, PPCEFS, MULHW): Include PPC_OPCODE_VLE. (PPCVLE): New. (powerpc_opcodes): Add new VLE instructions. Update existing instruction to include PPCVLE if supported. * ppc-dis.c (ppc_opts): Add vle entry. (get_powerpc_dialect): New function. (powerpc_init_dialect): VLE support. (print_insn_big_powerpc): Call get_powerpc_dialect. (print_insn_little_powerpc): Likewise. (operand_value_powerpc): Handle negative shift counts. (print_insn_powerpc): Handle 2-byte instruction lengths.
2012-05-14 21:45:30 +02:00
{{readelf "-l" vle-multiseg-2.d}} "vle-multiseg-2"}
{"VLE multiple segments 3" "-melf32ppc -T vle-multiseg-3.ld" ""
"-a32 -mbig -mregnames -mvle" {vle-multiseg.s}
Add support for PowerPC VLE. 2012-05-14 Catherine Moore <clm@codesourcery.com> * NEWS: Mention PowerPC VLE port. 2012-05-14 James Lemke <jwlemke@codesourcery.com> Catherine Moore <clm@codesourcery.com> bfd/ * bfd.c (bfd_lookup_section_flags): Add section parm. * ecoff.c (bfd_debug_section): Remove flag_info initializer. * elf-bfd.h (bfd_elf_section_data): Move in section_flag_info. (bfd_elf_lookup_section_flags): Add section parm. * elf32-ppc.c (is_ppc_vle): New function. (ppc_elf_modify_segment_map): New function. (elf_backend_modify_segment_map): Define. (has_vle_insns): New define. * elf32-ppc.h (ppc_elf_modify_segment_map): Declare. * elflink.c (bfd_elf_lookup_section_flags): Add return value & parm. Move in logic to omit / include a section. * libbfd-in.h (bfd_link_info): Add section parm. (bfd_generic_lookup_section_flags): Likewise. * reloc.c (bfd_generic_lookup_section_flags): Likewise. * section.c (bfd_section): Move out section_flag_info. (BFD_FAKE_SECTION): Remove flag_info initializer. * targets.c (_bfd_lookup_section_flags): Add section parm. 2012-05-14 Catherine Moore <clm@codesourcery.com> bfd/ * archures.c (bfd_mach_ppc_vle): New. * bfd-in2.h: Regenerated. * cpu-powerpc.c (bfd_powerpc_archs): New entry for vle. * elf32-ppc.c (split16_format_type): New enumeration. (ppc_elf_vle_split16): New function. (HOWTO): Add entries for R_PPC_VLE relocations. (ppc_elf_reloc_type_lookup): Handle PPC_VLE relocations. (ppc_elf_section_flags): New function. (ppc_elf_lookup_section_flags): New function. (ppc_elf_section_processing): New function. (ppc_elf_check_relocs): Handle PPC_VLE relocations. (ppc_elf_relocation_section): Likewise. (elf_backend_lookup_section_flags_hook): Define. (elf_backend_section_flags): Define. (elf_backend_section_processing): Define. * elf32-ppc.h (ppc_elf_section_processing): Declare. * libbfd.h: Regenerated. * reloc.c (BFD_RELOC_PPC_VLE_REL8, BFD_RELOC_PPC_VLE_REL15, BFD_RELOC_PPC_VLE_REL24, BFD_RELOC_PPC_VLE_LO16A, BFD_RELOC_PPC_VLE_LO16D, BFD_RELOC_PPC_VLE_HI16A, BFD_RELOC_PPC_VLE_HI16D, BFD_RELOC_PPC_VLE_HA16A, BFD_RELOC_PPC_VLE_HA16D, BFD_RELOC_PPC_VLE_SDA21, BFD_RELOC_PPC_VLE_SDA21_LO, BFD_RELOC_PPC_VLE_SDAREL_LO16A, BFD_RELOC_PPC_VLE_SDAREL_LO16D, BFD_RELOC_PPC_VLE_SDAREL_HI16A, BFD_RELOC_PPC_VLE_SDAREL_HI16D, BFD_RELOC_PPC_VLE_SDAREL_HA16A, BFD_RELOC_PPC_VLE_SDAREL_HA16D): New bfd relocations. 2012-05-14 James Lemke <jwlemke@codesourcery.com> gas/ * config/tc-ppc.c (insn_validate): New func of existing code to call.. (ppc_setup_opcodes): ..from 2 places here. Revise for second (VLE) opcode table. Add #ifdef'd code to print opcode tables. 2012-05-14 James Lemke <jwlemke@codesourcery.com> gas/ * config/tc-ppc.c (ppc_setup_opcodes): Allow out-of-order for the VLE conditional branches. 2012-05-14 Catherine Moore <clm@codesourcery.com> Maciej W. Rozycki <macro@codesourcery.com> Rhonda Wittels <rhonda@codesourcery.com> gas/ * config/tc-ppc.c (PPC_VLE_SPLIT16A): New macro. (PPC_VLE_SPLIT16D): New macro. (PPC_VLE_LO16A): New macro. (PPC_VLE_LO16D): New macro. (PPC_VLE_HI16A): New macro. (PPC_VLE_HI16D): New macro. (PPC_VLE_HA16A): New macro. (PPC_VLE_HA16D): New macro. (PPC_APUINFO_VLE): New definition. (md_chars_to_number): New function. (md_parse_option): Check for combinations of little endian and -mvle. (md_show_usage): Document -mvle. (ppc_arch): Recognize VLE. (ppc_mach): Recognize bfd_mach_ppc_vle. (ppc_setup_opcodes): Print the opcode table if * config/tc-ppc.h (ppc_frag_check): Declare. * doc/c-ppc.texi: Document -mvle. * NEWS: Mention PowerPC VLE port. 2012-05-14 Catherine Moore <clm@codesourcery.com> gas/ * config/tc-ppc.h (ppc_dw2_line_min_insn_length): Declare. (DWARF2_LINE_MIN_INSN_LENGTH): Redefine. * config/tc-ppc.c (ppc_dw2_line_min_insn_length): New. * dwarf2dbg.c (scale_addr_delta): Handle values of 1 for DWARF2_LINE_MIN_INSN_LENGTH. 2012-05-14 Catherine Moore <clm@codesourcery.com> Maciej W. Rozycki <macro@codesourcery.com> Rhonda Wittels <rhonda@codesourcery.com> gas/testsuite/ * gas/ppc/ppc.exp: Run new tests. * gas/ppc/vle-reloc.d: New test. * gas/ppc/vle-reloc.s: New test. * gas/ppc/vle-simple-1.d: New test. * gas/ppc/vle-simple-1.s: New test. * gas/ppc/vle-simple-2.d: New test. * gas/ppc/vle-simple-2.s: New test. * gas/ppc/vle-simple-3.d: New test. * gas/ppc/vle-simple-3.s: New test. * gas/ppc/vle-simple-4.d: New test. * gas/ppc/vle-simple-4.s: New test. * gas/ppc/vle-simple-5.d: New test. * gas/ppc/vle-simple-5.s: New test. * gas/ppc/vle-simple-6.d: New test. * gas/ppc/vle-simple-6.s: New test. * gas/ppc/vle.d: New test. * gas/ppc/vle.s: New test. 2012-05-14 James Lemke <jwlemke@codesourcery.com> include/elf/ * ppc.h (SEC_PPC_VLE): Remove. 2012-05-14 Catherine Moore <clm@codesourcery.com> James Lemke <jwlemke@codesourcery.com> include/elf/ * ppc.h (R_PPC_VLE_REL8): New reloction. (R_PPC_VLE_REL15): Likewise. (R_PPC_VLE_REL24): Likewise. (R_PPC_VLE_LO16A): Likewise. (R_PPC_VLE_LO16D): Likewise. (R_PPC_VLE_HI16A): Likewise. (R_PPC_VLE_HI16D): Likewise. (R_PPC_VLE_HA16A): Likewise. (R_PPC_VLE_HA16D): Likewise. (R_PPC_VLE_SDA21): Likewise. (R_PPC_VLE_SDA21_LO): Likewise. (R_PPC_VLE_SDAREL_LO16A): Likewise. (R_PPC_VLE_SDAREL_LO16D): Likewise. (R_PPC_VLE_SDAREL_HI16A): Likewise. (R_PPC_VLE_SDAREL_HI16D): Likewise. (R_PPC_VLE_SDAREL_HA16A): Likewise. (R_PPC_VLE_SDAREL_HA16D): Likewise. (SEC_PPC_VLE): Remove. (PF_PPC_VLE): New program header flag. (SHF_PPC_VLE): New section header flag. (vle_opcodes, vle_num_opcodes): New. (VLE_OP): New macro. (VLE_OP_TO_SEG): New macro. 2012-05-14 Catherine Moore <clm@codesourcery.com> Maciej W. Rozycki <macro@codesourcery.com> Rhonda Wittels <rhonda@codesourcery.com> include/opcode/ * ppc.h (PPC_OPCODE_VLE): New definition. (PPC_OP_SA): New macro. (PPC_OP_SE_VLE): New macro. (PPC_OP): Use a variable shift amount. (powerpc_operand): Update comments. (PPC_OPSHIFT_INV): New macro. (PPC_OPERAND_CR): Replace with... (PPC_OPERAND_CR_BIT): ...this and (PPC_OPERAND_CR_REG): ...this. 2012-05-14 James Lemke <jwlemke@codesourcery.com> ld/ * ldlang.c (walk_wild_consider_section): Don't copy section_flag_list. Pass it to callback. (walk_wild_section_general): Pass section_flag_list to callback. (lang_add_section): Add sflag_list parm. Move out logic to keep / omit a section & call bfd_lookup_section_flags. (output_section_callback_fast): Add sflag_list parm. Add new parm to lang_add_section calls. (output_section_callback): Likewise. (check_section_callback): Add sflag_list parm. (lang_place_orphans): Add new parm to lang_add_section calls. (gc_section_callback): Add sflag_list parm. (find_relro_section_callback): Likewise. * ldlang.h (callback_t): Add flag_info parm. (lang_add_section): Add sflag_list parm. * emultempl/armelf.em (elf32_arm_add_stub_section): Add lang_add_section parm. * emultempl/beos.em (gld*_place_orphan): Likewise. * emultempl/elf32.em (gld*_place_orphan): Likewise. * emultempl/hppaelf.em (hppaelf_add_stub_section): Likewise. * emultempl/m68hc1xelf.em (m68hc11elf_add_stub_section): Likewise. * emultempl/mipself.em (mips_add_stub_section): Likewise. * emultempl/mmo.em (mmo_place_orphan): Likewise. * emultempl/pe.em (gld_*_place_orphan): Likewise. * emultempl/pep.em (gld_*_place_orphan): Likewise. * emultempl/ppc64elf.em (ppc_add_stub_section): Likewise. * emultempl/spuelf.em (spu_place_special_section): Likewise. * emultempl/vms.em (vms_place_orphan): Likewise. 2012-05-14 James Lemke <jwlemke@codesourcery.com> ld/testsuite/ * ld-powerpc/powerpc.exp: Create ppceabitests. * ld-powerpc/vle-multiseg.s: New. * ld-powerpc/vle-multiseg-1.d: New. * ld-powerpc/vle-multiseg-1.ld: New. * ld-powerpc/vle-multiseg-2.d: New. * ld-powerpc/vle-multiseg-2.ld: New. * ld-powerpc/vle-multiseg-3.d: New. * ld-powerpc/vle-multiseg-3.ld: New. * ld-powerpc/vle-multiseg-4.d: New. * ld-powerpc/vle-multiseg-4.ld: New. * ld-powerpc/vle-multiseg-5.d: New. * ld-powerpc/vle-multiseg-5.ld: New. * ld-powerpc/vle-multiseg-6.d: New. * ld-powerpc/vle-multiseg-6.ld: New. * ld-powerpc/vle-multiseg-6a.s: New. * ld-powerpc/vle-multiseg-6b.s: New. * ld-powerpc/vle-multiseg-6c.s: New. * ld-powerpc/vle-multiseg-6d.s: New. * ld-powerpc/powerpc.exp: Run new tests. 2012-05-14 Catherine Moore <clm@codesourcery.com> ld/ * NEWS: Mention PowerPC VLE port. 2012-05-14 Catherine Moore <clm@codesourcery.com> ld/testsuite/ * ld-powerpc/apuinfo.rd: Update for VLE. * ld-powerpc/vle-reloc-1.d: New. * ld-powerpc/vle-reloc-1.s: New. * ld-powerpc/vle-reloc-2.d: New. * ld-powerpc/vle-reloc-2.s: New. * ld-powerpc/vle-reloc-3.d: New. * ld-powerpc/vle-reloc-3.s: New. * ld-powerpc/vle-reloc-def-1.s: New. * ld-powerpc/vle-reloc-def-2.s: New. * ld-powerpc/vle-reloc-def-3.s: New. 2012-05-14 James Lemke <jwlemke@codesourcery.com> opcodes/ * ppc-dis.c (get_powerpc_dialect): Use is_ppc_vle. (PPC_OPCD_SEGS, VLE_OPCD_SEGS): New defines. (vle_opcd_indices): New array. (lookup_vle): New function. (disassemble_init_powerpc): Revise for second (VLE) opcode table. (print_insn_powerpc): Likewise. * ppc-opc.c: Likewise. 2012-05-14 Catherine Moore <clm@codesourcery.com> Maciej W. Rozycki <macro@codesourcery.com> Rhonda Wittels <rhonda@codesourcery.com> Nathan Froyd <froydnj@codesourcery.com> opcodes/ * ppc-opc.c (insert_arx, extract_arx): New functions. (insert_ary, extract_ary): New functions. (insert_li20, extract_li20): New functions. (insert_rx, extract_rx): New functions. (insert_ry, extract_ry): New functions. (insert_sci8, extract_sci8): New functions. (insert_sci8n, extract_sci8n): New functions. (insert_sd4h, extract_sd4h): New functions. (insert_sd4w, extract_sd4w): New functions. (insert_vlesi, extract_vlesi): New functions. (insert_vlensi, extract_vlensi): New functions. (insert_vleui, extract_vleui): New functions. (insert_vleil, extract_vleil): New functions. (BI_MASK, BB_MASK, BT): Use PPC_OPERAND_CR_BIT. (BI16, BI32, BO32, B8): New. (B15, B24, CRD32, CRS): New. (CRD, OBF, BFA, CR, CRFS): Use PPC_OPERAND_CR_REG. (DB, IMM20, RD, Rx, ARX, RY, RZ): New. (ARY, SCLSCI8, SCLSCI8N, SE_SD, SE_SDH): New. (SH6_MASK): Use PPC_OPSHIFT_INV. (SI8, UI5, OIMM5, UI7, BO16): New. (VLESIMM, VLENSIMM, VLEUIMM, VLEUIMML): New. (XT6, XA6, XB6, XB6S, XC6): Use PPC_OPSHIFT_INV. (ALLOW8_SPRG): New. (insert_sprg, extract_sprg): Check ALLOW8_SPRG. (OPVUP, OPVUP_MASK OPVUP): New (BD8, BD8_MASK, BD8IO, BD8IO_MASK): New. (EBD8IO, EBD8IO1_MASK, EBD8IO2_MASK, EBD8IO3_MASK): New. (BD15, BD15_MASK, EBD15, EBD15_MASK, EBD15BI, EBD15BI_MASK): New. (BD24,BD24_MASK, C_LK, C_LK_MASK, C, C_MASK): New. (IA16, IA16_MASK, I16A, I16A_MASK, I16L, I16L_MASK): New. (IM7, IM7_MASK, LI20, LI20_MASK, SCI8, SCI8_MASK): New. (SCI8BF, SCI8BF_MASK, SD4, SD4_MASK): New. (SE_IM5, SE_IM5_MASK): New. (SE_R, SE_R_MASK, SE_RR, SE_RR_MASK): New. (EX, EX_MASK, BO16F, BO16T, BO32F, BO32T): New. (BO32DNZ, BO32DZ): New. (NO371, PPCSPE, PPCISEL, PPCEFS, MULHW): Include PPC_OPCODE_VLE. (PPCVLE): New. (powerpc_opcodes): Add new VLE instructions. Update existing instruction to include PPCVLE if supported. * ppc-dis.c (ppc_opts): Add vle entry. (get_powerpc_dialect): New function. (powerpc_init_dialect): VLE support. (print_insn_big_powerpc): Call get_powerpc_dialect. (print_insn_little_powerpc): Likewise. (operand_value_powerpc): Handle negative shift counts. (print_insn_powerpc): Handle 2-byte instruction lengths.
2012-05-14 21:45:30 +02:00
{{readelf "-l" vle-multiseg-3.d}} "vle-multiseg-3"}
{"VLE multiple segments 4" "-melf32ppc -T vle-multiseg-4.ld" ""
"-a32 -mbig -mregnames -mvle" {vle-multiseg.s}
Add support for PowerPC VLE. 2012-05-14 Catherine Moore <clm@codesourcery.com> * NEWS: Mention PowerPC VLE port. 2012-05-14 James Lemke <jwlemke@codesourcery.com> Catherine Moore <clm@codesourcery.com> bfd/ * bfd.c (bfd_lookup_section_flags): Add section parm. * ecoff.c (bfd_debug_section): Remove flag_info initializer. * elf-bfd.h (bfd_elf_section_data): Move in section_flag_info. (bfd_elf_lookup_section_flags): Add section parm. * elf32-ppc.c (is_ppc_vle): New function. (ppc_elf_modify_segment_map): New function. (elf_backend_modify_segment_map): Define. (has_vle_insns): New define. * elf32-ppc.h (ppc_elf_modify_segment_map): Declare. * elflink.c (bfd_elf_lookup_section_flags): Add return value & parm. Move in logic to omit / include a section. * libbfd-in.h (bfd_link_info): Add section parm. (bfd_generic_lookup_section_flags): Likewise. * reloc.c (bfd_generic_lookup_section_flags): Likewise. * section.c (bfd_section): Move out section_flag_info. (BFD_FAKE_SECTION): Remove flag_info initializer. * targets.c (_bfd_lookup_section_flags): Add section parm. 2012-05-14 Catherine Moore <clm@codesourcery.com> bfd/ * archures.c (bfd_mach_ppc_vle): New. * bfd-in2.h: Regenerated. * cpu-powerpc.c (bfd_powerpc_archs): New entry for vle. * elf32-ppc.c (split16_format_type): New enumeration. (ppc_elf_vle_split16): New function. (HOWTO): Add entries for R_PPC_VLE relocations. (ppc_elf_reloc_type_lookup): Handle PPC_VLE relocations. (ppc_elf_section_flags): New function. (ppc_elf_lookup_section_flags): New function. (ppc_elf_section_processing): New function. (ppc_elf_check_relocs): Handle PPC_VLE relocations. (ppc_elf_relocation_section): Likewise. (elf_backend_lookup_section_flags_hook): Define. (elf_backend_section_flags): Define. (elf_backend_section_processing): Define. * elf32-ppc.h (ppc_elf_section_processing): Declare. * libbfd.h: Regenerated. * reloc.c (BFD_RELOC_PPC_VLE_REL8, BFD_RELOC_PPC_VLE_REL15, BFD_RELOC_PPC_VLE_REL24, BFD_RELOC_PPC_VLE_LO16A, BFD_RELOC_PPC_VLE_LO16D, BFD_RELOC_PPC_VLE_HI16A, BFD_RELOC_PPC_VLE_HI16D, BFD_RELOC_PPC_VLE_HA16A, BFD_RELOC_PPC_VLE_HA16D, BFD_RELOC_PPC_VLE_SDA21, BFD_RELOC_PPC_VLE_SDA21_LO, BFD_RELOC_PPC_VLE_SDAREL_LO16A, BFD_RELOC_PPC_VLE_SDAREL_LO16D, BFD_RELOC_PPC_VLE_SDAREL_HI16A, BFD_RELOC_PPC_VLE_SDAREL_HI16D, BFD_RELOC_PPC_VLE_SDAREL_HA16A, BFD_RELOC_PPC_VLE_SDAREL_HA16D): New bfd relocations. 2012-05-14 James Lemke <jwlemke@codesourcery.com> gas/ * config/tc-ppc.c (insn_validate): New func of existing code to call.. (ppc_setup_opcodes): ..from 2 places here. Revise for second (VLE) opcode table. Add #ifdef'd code to print opcode tables. 2012-05-14 James Lemke <jwlemke@codesourcery.com> gas/ * config/tc-ppc.c (ppc_setup_opcodes): Allow out-of-order for the VLE conditional branches. 2012-05-14 Catherine Moore <clm@codesourcery.com> Maciej W. Rozycki <macro@codesourcery.com> Rhonda Wittels <rhonda@codesourcery.com> gas/ * config/tc-ppc.c (PPC_VLE_SPLIT16A): New macro. (PPC_VLE_SPLIT16D): New macro. (PPC_VLE_LO16A): New macro. (PPC_VLE_LO16D): New macro. (PPC_VLE_HI16A): New macro. (PPC_VLE_HI16D): New macro. (PPC_VLE_HA16A): New macro. (PPC_VLE_HA16D): New macro. (PPC_APUINFO_VLE): New definition. (md_chars_to_number): New function. (md_parse_option): Check for combinations of little endian and -mvle. (md_show_usage): Document -mvle. (ppc_arch): Recognize VLE. (ppc_mach): Recognize bfd_mach_ppc_vle. (ppc_setup_opcodes): Print the opcode table if * config/tc-ppc.h (ppc_frag_check): Declare. * doc/c-ppc.texi: Document -mvle. * NEWS: Mention PowerPC VLE port. 2012-05-14 Catherine Moore <clm@codesourcery.com> gas/ * config/tc-ppc.h (ppc_dw2_line_min_insn_length): Declare. (DWARF2_LINE_MIN_INSN_LENGTH): Redefine. * config/tc-ppc.c (ppc_dw2_line_min_insn_length): New. * dwarf2dbg.c (scale_addr_delta): Handle values of 1 for DWARF2_LINE_MIN_INSN_LENGTH. 2012-05-14 Catherine Moore <clm@codesourcery.com> Maciej W. Rozycki <macro@codesourcery.com> Rhonda Wittels <rhonda@codesourcery.com> gas/testsuite/ * gas/ppc/ppc.exp: Run new tests. * gas/ppc/vle-reloc.d: New test. * gas/ppc/vle-reloc.s: New test. * gas/ppc/vle-simple-1.d: New test. * gas/ppc/vle-simple-1.s: New test. * gas/ppc/vle-simple-2.d: New test. * gas/ppc/vle-simple-2.s: New test. * gas/ppc/vle-simple-3.d: New test. * gas/ppc/vle-simple-3.s: New test. * gas/ppc/vle-simple-4.d: New test. * gas/ppc/vle-simple-4.s: New test. * gas/ppc/vle-simple-5.d: New test. * gas/ppc/vle-simple-5.s: New test. * gas/ppc/vle-simple-6.d: New test. * gas/ppc/vle-simple-6.s: New test. * gas/ppc/vle.d: New test. * gas/ppc/vle.s: New test. 2012-05-14 James Lemke <jwlemke@codesourcery.com> include/elf/ * ppc.h (SEC_PPC_VLE): Remove. 2012-05-14 Catherine Moore <clm@codesourcery.com> James Lemke <jwlemke@codesourcery.com> include/elf/ * ppc.h (R_PPC_VLE_REL8): New reloction. (R_PPC_VLE_REL15): Likewise. (R_PPC_VLE_REL24): Likewise. (R_PPC_VLE_LO16A): Likewise. (R_PPC_VLE_LO16D): Likewise. (R_PPC_VLE_HI16A): Likewise. (R_PPC_VLE_HI16D): Likewise. (R_PPC_VLE_HA16A): Likewise. (R_PPC_VLE_HA16D): Likewise. (R_PPC_VLE_SDA21): Likewise. (R_PPC_VLE_SDA21_LO): Likewise. (R_PPC_VLE_SDAREL_LO16A): Likewise. (R_PPC_VLE_SDAREL_LO16D): Likewise. (R_PPC_VLE_SDAREL_HI16A): Likewise. (R_PPC_VLE_SDAREL_HI16D): Likewise. (R_PPC_VLE_SDAREL_HA16A): Likewise. (R_PPC_VLE_SDAREL_HA16D): Likewise. (SEC_PPC_VLE): Remove. (PF_PPC_VLE): New program header flag. (SHF_PPC_VLE): New section header flag. (vle_opcodes, vle_num_opcodes): New. (VLE_OP): New macro. (VLE_OP_TO_SEG): New macro. 2012-05-14 Catherine Moore <clm@codesourcery.com> Maciej W. Rozycki <macro@codesourcery.com> Rhonda Wittels <rhonda@codesourcery.com> include/opcode/ * ppc.h (PPC_OPCODE_VLE): New definition. (PPC_OP_SA): New macro. (PPC_OP_SE_VLE): New macro. (PPC_OP): Use a variable shift amount. (powerpc_operand): Update comments. (PPC_OPSHIFT_INV): New macro. (PPC_OPERAND_CR): Replace with... (PPC_OPERAND_CR_BIT): ...this and (PPC_OPERAND_CR_REG): ...this. 2012-05-14 James Lemke <jwlemke@codesourcery.com> ld/ * ldlang.c (walk_wild_consider_section): Don't copy section_flag_list. Pass it to callback. (walk_wild_section_general): Pass section_flag_list to callback. (lang_add_section): Add sflag_list parm. Move out logic to keep / omit a section & call bfd_lookup_section_flags. (output_section_callback_fast): Add sflag_list parm. Add new parm to lang_add_section calls. (output_section_callback): Likewise. (check_section_callback): Add sflag_list parm. (lang_place_orphans): Add new parm to lang_add_section calls. (gc_section_callback): Add sflag_list parm. (find_relro_section_callback): Likewise. * ldlang.h (callback_t): Add flag_info parm. (lang_add_section): Add sflag_list parm. * emultempl/armelf.em (elf32_arm_add_stub_section): Add lang_add_section parm. * emultempl/beos.em (gld*_place_orphan): Likewise. * emultempl/elf32.em (gld*_place_orphan): Likewise. * emultempl/hppaelf.em (hppaelf_add_stub_section): Likewise. * emultempl/m68hc1xelf.em (m68hc11elf_add_stub_section): Likewise. * emultempl/mipself.em (mips_add_stub_section): Likewise. * emultempl/mmo.em (mmo_place_orphan): Likewise. * emultempl/pe.em (gld_*_place_orphan): Likewise. * emultempl/pep.em (gld_*_place_orphan): Likewise. * emultempl/ppc64elf.em (ppc_add_stub_section): Likewise. * emultempl/spuelf.em (spu_place_special_section): Likewise. * emultempl/vms.em (vms_place_orphan): Likewise. 2012-05-14 James Lemke <jwlemke@codesourcery.com> ld/testsuite/ * ld-powerpc/powerpc.exp: Create ppceabitests. * ld-powerpc/vle-multiseg.s: New. * ld-powerpc/vle-multiseg-1.d: New. * ld-powerpc/vle-multiseg-1.ld: New. * ld-powerpc/vle-multiseg-2.d: New. * ld-powerpc/vle-multiseg-2.ld: New. * ld-powerpc/vle-multiseg-3.d: New. * ld-powerpc/vle-multiseg-3.ld: New. * ld-powerpc/vle-multiseg-4.d: New. * ld-powerpc/vle-multiseg-4.ld: New. * ld-powerpc/vle-multiseg-5.d: New. * ld-powerpc/vle-multiseg-5.ld: New. * ld-powerpc/vle-multiseg-6.d: New. * ld-powerpc/vle-multiseg-6.ld: New. * ld-powerpc/vle-multiseg-6a.s: New. * ld-powerpc/vle-multiseg-6b.s: New. * ld-powerpc/vle-multiseg-6c.s: New. * ld-powerpc/vle-multiseg-6d.s: New. * ld-powerpc/powerpc.exp: Run new tests. 2012-05-14 Catherine Moore <clm@codesourcery.com> ld/ * NEWS: Mention PowerPC VLE port. 2012-05-14 Catherine Moore <clm@codesourcery.com> ld/testsuite/ * ld-powerpc/apuinfo.rd: Update for VLE. * ld-powerpc/vle-reloc-1.d: New. * ld-powerpc/vle-reloc-1.s: New. * ld-powerpc/vle-reloc-2.d: New. * ld-powerpc/vle-reloc-2.s: New. * ld-powerpc/vle-reloc-3.d: New. * ld-powerpc/vle-reloc-3.s: New. * ld-powerpc/vle-reloc-def-1.s: New. * ld-powerpc/vle-reloc-def-2.s: New. * ld-powerpc/vle-reloc-def-3.s: New. 2012-05-14 James Lemke <jwlemke@codesourcery.com> opcodes/ * ppc-dis.c (get_powerpc_dialect): Use is_ppc_vle. (PPC_OPCD_SEGS, VLE_OPCD_SEGS): New defines. (vle_opcd_indices): New array. (lookup_vle): New function. (disassemble_init_powerpc): Revise for second (VLE) opcode table. (print_insn_powerpc): Likewise. * ppc-opc.c: Likewise. 2012-05-14 Catherine Moore <clm@codesourcery.com> Maciej W. Rozycki <macro@codesourcery.com> Rhonda Wittels <rhonda@codesourcery.com> Nathan Froyd <froydnj@codesourcery.com> opcodes/ * ppc-opc.c (insert_arx, extract_arx): New functions. (insert_ary, extract_ary): New functions. (insert_li20, extract_li20): New functions. (insert_rx, extract_rx): New functions. (insert_ry, extract_ry): New functions. (insert_sci8, extract_sci8): New functions. (insert_sci8n, extract_sci8n): New functions. (insert_sd4h, extract_sd4h): New functions. (insert_sd4w, extract_sd4w): New functions. (insert_vlesi, extract_vlesi): New functions. (insert_vlensi, extract_vlensi): New functions. (insert_vleui, extract_vleui): New functions. (insert_vleil, extract_vleil): New functions. (BI_MASK, BB_MASK, BT): Use PPC_OPERAND_CR_BIT. (BI16, BI32, BO32, B8): New. (B15, B24, CRD32, CRS): New. (CRD, OBF, BFA, CR, CRFS): Use PPC_OPERAND_CR_REG. (DB, IMM20, RD, Rx, ARX, RY, RZ): New. (ARY, SCLSCI8, SCLSCI8N, SE_SD, SE_SDH): New. (SH6_MASK): Use PPC_OPSHIFT_INV. (SI8, UI5, OIMM5, UI7, BO16): New. (VLESIMM, VLENSIMM, VLEUIMM, VLEUIMML): New. (XT6, XA6, XB6, XB6S, XC6): Use PPC_OPSHIFT_INV. (ALLOW8_SPRG): New. (insert_sprg, extract_sprg): Check ALLOW8_SPRG. (OPVUP, OPVUP_MASK OPVUP): New (BD8, BD8_MASK, BD8IO, BD8IO_MASK): New. (EBD8IO, EBD8IO1_MASK, EBD8IO2_MASK, EBD8IO3_MASK): New. (BD15, BD15_MASK, EBD15, EBD15_MASK, EBD15BI, EBD15BI_MASK): New. (BD24,BD24_MASK, C_LK, C_LK_MASK, C, C_MASK): New. (IA16, IA16_MASK, I16A, I16A_MASK, I16L, I16L_MASK): New. (IM7, IM7_MASK, LI20, LI20_MASK, SCI8, SCI8_MASK): New. (SCI8BF, SCI8BF_MASK, SD4, SD4_MASK): New. (SE_IM5, SE_IM5_MASK): New. (SE_R, SE_R_MASK, SE_RR, SE_RR_MASK): New. (EX, EX_MASK, BO16F, BO16T, BO32F, BO32T): New. (BO32DNZ, BO32DZ): New. (NO371, PPCSPE, PPCISEL, PPCEFS, MULHW): Include PPC_OPCODE_VLE. (PPCVLE): New. (powerpc_opcodes): Add new VLE instructions. Update existing instruction to include PPCVLE if supported. * ppc-dis.c (ppc_opts): Add vle entry. (get_powerpc_dialect): New function. (powerpc_init_dialect): VLE support. (print_insn_big_powerpc): Call get_powerpc_dialect. (print_insn_little_powerpc): Likewise. (operand_value_powerpc): Handle negative shift counts. (print_insn_powerpc): Handle 2-byte instruction lengths.
2012-05-14 21:45:30 +02:00
{{readelf "-l" vle-multiseg-4.d}} "vle-multiseg-4"}
{"VLE multiple segments 5" "-melf32ppc -T vle-multiseg-5.ld" ""
"-a32 -mbig -mregnames -mvle" {vle-multiseg.s}
Add support for PowerPC VLE. 2012-05-14 Catherine Moore <clm@codesourcery.com> * NEWS: Mention PowerPC VLE port. 2012-05-14 James Lemke <jwlemke@codesourcery.com> Catherine Moore <clm@codesourcery.com> bfd/ * bfd.c (bfd_lookup_section_flags): Add section parm. * ecoff.c (bfd_debug_section): Remove flag_info initializer. * elf-bfd.h (bfd_elf_section_data): Move in section_flag_info. (bfd_elf_lookup_section_flags): Add section parm. * elf32-ppc.c (is_ppc_vle): New function. (ppc_elf_modify_segment_map): New function. (elf_backend_modify_segment_map): Define. (has_vle_insns): New define. * elf32-ppc.h (ppc_elf_modify_segment_map): Declare. * elflink.c (bfd_elf_lookup_section_flags): Add return value & parm. Move in logic to omit / include a section. * libbfd-in.h (bfd_link_info): Add section parm. (bfd_generic_lookup_section_flags): Likewise. * reloc.c (bfd_generic_lookup_section_flags): Likewise. * section.c (bfd_section): Move out section_flag_info. (BFD_FAKE_SECTION): Remove flag_info initializer. * targets.c (_bfd_lookup_section_flags): Add section parm. 2012-05-14 Catherine Moore <clm@codesourcery.com> bfd/ * archures.c (bfd_mach_ppc_vle): New. * bfd-in2.h: Regenerated. * cpu-powerpc.c (bfd_powerpc_archs): New entry for vle. * elf32-ppc.c (split16_format_type): New enumeration. (ppc_elf_vle_split16): New function. (HOWTO): Add entries for R_PPC_VLE relocations. (ppc_elf_reloc_type_lookup): Handle PPC_VLE relocations. (ppc_elf_section_flags): New function. (ppc_elf_lookup_section_flags): New function. (ppc_elf_section_processing): New function. (ppc_elf_check_relocs): Handle PPC_VLE relocations. (ppc_elf_relocation_section): Likewise. (elf_backend_lookup_section_flags_hook): Define. (elf_backend_section_flags): Define. (elf_backend_section_processing): Define. * elf32-ppc.h (ppc_elf_section_processing): Declare. * libbfd.h: Regenerated. * reloc.c (BFD_RELOC_PPC_VLE_REL8, BFD_RELOC_PPC_VLE_REL15, BFD_RELOC_PPC_VLE_REL24, BFD_RELOC_PPC_VLE_LO16A, BFD_RELOC_PPC_VLE_LO16D, BFD_RELOC_PPC_VLE_HI16A, BFD_RELOC_PPC_VLE_HI16D, BFD_RELOC_PPC_VLE_HA16A, BFD_RELOC_PPC_VLE_HA16D, BFD_RELOC_PPC_VLE_SDA21, BFD_RELOC_PPC_VLE_SDA21_LO, BFD_RELOC_PPC_VLE_SDAREL_LO16A, BFD_RELOC_PPC_VLE_SDAREL_LO16D, BFD_RELOC_PPC_VLE_SDAREL_HI16A, BFD_RELOC_PPC_VLE_SDAREL_HI16D, BFD_RELOC_PPC_VLE_SDAREL_HA16A, BFD_RELOC_PPC_VLE_SDAREL_HA16D): New bfd relocations. 2012-05-14 James Lemke <jwlemke@codesourcery.com> gas/ * config/tc-ppc.c (insn_validate): New func of existing code to call.. (ppc_setup_opcodes): ..from 2 places here. Revise for second (VLE) opcode table. Add #ifdef'd code to print opcode tables. 2012-05-14 James Lemke <jwlemke@codesourcery.com> gas/ * config/tc-ppc.c (ppc_setup_opcodes): Allow out-of-order for the VLE conditional branches. 2012-05-14 Catherine Moore <clm@codesourcery.com> Maciej W. Rozycki <macro@codesourcery.com> Rhonda Wittels <rhonda@codesourcery.com> gas/ * config/tc-ppc.c (PPC_VLE_SPLIT16A): New macro. (PPC_VLE_SPLIT16D): New macro. (PPC_VLE_LO16A): New macro. (PPC_VLE_LO16D): New macro. (PPC_VLE_HI16A): New macro. (PPC_VLE_HI16D): New macro. (PPC_VLE_HA16A): New macro. (PPC_VLE_HA16D): New macro. (PPC_APUINFO_VLE): New definition. (md_chars_to_number): New function. (md_parse_option): Check for combinations of little endian and -mvle. (md_show_usage): Document -mvle. (ppc_arch): Recognize VLE. (ppc_mach): Recognize bfd_mach_ppc_vle. (ppc_setup_opcodes): Print the opcode table if * config/tc-ppc.h (ppc_frag_check): Declare. * doc/c-ppc.texi: Document -mvle. * NEWS: Mention PowerPC VLE port. 2012-05-14 Catherine Moore <clm@codesourcery.com> gas/ * config/tc-ppc.h (ppc_dw2_line_min_insn_length): Declare. (DWARF2_LINE_MIN_INSN_LENGTH): Redefine. * config/tc-ppc.c (ppc_dw2_line_min_insn_length): New. * dwarf2dbg.c (scale_addr_delta): Handle values of 1 for DWARF2_LINE_MIN_INSN_LENGTH. 2012-05-14 Catherine Moore <clm@codesourcery.com> Maciej W. Rozycki <macro@codesourcery.com> Rhonda Wittels <rhonda@codesourcery.com> gas/testsuite/ * gas/ppc/ppc.exp: Run new tests. * gas/ppc/vle-reloc.d: New test. * gas/ppc/vle-reloc.s: New test. * gas/ppc/vle-simple-1.d: New test. * gas/ppc/vle-simple-1.s: New test. * gas/ppc/vle-simple-2.d: New test. * gas/ppc/vle-simple-2.s: New test. * gas/ppc/vle-simple-3.d: New test. * gas/ppc/vle-simple-3.s: New test. * gas/ppc/vle-simple-4.d: New test. * gas/ppc/vle-simple-4.s: New test. * gas/ppc/vle-simple-5.d: New test. * gas/ppc/vle-simple-5.s: New test. * gas/ppc/vle-simple-6.d: New test. * gas/ppc/vle-simple-6.s: New test. * gas/ppc/vle.d: New test. * gas/ppc/vle.s: New test. 2012-05-14 James Lemke <jwlemke@codesourcery.com> include/elf/ * ppc.h (SEC_PPC_VLE): Remove. 2012-05-14 Catherine Moore <clm@codesourcery.com> James Lemke <jwlemke@codesourcery.com> include/elf/ * ppc.h (R_PPC_VLE_REL8): New reloction. (R_PPC_VLE_REL15): Likewise. (R_PPC_VLE_REL24): Likewise. (R_PPC_VLE_LO16A): Likewise. (R_PPC_VLE_LO16D): Likewise. (R_PPC_VLE_HI16A): Likewise. (R_PPC_VLE_HI16D): Likewise. (R_PPC_VLE_HA16A): Likewise. (R_PPC_VLE_HA16D): Likewise. (R_PPC_VLE_SDA21): Likewise. (R_PPC_VLE_SDA21_LO): Likewise. (R_PPC_VLE_SDAREL_LO16A): Likewise. (R_PPC_VLE_SDAREL_LO16D): Likewise. (R_PPC_VLE_SDAREL_HI16A): Likewise. (R_PPC_VLE_SDAREL_HI16D): Likewise. (R_PPC_VLE_SDAREL_HA16A): Likewise. (R_PPC_VLE_SDAREL_HA16D): Likewise. (SEC_PPC_VLE): Remove. (PF_PPC_VLE): New program header flag. (SHF_PPC_VLE): New section header flag. (vle_opcodes, vle_num_opcodes): New. (VLE_OP): New macro. (VLE_OP_TO_SEG): New macro. 2012-05-14 Catherine Moore <clm@codesourcery.com> Maciej W. Rozycki <macro@codesourcery.com> Rhonda Wittels <rhonda@codesourcery.com> include/opcode/ * ppc.h (PPC_OPCODE_VLE): New definition. (PPC_OP_SA): New macro. (PPC_OP_SE_VLE): New macro. (PPC_OP): Use a variable shift amount. (powerpc_operand): Update comments. (PPC_OPSHIFT_INV): New macro. (PPC_OPERAND_CR): Replace with... (PPC_OPERAND_CR_BIT): ...this and (PPC_OPERAND_CR_REG): ...this. 2012-05-14 James Lemke <jwlemke@codesourcery.com> ld/ * ldlang.c (walk_wild_consider_section): Don't copy section_flag_list. Pass it to callback. (walk_wild_section_general): Pass section_flag_list to callback. (lang_add_section): Add sflag_list parm. Move out logic to keep / omit a section & call bfd_lookup_section_flags. (output_section_callback_fast): Add sflag_list parm. Add new parm to lang_add_section calls. (output_section_callback): Likewise. (check_section_callback): Add sflag_list parm. (lang_place_orphans): Add new parm to lang_add_section calls. (gc_section_callback): Add sflag_list parm. (find_relro_section_callback): Likewise. * ldlang.h (callback_t): Add flag_info parm. (lang_add_section): Add sflag_list parm. * emultempl/armelf.em (elf32_arm_add_stub_section): Add lang_add_section parm. * emultempl/beos.em (gld*_place_orphan): Likewise. * emultempl/elf32.em (gld*_place_orphan): Likewise. * emultempl/hppaelf.em (hppaelf_add_stub_section): Likewise. * emultempl/m68hc1xelf.em (m68hc11elf_add_stub_section): Likewise. * emultempl/mipself.em (mips_add_stub_section): Likewise. * emultempl/mmo.em (mmo_place_orphan): Likewise. * emultempl/pe.em (gld_*_place_orphan): Likewise. * emultempl/pep.em (gld_*_place_orphan): Likewise. * emultempl/ppc64elf.em (ppc_add_stub_section): Likewise. * emultempl/spuelf.em (spu_place_special_section): Likewise. * emultempl/vms.em (vms_place_orphan): Likewise. 2012-05-14 James Lemke <jwlemke@codesourcery.com> ld/testsuite/ * ld-powerpc/powerpc.exp: Create ppceabitests. * ld-powerpc/vle-multiseg.s: New. * ld-powerpc/vle-multiseg-1.d: New. * ld-powerpc/vle-multiseg-1.ld: New. * ld-powerpc/vle-multiseg-2.d: New. * ld-powerpc/vle-multiseg-2.ld: New. * ld-powerpc/vle-multiseg-3.d: New. * ld-powerpc/vle-multiseg-3.ld: New. * ld-powerpc/vle-multiseg-4.d: New. * ld-powerpc/vle-multiseg-4.ld: New. * ld-powerpc/vle-multiseg-5.d: New. * ld-powerpc/vle-multiseg-5.ld: New. * ld-powerpc/vle-multiseg-6.d: New. * ld-powerpc/vle-multiseg-6.ld: New. * ld-powerpc/vle-multiseg-6a.s: New. * ld-powerpc/vle-multiseg-6b.s: New. * ld-powerpc/vle-multiseg-6c.s: New. * ld-powerpc/vle-multiseg-6d.s: New. * ld-powerpc/powerpc.exp: Run new tests. 2012-05-14 Catherine Moore <clm@codesourcery.com> ld/ * NEWS: Mention PowerPC VLE port. 2012-05-14 Catherine Moore <clm@codesourcery.com> ld/testsuite/ * ld-powerpc/apuinfo.rd: Update for VLE. * ld-powerpc/vle-reloc-1.d: New. * ld-powerpc/vle-reloc-1.s: New. * ld-powerpc/vle-reloc-2.d: New. * ld-powerpc/vle-reloc-2.s: New. * ld-powerpc/vle-reloc-3.d: New. * ld-powerpc/vle-reloc-3.s: New. * ld-powerpc/vle-reloc-def-1.s: New. * ld-powerpc/vle-reloc-def-2.s: New. * ld-powerpc/vle-reloc-def-3.s: New. 2012-05-14 James Lemke <jwlemke@codesourcery.com> opcodes/ * ppc-dis.c (get_powerpc_dialect): Use is_ppc_vle. (PPC_OPCD_SEGS, VLE_OPCD_SEGS): New defines. (vle_opcd_indices): New array. (lookup_vle): New function. (disassemble_init_powerpc): Revise for second (VLE) opcode table. (print_insn_powerpc): Likewise. * ppc-opc.c: Likewise. 2012-05-14 Catherine Moore <clm@codesourcery.com> Maciej W. Rozycki <macro@codesourcery.com> Rhonda Wittels <rhonda@codesourcery.com> Nathan Froyd <froydnj@codesourcery.com> opcodes/ * ppc-opc.c (insert_arx, extract_arx): New functions. (insert_ary, extract_ary): New functions. (insert_li20, extract_li20): New functions. (insert_rx, extract_rx): New functions. (insert_ry, extract_ry): New functions. (insert_sci8, extract_sci8): New functions. (insert_sci8n, extract_sci8n): New functions. (insert_sd4h, extract_sd4h): New functions. (insert_sd4w, extract_sd4w): New functions. (insert_vlesi, extract_vlesi): New functions. (insert_vlensi, extract_vlensi): New functions. (insert_vleui, extract_vleui): New functions. (insert_vleil, extract_vleil): New functions. (BI_MASK, BB_MASK, BT): Use PPC_OPERAND_CR_BIT. (BI16, BI32, BO32, B8): New. (B15, B24, CRD32, CRS): New. (CRD, OBF, BFA, CR, CRFS): Use PPC_OPERAND_CR_REG. (DB, IMM20, RD, Rx, ARX, RY, RZ): New. (ARY, SCLSCI8, SCLSCI8N, SE_SD, SE_SDH): New. (SH6_MASK): Use PPC_OPSHIFT_INV. (SI8, UI5, OIMM5, UI7, BO16): New. (VLESIMM, VLENSIMM, VLEUIMM, VLEUIMML): New. (XT6, XA6, XB6, XB6S, XC6): Use PPC_OPSHIFT_INV. (ALLOW8_SPRG): New. (insert_sprg, extract_sprg): Check ALLOW8_SPRG. (OPVUP, OPVUP_MASK OPVUP): New (BD8, BD8_MASK, BD8IO, BD8IO_MASK): New. (EBD8IO, EBD8IO1_MASK, EBD8IO2_MASK, EBD8IO3_MASK): New. (BD15, BD15_MASK, EBD15, EBD15_MASK, EBD15BI, EBD15BI_MASK): New. (BD24,BD24_MASK, C_LK, C_LK_MASK, C, C_MASK): New. (IA16, IA16_MASK, I16A, I16A_MASK, I16L, I16L_MASK): New. (IM7, IM7_MASK, LI20, LI20_MASK, SCI8, SCI8_MASK): New. (SCI8BF, SCI8BF_MASK, SD4, SD4_MASK): New. (SE_IM5, SE_IM5_MASK): New. (SE_R, SE_R_MASK, SE_RR, SE_RR_MASK): New. (EX, EX_MASK, BO16F, BO16T, BO32F, BO32T): New. (BO32DNZ, BO32DZ): New. (NO371, PPCSPE, PPCISEL, PPCEFS, MULHW): Include PPC_OPCODE_VLE. (PPCVLE): New. (powerpc_opcodes): Add new VLE instructions. Update existing instruction to include PPCVLE if supported. * ppc-dis.c (ppc_opts): Add vle entry. (get_powerpc_dialect): New function. (powerpc_init_dialect): VLE support. (print_insn_big_powerpc): Call get_powerpc_dialect. (print_insn_little_powerpc): Likewise. (operand_value_powerpc): Handle negative shift counts. (print_insn_powerpc): Handle 2-byte instruction lengths.
2012-05-14 21:45:30 +02:00
{{readelf "-l" vle-multiseg-5.d}} "vle-multiseg-5"}
{"VLE relocations 1" "-melf32ppc -T vle.ld" ""
"-a32 -mbig -mvle" {vle-reloc-1.s vle-reloc-def-1.s}
Add support for PowerPC VLE. 2012-05-14 Catherine Moore <clm@codesourcery.com> * NEWS: Mention PowerPC VLE port. 2012-05-14 James Lemke <jwlemke@codesourcery.com> Catherine Moore <clm@codesourcery.com> bfd/ * bfd.c (bfd_lookup_section_flags): Add section parm. * ecoff.c (bfd_debug_section): Remove flag_info initializer. * elf-bfd.h (bfd_elf_section_data): Move in section_flag_info. (bfd_elf_lookup_section_flags): Add section parm. * elf32-ppc.c (is_ppc_vle): New function. (ppc_elf_modify_segment_map): New function. (elf_backend_modify_segment_map): Define. (has_vle_insns): New define. * elf32-ppc.h (ppc_elf_modify_segment_map): Declare. * elflink.c (bfd_elf_lookup_section_flags): Add return value & parm. Move in logic to omit / include a section. * libbfd-in.h (bfd_link_info): Add section parm. (bfd_generic_lookup_section_flags): Likewise. * reloc.c (bfd_generic_lookup_section_flags): Likewise. * section.c (bfd_section): Move out section_flag_info. (BFD_FAKE_SECTION): Remove flag_info initializer. * targets.c (_bfd_lookup_section_flags): Add section parm. 2012-05-14 Catherine Moore <clm@codesourcery.com> bfd/ * archures.c (bfd_mach_ppc_vle): New. * bfd-in2.h: Regenerated. * cpu-powerpc.c (bfd_powerpc_archs): New entry for vle. * elf32-ppc.c (split16_format_type): New enumeration. (ppc_elf_vle_split16): New function. (HOWTO): Add entries for R_PPC_VLE relocations. (ppc_elf_reloc_type_lookup): Handle PPC_VLE relocations. (ppc_elf_section_flags): New function. (ppc_elf_lookup_section_flags): New function. (ppc_elf_section_processing): New function. (ppc_elf_check_relocs): Handle PPC_VLE relocations. (ppc_elf_relocation_section): Likewise. (elf_backend_lookup_section_flags_hook): Define. (elf_backend_section_flags): Define. (elf_backend_section_processing): Define. * elf32-ppc.h (ppc_elf_section_processing): Declare. * libbfd.h: Regenerated. * reloc.c (BFD_RELOC_PPC_VLE_REL8, BFD_RELOC_PPC_VLE_REL15, BFD_RELOC_PPC_VLE_REL24, BFD_RELOC_PPC_VLE_LO16A, BFD_RELOC_PPC_VLE_LO16D, BFD_RELOC_PPC_VLE_HI16A, BFD_RELOC_PPC_VLE_HI16D, BFD_RELOC_PPC_VLE_HA16A, BFD_RELOC_PPC_VLE_HA16D, BFD_RELOC_PPC_VLE_SDA21, BFD_RELOC_PPC_VLE_SDA21_LO, BFD_RELOC_PPC_VLE_SDAREL_LO16A, BFD_RELOC_PPC_VLE_SDAREL_LO16D, BFD_RELOC_PPC_VLE_SDAREL_HI16A, BFD_RELOC_PPC_VLE_SDAREL_HI16D, BFD_RELOC_PPC_VLE_SDAREL_HA16A, BFD_RELOC_PPC_VLE_SDAREL_HA16D): New bfd relocations. 2012-05-14 James Lemke <jwlemke@codesourcery.com> gas/ * config/tc-ppc.c (insn_validate): New func of existing code to call.. (ppc_setup_opcodes): ..from 2 places here. Revise for second (VLE) opcode table. Add #ifdef'd code to print opcode tables. 2012-05-14 James Lemke <jwlemke@codesourcery.com> gas/ * config/tc-ppc.c (ppc_setup_opcodes): Allow out-of-order for the VLE conditional branches. 2012-05-14 Catherine Moore <clm@codesourcery.com> Maciej W. Rozycki <macro@codesourcery.com> Rhonda Wittels <rhonda@codesourcery.com> gas/ * config/tc-ppc.c (PPC_VLE_SPLIT16A): New macro. (PPC_VLE_SPLIT16D): New macro. (PPC_VLE_LO16A): New macro. (PPC_VLE_LO16D): New macro. (PPC_VLE_HI16A): New macro. (PPC_VLE_HI16D): New macro. (PPC_VLE_HA16A): New macro. (PPC_VLE_HA16D): New macro. (PPC_APUINFO_VLE): New definition. (md_chars_to_number): New function. (md_parse_option): Check for combinations of little endian and -mvle. (md_show_usage): Document -mvle. (ppc_arch): Recognize VLE. (ppc_mach): Recognize bfd_mach_ppc_vle. (ppc_setup_opcodes): Print the opcode table if * config/tc-ppc.h (ppc_frag_check): Declare. * doc/c-ppc.texi: Document -mvle. * NEWS: Mention PowerPC VLE port. 2012-05-14 Catherine Moore <clm@codesourcery.com> gas/ * config/tc-ppc.h (ppc_dw2_line_min_insn_length): Declare. (DWARF2_LINE_MIN_INSN_LENGTH): Redefine. * config/tc-ppc.c (ppc_dw2_line_min_insn_length): New. * dwarf2dbg.c (scale_addr_delta): Handle values of 1 for DWARF2_LINE_MIN_INSN_LENGTH. 2012-05-14 Catherine Moore <clm@codesourcery.com> Maciej W. Rozycki <macro@codesourcery.com> Rhonda Wittels <rhonda@codesourcery.com> gas/testsuite/ * gas/ppc/ppc.exp: Run new tests. * gas/ppc/vle-reloc.d: New test. * gas/ppc/vle-reloc.s: New test. * gas/ppc/vle-simple-1.d: New test. * gas/ppc/vle-simple-1.s: New test. * gas/ppc/vle-simple-2.d: New test. * gas/ppc/vle-simple-2.s: New test. * gas/ppc/vle-simple-3.d: New test. * gas/ppc/vle-simple-3.s: New test. * gas/ppc/vle-simple-4.d: New test. * gas/ppc/vle-simple-4.s: New test. * gas/ppc/vle-simple-5.d: New test. * gas/ppc/vle-simple-5.s: New test. * gas/ppc/vle-simple-6.d: New test. * gas/ppc/vle-simple-6.s: New test. * gas/ppc/vle.d: New test. * gas/ppc/vle.s: New test. 2012-05-14 James Lemke <jwlemke@codesourcery.com> include/elf/ * ppc.h (SEC_PPC_VLE): Remove. 2012-05-14 Catherine Moore <clm@codesourcery.com> James Lemke <jwlemke@codesourcery.com> include/elf/ * ppc.h (R_PPC_VLE_REL8): New reloction. (R_PPC_VLE_REL15): Likewise. (R_PPC_VLE_REL24): Likewise. (R_PPC_VLE_LO16A): Likewise. (R_PPC_VLE_LO16D): Likewise. (R_PPC_VLE_HI16A): Likewise. (R_PPC_VLE_HI16D): Likewise. (R_PPC_VLE_HA16A): Likewise. (R_PPC_VLE_HA16D): Likewise. (R_PPC_VLE_SDA21): Likewise. (R_PPC_VLE_SDA21_LO): Likewise. (R_PPC_VLE_SDAREL_LO16A): Likewise. (R_PPC_VLE_SDAREL_LO16D): Likewise. (R_PPC_VLE_SDAREL_HI16A): Likewise. (R_PPC_VLE_SDAREL_HI16D): Likewise. (R_PPC_VLE_SDAREL_HA16A): Likewise. (R_PPC_VLE_SDAREL_HA16D): Likewise. (SEC_PPC_VLE): Remove. (PF_PPC_VLE): New program header flag. (SHF_PPC_VLE): New section header flag. (vle_opcodes, vle_num_opcodes): New. (VLE_OP): New macro. (VLE_OP_TO_SEG): New macro. 2012-05-14 Catherine Moore <clm@codesourcery.com> Maciej W. Rozycki <macro@codesourcery.com> Rhonda Wittels <rhonda@codesourcery.com> include/opcode/ * ppc.h (PPC_OPCODE_VLE): New definition. (PPC_OP_SA): New macro. (PPC_OP_SE_VLE): New macro. (PPC_OP): Use a variable shift amount. (powerpc_operand): Update comments. (PPC_OPSHIFT_INV): New macro. (PPC_OPERAND_CR): Replace with... (PPC_OPERAND_CR_BIT): ...this and (PPC_OPERAND_CR_REG): ...this. 2012-05-14 James Lemke <jwlemke@codesourcery.com> ld/ * ldlang.c (walk_wild_consider_section): Don't copy section_flag_list. Pass it to callback. (walk_wild_section_general): Pass section_flag_list to callback. (lang_add_section): Add sflag_list parm. Move out logic to keep / omit a section & call bfd_lookup_section_flags. (output_section_callback_fast): Add sflag_list parm. Add new parm to lang_add_section calls. (output_section_callback): Likewise. (check_section_callback): Add sflag_list parm. (lang_place_orphans): Add new parm to lang_add_section calls. (gc_section_callback): Add sflag_list parm. (find_relro_section_callback): Likewise. * ldlang.h (callback_t): Add flag_info parm. (lang_add_section): Add sflag_list parm. * emultempl/armelf.em (elf32_arm_add_stub_section): Add lang_add_section parm. * emultempl/beos.em (gld*_place_orphan): Likewise. * emultempl/elf32.em (gld*_place_orphan): Likewise. * emultempl/hppaelf.em (hppaelf_add_stub_section): Likewise. * emultempl/m68hc1xelf.em (m68hc11elf_add_stub_section): Likewise. * emultempl/mipself.em (mips_add_stub_section): Likewise. * emultempl/mmo.em (mmo_place_orphan): Likewise. * emultempl/pe.em (gld_*_place_orphan): Likewise. * emultempl/pep.em (gld_*_place_orphan): Likewise. * emultempl/ppc64elf.em (ppc_add_stub_section): Likewise. * emultempl/spuelf.em (spu_place_special_section): Likewise. * emultempl/vms.em (vms_place_orphan): Likewise. 2012-05-14 James Lemke <jwlemke@codesourcery.com> ld/testsuite/ * ld-powerpc/powerpc.exp: Create ppceabitests. * ld-powerpc/vle-multiseg.s: New. * ld-powerpc/vle-multiseg-1.d: New. * ld-powerpc/vle-multiseg-1.ld: New. * ld-powerpc/vle-multiseg-2.d: New. * ld-powerpc/vle-multiseg-2.ld: New. * ld-powerpc/vle-multiseg-3.d: New. * ld-powerpc/vle-multiseg-3.ld: New. * ld-powerpc/vle-multiseg-4.d: New. * ld-powerpc/vle-multiseg-4.ld: New. * ld-powerpc/vle-multiseg-5.d: New. * ld-powerpc/vle-multiseg-5.ld: New. * ld-powerpc/vle-multiseg-6.d: New. * ld-powerpc/vle-multiseg-6.ld: New. * ld-powerpc/vle-multiseg-6a.s: New. * ld-powerpc/vle-multiseg-6b.s: New. * ld-powerpc/vle-multiseg-6c.s: New. * ld-powerpc/vle-multiseg-6d.s: New. * ld-powerpc/powerpc.exp: Run new tests. 2012-05-14 Catherine Moore <clm@codesourcery.com> ld/ * NEWS: Mention PowerPC VLE port. 2012-05-14 Catherine Moore <clm@codesourcery.com> ld/testsuite/ * ld-powerpc/apuinfo.rd: Update for VLE. * ld-powerpc/vle-reloc-1.d: New. * ld-powerpc/vle-reloc-1.s: New. * ld-powerpc/vle-reloc-2.d: New. * ld-powerpc/vle-reloc-2.s: New. * ld-powerpc/vle-reloc-3.d: New. * ld-powerpc/vle-reloc-3.s: New. * ld-powerpc/vle-reloc-def-1.s: New. * ld-powerpc/vle-reloc-def-2.s: New. * ld-powerpc/vle-reloc-def-3.s: New. 2012-05-14 James Lemke <jwlemke@codesourcery.com> opcodes/ * ppc-dis.c (get_powerpc_dialect): Use is_ppc_vle. (PPC_OPCD_SEGS, VLE_OPCD_SEGS): New defines. (vle_opcd_indices): New array. (lookup_vle): New function. (disassemble_init_powerpc): Revise for second (VLE) opcode table. (print_insn_powerpc): Likewise. * ppc-opc.c: Likewise. 2012-05-14 Catherine Moore <clm@codesourcery.com> Maciej W. Rozycki <macro@codesourcery.com> Rhonda Wittels <rhonda@codesourcery.com> Nathan Froyd <froydnj@codesourcery.com> opcodes/ * ppc-opc.c (insert_arx, extract_arx): New functions. (insert_ary, extract_ary): New functions. (insert_li20, extract_li20): New functions. (insert_rx, extract_rx): New functions. (insert_ry, extract_ry): New functions. (insert_sci8, extract_sci8): New functions. (insert_sci8n, extract_sci8n): New functions. (insert_sd4h, extract_sd4h): New functions. (insert_sd4w, extract_sd4w): New functions. (insert_vlesi, extract_vlesi): New functions. (insert_vlensi, extract_vlensi): New functions. (insert_vleui, extract_vleui): New functions. (insert_vleil, extract_vleil): New functions. (BI_MASK, BB_MASK, BT): Use PPC_OPERAND_CR_BIT. (BI16, BI32, BO32, B8): New. (B15, B24, CRD32, CRS): New. (CRD, OBF, BFA, CR, CRFS): Use PPC_OPERAND_CR_REG. (DB, IMM20, RD, Rx, ARX, RY, RZ): New. (ARY, SCLSCI8, SCLSCI8N, SE_SD, SE_SDH): New. (SH6_MASK): Use PPC_OPSHIFT_INV. (SI8, UI5, OIMM5, UI7, BO16): New. (VLESIMM, VLENSIMM, VLEUIMM, VLEUIMML): New. (XT6, XA6, XB6, XB6S, XC6): Use PPC_OPSHIFT_INV. (ALLOW8_SPRG): New. (insert_sprg, extract_sprg): Check ALLOW8_SPRG. (OPVUP, OPVUP_MASK OPVUP): New (BD8, BD8_MASK, BD8IO, BD8IO_MASK): New. (EBD8IO, EBD8IO1_MASK, EBD8IO2_MASK, EBD8IO3_MASK): New. (BD15, BD15_MASK, EBD15, EBD15_MASK, EBD15BI, EBD15BI_MASK): New. (BD24,BD24_MASK, C_LK, C_LK_MASK, C, C_MASK): New. (IA16, IA16_MASK, I16A, I16A_MASK, I16L, I16L_MASK): New. (IM7, IM7_MASK, LI20, LI20_MASK, SCI8, SCI8_MASK): New. (SCI8BF, SCI8BF_MASK, SD4, SD4_MASK): New. (SE_IM5, SE_IM5_MASK): New. (SE_R, SE_R_MASK, SE_RR, SE_RR_MASK): New. (EX, EX_MASK, BO16F, BO16T, BO32F, BO32T): New. (BO32DNZ, BO32DZ): New. (NO371, PPCSPE, PPCISEL, PPCEFS, MULHW): Include PPC_OPCODE_VLE. (PPCVLE): New. (powerpc_opcodes): Add new VLE instructions. Update existing instruction to include PPCVLE if supported. * ppc-dis.c (ppc_opts): Add vle entry. (get_powerpc_dialect): New function. (powerpc_init_dialect): VLE support. (print_insn_big_powerpc): Call get_powerpc_dialect. (print_insn_little_powerpc): Likewise. (operand_value_powerpc): Handle negative shift counts. (print_insn_powerpc): Handle 2-byte instruction lengths.
2012-05-14 21:45:30 +02:00
{{objdump "-Mvle -d" vle-reloc-1.d}} "vle-reloc-1"}
{"VLE relocations 2" "-melf32ppc -T vle.ld" ""
"-a32 -mbig -mvle" {vle-reloc-2.s vle-reloc-def-2.s}
Add support for PowerPC VLE. 2012-05-14 Catherine Moore <clm@codesourcery.com> * NEWS: Mention PowerPC VLE port. 2012-05-14 James Lemke <jwlemke@codesourcery.com> Catherine Moore <clm@codesourcery.com> bfd/ * bfd.c (bfd_lookup_section_flags): Add section parm. * ecoff.c (bfd_debug_section): Remove flag_info initializer. * elf-bfd.h (bfd_elf_section_data): Move in section_flag_info. (bfd_elf_lookup_section_flags): Add section parm. * elf32-ppc.c (is_ppc_vle): New function. (ppc_elf_modify_segment_map): New function. (elf_backend_modify_segment_map): Define. (has_vle_insns): New define. * elf32-ppc.h (ppc_elf_modify_segment_map): Declare. * elflink.c (bfd_elf_lookup_section_flags): Add return value & parm. Move in logic to omit / include a section. * libbfd-in.h (bfd_link_info): Add section parm. (bfd_generic_lookup_section_flags): Likewise. * reloc.c (bfd_generic_lookup_section_flags): Likewise. * section.c (bfd_section): Move out section_flag_info. (BFD_FAKE_SECTION): Remove flag_info initializer. * targets.c (_bfd_lookup_section_flags): Add section parm. 2012-05-14 Catherine Moore <clm@codesourcery.com> bfd/ * archures.c (bfd_mach_ppc_vle): New. * bfd-in2.h: Regenerated. * cpu-powerpc.c (bfd_powerpc_archs): New entry for vle. * elf32-ppc.c (split16_format_type): New enumeration. (ppc_elf_vle_split16): New function. (HOWTO): Add entries for R_PPC_VLE relocations. (ppc_elf_reloc_type_lookup): Handle PPC_VLE relocations. (ppc_elf_section_flags): New function. (ppc_elf_lookup_section_flags): New function. (ppc_elf_section_processing): New function. (ppc_elf_check_relocs): Handle PPC_VLE relocations. (ppc_elf_relocation_section): Likewise. (elf_backend_lookup_section_flags_hook): Define. (elf_backend_section_flags): Define. (elf_backend_section_processing): Define. * elf32-ppc.h (ppc_elf_section_processing): Declare. * libbfd.h: Regenerated. * reloc.c (BFD_RELOC_PPC_VLE_REL8, BFD_RELOC_PPC_VLE_REL15, BFD_RELOC_PPC_VLE_REL24, BFD_RELOC_PPC_VLE_LO16A, BFD_RELOC_PPC_VLE_LO16D, BFD_RELOC_PPC_VLE_HI16A, BFD_RELOC_PPC_VLE_HI16D, BFD_RELOC_PPC_VLE_HA16A, BFD_RELOC_PPC_VLE_HA16D, BFD_RELOC_PPC_VLE_SDA21, BFD_RELOC_PPC_VLE_SDA21_LO, BFD_RELOC_PPC_VLE_SDAREL_LO16A, BFD_RELOC_PPC_VLE_SDAREL_LO16D, BFD_RELOC_PPC_VLE_SDAREL_HI16A, BFD_RELOC_PPC_VLE_SDAREL_HI16D, BFD_RELOC_PPC_VLE_SDAREL_HA16A, BFD_RELOC_PPC_VLE_SDAREL_HA16D): New bfd relocations. 2012-05-14 James Lemke <jwlemke@codesourcery.com> gas/ * config/tc-ppc.c (insn_validate): New func of existing code to call.. (ppc_setup_opcodes): ..from 2 places here. Revise for second (VLE) opcode table. Add #ifdef'd code to print opcode tables. 2012-05-14 James Lemke <jwlemke@codesourcery.com> gas/ * config/tc-ppc.c (ppc_setup_opcodes): Allow out-of-order for the VLE conditional branches. 2012-05-14 Catherine Moore <clm@codesourcery.com> Maciej W. Rozycki <macro@codesourcery.com> Rhonda Wittels <rhonda@codesourcery.com> gas/ * config/tc-ppc.c (PPC_VLE_SPLIT16A): New macro. (PPC_VLE_SPLIT16D): New macro. (PPC_VLE_LO16A): New macro. (PPC_VLE_LO16D): New macro. (PPC_VLE_HI16A): New macro. (PPC_VLE_HI16D): New macro. (PPC_VLE_HA16A): New macro. (PPC_VLE_HA16D): New macro. (PPC_APUINFO_VLE): New definition. (md_chars_to_number): New function. (md_parse_option): Check for combinations of little endian and -mvle. (md_show_usage): Document -mvle. (ppc_arch): Recognize VLE. (ppc_mach): Recognize bfd_mach_ppc_vle. (ppc_setup_opcodes): Print the opcode table if * config/tc-ppc.h (ppc_frag_check): Declare. * doc/c-ppc.texi: Document -mvle. * NEWS: Mention PowerPC VLE port. 2012-05-14 Catherine Moore <clm@codesourcery.com> gas/ * config/tc-ppc.h (ppc_dw2_line_min_insn_length): Declare. (DWARF2_LINE_MIN_INSN_LENGTH): Redefine. * config/tc-ppc.c (ppc_dw2_line_min_insn_length): New. * dwarf2dbg.c (scale_addr_delta): Handle values of 1 for DWARF2_LINE_MIN_INSN_LENGTH. 2012-05-14 Catherine Moore <clm@codesourcery.com> Maciej W. Rozycki <macro@codesourcery.com> Rhonda Wittels <rhonda@codesourcery.com> gas/testsuite/ * gas/ppc/ppc.exp: Run new tests. * gas/ppc/vle-reloc.d: New test. * gas/ppc/vle-reloc.s: New test. * gas/ppc/vle-simple-1.d: New test. * gas/ppc/vle-simple-1.s: New test. * gas/ppc/vle-simple-2.d: New test. * gas/ppc/vle-simple-2.s: New test. * gas/ppc/vle-simple-3.d: New test. * gas/ppc/vle-simple-3.s: New test. * gas/ppc/vle-simple-4.d: New test. * gas/ppc/vle-simple-4.s: New test. * gas/ppc/vle-simple-5.d: New test. * gas/ppc/vle-simple-5.s: New test. * gas/ppc/vle-simple-6.d: New test. * gas/ppc/vle-simple-6.s: New test. * gas/ppc/vle.d: New test. * gas/ppc/vle.s: New test. 2012-05-14 James Lemke <jwlemke@codesourcery.com> include/elf/ * ppc.h (SEC_PPC_VLE): Remove. 2012-05-14 Catherine Moore <clm@codesourcery.com> James Lemke <jwlemke@codesourcery.com> include/elf/ * ppc.h (R_PPC_VLE_REL8): New reloction. (R_PPC_VLE_REL15): Likewise. (R_PPC_VLE_REL24): Likewise. (R_PPC_VLE_LO16A): Likewise. (R_PPC_VLE_LO16D): Likewise. (R_PPC_VLE_HI16A): Likewise. (R_PPC_VLE_HI16D): Likewise. (R_PPC_VLE_HA16A): Likewise. (R_PPC_VLE_HA16D): Likewise. (R_PPC_VLE_SDA21): Likewise. (R_PPC_VLE_SDA21_LO): Likewise. (R_PPC_VLE_SDAREL_LO16A): Likewise. (R_PPC_VLE_SDAREL_LO16D): Likewise. (R_PPC_VLE_SDAREL_HI16A): Likewise. (R_PPC_VLE_SDAREL_HI16D): Likewise. (R_PPC_VLE_SDAREL_HA16A): Likewise. (R_PPC_VLE_SDAREL_HA16D): Likewise. (SEC_PPC_VLE): Remove. (PF_PPC_VLE): New program header flag. (SHF_PPC_VLE): New section header flag. (vle_opcodes, vle_num_opcodes): New. (VLE_OP): New macro. (VLE_OP_TO_SEG): New macro. 2012-05-14 Catherine Moore <clm@codesourcery.com> Maciej W. Rozycki <macro@codesourcery.com> Rhonda Wittels <rhonda@codesourcery.com> include/opcode/ * ppc.h (PPC_OPCODE_VLE): New definition. (PPC_OP_SA): New macro. (PPC_OP_SE_VLE): New macro. (PPC_OP): Use a variable shift amount. (powerpc_operand): Update comments. (PPC_OPSHIFT_INV): New macro. (PPC_OPERAND_CR): Replace with... (PPC_OPERAND_CR_BIT): ...this and (PPC_OPERAND_CR_REG): ...this. 2012-05-14 James Lemke <jwlemke@codesourcery.com> ld/ * ldlang.c (walk_wild_consider_section): Don't copy section_flag_list. Pass it to callback. (walk_wild_section_general): Pass section_flag_list to callback. (lang_add_section): Add sflag_list parm. Move out logic to keep / omit a section & call bfd_lookup_section_flags. (output_section_callback_fast): Add sflag_list parm. Add new parm to lang_add_section calls. (output_section_callback): Likewise. (check_section_callback): Add sflag_list parm. (lang_place_orphans): Add new parm to lang_add_section calls. (gc_section_callback): Add sflag_list parm. (find_relro_section_callback): Likewise. * ldlang.h (callback_t): Add flag_info parm. (lang_add_section): Add sflag_list parm. * emultempl/armelf.em (elf32_arm_add_stub_section): Add lang_add_section parm. * emultempl/beos.em (gld*_place_orphan): Likewise. * emultempl/elf32.em (gld*_place_orphan): Likewise. * emultempl/hppaelf.em (hppaelf_add_stub_section): Likewise. * emultempl/m68hc1xelf.em (m68hc11elf_add_stub_section): Likewise. * emultempl/mipself.em (mips_add_stub_section): Likewise. * emultempl/mmo.em (mmo_place_orphan): Likewise. * emultempl/pe.em (gld_*_place_orphan): Likewise. * emultempl/pep.em (gld_*_place_orphan): Likewise. * emultempl/ppc64elf.em (ppc_add_stub_section): Likewise. * emultempl/spuelf.em (spu_place_special_section): Likewise. * emultempl/vms.em (vms_place_orphan): Likewise. 2012-05-14 James Lemke <jwlemke@codesourcery.com> ld/testsuite/ * ld-powerpc/powerpc.exp: Create ppceabitests. * ld-powerpc/vle-multiseg.s: New. * ld-powerpc/vle-multiseg-1.d: New. * ld-powerpc/vle-multiseg-1.ld: New. * ld-powerpc/vle-multiseg-2.d: New. * ld-powerpc/vle-multiseg-2.ld: New. * ld-powerpc/vle-multiseg-3.d: New. * ld-powerpc/vle-multiseg-3.ld: New. * ld-powerpc/vle-multiseg-4.d: New. * ld-powerpc/vle-multiseg-4.ld: New. * ld-powerpc/vle-multiseg-5.d: New. * ld-powerpc/vle-multiseg-5.ld: New. * ld-powerpc/vle-multiseg-6.d: New. * ld-powerpc/vle-multiseg-6.ld: New. * ld-powerpc/vle-multiseg-6a.s: New. * ld-powerpc/vle-multiseg-6b.s: New. * ld-powerpc/vle-multiseg-6c.s: New. * ld-powerpc/vle-multiseg-6d.s: New. * ld-powerpc/powerpc.exp: Run new tests. 2012-05-14 Catherine Moore <clm@codesourcery.com> ld/ * NEWS: Mention PowerPC VLE port. 2012-05-14 Catherine Moore <clm@codesourcery.com> ld/testsuite/ * ld-powerpc/apuinfo.rd: Update for VLE. * ld-powerpc/vle-reloc-1.d: New. * ld-powerpc/vle-reloc-1.s: New. * ld-powerpc/vle-reloc-2.d: New. * ld-powerpc/vle-reloc-2.s: New. * ld-powerpc/vle-reloc-3.d: New. * ld-powerpc/vle-reloc-3.s: New. * ld-powerpc/vle-reloc-def-1.s: New. * ld-powerpc/vle-reloc-def-2.s: New. * ld-powerpc/vle-reloc-def-3.s: New. 2012-05-14 James Lemke <jwlemke@codesourcery.com> opcodes/ * ppc-dis.c (get_powerpc_dialect): Use is_ppc_vle. (PPC_OPCD_SEGS, VLE_OPCD_SEGS): New defines. (vle_opcd_indices): New array. (lookup_vle): New function. (disassemble_init_powerpc): Revise for second (VLE) opcode table. (print_insn_powerpc): Likewise. * ppc-opc.c: Likewise. 2012-05-14 Catherine Moore <clm@codesourcery.com> Maciej W. Rozycki <macro@codesourcery.com> Rhonda Wittels <rhonda@codesourcery.com> Nathan Froyd <froydnj@codesourcery.com> opcodes/ * ppc-opc.c (insert_arx, extract_arx): New functions. (insert_ary, extract_ary): New functions. (insert_li20, extract_li20): New functions. (insert_rx, extract_rx): New functions. (insert_ry, extract_ry): New functions. (insert_sci8, extract_sci8): New functions. (insert_sci8n, extract_sci8n): New functions. (insert_sd4h, extract_sd4h): New functions. (insert_sd4w, extract_sd4w): New functions. (insert_vlesi, extract_vlesi): New functions. (insert_vlensi, extract_vlensi): New functions. (insert_vleui, extract_vleui): New functions. (insert_vleil, extract_vleil): New functions. (BI_MASK, BB_MASK, BT): Use PPC_OPERAND_CR_BIT. (BI16, BI32, BO32, B8): New. (B15, B24, CRD32, CRS): New. (CRD, OBF, BFA, CR, CRFS): Use PPC_OPERAND_CR_REG. (DB, IMM20, RD, Rx, ARX, RY, RZ): New. (ARY, SCLSCI8, SCLSCI8N, SE_SD, SE_SDH): New. (SH6_MASK): Use PPC_OPSHIFT_INV. (SI8, UI5, OIMM5, UI7, BO16): New. (VLESIMM, VLENSIMM, VLEUIMM, VLEUIMML): New. (XT6, XA6, XB6, XB6S, XC6): Use PPC_OPSHIFT_INV. (ALLOW8_SPRG): New. (insert_sprg, extract_sprg): Check ALLOW8_SPRG. (OPVUP, OPVUP_MASK OPVUP): New (BD8, BD8_MASK, BD8IO, BD8IO_MASK): New. (EBD8IO, EBD8IO1_MASK, EBD8IO2_MASK, EBD8IO3_MASK): New. (BD15, BD15_MASK, EBD15, EBD15_MASK, EBD15BI, EBD15BI_MASK): New. (BD24,BD24_MASK, C_LK, C_LK_MASK, C, C_MASK): New. (IA16, IA16_MASK, I16A, I16A_MASK, I16L, I16L_MASK): New. (IM7, IM7_MASK, LI20, LI20_MASK, SCI8, SCI8_MASK): New. (SCI8BF, SCI8BF_MASK, SD4, SD4_MASK): New. (SE_IM5, SE_IM5_MASK): New. (SE_R, SE_R_MASK, SE_RR, SE_RR_MASK): New. (EX, EX_MASK, BO16F, BO16T, BO32F, BO32T): New. (BO32DNZ, BO32DZ): New. (NO371, PPCSPE, PPCISEL, PPCEFS, MULHW): Include PPC_OPCODE_VLE. (PPCVLE): New. (powerpc_opcodes): Add new VLE instructions. Update existing instruction to include PPCVLE if supported. * ppc-dis.c (ppc_opts): Add vle entry. (get_powerpc_dialect): New function. (powerpc_init_dialect): VLE support. (print_insn_big_powerpc): Call get_powerpc_dialect. (print_insn_little_powerpc): Likewise. (operand_value_powerpc): Handle negative shift counts. (print_insn_powerpc): Handle 2-byte instruction lengths.
2012-05-14 21:45:30 +02:00
{{objdump "-Mvle -d" vle-reloc-2.d}} "vle-reloc-2"}
{"VLE relocations 3" "-melf32ppc -T vle.ld" ""
"-a32 -mbig -mvle" {vle-reloc-3.s vle-reloc-def-3.s}
Add support for PowerPC VLE. 2012-05-14 Catherine Moore <clm@codesourcery.com> * NEWS: Mention PowerPC VLE port. 2012-05-14 James Lemke <jwlemke@codesourcery.com> Catherine Moore <clm@codesourcery.com> bfd/ * bfd.c (bfd_lookup_section_flags): Add section parm. * ecoff.c (bfd_debug_section): Remove flag_info initializer. * elf-bfd.h (bfd_elf_section_data): Move in section_flag_info. (bfd_elf_lookup_section_flags): Add section parm. * elf32-ppc.c (is_ppc_vle): New function. (ppc_elf_modify_segment_map): New function. (elf_backend_modify_segment_map): Define. (has_vle_insns): New define. * elf32-ppc.h (ppc_elf_modify_segment_map): Declare. * elflink.c (bfd_elf_lookup_section_flags): Add return value & parm. Move in logic to omit / include a section. * libbfd-in.h (bfd_link_info): Add section parm. (bfd_generic_lookup_section_flags): Likewise. * reloc.c (bfd_generic_lookup_section_flags): Likewise. * section.c (bfd_section): Move out section_flag_info. (BFD_FAKE_SECTION): Remove flag_info initializer. * targets.c (_bfd_lookup_section_flags): Add section parm. 2012-05-14 Catherine Moore <clm@codesourcery.com> bfd/ * archures.c (bfd_mach_ppc_vle): New. * bfd-in2.h: Regenerated. * cpu-powerpc.c (bfd_powerpc_archs): New entry for vle. * elf32-ppc.c (split16_format_type): New enumeration. (ppc_elf_vle_split16): New function. (HOWTO): Add entries for R_PPC_VLE relocations. (ppc_elf_reloc_type_lookup): Handle PPC_VLE relocations. (ppc_elf_section_flags): New function. (ppc_elf_lookup_section_flags): New function. (ppc_elf_section_processing): New function. (ppc_elf_check_relocs): Handle PPC_VLE relocations. (ppc_elf_relocation_section): Likewise. (elf_backend_lookup_section_flags_hook): Define. (elf_backend_section_flags): Define. (elf_backend_section_processing): Define. * elf32-ppc.h (ppc_elf_section_processing): Declare. * libbfd.h: Regenerated. * reloc.c (BFD_RELOC_PPC_VLE_REL8, BFD_RELOC_PPC_VLE_REL15, BFD_RELOC_PPC_VLE_REL24, BFD_RELOC_PPC_VLE_LO16A, BFD_RELOC_PPC_VLE_LO16D, BFD_RELOC_PPC_VLE_HI16A, BFD_RELOC_PPC_VLE_HI16D, BFD_RELOC_PPC_VLE_HA16A, BFD_RELOC_PPC_VLE_HA16D, BFD_RELOC_PPC_VLE_SDA21, BFD_RELOC_PPC_VLE_SDA21_LO, BFD_RELOC_PPC_VLE_SDAREL_LO16A, BFD_RELOC_PPC_VLE_SDAREL_LO16D, BFD_RELOC_PPC_VLE_SDAREL_HI16A, BFD_RELOC_PPC_VLE_SDAREL_HI16D, BFD_RELOC_PPC_VLE_SDAREL_HA16A, BFD_RELOC_PPC_VLE_SDAREL_HA16D): New bfd relocations. 2012-05-14 James Lemke <jwlemke@codesourcery.com> gas/ * config/tc-ppc.c (insn_validate): New func of existing code to call.. (ppc_setup_opcodes): ..from 2 places here. Revise for second (VLE) opcode table. Add #ifdef'd code to print opcode tables. 2012-05-14 James Lemke <jwlemke@codesourcery.com> gas/ * config/tc-ppc.c (ppc_setup_opcodes): Allow out-of-order for the VLE conditional branches. 2012-05-14 Catherine Moore <clm@codesourcery.com> Maciej W. Rozycki <macro@codesourcery.com> Rhonda Wittels <rhonda@codesourcery.com> gas/ * config/tc-ppc.c (PPC_VLE_SPLIT16A): New macro. (PPC_VLE_SPLIT16D): New macro. (PPC_VLE_LO16A): New macro. (PPC_VLE_LO16D): New macro. (PPC_VLE_HI16A): New macro. (PPC_VLE_HI16D): New macro. (PPC_VLE_HA16A): New macro. (PPC_VLE_HA16D): New macro. (PPC_APUINFO_VLE): New definition. (md_chars_to_number): New function. (md_parse_option): Check for combinations of little endian and -mvle. (md_show_usage): Document -mvle. (ppc_arch): Recognize VLE. (ppc_mach): Recognize bfd_mach_ppc_vle. (ppc_setup_opcodes): Print the opcode table if * config/tc-ppc.h (ppc_frag_check): Declare. * doc/c-ppc.texi: Document -mvle. * NEWS: Mention PowerPC VLE port. 2012-05-14 Catherine Moore <clm@codesourcery.com> gas/ * config/tc-ppc.h (ppc_dw2_line_min_insn_length): Declare. (DWARF2_LINE_MIN_INSN_LENGTH): Redefine. * config/tc-ppc.c (ppc_dw2_line_min_insn_length): New. * dwarf2dbg.c (scale_addr_delta): Handle values of 1 for DWARF2_LINE_MIN_INSN_LENGTH. 2012-05-14 Catherine Moore <clm@codesourcery.com> Maciej W. Rozycki <macro@codesourcery.com> Rhonda Wittels <rhonda@codesourcery.com> gas/testsuite/ * gas/ppc/ppc.exp: Run new tests. * gas/ppc/vle-reloc.d: New test. * gas/ppc/vle-reloc.s: New test. * gas/ppc/vle-simple-1.d: New test. * gas/ppc/vle-simple-1.s: New test. * gas/ppc/vle-simple-2.d: New test. * gas/ppc/vle-simple-2.s: New test. * gas/ppc/vle-simple-3.d: New test. * gas/ppc/vle-simple-3.s: New test. * gas/ppc/vle-simple-4.d: New test. * gas/ppc/vle-simple-4.s: New test. * gas/ppc/vle-simple-5.d: New test. * gas/ppc/vle-simple-5.s: New test. * gas/ppc/vle-simple-6.d: New test. * gas/ppc/vle-simple-6.s: New test. * gas/ppc/vle.d: New test. * gas/ppc/vle.s: New test. 2012-05-14 James Lemke <jwlemke@codesourcery.com> include/elf/ * ppc.h (SEC_PPC_VLE): Remove. 2012-05-14 Catherine Moore <clm@codesourcery.com> James Lemke <jwlemke@codesourcery.com> include/elf/ * ppc.h (R_PPC_VLE_REL8): New reloction. (R_PPC_VLE_REL15): Likewise. (R_PPC_VLE_REL24): Likewise. (R_PPC_VLE_LO16A): Likewise. (R_PPC_VLE_LO16D): Likewise. (R_PPC_VLE_HI16A): Likewise. (R_PPC_VLE_HI16D): Likewise. (R_PPC_VLE_HA16A): Likewise. (R_PPC_VLE_HA16D): Likewise. (R_PPC_VLE_SDA21): Likewise. (R_PPC_VLE_SDA21_LO): Likewise. (R_PPC_VLE_SDAREL_LO16A): Likewise. (R_PPC_VLE_SDAREL_LO16D): Likewise. (R_PPC_VLE_SDAREL_HI16A): Likewise. (R_PPC_VLE_SDAREL_HI16D): Likewise. (R_PPC_VLE_SDAREL_HA16A): Likewise. (R_PPC_VLE_SDAREL_HA16D): Likewise. (SEC_PPC_VLE): Remove. (PF_PPC_VLE): New program header flag. (SHF_PPC_VLE): New section header flag. (vle_opcodes, vle_num_opcodes): New. (VLE_OP): New macro. (VLE_OP_TO_SEG): New macro. 2012-05-14 Catherine Moore <clm@codesourcery.com> Maciej W. Rozycki <macro@codesourcery.com> Rhonda Wittels <rhonda@codesourcery.com> include/opcode/ * ppc.h (PPC_OPCODE_VLE): New definition. (PPC_OP_SA): New macro. (PPC_OP_SE_VLE): New macro. (PPC_OP): Use a variable shift amount. (powerpc_operand): Update comments. (PPC_OPSHIFT_INV): New macro. (PPC_OPERAND_CR): Replace with... (PPC_OPERAND_CR_BIT): ...this and (PPC_OPERAND_CR_REG): ...this. 2012-05-14 James Lemke <jwlemke@codesourcery.com> ld/ * ldlang.c (walk_wild_consider_section): Don't copy section_flag_list. Pass it to callback. (walk_wild_section_general): Pass section_flag_list to callback. (lang_add_section): Add sflag_list parm. Move out logic to keep / omit a section & call bfd_lookup_section_flags. (output_section_callback_fast): Add sflag_list parm. Add new parm to lang_add_section calls. (output_section_callback): Likewise. (check_section_callback): Add sflag_list parm. (lang_place_orphans): Add new parm to lang_add_section calls. (gc_section_callback): Add sflag_list parm. (find_relro_section_callback): Likewise. * ldlang.h (callback_t): Add flag_info parm. (lang_add_section): Add sflag_list parm. * emultempl/armelf.em (elf32_arm_add_stub_section): Add lang_add_section parm. * emultempl/beos.em (gld*_place_orphan): Likewise. * emultempl/elf32.em (gld*_place_orphan): Likewise. * emultempl/hppaelf.em (hppaelf_add_stub_section): Likewise. * emultempl/m68hc1xelf.em (m68hc11elf_add_stub_section): Likewise. * emultempl/mipself.em (mips_add_stub_section): Likewise. * emultempl/mmo.em (mmo_place_orphan): Likewise. * emultempl/pe.em (gld_*_place_orphan): Likewise. * emultempl/pep.em (gld_*_place_orphan): Likewise. * emultempl/ppc64elf.em (ppc_add_stub_section): Likewise. * emultempl/spuelf.em (spu_place_special_section): Likewise. * emultempl/vms.em (vms_place_orphan): Likewise. 2012-05-14 James Lemke <jwlemke@codesourcery.com> ld/testsuite/ * ld-powerpc/powerpc.exp: Create ppceabitests. * ld-powerpc/vle-multiseg.s: New. * ld-powerpc/vle-multiseg-1.d: New. * ld-powerpc/vle-multiseg-1.ld: New. * ld-powerpc/vle-multiseg-2.d: New. * ld-powerpc/vle-multiseg-2.ld: New. * ld-powerpc/vle-multiseg-3.d: New. * ld-powerpc/vle-multiseg-3.ld: New. * ld-powerpc/vle-multiseg-4.d: New. * ld-powerpc/vle-multiseg-4.ld: New. * ld-powerpc/vle-multiseg-5.d: New. * ld-powerpc/vle-multiseg-5.ld: New. * ld-powerpc/vle-multiseg-6.d: New. * ld-powerpc/vle-multiseg-6.ld: New. * ld-powerpc/vle-multiseg-6a.s: New. * ld-powerpc/vle-multiseg-6b.s: New. * ld-powerpc/vle-multiseg-6c.s: New. * ld-powerpc/vle-multiseg-6d.s: New. * ld-powerpc/powerpc.exp: Run new tests. 2012-05-14 Catherine Moore <clm@codesourcery.com> ld/ * NEWS: Mention PowerPC VLE port. 2012-05-14 Catherine Moore <clm@codesourcery.com> ld/testsuite/ * ld-powerpc/apuinfo.rd: Update for VLE. * ld-powerpc/vle-reloc-1.d: New. * ld-powerpc/vle-reloc-1.s: New. * ld-powerpc/vle-reloc-2.d: New. * ld-powerpc/vle-reloc-2.s: New. * ld-powerpc/vle-reloc-3.d: New. * ld-powerpc/vle-reloc-3.s: New. * ld-powerpc/vle-reloc-def-1.s: New. * ld-powerpc/vle-reloc-def-2.s: New. * ld-powerpc/vle-reloc-def-3.s: New. 2012-05-14 James Lemke <jwlemke@codesourcery.com> opcodes/ * ppc-dis.c (get_powerpc_dialect): Use is_ppc_vle. (PPC_OPCD_SEGS, VLE_OPCD_SEGS): New defines. (vle_opcd_indices): New array. (lookup_vle): New function. (disassemble_init_powerpc): Revise for second (VLE) opcode table. (print_insn_powerpc): Likewise. * ppc-opc.c: Likewise. 2012-05-14 Catherine Moore <clm@codesourcery.com> Maciej W. Rozycki <macro@codesourcery.com> Rhonda Wittels <rhonda@codesourcery.com> Nathan Froyd <froydnj@codesourcery.com> opcodes/ * ppc-opc.c (insert_arx, extract_arx): New functions. (insert_ary, extract_ary): New functions. (insert_li20, extract_li20): New functions. (insert_rx, extract_rx): New functions. (insert_ry, extract_ry): New functions. (insert_sci8, extract_sci8): New functions. (insert_sci8n, extract_sci8n): New functions. (insert_sd4h, extract_sd4h): New functions. (insert_sd4w, extract_sd4w): New functions. (insert_vlesi, extract_vlesi): New functions. (insert_vlensi, extract_vlensi): New functions. (insert_vleui, extract_vleui): New functions. (insert_vleil, extract_vleil): New functions. (BI_MASK, BB_MASK, BT): Use PPC_OPERAND_CR_BIT. (BI16, BI32, BO32, B8): New. (B15, B24, CRD32, CRS): New. (CRD, OBF, BFA, CR, CRFS): Use PPC_OPERAND_CR_REG. (DB, IMM20, RD, Rx, ARX, RY, RZ): New. (ARY, SCLSCI8, SCLSCI8N, SE_SD, SE_SDH): New. (SH6_MASK): Use PPC_OPSHIFT_INV. (SI8, UI5, OIMM5, UI7, BO16): New. (VLESIMM, VLENSIMM, VLEUIMM, VLEUIMML): New. (XT6, XA6, XB6, XB6S, XC6): Use PPC_OPSHIFT_INV. (ALLOW8_SPRG): New. (insert_sprg, extract_sprg): Check ALLOW8_SPRG. (OPVUP, OPVUP_MASK OPVUP): New (BD8, BD8_MASK, BD8IO, BD8IO_MASK): New. (EBD8IO, EBD8IO1_MASK, EBD8IO2_MASK, EBD8IO3_MASK): New. (BD15, BD15_MASK, EBD15, EBD15_MASK, EBD15BI, EBD15BI_MASK): New. (BD24,BD24_MASK, C_LK, C_LK_MASK, C, C_MASK): New. (IA16, IA16_MASK, I16A, I16A_MASK, I16L, I16L_MASK): New. (IM7, IM7_MASK, LI20, LI20_MASK, SCI8, SCI8_MASK): New. (SCI8BF, SCI8BF_MASK, SD4, SD4_MASK): New. (SE_IM5, SE_IM5_MASK): New. (SE_R, SE_R_MASK, SE_RR, SE_RR_MASK): New. (EX, EX_MASK, BO16F, BO16T, BO32F, BO32T): New. (BO32DNZ, BO32DZ): New. (NO371, PPCSPE, PPCISEL, PPCEFS, MULHW): Include PPC_OPCODE_VLE. (PPCVLE): New. (powerpc_opcodes): Add new VLE instructions. Update existing instruction to include PPCVLE if supported. * ppc-dis.c (ppc_opts): Add vle entry. (get_powerpc_dialect): New function. (powerpc_init_dialect): VLE support. (print_insn_big_powerpc): Call get_powerpc_dialect. (print_insn_little_powerpc): Likewise. (operand_value_powerpc): Handle negative shift counts. (print_insn_powerpc): Handle 2-byte instruction lengths.
2012-05-14 21:45:30 +02:00
{{objdump "-Mvle -d" vle-reloc-3.d}} "vle-reloc-3"}
}
* ld-powerpc/powerpc.exp: Modify emulation option passed to ld when little-endian. * ld-powerpc/apuinfo-nul.rd: Update for le output. * ld-powerpc/apuinfo.rd: Likewise. * ld-powerpc/plt1.d: Likewise. * ld-powerpc/relax.d: Likewise. * ld-powerpc/relaxr.d: Likewise. * ld-powerpc/sdadyn.d: Likewise. * ld-powerpc/tls.d: Likewise. * ld-powerpc/tls.g: Likewise. * ld-powerpc/tls.t: Likewise. * ld-powerpc/tls32.d: Likewise. * ld-powerpc/tls32.g: Likewise. * ld-powerpc/tls32.t: Likewise. * ld-powerpc/tlsexe.d: Likewise. * ld-powerpc/tlsexe.g: Likewise. * ld-powerpc/tlsexe.r: Likewise. * ld-powerpc/tlsexe.t: Likewise. * ld-powerpc/tlsexe32.d: Likewise. * ld-powerpc/tlsexe32.g: Likewise. * ld-powerpc/tlsexe32.r: Likewise. * ld-powerpc/tlsexe32.t: Likewise. * ld-powerpc/tlsexetoc.d: Likewise. * ld-powerpc/tlsexetoc.g: Likewise. * ld-powerpc/tlsexetoc.r: Likewise. * ld-powerpc/tlsexetoc.t: Likewise. * ld-powerpc/tlsmark.d: Likewise. * ld-powerpc/tlsmark32.d: Likewise. * ld-powerpc/tlsopt1.d: Likewise. * ld-powerpc/tlsopt1_32.d: Likewise. * ld-powerpc/tlsopt2.d: Likewise. * ld-powerpc/tlsopt2_32.d: Likewise. * ld-powerpc/tlsopt3.d: Likewise. * ld-powerpc/tlsopt3_32.d: Likewise. * ld-powerpc/tlsopt4.d: Likewise. * ld-powerpc/tlsopt4_32.d: Likewise. * ld-powerpc/tlsso.d: Likewise. * ld-powerpc/tlsso.g: Likewise. * ld-powerpc/tlsso.r: Likewise. * ld-powerpc/tlsso.t: Likewise. * ld-powerpc/tlsso32.d: Likewise. * ld-powerpc/tlsso32.g: Likewise. * ld-powerpc/tlsso32.r: Likewise. * ld-powerpc/tlsso32.t: Likewise. * ld-powerpc/tlstoc.d: Likewise. * ld-powerpc/tlstoc.g: Likewise. * ld-powerpc/tlstoc.t: Likewise. * ld-powerpc/tlstocso.d: Likewise. * ld-powerpc/tlstocso.g: Likewise. * ld-powerpc/tlstocso.t: Likewise. * ld-powerpc/tocopt.out: Likewise.
2012-10-29 10:25:53 +01:00
if [istarget "powerpc*le*-*-*"] then {
set options_regsub(ld) {{-melf([3264]*)ppc} {-melf\1lppc}}
* ld-powerpc/powerpc.exp: Modify emulation option passed to ld when little-endian. * ld-powerpc/apuinfo-nul.rd: Update for le output. * ld-powerpc/apuinfo.rd: Likewise. * ld-powerpc/plt1.d: Likewise. * ld-powerpc/relax.d: Likewise. * ld-powerpc/relaxr.d: Likewise. * ld-powerpc/sdadyn.d: Likewise. * ld-powerpc/tls.d: Likewise. * ld-powerpc/tls.g: Likewise. * ld-powerpc/tls.t: Likewise. * ld-powerpc/tls32.d: Likewise. * ld-powerpc/tls32.g: Likewise. * ld-powerpc/tls32.t: Likewise. * ld-powerpc/tlsexe.d: Likewise. * ld-powerpc/tlsexe.g: Likewise. * ld-powerpc/tlsexe.r: Likewise. * ld-powerpc/tlsexe.t: Likewise. * ld-powerpc/tlsexe32.d: Likewise. * ld-powerpc/tlsexe32.g: Likewise. * ld-powerpc/tlsexe32.r: Likewise. * ld-powerpc/tlsexe32.t: Likewise. * ld-powerpc/tlsexetoc.d: Likewise. * ld-powerpc/tlsexetoc.g: Likewise. * ld-powerpc/tlsexetoc.r: Likewise. * ld-powerpc/tlsexetoc.t: Likewise. * ld-powerpc/tlsmark.d: Likewise. * ld-powerpc/tlsmark32.d: Likewise. * ld-powerpc/tlsopt1.d: Likewise. * ld-powerpc/tlsopt1_32.d: Likewise. * ld-powerpc/tlsopt2.d: Likewise. * ld-powerpc/tlsopt2_32.d: Likewise. * ld-powerpc/tlsopt3.d: Likewise. * ld-powerpc/tlsopt3_32.d: Likewise. * ld-powerpc/tlsopt4.d: Likewise. * ld-powerpc/tlsopt4_32.d: Likewise. * ld-powerpc/tlsso.d: Likewise. * ld-powerpc/tlsso.g: Likewise. * ld-powerpc/tlsso.r: Likewise. * ld-powerpc/tlsso.t: Likewise. * ld-powerpc/tlsso32.d: Likewise. * ld-powerpc/tlsso32.g: Likewise. * ld-powerpc/tlsso32.r: Likewise. * ld-powerpc/tlsso32.t: Likewise. * ld-powerpc/tlstoc.d: Likewise. * ld-powerpc/tlstoc.g: Likewise. * ld-powerpc/tlstoc.t: Likewise. * ld-powerpc/tlstocso.d: Likewise. * ld-powerpc/tlstocso.g: Likewise. * ld-powerpc/tlstocso.t: Likewise. * ld-powerpc/tocopt.out: Likewise.
2012-10-29 10:25:53 +01:00
for {set i 0} {$i < [llength $ppcelftests]} {incr i} {
set line [lindex $ppcelftests $i]
set ld_options [lindex $line 1]
regsub -all elf32ppc $ld_options elf32lppc ld_options
set line [lreplace $line 1 1 $ld_options]
set ppcelftests [lreplace $ppcelftests $i $i $line]
}
if [ supports_ppc64 ] then {
for {set i 0} {$i < [llength $ppc64elftests]} {incr i} {
set line [lindex $ppc64elftests $i]
* ld-powerpc/powerpc.exp: Modify emulation option passed to ld when little-endian. * ld-powerpc/apuinfo-nul.rd: Update for le output. * ld-powerpc/apuinfo.rd: Likewise. * ld-powerpc/plt1.d: Likewise. * ld-powerpc/relax.d: Likewise. * ld-powerpc/relaxr.d: Likewise. * ld-powerpc/sdadyn.d: Likewise. * ld-powerpc/tls.d: Likewise. * ld-powerpc/tls.g: Likewise. * ld-powerpc/tls.t: Likewise. * ld-powerpc/tls32.d: Likewise. * ld-powerpc/tls32.g: Likewise. * ld-powerpc/tls32.t: Likewise. * ld-powerpc/tlsexe.d: Likewise. * ld-powerpc/tlsexe.g: Likewise. * ld-powerpc/tlsexe.r: Likewise. * ld-powerpc/tlsexe.t: Likewise. * ld-powerpc/tlsexe32.d: Likewise. * ld-powerpc/tlsexe32.g: Likewise. * ld-powerpc/tlsexe32.r: Likewise. * ld-powerpc/tlsexe32.t: Likewise. * ld-powerpc/tlsexetoc.d: Likewise. * ld-powerpc/tlsexetoc.g: Likewise. * ld-powerpc/tlsexetoc.r: Likewise. * ld-powerpc/tlsexetoc.t: Likewise. * ld-powerpc/tlsmark.d: Likewise. * ld-powerpc/tlsmark32.d: Likewise. * ld-powerpc/tlsopt1.d: Likewise. * ld-powerpc/tlsopt1_32.d: Likewise. * ld-powerpc/tlsopt2.d: Likewise. * ld-powerpc/tlsopt2_32.d: Likewise. * ld-powerpc/tlsopt3.d: Likewise. * ld-powerpc/tlsopt3_32.d: Likewise. * ld-powerpc/tlsopt4.d: Likewise. * ld-powerpc/tlsopt4_32.d: Likewise. * ld-powerpc/tlsso.d: Likewise. * ld-powerpc/tlsso.g: Likewise. * ld-powerpc/tlsso.r: Likewise. * ld-powerpc/tlsso.t: Likewise. * ld-powerpc/tlsso32.d: Likewise. * ld-powerpc/tlsso32.g: Likewise. * ld-powerpc/tlsso32.r: Likewise. * ld-powerpc/tlsso32.t: Likewise. * ld-powerpc/tlstoc.d: Likewise. * ld-powerpc/tlstoc.g: Likewise. * ld-powerpc/tlstoc.t: Likewise. * ld-powerpc/tlstocso.d: Likewise. * ld-powerpc/tlstocso.g: Likewise. * ld-powerpc/tlstocso.t: Likewise. * ld-powerpc/tocopt.out: Likewise.
2012-10-29 10:25:53 +01:00
set ld_options [lindex $line 1]
regsub -all elf64ppc $ld_options elf64lppc ld_options
set line [lreplace $line 1 1 $ld_options]
set ppc64elftests [lreplace $ppc64elftests $i $i $line]
}
}
}
2003-02-04 15:52:11 +01:00
run_ld_link_tests $ppcelftests
2003-02-04 15:52:11 +01:00
if [ supports_ppc64 ] then {
run_ld_link_tests $ppc64elftests
run_dump_test "relbrlt"
run_dump_test "elfv2so"
run_dump_test "elfv2exe"
run_dump_test "elfv2-2so"
run_dump_test "elfv2-2exe"
run_dump_test "ambiguousv1"
run_dump_test "ambiguousv1b"
run_dump_test "ambiguousv2"
run_dump_test "ambiguousv2b"
run_dump_test "defsym"
run_dump_test "tocvar"
run_dump_test "tocnovar"
run_dump_test "tlsldopt"
run_dump_test "relocsort"
Add assembler, disassembler and linker support for power9. include/opcode/ * ppc.h (PPC_OPCODE_POWER9): New define. (PPC_OPCODE_VSX3): Likewise. opcodes/ * ppc-dis.c (ppc_opts): Add "power9" and "pwr9" entries. Add PPC_OPCODE_VSX3 to the vsx entry. (powerpc_init_dialect): Set default dialect to power9. * ppc-opc.c (insert_dcmxs, extract_dcmxs, insert_dxd, extract_dxd, insert_dxdn, extract_dxdn, insert_l0, extract_l0, insert_l1, extract_l1 insert_xtq6, extract_xtq6): New static functions. (insert_esync): Test for illegal L operand value. (DCMX, DCMXS, DXD, NDXD, L0, L1, RC, FC, UIM6, X_R, RIC, PRS, XSQ6, XTQ6, LRAND, IMM8, DQX, DQX_MASK, DX, DX_MASK, VXVAPS_MASK, VXVA,XVA, XX2VA, XVARC, XBF_MASK, XX2UIM4_MASK, XX2BFD_MASK, XX2DCMXS_MASK, XVA_MASK, XRLA_MASK, XBFRARB_MASK, XLRAND_MASK, POWER9, PPCVEC3, PPCVSX3): New defines. (powerpc_opcodes) <ps_cmpu0, ps_cmpo0, ps_cmpu1, ps_cmpo1, fcmpu, fcmpo, ftdiv, ftsqrt>: Use XBF_MASK. <mcrxr>: Use XBFRARB_MASK. <addpcis, bcdcfn., bcdcfsq., bcdcfz., bcdcpsgn., bcdctn., bcdctsq., bcdctz., bcds., bcdsetsgn., bcdsr., bcdtrunc., bcdus., bcdutrunc., cmpeqb, cmprb, cnttzd, cnttzd., cnttzw, cnttzw., copy, copy_first, cp_abort, darn, dtstsfi, dtstsfiq, extswsli, extswsli., ldat, ldmx, lwat, lxsd, lxsibzx, lxsihzx, lxssp, lxv, lxvb16x, lxvh8x, lxvl, lxvll, lxvwsx, lxvx, maddhd, maddhdu, maddld, mcrxrx, mfvsrld, modsd, modsw, modud, moduw, msgsync, mtvsrdd, mtvsrws, paste, paste., paste_last, rmieg, setb, slbieg, slbsync, stdat, stop, stwat, stxsd, stxsibx, stxsihx, stxssp, stxv, stxvb16x, stxvh8x, stxvl, stxvll, stxvx, subpcis, urfid, vbpermd, vclzlsbb, vcmpneb, vcmpneb., vcmpneh, vcmpneh., vcmpnew, vcmpnew., vcmpnezb, vcmpnezb., vcmpnezh, vcmpnezh., vcmpnezw, vcmpnezw., vctzb, vctzd, vctzh, vctzlsbb, vctzw, vextractd, vextractub, vextractuh, vextractuw, vextsb2d, vextsb2w, vextsh2d, vextsh2w, vextsw2d, vextublx, vextubrx, vextuhlx, vextuhrx, vextuwlx, vextuwrx, vinsertb, vinsertd, vinserth, vinsertw, vmul10cuq, vmul10ecuq, vmul10euq, vmul10uq, vnegd, vnegw, vpermr, vprtybd, vprtybq, vprtybw, vrldmi, vrldnm, vrlwmi, vrlwnm, vslv, vsrv, wait, xsabsqp, xsaddqp, xsaddqpo, xscmpeqdp, xscmpexpdp, xscmpexpqp, xscmpgedp, xscmpgtdp, xscmpnedp, xscmpoqp, xscmpuqp, xscpsgnqp, xscvdphp, xscvdpqp, xscvhpdp, xscvqpdp, xscvqpdpo, xscvqpsdz, xscvqpswz, xscvqpudz, xscvqpuwz, xscvsdqp, xscvudqp, xsdivqp, xsdivqpo, xsiexpdp, xsiexpqp, xsmaddqp, xsmaddqpo, xsmaxcdp, xsmaxjdp, xsmincdp, xsminjdp, xsmsubqp, xsmsubqpo, xsmulqp, xsmulqpo, xsnabsqp, xsnegqp, xsnmaddqp, xsnmaddqpo, xsnmsubqp, xsnmsubqpo, xsrqpi, xsrqpix, xsrqpxp, xssqrtqp, xssqrtqpo, xssubqp, xssubqpo, xststdcdp, xststdcqp, xststdcsp, xsxexpdp, xsxexpqp, xsxsigdp, xsxsigqp, xvcmpnedp, xvcmpnedp., xvcmpnesp, xvcmpnesp., xvcvhpsp, xvcvsphp, xviexpdp, xviexpsp, xvtstdcdp, xvtstdcsp, xvxexpdp, xvxexpsp, xvxsigdp, xvxsigsp, xxbrd, xxbrh, xxbrq, xxbrw, xxextractuw, xxinsertw, xxperm, xxpermr, xxspltib>: New instructions. <doze, nap, sleep, rvwinkle, waitasec, lxvx, stxvx>: Disable on POWER9. <tlbiel, tlbie, sync, slbmfev, slbmfee>: Add additional operands. include/elf/ * ppc.h (R_PPC_REL16DX_HA): New reloction. * ppc64.h (R_PPC64_REL16DX_HA): Likewise. bfd/ * elf32-ppc.c (ppc_elf_howto_raw): Add R_PPC_REL16DX_HA. (ppc_elf_reloc_type_lookup): Handle R_PPC_REL16DX_HA. (ppc_elf_addr16_ha_reloc): Likewise. (ppc_elf_check_relocs): Likewise. (ppc_elf_relocate_section): Likewise. (is_insn_dq_form): Handle lxv and stxv instructions. * elf64-ppc.c (ppc64_elf_howto_raw): Add R_PPC64_REL16DX_HA. (ppc64_elf_reloc_type_lookup): Handle R_PPC64_REL16DX_HA. (ppc64_elf_ha_reloc): Likewise. (ppc64_elf_check_relocs): Likewise. (ppc64_elf_relocate_section): Likewise. * bfd-in2.h: Regenerate. * libbfd.h: Likewise. * reloc.c (BFD_RELOC_PPC_REL16DX_HA): New. elfcpp/ * powerpc.h (R_POWERPC_REL16DX_HA): Define. gas/ * doc/as.texinfo (Target PowerPC): Document -mpower9 and -mpwr9. * doc/c-ppc.texi (PowerPC-Opts): Likewise. * config/tc-ppc.c (md_show_usage): Likewise. (md_assemble): Handle BFD_RELOC_PPC_REL16DX_HA. (md_apply_fix): Likewise. (ppc_handle_align): Handle power9's group ending nop. gas/testsuite/ * gas/ppc/altivec3.s: New test. * gas/ppc/altivec3.d: Likewise. * gas/ppc/vsx3.s: Likewise. * gas/ppc/vsx3.d: Likewise. * gas/ppc/power9.s: Likewise. * gas/ppc/power9.d: Likewise. * gas/ppc/ppc.exp: Run them. * gas/ppc/power8.s <lxvx, lxvd2x, stxvx, stxvd2x>: Add new tests. * gas/ppc/power8.d: Likewise. * gas/ppc/vsx.s: <lxvx, stxvx>: Rename invalid mnemonics ... <lxvd2x, stxvd2x>: ...to this. * gas/ppc/vsx.d: Likewise. gold/ * gold/powerpc.cc (Powerpc_relocate_functions::addr16_dq): New function. (Powerpc_relocate_functions::addr16dx_ha): Likewise. (Target_powerpc::Scan::local): Handle R_POWERPC_REL16DX_HA. (Target_powerpc::Scan::global): Likewise. (Target_powerpc::Relocate::relocate): Likewise. ld/testsuite/ * ld-powerpc/addpcis.d: New test. * ld-powerpc/addpcis.s: New test. * ld-powerpc/powerpc.exp: Run it.
2015-11-12 02:52:52 +01:00
run_dump_test "addpcis"
PowerPC64 dot-symbol compatibility bugfixes Lots of fixes for the compatibility code that handles linking of -mcall-aixdesc code (or that generated by 12 year old gcc) with current ELFv1 ABI code. 1) A reference to a dot-symbol in an object file wasn't satisfied by a function descriptor in later object files. 2) The as-needed code had bit-rotted; Shared libs now need a strong reference to be counted as needed. 3) --gc-sections involving dot-symbols was broken, needing func_desc_adjust to be run early and lots of other fixes. bfd/ * elf64-ppc.c (struct ppc_link_hash_entry): Delete "was_undefined". (struct ppc_link_hash_table): Delete "twiddled_syms". Add "need_func_desc_adj". (lookup_fdh): Link direct fdh sym via oh field and set flags. (make_fdh): Make strong and weak undefined function descriptor symbols. (ppc64_elf_merge_symbol): New function. (elf_backend_merge_symbol): Define. (ppc64_elf_archive_symbol_lookup): Don't test undefweak for fake function descriptors. (add_symbol_adjust): Don't twiddle symbols to undefweak. Propagate more ref flags to function descriptor symbol. Make some function descriptor symbols dynamic. (ppc64_elf_before_check_relocs): Only run add_symbol_adjust for ELFv1. Set need_func_desc_adj. Don't fix undefs list. (ppc64_elf_check_relocs): Set non_ir_ref for descriptors. Don't call lookup_fdh here. (ppc64_elf_gc_sections): New function. (bfd_elf64_bfd_gc_sections): Define. (ppc64_elf_gc_mark_hook): Mark descriptor. (func_desc_adjust): Don't make fake function descriptor syms strong here. Exit earlier on non-dotsyms. Take note of elf.dynamic flag when deciding whether a dynamic function descriptor might be needed. Transfer elf.dynamic and set elf.needs_plt. Move plt regardless of visibility. Make descriptor dynamic if entry sym is dynamic, not for other cases. (ppc64_elf_func_desc_adjust): Don't run func_desc_adjust if already done. (ppc64_elf_edit_opd): Use oh field rather than lookup_fdh. (ppc64_elf_size_stubs): Likewise. (ppc_build_one_stub): Don't clear was_undefined. Only set sym undefweak if stub symbol is defined. (undo_symbol_twiddle, ppc64_elf_restore_symbols): Delete. * elf64-ppc.h (ppc64_elf_restore_symbols): Don't declare. ld/ * emultempl/ppc64elf.em (gld${EMULATION_NAME}_finish): Don't call ppc64_elf_restore_symbols. * testsuite/ld-powerpc/dotsym1.d: New. * testsuite/ld-powerpc/dotsym2.d: New. * testsuite/ld-powerpc/dotsym3.d: New. * testsuite/ld-powerpc/dotsym4.d: New. * testsuite/ld-powerpc/dotsymref.s: New. * testsuite/ld-powerpc/nodotsym.s: New. * testsuite/ld-powerpc/powerpc.exp: Run new tests.
2016-12-03 11:30:01 +01:00
run_dump_test "dotsym1"
run_dump_test "dotsym2"
run_dump_test "dotsym3"
run_dump_test "dotsym4"
run_dump_test "pr23937"
run_dump_test "callstub-1"
run_dump_test "callstub-2"
run_dump_test "callstub-3"
Power10 stub selection This patch better supports mixing of power10 and non-power10 code, as might be seen in a cpu-optimized library using ifuncs to select functions optimized for a given cpu. Using -Wl,--no-power10-stubs isn't that good in this situation since non-power10 notoc stubs are slower and larger than the power10 variants, which you'd like to use on power10 code paths. With this change, power10 pc-relative code that makes calls marked @notoc uses power10 stubs if stubs are necessary, and other calls use non-power10 instructions in stubs. This will mean that if gcc is generating code for -mcpu=power10 but with pc-rel disabled then you'll get the older stubs even on power10 (unless you force with -Wl,--power10-stubs). That shouldn't be too big a problem: stubs that use r2 are reasonable. It's just the ones that set up addressing using "mflr 12; bcl 20,31,.+4; mflr 11; mtlr 12" that should be avoided if possible. bfd/ * elf64-ppc.c (struct ppc_link_hash_table): Add has_power10_relocs. (select_alt_stub): New function. (ppc_get_stub_entry): Use it here. (ppc64_elf_check_relocs): Set had_power10_relocs rather than power10_stubs. (ppc64_elf_size_stubs): Clear power10_stubs here instead. Don't merge notoc stubs with other varieties when power10_stubs is "auto". Instead dup the stub hash table entry. (plt_stub_size, ppc_build_one_stub, ppc_size_one_stub): Adjust tests of power10_stubs. ld/ * emultempl/ppc64elf.em (power10-stubs): Accept optional "auto" arg. * ld.texi (power10-stubs): Update. * testsuite/ld-powerpc/callstub-1.d: Force --power10-stubs. * testsuite/ld-powerpc/callstub-2.d: Relax branch offset comparison. * testsuite/ld-powerpc/callstub-4.d: New test. * testsuite/ld-powerpc/notoc.d: Force --no-power10-stubs. * testsuite/ld-powerpc/notoc3.d, * testsuite/ld-powerpc/notoc3.s, * testsuite/ld-powerpc/notoc3.wf: New test. * testsuite/ld-powerpc/powerpc.exp: Run new tests. Pass --no-power10-stubs for notoc link. (cherry picked from commit e10a07b32dc1faed25b5bbcbbc47d68e2ff537b9)
2020-07-17 09:17:28 +02:00
run_dump_test "callstub-4"
[PowerPC64] pc-relative TLS relocations This patch supports using pcrel instructions in TLS code sequences. A number of new relocations are needed, gas operand modifiers to generate those relocations, and new TLS optimisation. For optimisation it turns out that the new pcrel GD and LD sequences can be distinguished from the non-pcrel GD and LD sequences by there being different relocations on the new sequence. The final "add ra,rb,13" on IE sequences similarly needs a new relocation, or as I chose, a modification of R_PPC64_TLS. On pcrel IE code, the R_PPC64_TLS points one byte into the "add" instruction rather than being on the instruction boundary. GD: pla 3,z@got@tlsgd@pcrel # R_PPC64_GOT_TLSGD34 bl __tls_get_addr@notoc(z@tlsgd) # R_PPC64_TLSGD and R_PPC64_REL24_NOTOC edited to IE pld 3,z@got@tprel@pcrel add 3,3,13 edited to LE paddi 3,13,z@tprel nop LD: pla 3,z@got@tlsld@pcrel # R_PPC64_GOT_TLSLD34 bl __tls_get_addr@notoc(z@tlsld) # R_PPC64_TLSLD and R_PPC64_REL24_NOTOC .. paddi 9,3,z2@dtprel pld 10,z3@got@dtprel@pcrel add 10,10,3 edited to LE paddi 3,13,0x1000 nop IE: pld 9,z@got@tprel@pcrel # R_PPC64_GOT_TPREL34 add 3,9,z@tls@pcrel # R_PPC64_TLS at insn+1 ldx 4,9,z@tls@pcrel lwax 5,9,z@tls@pcrel stdx 5,9,z@tls@pcrel edited to LE paddi 9,13,z@tprel nop ld 4,0(9) lwa 5,0(9) std 5,0(9) LE: paddi 10,13,z@tprel include/ * elf/ppc64.h (R_PPC64_TPREL34, R_PPC64_DTPREL34), (R_PPC64_GOT_TLSGD34, R_PPC64_GOT_TLSLD34), (R_PPC64_GOT_TPREL34, R_PPC64_GOT_DTPREL34): Define. (IS_PPC64_TLS_RELOC): Include new tls relocs. bfd/ * reloc.c (BFD_RELOC_PPC64_TPREL34, BFD_RELOC_PPC64_DTPREL34), (BFD_RELOC_PPC64_GOT_TLSGD34, BFD_RELOC_PPC64_GOT_TLSLD34), (BFD_RELOC_PPC64_GOT_TPREL34, BFD_RELOC_PPC64_GOT_DTPREL34), (BFD_RELOC_PPC64_TLS_PCREL): New pcrel tls relocs. * elf64-ppc.c (ppc64_elf_howto_raw): Add howtos for pcrel tls relocs. (ppc64_elf_reloc_type_lookup): Translate pcrel tls relocs. (must_be_dyn_reloc, dec_dynrel_count): Add R_PPC64_TPREL64. (ppc64_elf_check_relocs): Support pcrel tls relocs. (ppc64_elf_tls_optimize, ppc64_elf_relocate_section): Likewise. * bfd-in2.h: Regenerate. * libbfd.h: Regenerate. gas/ * config/tc-ppc.c (ppc_elf_suffix): Map "tls@pcrel", "got@tlsgd@pcrel", "got@tlsld@pcrel", "got@tprel@pcrel", and "got@dtprel@pcrel". (fixup_size, md_assemble): Handle pcrel tls relocs. (ppc_force_relocation, ppc_fix_adjustable): Likewise. (md_apply_fix, tc_gen_reloc): Likewise. ld/ * testsuite/ld-powerpc/tlsgd.d, * testsuite/ld-powerpc/tlsgd.s, * testsuite/ld-powerpc/tlsie.d, * testsuite/ld-powerpc/tlsie.s, * testsuite/ld-powerpc/tlsld.d, * testsuite/ld-powerpc/tlsld.s: New tests. * testsuite/ld-powerpc/powerpc.exp: Run them.
2019-07-19 08:06:58 +02:00
run_dump_test "tlsgd"
run_dump_test "tlsld"
run_dump_test "tlsie"
Add support for non-contiguous memory regions 2020-01-06 Christophe Lyon <christophe.lyon@linaro.org> bfd/ * bfd-in2.h: Regenerate. * section.c (asection): Add already_assigned field. (BFD_FAKE_SECTION): Add default initializer for it. * ecoff.c (bfd_debug_section): Initialize already_assigned field. * elf32-arm.c (arm_build_one_stub): Add support for non_contiguous_regions. * elf32-csky.c (csky_build_one_stub): Likewise. * elf32-hppa.c (hppa_build_one_stub): Likewise. * elf32-m68hc11.c (m68hc11_elf_build_one_stub): Likewise. * elf32-m68hc12.c (m68hc12_elf_build_one_stub): Likewise. * elf32-metag.c (metag_build_one_stub): Likewise. * elf32-nios2.c (nios2_build_one_stub): Likewise. * elf64-ppc.c (ppc_build_one_stub): Likewise. (ppc_size_one_stub): Likewise. * elfnn-aarch64.c (aarch64_build_one_stub): Likewise. * elflink.c (elf_link_input_bfd): Likewise. include/ * bfdlink.h (bfd_link_info): Add non_contiguous_regions and non_contiguous_regions_warnings fields. ld/ * ldlang.c (lang_add_section): Add support for non_contiguous_regions. (size_input_section): Likewise. (lang_size_sections_1): Likewise. (process_insert_statements): Likewise. * ldlex.h (option_values): Add OPTION_NON_CONTIGUOUS_REGIONS and OPTION_NON_CONTIGUOUS_REGIONS_WARNINGS. * lexsup.c (ld_options): Add entries for --enable-non-contiguous-regions and --enable-non-contiguous-regions-warnings. (parse_args): Handle it. * NEWS: Add --enable-non-contiguous-regions and --enable-non-contiguous-regions-warnings. * ld.texi: Add --enable-non-contiguous-regions and --enable-non-contiguous-regions-warnings documentation. * emultempl/armelf.em (elf32_arm_add_stub_section): Add SEC_LINKER_CREATED flag. * emultempl/xtensaelf.em (ld_build_required_section_dependence): Emit an error when --enable-non-contiguous-regions is used. * testsuite/ld-elf/non-contiguous.d: New. * testsuite/ld-elf/non-contiguous.ld: New. * testsuite/ld-elf/non-contiguous.s: New. * testsuite/ld-arm/arm-elf.exp: Run the new tests. * testsuite/ld-arm/arm-elf/non-contiguous-arm.s: New. * testsuite/ld-arm/arm-elf/non-contiguous-arm.d: New. * testsuite/ld-arm/arm-elf/non-contiguous-arm.ld: New. * testsuite/ld-arm/arm-elf/non-contiguous-arm2.d: New. * testsuite/ld-arm/arm-elf/non-contiguous-arm3.ld: New. * testsuite/ld-arm/arm-elf/non-contiguous-arm3.d: New. * testsuite/ld-arm/arm-elf/non-contiguous-arm3.ld: New. * testsuite/ld-arm/arm-elf/non-contiguous-arm4.d: New. * testsuite/ld-arm/arm-elf/non-contiguous-arm4.ld: New. * testsuite/ld-arm/arm-elf/non-contiguous-arm5.d: New. * testsuite/ld-arm/arm-elf/non-contiguous-arm5.ld: New. * testsuite/ld-arm/arm-elf/non-contiguous-arm6.d: New. * testsuite/ld-arm/arm-elf/non-contiguous-arm6.ld: New. * testsuite/ld-powerpc/powerpc.exp: Run new tests. * testsuite/ld-powerpc/non-contiguous-powerpc.d: New. * testsuite/ld-powerpc/non-contiguous-powerpc.ld: New. * testsuite/ld-powerpc/non-contiguous-powerpc.sd: New. * testsuite/ld-powerpc/non-contiguous-powerpc64.d: New.
2019-11-25 09:55:37 +01:00
run_dump_test "non-contiguous-powerpc64"
2003-02-04 15:52:11 +01:00
}
run_dump_test "localgot"
run_dump_test "tlsldopt32"
run_ld_link_tests $ppceabitests
Add support for PowerPC VLE. 2012-05-14 Catherine Moore <clm@codesourcery.com> * NEWS: Mention PowerPC VLE port. 2012-05-14 James Lemke <jwlemke@codesourcery.com> Catherine Moore <clm@codesourcery.com> bfd/ * bfd.c (bfd_lookup_section_flags): Add section parm. * ecoff.c (bfd_debug_section): Remove flag_info initializer. * elf-bfd.h (bfd_elf_section_data): Move in section_flag_info. (bfd_elf_lookup_section_flags): Add section parm. * elf32-ppc.c (is_ppc_vle): New function. (ppc_elf_modify_segment_map): New function. (elf_backend_modify_segment_map): Define. (has_vle_insns): New define. * elf32-ppc.h (ppc_elf_modify_segment_map): Declare. * elflink.c (bfd_elf_lookup_section_flags): Add return value & parm. Move in logic to omit / include a section. * libbfd-in.h (bfd_link_info): Add section parm. (bfd_generic_lookup_section_flags): Likewise. * reloc.c (bfd_generic_lookup_section_flags): Likewise. * section.c (bfd_section): Move out section_flag_info. (BFD_FAKE_SECTION): Remove flag_info initializer. * targets.c (_bfd_lookup_section_flags): Add section parm. 2012-05-14 Catherine Moore <clm@codesourcery.com> bfd/ * archures.c (bfd_mach_ppc_vle): New. * bfd-in2.h: Regenerated. * cpu-powerpc.c (bfd_powerpc_archs): New entry for vle. * elf32-ppc.c (split16_format_type): New enumeration. (ppc_elf_vle_split16): New function. (HOWTO): Add entries for R_PPC_VLE relocations. (ppc_elf_reloc_type_lookup): Handle PPC_VLE relocations. (ppc_elf_section_flags): New function. (ppc_elf_lookup_section_flags): New function. (ppc_elf_section_processing): New function. (ppc_elf_check_relocs): Handle PPC_VLE relocations. (ppc_elf_relocation_section): Likewise. (elf_backend_lookup_section_flags_hook): Define. (elf_backend_section_flags): Define. (elf_backend_section_processing): Define. * elf32-ppc.h (ppc_elf_section_processing): Declare. * libbfd.h: Regenerated. * reloc.c (BFD_RELOC_PPC_VLE_REL8, BFD_RELOC_PPC_VLE_REL15, BFD_RELOC_PPC_VLE_REL24, BFD_RELOC_PPC_VLE_LO16A, BFD_RELOC_PPC_VLE_LO16D, BFD_RELOC_PPC_VLE_HI16A, BFD_RELOC_PPC_VLE_HI16D, BFD_RELOC_PPC_VLE_HA16A, BFD_RELOC_PPC_VLE_HA16D, BFD_RELOC_PPC_VLE_SDA21, BFD_RELOC_PPC_VLE_SDA21_LO, BFD_RELOC_PPC_VLE_SDAREL_LO16A, BFD_RELOC_PPC_VLE_SDAREL_LO16D, BFD_RELOC_PPC_VLE_SDAREL_HI16A, BFD_RELOC_PPC_VLE_SDAREL_HI16D, BFD_RELOC_PPC_VLE_SDAREL_HA16A, BFD_RELOC_PPC_VLE_SDAREL_HA16D): New bfd relocations. 2012-05-14 James Lemke <jwlemke@codesourcery.com> gas/ * config/tc-ppc.c (insn_validate): New func of existing code to call.. (ppc_setup_opcodes): ..from 2 places here. Revise for second (VLE) opcode table. Add #ifdef'd code to print opcode tables. 2012-05-14 James Lemke <jwlemke@codesourcery.com> gas/ * config/tc-ppc.c (ppc_setup_opcodes): Allow out-of-order for the VLE conditional branches. 2012-05-14 Catherine Moore <clm@codesourcery.com> Maciej W. Rozycki <macro@codesourcery.com> Rhonda Wittels <rhonda@codesourcery.com> gas/ * config/tc-ppc.c (PPC_VLE_SPLIT16A): New macro. (PPC_VLE_SPLIT16D): New macro. (PPC_VLE_LO16A): New macro. (PPC_VLE_LO16D): New macro. (PPC_VLE_HI16A): New macro. (PPC_VLE_HI16D): New macro. (PPC_VLE_HA16A): New macro. (PPC_VLE_HA16D): New macro. (PPC_APUINFO_VLE): New definition. (md_chars_to_number): New function. (md_parse_option): Check for combinations of little endian and -mvle. (md_show_usage): Document -mvle. (ppc_arch): Recognize VLE. (ppc_mach): Recognize bfd_mach_ppc_vle. (ppc_setup_opcodes): Print the opcode table if * config/tc-ppc.h (ppc_frag_check): Declare. * doc/c-ppc.texi: Document -mvle. * NEWS: Mention PowerPC VLE port. 2012-05-14 Catherine Moore <clm@codesourcery.com> gas/ * config/tc-ppc.h (ppc_dw2_line_min_insn_length): Declare. (DWARF2_LINE_MIN_INSN_LENGTH): Redefine. * config/tc-ppc.c (ppc_dw2_line_min_insn_length): New. * dwarf2dbg.c (scale_addr_delta): Handle values of 1 for DWARF2_LINE_MIN_INSN_LENGTH. 2012-05-14 Catherine Moore <clm@codesourcery.com> Maciej W. Rozycki <macro@codesourcery.com> Rhonda Wittels <rhonda@codesourcery.com> gas/testsuite/ * gas/ppc/ppc.exp: Run new tests. * gas/ppc/vle-reloc.d: New test. * gas/ppc/vle-reloc.s: New test. * gas/ppc/vle-simple-1.d: New test. * gas/ppc/vle-simple-1.s: New test. * gas/ppc/vle-simple-2.d: New test. * gas/ppc/vle-simple-2.s: New test. * gas/ppc/vle-simple-3.d: New test. * gas/ppc/vle-simple-3.s: New test. * gas/ppc/vle-simple-4.d: New test. * gas/ppc/vle-simple-4.s: New test. * gas/ppc/vle-simple-5.d: New test. * gas/ppc/vle-simple-5.s: New test. * gas/ppc/vle-simple-6.d: New test. * gas/ppc/vle-simple-6.s: New test. * gas/ppc/vle.d: New test. * gas/ppc/vle.s: New test. 2012-05-14 James Lemke <jwlemke@codesourcery.com> include/elf/ * ppc.h (SEC_PPC_VLE): Remove. 2012-05-14 Catherine Moore <clm@codesourcery.com> James Lemke <jwlemke@codesourcery.com> include/elf/ * ppc.h (R_PPC_VLE_REL8): New reloction. (R_PPC_VLE_REL15): Likewise. (R_PPC_VLE_REL24): Likewise. (R_PPC_VLE_LO16A): Likewise. (R_PPC_VLE_LO16D): Likewise. (R_PPC_VLE_HI16A): Likewise. (R_PPC_VLE_HI16D): Likewise. (R_PPC_VLE_HA16A): Likewise. (R_PPC_VLE_HA16D): Likewise. (R_PPC_VLE_SDA21): Likewise. (R_PPC_VLE_SDA21_LO): Likewise. (R_PPC_VLE_SDAREL_LO16A): Likewise. (R_PPC_VLE_SDAREL_LO16D): Likewise. (R_PPC_VLE_SDAREL_HI16A): Likewise. (R_PPC_VLE_SDAREL_HI16D): Likewise. (R_PPC_VLE_SDAREL_HA16A): Likewise. (R_PPC_VLE_SDAREL_HA16D): Likewise. (SEC_PPC_VLE): Remove. (PF_PPC_VLE): New program header flag. (SHF_PPC_VLE): New section header flag. (vle_opcodes, vle_num_opcodes): New. (VLE_OP): New macro. (VLE_OP_TO_SEG): New macro. 2012-05-14 Catherine Moore <clm@codesourcery.com> Maciej W. Rozycki <macro@codesourcery.com> Rhonda Wittels <rhonda@codesourcery.com> include/opcode/ * ppc.h (PPC_OPCODE_VLE): New definition. (PPC_OP_SA): New macro. (PPC_OP_SE_VLE): New macro. (PPC_OP): Use a variable shift amount. (powerpc_operand): Update comments. (PPC_OPSHIFT_INV): New macro. (PPC_OPERAND_CR): Replace with... (PPC_OPERAND_CR_BIT): ...this and (PPC_OPERAND_CR_REG): ...this. 2012-05-14 James Lemke <jwlemke@codesourcery.com> ld/ * ldlang.c (walk_wild_consider_section): Don't copy section_flag_list. Pass it to callback. (walk_wild_section_general): Pass section_flag_list to callback. (lang_add_section): Add sflag_list parm. Move out logic to keep / omit a section & call bfd_lookup_section_flags. (output_section_callback_fast): Add sflag_list parm. Add new parm to lang_add_section calls. (output_section_callback): Likewise. (check_section_callback): Add sflag_list parm. (lang_place_orphans): Add new parm to lang_add_section calls. (gc_section_callback): Add sflag_list parm. (find_relro_section_callback): Likewise. * ldlang.h (callback_t): Add flag_info parm. (lang_add_section): Add sflag_list parm. * emultempl/armelf.em (elf32_arm_add_stub_section): Add lang_add_section parm. * emultempl/beos.em (gld*_place_orphan): Likewise. * emultempl/elf32.em (gld*_place_orphan): Likewise. * emultempl/hppaelf.em (hppaelf_add_stub_section): Likewise. * emultempl/m68hc1xelf.em (m68hc11elf_add_stub_section): Likewise. * emultempl/mipself.em (mips_add_stub_section): Likewise. * emultempl/mmo.em (mmo_place_orphan): Likewise. * emultempl/pe.em (gld_*_place_orphan): Likewise. * emultempl/pep.em (gld_*_place_orphan): Likewise. * emultempl/ppc64elf.em (ppc_add_stub_section): Likewise. * emultempl/spuelf.em (spu_place_special_section): Likewise. * emultempl/vms.em (vms_place_orphan): Likewise. 2012-05-14 James Lemke <jwlemke@codesourcery.com> ld/testsuite/ * ld-powerpc/powerpc.exp: Create ppceabitests. * ld-powerpc/vle-multiseg.s: New. * ld-powerpc/vle-multiseg-1.d: New. * ld-powerpc/vle-multiseg-1.ld: New. * ld-powerpc/vle-multiseg-2.d: New. * ld-powerpc/vle-multiseg-2.ld: New. * ld-powerpc/vle-multiseg-3.d: New. * ld-powerpc/vle-multiseg-3.ld: New. * ld-powerpc/vle-multiseg-4.d: New. * ld-powerpc/vle-multiseg-4.ld: New. * ld-powerpc/vle-multiseg-5.d: New. * ld-powerpc/vle-multiseg-5.ld: New. * ld-powerpc/vle-multiseg-6.d: New. * ld-powerpc/vle-multiseg-6.ld: New. * ld-powerpc/vle-multiseg-6a.s: New. * ld-powerpc/vle-multiseg-6b.s: New. * ld-powerpc/vle-multiseg-6c.s: New. * ld-powerpc/vle-multiseg-6d.s: New. * ld-powerpc/powerpc.exp: Run new tests. 2012-05-14 Catherine Moore <clm@codesourcery.com> ld/ * NEWS: Mention PowerPC VLE port. 2012-05-14 Catherine Moore <clm@codesourcery.com> ld/testsuite/ * ld-powerpc/apuinfo.rd: Update for VLE. * ld-powerpc/vle-reloc-1.d: New. * ld-powerpc/vle-reloc-1.s: New. * ld-powerpc/vle-reloc-2.d: New. * ld-powerpc/vle-reloc-2.s: New. * ld-powerpc/vle-reloc-3.d: New. * ld-powerpc/vle-reloc-3.s: New. * ld-powerpc/vle-reloc-def-1.s: New. * ld-powerpc/vle-reloc-def-2.s: New. * ld-powerpc/vle-reloc-def-3.s: New. 2012-05-14 James Lemke <jwlemke@codesourcery.com> opcodes/ * ppc-dis.c (get_powerpc_dialect): Use is_ppc_vle. (PPC_OPCD_SEGS, VLE_OPCD_SEGS): New defines. (vle_opcd_indices): New array. (lookup_vle): New function. (disassemble_init_powerpc): Revise for second (VLE) opcode table. (print_insn_powerpc): Likewise. * ppc-opc.c: Likewise. 2012-05-14 Catherine Moore <clm@codesourcery.com> Maciej W. Rozycki <macro@codesourcery.com> Rhonda Wittels <rhonda@codesourcery.com> Nathan Froyd <froydnj@codesourcery.com> opcodes/ * ppc-opc.c (insert_arx, extract_arx): New functions. (insert_ary, extract_ary): New functions. (insert_li20, extract_li20): New functions. (insert_rx, extract_rx): New functions. (insert_ry, extract_ry): New functions. (insert_sci8, extract_sci8): New functions. (insert_sci8n, extract_sci8n): New functions. (insert_sd4h, extract_sd4h): New functions. (insert_sd4w, extract_sd4w): New functions. (insert_vlesi, extract_vlesi): New functions. (insert_vlensi, extract_vlensi): New functions. (insert_vleui, extract_vleui): New functions. (insert_vleil, extract_vleil): New functions. (BI_MASK, BB_MASK, BT): Use PPC_OPERAND_CR_BIT. (BI16, BI32, BO32, B8): New. (B15, B24, CRD32, CRS): New. (CRD, OBF, BFA, CR, CRFS): Use PPC_OPERAND_CR_REG. (DB, IMM20, RD, Rx, ARX, RY, RZ): New. (ARY, SCLSCI8, SCLSCI8N, SE_SD, SE_SDH): New. (SH6_MASK): Use PPC_OPSHIFT_INV. (SI8, UI5, OIMM5, UI7, BO16): New. (VLESIMM, VLENSIMM, VLEUIMM, VLEUIMML): New. (XT6, XA6, XB6, XB6S, XC6): Use PPC_OPSHIFT_INV. (ALLOW8_SPRG): New. (insert_sprg, extract_sprg): Check ALLOW8_SPRG. (OPVUP, OPVUP_MASK OPVUP): New (BD8, BD8_MASK, BD8IO, BD8IO_MASK): New. (EBD8IO, EBD8IO1_MASK, EBD8IO2_MASK, EBD8IO3_MASK): New. (BD15, BD15_MASK, EBD15, EBD15_MASK, EBD15BI, EBD15BI_MASK): New. (BD24,BD24_MASK, C_LK, C_LK_MASK, C, C_MASK): New. (IA16, IA16_MASK, I16A, I16A_MASK, I16L, I16L_MASK): New. (IM7, IM7_MASK, LI20, LI20_MASK, SCI8, SCI8_MASK): New. (SCI8BF, SCI8BF_MASK, SD4, SD4_MASK): New. (SE_IM5, SE_IM5_MASK): New. (SE_R, SE_R_MASK, SE_RR, SE_RR_MASK): New. (EX, EX_MASK, BO16F, BO16T, BO32F, BO32T): New. (BO32DNZ, BO32DZ): New. (NO371, PPCSPE, PPCISEL, PPCEFS, MULHW): Include PPC_OPCODE_VLE. (PPCVLE): New. (powerpc_opcodes): Add new VLE instructions. Update existing instruction to include PPCVLE if supported. * ppc-dis.c (ppc_opts): Add vle entry. (get_powerpc_dialect): New function. (powerpc_init_dialect): VLE support. (print_insn_big_powerpc): Call get_powerpc_dialect. (print_insn_little_powerpc): Likewise. (operand_value_powerpc): Handle negative shift counts. (print_insn_powerpc): Handle 2-byte instruction lengths.
2012-05-14 21:45:30 +02:00
run_dump_test "plt1"
run_dump_test "sdabase"
run_dump_test "sdabase2"
run_dump_test "attr-gnu-4-00"
run_dump_test "attr-gnu-4-01"
run_dump_test "attr-gnu-4-02"
run_dump_test "attr-gnu-4-03"
run_dump_test "attr-gnu-4-10"
run_dump_test "attr-gnu-4-11"
run_dump_test "attr-gnu-4-12"
run_dump_test "attr-gnu-4-13"
run_dump_test "attr-gnu-4-20"
run_dump_test "attr-gnu-4-21"
run_dump_test "attr-gnu-4-22"
run_dump_test "attr-gnu-4-23"
run_dump_test "attr-gnu-4-31"
run_dump_test "attr-gnu-4-32"
run_dump_test "attr-gnu-4-33"
run_dump_test "attr-gnu-8-11"
run_dump_test "attr-gnu-8-23"
run_dump_test "attr-gnu-8-31"
run_dump_test "attr-gnu-12-11"
run_dump_test "attr-gnu-12-21"
Add support for PowerPC VLE. 2012-05-14 Catherine Moore <clm@codesourcery.com> * NEWS: Mention PowerPC VLE port. 2012-05-14 James Lemke <jwlemke@codesourcery.com> Catherine Moore <clm@codesourcery.com> bfd/ * bfd.c (bfd_lookup_section_flags): Add section parm. * ecoff.c (bfd_debug_section): Remove flag_info initializer. * elf-bfd.h (bfd_elf_section_data): Move in section_flag_info. (bfd_elf_lookup_section_flags): Add section parm. * elf32-ppc.c (is_ppc_vle): New function. (ppc_elf_modify_segment_map): New function. (elf_backend_modify_segment_map): Define. (has_vle_insns): New define. * elf32-ppc.h (ppc_elf_modify_segment_map): Declare. * elflink.c (bfd_elf_lookup_section_flags): Add return value & parm. Move in logic to omit / include a section. * libbfd-in.h (bfd_link_info): Add section parm. (bfd_generic_lookup_section_flags): Likewise. * reloc.c (bfd_generic_lookup_section_flags): Likewise. * section.c (bfd_section): Move out section_flag_info. (BFD_FAKE_SECTION): Remove flag_info initializer. * targets.c (_bfd_lookup_section_flags): Add section parm. 2012-05-14 Catherine Moore <clm@codesourcery.com> bfd/ * archures.c (bfd_mach_ppc_vle): New. * bfd-in2.h: Regenerated. * cpu-powerpc.c (bfd_powerpc_archs): New entry for vle. * elf32-ppc.c (split16_format_type): New enumeration. (ppc_elf_vle_split16): New function. (HOWTO): Add entries for R_PPC_VLE relocations. (ppc_elf_reloc_type_lookup): Handle PPC_VLE relocations. (ppc_elf_section_flags): New function. (ppc_elf_lookup_section_flags): New function. (ppc_elf_section_processing): New function. (ppc_elf_check_relocs): Handle PPC_VLE relocations. (ppc_elf_relocation_section): Likewise. (elf_backend_lookup_section_flags_hook): Define. (elf_backend_section_flags): Define. (elf_backend_section_processing): Define. * elf32-ppc.h (ppc_elf_section_processing): Declare. * libbfd.h: Regenerated. * reloc.c (BFD_RELOC_PPC_VLE_REL8, BFD_RELOC_PPC_VLE_REL15, BFD_RELOC_PPC_VLE_REL24, BFD_RELOC_PPC_VLE_LO16A, BFD_RELOC_PPC_VLE_LO16D, BFD_RELOC_PPC_VLE_HI16A, BFD_RELOC_PPC_VLE_HI16D, BFD_RELOC_PPC_VLE_HA16A, BFD_RELOC_PPC_VLE_HA16D, BFD_RELOC_PPC_VLE_SDA21, BFD_RELOC_PPC_VLE_SDA21_LO, BFD_RELOC_PPC_VLE_SDAREL_LO16A, BFD_RELOC_PPC_VLE_SDAREL_LO16D, BFD_RELOC_PPC_VLE_SDAREL_HI16A, BFD_RELOC_PPC_VLE_SDAREL_HI16D, BFD_RELOC_PPC_VLE_SDAREL_HA16A, BFD_RELOC_PPC_VLE_SDAREL_HA16D): New bfd relocations. 2012-05-14 James Lemke <jwlemke@codesourcery.com> gas/ * config/tc-ppc.c (insn_validate): New func of existing code to call.. (ppc_setup_opcodes): ..from 2 places here. Revise for second (VLE) opcode table. Add #ifdef'd code to print opcode tables. 2012-05-14 James Lemke <jwlemke@codesourcery.com> gas/ * config/tc-ppc.c (ppc_setup_opcodes): Allow out-of-order for the VLE conditional branches. 2012-05-14 Catherine Moore <clm@codesourcery.com> Maciej W. Rozycki <macro@codesourcery.com> Rhonda Wittels <rhonda@codesourcery.com> gas/ * config/tc-ppc.c (PPC_VLE_SPLIT16A): New macro. (PPC_VLE_SPLIT16D): New macro. (PPC_VLE_LO16A): New macro. (PPC_VLE_LO16D): New macro. (PPC_VLE_HI16A): New macro. (PPC_VLE_HI16D): New macro. (PPC_VLE_HA16A): New macro. (PPC_VLE_HA16D): New macro. (PPC_APUINFO_VLE): New definition. (md_chars_to_number): New function. (md_parse_option): Check for combinations of little endian and -mvle. (md_show_usage): Document -mvle. (ppc_arch): Recognize VLE. (ppc_mach): Recognize bfd_mach_ppc_vle. (ppc_setup_opcodes): Print the opcode table if * config/tc-ppc.h (ppc_frag_check): Declare. * doc/c-ppc.texi: Document -mvle. * NEWS: Mention PowerPC VLE port. 2012-05-14 Catherine Moore <clm@codesourcery.com> gas/ * config/tc-ppc.h (ppc_dw2_line_min_insn_length): Declare. (DWARF2_LINE_MIN_INSN_LENGTH): Redefine. * config/tc-ppc.c (ppc_dw2_line_min_insn_length): New. * dwarf2dbg.c (scale_addr_delta): Handle values of 1 for DWARF2_LINE_MIN_INSN_LENGTH. 2012-05-14 Catherine Moore <clm@codesourcery.com> Maciej W. Rozycki <macro@codesourcery.com> Rhonda Wittels <rhonda@codesourcery.com> gas/testsuite/ * gas/ppc/ppc.exp: Run new tests. * gas/ppc/vle-reloc.d: New test. * gas/ppc/vle-reloc.s: New test. * gas/ppc/vle-simple-1.d: New test. * gas/ppc/vle-simple-1.s: New test. * gas/ppc/vle-simple-2.d: New test. * gas/ppc/vle-simple-2.s: New test. * gas/ppc/vle-simple-3.d: New test. * gas/ppc/vle-simple-3.s: New test. * gas/ppc/vle-simple-4.d: New test. * gas/ppc/vle-simple-4.s: New test. * gas/ppc/vle-simple-5.d: New test. * gas/ppc/vle-simple-5.s: New test. * gas/ppc/vle-simple-6.d: New test. * gas/ppc/vle-simple-6.s: New test. * gas/ppc/vle.d: New test. * gas/ppc/vle.s: New test. 2012-05-14 James Lemke <jwlemke@codesourcery.com> include/elf/ * ppc.h (SEC_PPC_VLE): Remove. 2012-05-14 Catherine Moore <clm@codesourcery.com> James Lemke <jwlemke@codesourcery.com> include/elf/ * ppc.h (R_PPC_VLE_REL8): New reloction. (R_PPC_VLE_REL15): Likewise. (R_PPC_VLE_REL24): Likewise. (R_PPC_VLE_LO16A): Likewise. (R_PPC_VLE_LO16D): Likewise. (R_PPC_VLE_HI16A): Likewise. (R_PPC_VLE_HI16D): Likewise. (R_PPC_VLE_HA16A): Likewise. (R_PPC_VLE_HA16D): Likewise. (R_PPC_VLE_SDA21): Likewise. (R_PPC_VLE_SDA21_LO): Likewise. (R_PPC_VLE_SDAREL_LO16A): Likewise. (R_PPC_VLE_SDAREL_LO16D): Likewise. (R_PPC_VLE_SDAREL_HI16A): Likewise. (R_PPC_VLE_SDAREL_HI16D): Likewise. (R_PPC_VLE_SDAREL_HA16A): Likewise. (R_PPC_VLE_SDAREL_HA16D): Likewise. (SEC_PPC_VLE): Remove. (PF_PPC_VLE): New program header flag. (SHF_PPC_VLE): New section header flag. (vle_opcodes, vle_num_opcodes): New. (VLE_OP): New macro. (VLE_OP_TO_SEG): New macro. 2012-05-14 Catherine Moore <clm@codesourcery.com> Maciej W. Rozycki <macro@codesourcery.com> Rhonda Wittels <rhonda@codesourcery.com> include/opcode/ * ppc.h (PPC_OPCODE_VLE): New definition. (PPC_OP_SA): New macro. (PPC_OP_SE_VLE): New macro. (PPC_OP): Use a variable shift amount. (powerpc_operand): Update comments. (PPC_OPSHIFT_INV): New macro. (PPC_OPERAND_CR): Replace with... (PPC_OPERAND_CR_BIT): ...this and (PPC_OPERAND_CR_REG): ...this. 2012-05-14 James Lemke <jwlemke@codesourcery.com> ld/ * ldlang.c (walk_wild_consider_section): Don't copy section_flag_list. Pass it to callback. (walk_wild_section_general): Pass section_flag_list to callback. (lang_add_section): Add sflag_list parm. Move out logic to keep / omit a section & call bfd_lookup_section_flags. (output_section_callback_fast): Add sflag_list parm. Add new parm to lang_add_section calls. (output_section_callback): Likewise. (check_section_callback): Add sflag_list parm. (lang_place_orphans): Add new parm to lang_add_section calls. (gc_section_callback): Add sflag_list parm. (find_relro_section_callback): Likewise. * ldlang.h (callback_t): Add flag_info parm. (lang_add_section): Add sflag_list parm. * emultempl/armelf.em (elf32_arm_add_stub_section): Add lang_add_section parm. * emultempl/beos.em (gld*_place_orphan): Likewise. * emultempl/elf32.em (gld*_place_orphan): Likewise. * emultempl/hppaelf.em (hppaelf_add_stub_section): Likewise. * emultempl/m68hc1xelf.em (m68hc11elf_add_stub_section): Likewise. * emultempl/mipself.em (mips_add_stub_section): Likewise. * emultempl/mmo.em (mmo_place_orphan): Likewise. * emultempl/pe.em (gld_*_place_orphan): Likewise. * emultempl/pep.em (gld_*_place_orphan): Likewise. * emultempl/ppc64elf.em (ppc_add_stub_section): Likewise. * emultempl/spuelf.em (spu_place_special_section): Likewise. * emultempl/vms.em (vms_place_orphan): Likewise. 2012-05-14 James Lemke <jwlemke@codesourcery.com> ld/testsuite/ * ld-powerpc/powerpc.exp: Create ppceabitests. * ld-powerpc/vle-multiseg.s: New. * ld-powerpc/vle-multiseg-1.d: New. * ld-powerpc/vle-multiseg-1.ld: New. * ld-powerpc/vle-multiseg-2.d: New. * ld-powerpc/vle-multiseg-2.ld: New. * ld-powerpc/vle-multiseg-3.d: New. * ld-powerpc/vle-multiseg-3.ld: New. * ld-powerpc/vle-multiseg-4.d: New. * ld-powerpc/vle-multiseg-4.ld: New. * ld-powerpc/vle-multiseg-5.d: New. * ld-powerpc/vle-multiseg-5.ld: New. * ld-powerpc/vle-multiseg-6.d: New. * ld-powerpc/vle-multiseg-6.ld: New. * ld-powerpc/vle-multiseg-6a.s: New. * ld-powerpc/vle-multiseg-6b.s: New. * ld-powerpc/vle-multiseg-6c.s: New. * ld-powerpc/vle-multiseg-6d.s: New. * ld-powerpc/powerpc.exp: Run new tests. 2012-05-14 Catherine Moore <clm@codesourcery.com> ld/ * NEWS: Mention PowerPC VLE port. 2012-05-14 Catherine Moore <clm@codesourcery.com> ld/testsuite/ * ld-powerpc/apuinfo.rd: Update for VLE. * ld-powerpc/vle-reloc-1.d: New. * ld-powerpc/vle-reloc-1.s: New. * ld-powerpc/vle-reloc-2.d: New. * ld-powerpc/vle-reloc-2.s: New. * ld-powerpc/vle-reloc-3.d: New. * ld-powerpc/vle-reloc-3.s: New. * ld-powerpc/vle-reloc-def-1.s: New. * ld-powerpc/vle-reloc-def-2.s: New. * ld-powerpc/vle-reloc-def-3.s: New. 2012-05-14 James Lemke <jwlemke@codesourcery.com> opcodes/ * ppc-dis.c (get_powerpc_dialect): Use is_ppc_vle. (PPC_OPCD_SEGS, VLE_OPCD_SEGS): New defines. (vle_opcd_indices): New array. (lookup_vle): New function. (disassemble_init_powerpc): Revise for second (VLE) opcode table. (print_insn_powerpc): Likewise. * ppc-opc.c: Likewise. 2012-05-14 Catherine Moore <clm@codesourcery.com> Maciej W. Rozycki <macro@codesourcery.com> Rhonda Wittels <rhonda@codesourcery.com> Nathan Froyd <froydnj@codesourcery.com> opcodes/ * ppc-opc.c (insert_arx, extract_arx): New functions. (insert_ary, extract_ary): New functions. (insert_li20, extract_li20): New functions. (insert_rx, extract_rx): New functions. (insert_ry, extract_ry): New functions. (insert_sci8, extract_sci8): New functions. (insert_sci8n, extract_sci8n): New functions. (insert_sd4h, extract_sd4h): New functions. (insert_sd4w, extract_sd4w): New functions. (insert_vlesi, extract_vlesi): New functions. (insert_vlensi, extract_vlensi): New functions. (insert_vleui, extract_vleui): New functions. (insert_vleil, extract_vleil): New functions. (BI_MASK, BB_MASK, BT): Use PPC_OPERAND_CR_BIT. (BI16, BI32, BO32, B8): New. (B15, B24, CRD32, CRS): New. (CRD, OBF, BFA, CR, CRFS): Use PPC_OPERAND_CR_REG. (DB, IMM20, RD, Rx, ARX, RY, RZ): New. (ARY, SCLSCI8, SCLSCI8N, SE_SD, SE_SDH): New. (SH6_MASK): Use PPC_OPSHIFT_INV. (SI8, UI5, OIMM5, UI7, BO16): New. (VLESIMM, VLENSIMM, VLEUIMM, VLEUIMML): New. (XT6, XA6, XB6, XB6S, XC6): Use PPC_OPSHIFT_INV. (ALLOW8_SPRG): New. (insert_sprg, extract_sprg): Check ALLOW8_SPRG. (OPVUP, OPVUP_MASK OPVUP): New (BD8, BD8_MASK, BD8IO, BD8IO_MASK): New. (EBD8IO, EBD8IO1_MASK, EBD8IO2_MASK, EBD8IO3_MASK): New. (BD15, BD15_MASK, EBD15, EBD15_MASK, EBD15BI, EBD15BI_MASK): New. (BD24,BD24_MASK, C_LK, C_LK_MASK, C, C_MASK): New. (IA16, IA16_MASK, I16A, I16A_MASK, I16L, I16L_MASK): New. (IM7, IM7_MASK, LI20, LI20_MASK, SCI8, SCI8_MASK): New. (SCI8BF, SCI8BF_MASK, SD4, SD4_MASK): New. (SE_IM5, SE_IM5_MASK): New. (SE_R, SE_R_MASK, SE_RR, SE_RR_MASK): New. (EX, EX_MASK, BO16F, BO16T, BO32F, BO32T): New. (BO32DNZ, BO32DZ): New. (NO371, PPCSPE, PPCISEL, PPCEFS, MULHW): Include PPC_OPCODE_VLE. (PPCVLE): New. (powerpc_opcodes): Add new VLE instructions. Update existing instruction to include PPCVLE if supported. * ppc-dis.c (ppc_opts): Add vle entry. (get_powerpc_dialect): New function. (powerpc_init_dialect): VLE support. (print_insn_big_powerpc): Call get_powerpc_dialect. (print_insn_little_powerpc): Likewise. (operand_value_powerpc): Handle negative shift counts. (print_insn_powerpc): Handle 2-byte instruction lengths.
2012-05-14 21:45:30 +02:00
run_dump_test "vle-multiseg-6"
run_dump_test "ppc476-shared"
run_dump_test "ppc476-shared2"
Add support for non-contiguous memory regions 2020-01-06 Christophe Lyon <christophe.lyon@linaro.org> bfd/ * bfd-in2.h: Regenerate. * section.c (asection): Add already_assigned field. (BFD_FAKE_SECTION): Add default initializer for it. * ecoff.c (bfd_debug_section): Initialize already_assigned field. * elf32-arm.c (arm_build_one_stub): Add support for non_contiguous_regions. * elf32-csky.c (csky_build_one_stub): Likewise. * elf32-hppa.c (hppa_build_one_stub): Likewise. * elf32-m68hc11.c (m68hc11_elf_build_one_stub): Likewise. * elf32-m68hc12.c (m68hc12_elf_build_one_stub): Likewise. * elf32-metag.c (metag_build_one_stub): Likewise. * elf32-nios2.c (nios2_build_one_stub): Likewise. * elf64-ppc.c (ppc_build_one_stub): Likewise. (ppc_size_one_stub): Likewise. * elfnn-aarch64.c (aarch64_build_one_stub): Likewise. * elflink.c (elf_link_input_bfd): Likewise. include/ * bfdlink.h (bfd_link_info): Add non_contiguous_regions and non_contiguous_regions_warnings fields. ld/ * ldlang.c (lang_add_section): Add support for non_contiguous_regions. (size_input_section): Likewise. (lang_size_sections_1): Likewise. (process_insert_statements): Likewise. * ldlex.h (option_values): Add OPTION_NON_CONTIGUOUS_REGIONS and OPTION_NON_CONTIGUOUS_REGIONS_WARNINGS. * lexsup.c (ld_options): Add entries for --enable-non-contiguous-regions and --enable-non-contiguous-regions-warnings. (parse_args): Handle it. * NEWS: Add --enable-non-contiguous-regions and --enable-non-contiguous-regions-warnings. * ld.texi: Add --enable-non-contiguous-regions and --enable-non-contiguous-regions-warnings documentation. * emultempl/armelf.em (elf32_arm_add_stub_section): Add SEC_LINKER_CREATED flag. * emultempl/xtensaelf.em (ld_build_required_section_dependence): Emit an error when --enable-non-contiguous-regions is used. * testsuite/ld-elf/non-contiguous.d: New. * testsuite/ld-elf/non-contiguous.ld: New. * testsuite/ld-elf/non-contiguous.s: New. * testsuite/ld-arm/arm-elf.exp: Run the new tests. * testsuite/ld-arm/arm-elf/non-contiguous-arm.s: New. * testsuite/ld-arm/arm-elf/non-contiguous-arm.d: New. * testsuite/ld-arm/arm-elf/non-contiguous-arm.ld: New. * testsuite/ld-arm/arm-elf/non-contiguous-arm2.d: New. * testsuite/ld-arm/arm-elf/non-contiguous-arm3.ld: New. * testsuite/ld-arm/arm-elf/non-contiguous-arm3.d: New. * testsuite/ld-arm/arm-elf/non-contiguous-arm3.ld: New. * testsuite/ld-arm/arm-elf/non-contiguous-arm4.d: New. * testsuite/ld-arm/arm-elf/non-contiguous-arm4.ld: New. * testsuite/ld-arm/arm-elf/non-contiguous-arm5.d: New. * testsuite/ld-arm/arm-elf/non-contiguous-arm5.ld: New. * testsuite/ld-arm/arm-elf/non-contiguous-arm6.d: New. * testsuite/ld-arm/arm-elf/non-contiguous-arm6.ld: New. * testsuite/ld-powerpc/powerpc.exp: Run new tests. * testsuite/ld-powerpc/non-contiguous-powerpc.d: New. * testsuite/ld-powerpc/non-contiguous-powerpc.ld: New. * testsuite/ld-powerpc/non-contiguous-powerpc.sd: New. * testsuite/ld-powerpc/non-contiguous-powerpc64.d: New.
2019-11-25 09:55:37 +01:00
run_dump_test "non-contiguous-powerpc"