2001-02-10 01:58:38 +01:00
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/* s390-dis.c -- Disassemble S390 instructions
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2018-01-03 06:17:27 +01:00
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Copyright (C) 2000-2018 Free Software Foundation, Inc.
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2001-02-10 01:58:38 +01:00
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Contributed by Martin Schwidefsky (schwidefsky@de.ibm.com).
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2007-07-05 11:49:03 +02:00
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This file is part of the GNU opcodes library.
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2001-02-10 01:58:38 +01:00
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2007-07-05 11:49:03 +02:00
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This library is free software; you can redistribute it and/or modify
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2001-02-10 01:58:38 +01:00
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it under the terms of the GNU General Public License as published by
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2007-07-05 11:49:03 +02:00
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the Free Software Foundation; either version 3, or (at your option)
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any later version.
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2001-02-10 01:58:38 +01:00
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2007-07-05 11:49:03 +02:00
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It is distributed in the hope that it will be useful, but WITHOUT
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ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
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or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
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License for more details.
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2001-02-10 01:58:38 +01:00
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You should have received a copy of the GNU General Public License
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2007-07-05 11:49:03 +02:00
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along with this file; see the file COPYING. If not, write to the
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Free Software Foundation, 51 Franklin Street - Fifth Floor, Boston,
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MA 02110-1301, USA. */
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2001-02-10 01:58:38 +01:00
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2012-05-17 17:13:28 +02:00
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#include "sysdep.h"
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2001-02-10 01:58:38 +01:00
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#include <stdio.h>
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#include "ansidecl.h"
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Move print_insn_XXX to an opcodes internal header
With the changes done in previous patches, print_insn_XXX functions
don't have to be external visible out of opcodes, because both gdb
and objdump select disassemblers through a single interface.
This patch moves these print_insn_XXX declarations from
include/dis-asm.h to opcodes/disassemble.h, which is a new header
added by this patch.
include:
2017-05-24 Yao Qi <yao.qi@linaro.org>
* dis-asm.h: Move some function declarations to
opcodes/disassemble.h.
opcodes:
2017-05-24 Yao Qi <yao.qi@linaro.org>
* alpha-dis.c: Include disassemble.h, don't include
dis-asm.h.
* avr-dis.c, bfin-dis.c, cr16-dis.c: Likewise.
* crx-dis.c, d10v-dis.c, d30v-dis.c: Likewise.
* disassemble.c, dlx-dis.c, epiphany-dis.c: Likewise.
* fr30-dis.c, ft32-dis.c, h8300-dis.c, h8500-dis.c: Likewise.
* hppa-dis.c, i370-dis.c, i386-dis.c: Likewise.
* i860-dis.c, i960-dis.c, ip2k-dis.c: Likewise.
* iq2000-dis.c, lm32-dis.c, m10200-dis.c: Likewise.
* m10300-dis.c, m32r-dis.c, m68hc11-dis.c: Likewise.
* m68k-dis.c, m88k-dis.c, mcore-dis.c: Likewise.
* metag-dis.c, microblaze-dis.c, mmix-dis.c: Likewise.
* moxie-dis.c, msp430-dis.c, mt-dis.c:
* nds32-dis.c, nios2-dis.c, ns32k-dis.c: Likewise.
* or1k-dis.c, pdp11-dis.c, pj-dis.c: Likewise.
* ppc-dis.c, pru-dis.c, riscv-dis.c: Likewise.
* rl78-dis.c, s390-dis.c, score-dis.c: Likewise.
* sh-dis.c, sh64-dis.c, tic30-dis.c: Likewise.
* tic4x-dis.c, tic54x-dis.c, tic6x-dis.c: Likewise.
* tic80-dis.c, tilegx-dis.c, tilepro-dis.c: Likewise.
* v850-dis.c, vax-dis.c, visium-dis.c: Likewise.
* w65-dis.c, wasm32-dis.c, xc16x-dis.c: Likewise.
* xgate-dis.c, xstormy16-dis.c, xtensa-dis.c: Likewise.
* z80-dis.c, z8k-dis.c: Likewise.
* disassemble.h: New file.
2017-05-24 18:23:52 +02:00
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#include "disassemble.h"
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2008-04-10 15:36:43 +02:00
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#include "opintl.h"
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2001-02-10 01:58:38 +01:00
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#include "opcode/s390.h"
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2017-02-28 19:32:07 +01:00
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#include "libiberty.h"
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2001-02-10 01:58:38 +01:00
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static int opc_index[256];
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static int current_arch_mask = 0;
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2016-06-10 13:40:48 +02:00
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static int option_use_insn_len_bits_p = 0;
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2001-02-10 01:58:38 +01:00
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2017-02-28 19:32:07 +01:00
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typedef struct
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{
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const char *name;
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const char *description;
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} s390_options_t;
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static const s390_options_t options[] =
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{
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{ "esa" , N_("Disassemble in ESA architecture mode") },
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{ "zarch", N_("Disassemble in z/Architecture mode") },
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{ "insnlength", N_("Print unknown instructions according to "
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"length from first two bits") }
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};
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2001-07-23 15:41:14 +02:00
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/* Set up index table for first opcode byte. */
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2017-02-28 19:32:07 +01:00
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void
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disassemble_init_s390 (struct disassemble_info *info)
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2001-02-10 01:58:38 +01:00
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{
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2014-08-19 16:42:13 +02:00
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int i;
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2008-04-10 15:36:43 +02:00
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const char *p;
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2001-02-10 01:58:38 +01:00
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2001-07-23 15:41:14 +02:00
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memset (opc_index, 0, sizeof (opc_index));
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2014-08-19 16:42:13 +02:00
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/* Reverse order, such that each opc_index ends up pointing to the
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first matching entry instead of the last. */
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for (i = s390_num_opcodes; i--; )
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opc_index[s390_opcodes[i].opcode[0]] = i;
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2008-04-10 15:36:43 +02:00
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2017-02-28 19:32:07 +01:00
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current_arch_mask = 1 << S390_OPCODE_ZARCH;
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option_use_insn_len_bits_p = 0;
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2008-04-10 15:36:43 +02:00
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for (p = info->disassembler_options; p != NULL; )
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2001-07-23 15:41:14 +02:00
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{
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2008-04-10 15:36:43 +02:00
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if (CONST_STRNEQ (p, "esa"))
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current_arch_mask = 1 << S390_OPCODE_ESA;
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else if (CONST_STRNEQ (p, "zarch"))
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current_arch_mask = 1 << S390_OPCODE_ZARCH;
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2016-06-10 13:40:48 +02:00
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else if (CONST_STRNEQ (p, "insnlength"))
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option_use_insn_len_bits_p = 1;
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2008-04-10 15:36:43 +02:00
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else
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opcodes error messages
Another patch aimed at making binutils comply with the GNU coding
standard. The generated files require
https://sourceware.org/ml/cgen/2018-q1/msg00004.html
cpu/
* frv.opc: Include opintl.h.
(add_next_to_vliw): Use opcodes_error_handler to print error.
Standardize error message.
(fr500_check_insn_major_constraints, frv_vliw_add_insn): Likewise.
opcodes/
* sysdep.h (opcodes_error_handler): Define.
(_bfd_error_handler): Declare.
* Makefile.am: Remove stray #.
* opc2c.c (main): Remove bogus -l arg handling. Print "DO NOT
EDIT" comment.
* aarch64-dis.c, * arc-dis.c, * arm-dis.c, * avr-dis.c,
* d30v-dis.c, * h8300-dis.c, * mmix-dis.c, * ppc-dis.c,
* riscv-dis.c, * s390-dis.c, * sparc-dis.c, * v850-dis.c: Use
opcodes_error_handler to print errors. Standardize error messages.
* msp430-decode.opc, * nios2-dis.c, * rl78-decode.opc: Likewise,
and include opintl.h.
* nds32-asm.c: Likewise, and include sysdep.h and opintl.h.
* i386-gen.c: Standardize error messages.
* msp430-decode.c, * rl78-decode.c, rx-decode.c: Regenerate.
* Makefile.in: Regenerate.
* epiphany-asm.c, * epiphany-desc.c, * epiphany-dis.c,
* epiphany-ibld.c, * fr30-asm.c, * fr30-desc.c, * fr30-dis.c,
* fr30-ibld.c, * frv-asm.c, * frv-desc.c, * frv-dis.c, * frv-ibld.c,
* frv-opc.c, * ip2k-asm.c, * ip2k-desc.c, * ip2k-dis.c, * ip2k-ibld.c,
* iq2000-asm.c, * iq2000-desc.c, * iq2000-dis.c, * iq2000-ibld.c,
* lm32-asm.c, * lm32-desc.c, * lm32-dis.c, * lm32-ibld.c,
* m32c-asm.c, * m32c-desc.c, * m32c-dis.c, * m32c-ibld.c,
* m32r-asm.c, * m32r-desc.c, * m32r-dis.c, * m32r-ibld.c,
* mep-asm.c, * mep-desc.c, * mep-dis.c, * mep-ibld.c, * mt-asm.c,
* mt-desc.c, * mt-dis.c, * mt-ibld.c, * or1k-asm.c, * or1k-desc.c,
* or1k-dis.c, * or1k-ibld.c, * xc16x-asm.c, * xc16x-desc.c,
* xc16x-dis.c, * xc16x-ibld.c, * xstormy16-asm.c, * xstormy16-desc.c,
* xstormy16-dis.c, * xstormy16-ibld.c: Regenerate.
2018-03-01 22:53:50 +01:00
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/* xgettext:c-format */
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opcodes_error_handler (_("unknown S/390 disassembler option: %s"), p);
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2008-04-10 15:36:43 +02:00
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p = strchr (p, ',');
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if (p != NULL)
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p++;
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2001-07-23 15:41:14 +02:00
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}
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2001-02-10 01:58:38 +01:00
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}
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2014-08-19 16:42:13 +02:00
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/* Derive the length of an instruction from its first byte. */
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static inline int
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s390_insn_length (const bfd_byte *buffer)
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{
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/* 00xxxxxx -> 2, 01xxxxxx/10xxxxxx -> 4, 11xxxxxx -> 6. */
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return ((buffer[0] >> 6) + 3) & ~1U;
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}
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/* Match the instruction in BUFFER against the given OPCODE, excluding
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the first byte. */
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static inline int
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s390_insn_matches_opcode (const bfd_byte *buffer,
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const struct s390_opcode *opcode)
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{
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return (buffer[1] & opcode->mask[1]) == opcode->opcode[1]
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&& (buffer[2] & opcode->mask[2]) == opcode->opcode[2]
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&& (buffer[3] & opcode->mask[3]) == opcode->opcode[3]
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&& (buffer[4] & opcode->mask[4]) == opcode->opcode[4]
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&& (buffer[5] & opcode->mask[5]) == opcode->opcode[5];
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}
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union operand_value
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{
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int i;
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unsigned int u;
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};
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2001-02-10 01:58:38 +01:00
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/* Extracts an operand value from an instruction. */
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2009-09-10 10:47:20 +02:00
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/* We do not perform the shift operation for larl-type address
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operands here since that would lead to an overflow of the 32 bit
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integer value. Instead the shift operation is done when printing
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2014-08-19 16:42:13 +02:00
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the operand. */
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2001-02-10 01:58:38 +01:00
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2014-08-19 16:42:13 +02:00
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static inline union operand_value
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s390_extract_operand (const bfd_byte *insn,
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const struct s390_operand *operand)
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2001-02-10 01:58:38 +01:00
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{
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2014-08-19 16:42:13 +02:00
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union operand_value ret;
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2001-02-10 01:58:38 +01:00
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unsigned int val;
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int bits;
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2015-01-16 12:19:21 +01:00
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const bfd_byte *orig_insn = insn;
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2001-02-10 01:58:38 +01:00
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2001-07-23 15:41:14 +02:00
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/* Extract fragments of the operand byte for byte. */
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insn += operand->shift / 8;
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2001-02-10 01:58:38 +01:00
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bits = (operand->shift & 7) + operand->bits;
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val = 0;
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2001-07-23 15:41:14 +02:00
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do
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{
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val <<= 8;
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val |= (unsigned int) *insn++;
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bits -= 8;
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}
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while (bits > 0);
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2001-02-10 01:58:38 +01:00
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val >>= -bits;
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2001-07-23 15:41:14 +02:00
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val &= ((1U << (operand->bits - 1)) << 1) - 1;
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* s390-dis.c (s390_extract_operand): Add support for long displacements.
* s390-mkopc.c (s390_opcode_cpu_val): Add support for cpu type z990.
* s390-opc.c (D20_20): Add define for 20 bit displacements.
(INSTR_RRF_R0RR, INSTR_RSL_R0RD, INSTR_RSY_RRRD, INSTR_RSY_RURD,
INSTR_RSY_AARD, INSTR_RXY_RRRD, INSTR_RXY_FRRD, INSTR_SIY_URD): Add
new instruction formats.
(MASK_RRF_R0RR, MASK_RSL_R0RD, MASK_RSY_RRRD, MASK_RSY_RURD,
MASK_RSY_AARD, MASK_RXY_RRRD, MASK_RXY_FRRD, MASK_SIY_URD): Likewise.
(s390_opformats): Likewise.
* s390-opc.txt: Add new instructions for cpu type z990. Add missing
hfp instructions. Add missing instructions pgin, pgout and xsch.
2003-07-01 16:47:58 +02:00
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/* Check for special long displacement case. */
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if (operand->bits == 20 && operand->shift == 20)
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val = (val & 0xff) << 12 | (val & 0xfff00) >> 8;
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2014-08-19 16:42:13 +02:00
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/* Sign extend value if the operand is signed or pc relative. Avoid
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integer overflows. */
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if (operand->flags & (S390_OPERAND_SIGNED | S390_OPERAND_PCREL))
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{
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unsigned int m = 1U << (operand->bits - 1);
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if (val >= m)
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ret.i = (int) (val - m) - 1 - (int) (m - 1U);
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else
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ret.i = (int) val;
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}
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else if (operand->flags & S390_OPERAND_LENGTH)
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/* Length x in an instruction has real length x + 1. */
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ret.u = val + 1;
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2015-01-16 12:19:21 +01:00
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else if (operand->flags & S390_OPERAND_VR)
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{
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/* Extract the extra bits for a vector register operand stored
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in the RXB field. */
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unsigned vr = operand->shift == 32 ? 3
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: (unsigned) operand->shift / 4 - 2;
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ret.u = val | ((orig_insn[4] & (1 << (3 - vr))) << (vr + 1));
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}
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2014-08-19 16:42:13 +02:00
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else
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ret.u = val;
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return ret;
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}
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/* Print the S390 instruction in BUFFER, assuming that it matches the
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given OPCODE. */
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static void
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s390_print_insn_with_opcode (bfd_vma memaddr,
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struct disassemble_info *info,
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const bfd_byte *buffer,
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const struct s390_opcode *opcode)
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{
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const unsigned char *opindex;
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char separator;
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/* Mnemonic. */
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info->fprintf_func (info->stream, "%s", opcode->name);
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/* Operands. */
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separator = '\t';
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for (opindex = opcode->operands; *opindex != 0; opindex++)
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{
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const struct s390_operand *operand = s390_operands + *opindex;
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union operand_value val = s390_extract_operand (buffer, operand);
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unsigned long flags = operand->flags;
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if ((flags & S390_OPERAND_INDEX) && val.u == 0)
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continue;
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if ((flags & S390_OPERAND_BASE) &&
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val.u == 0 && separator == '(')
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{
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separator = ',';
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continue;
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}
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2015-01-16 12:19:21 +01:00
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/* For instructions with a last optional operand don't print it
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if zero. */
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2017-05-29 12:34:56 +02:00
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if ((opcode->flags & (S390_INSTR_FLAG_OPTPARM | S390_INSTR_FLAG_OPTPARM2))
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2015-01-16 12:19:21 +01:00
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&& val.u == 0
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&& opindex[1] == 0)
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break;
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2014-08-19 16:42:13 +02:00
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2017-05-29 12:34:56 +02:00
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if ((opcode->flags & S390_INSTR_FLAG_OPTPARM2)
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&& val.u == 0 && opindex[1] != 0 && opindex[2] == 0)
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{
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union operand_value next_op_val =
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s390_extract_operand (buffer, s390_operands + opindex[1]);
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if (next_op_val.u == 0)
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break;
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}
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2014-08-19 16:42:13 +02:00
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if (flags & S390_OPERAND_GPR)
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2015-01-16 12:19:21 +01:00
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info->fprintf_func (info->stream, "%c%%r%u", separator, val.u);
|
2014-08-19 16:42:13 +02:00
|
|
|
else if (flags & S390_OPERAND_FPR)
|
2015-01-16 12:19:21 +01:00
|
|
|
info->fprintf_func (info->stream, "%c%%f%u", separator, val.u);
|
|
|
|
else if (flags & S390_OPERAND_VR)
|
|
|
|
info->fprintf_func (info->stream, "%c%%v%i", separator, val.u);
|
2014-08-19 16:42:13 +02:00
|
|
|
else if (flags & S390_OPERAND_AR)
|
2015-01-16 12:19:21 +01:00
|
|
|
info->fprintf_func (info->stream, "%c%%a%u", separator, val.u);
|
2014-08-19 16:42:13 +02:00
|
|
|
else if (flags & S390_OPERAND_CR)
|
2015-01-16 12:19:21 +01:00
|
|
|
info->fprintf_func (info->stream, "%c%%c%u", separator, val.u);
|
2014-08-19 16:42:13 +02:00
|
|
|
else if (flags & S390_OPERAND_PCREL)
|
2015-01-16 12:19:21 +01:00
|
|
|
{
|
|
|
|
info->fprintf_func (info->stream, "%c", separator);
|
|
|
|
info->print_address_func (memaddr + val.i + val.i, info);
|
|
|
|
}
|
2014-08-19 16:42:13 +02:00
|
|
|
else if (flags & S390_OPERAND_SIGNED)
|
2015-01-16 12:19:21 +01:00
|
|
|
info->fprintf_func (info->stream, "%c%i", separator, val.i);
|
2014-08-19 16:42:13 +02:00
|
|
|
else
|
2015-01-16 12:19:21 +01:00
|
|
|
{
|
|
|
|
if (flags & S390_OPERAND_OR1)
|
|
|
|
val.u &= ~1;
|
|
|
|
if (flags & S390_OPERAND_OR2)
|
|
|
|
val.u &= ~2;
|
|
|
|
if (flags & S390_OPERAND_OR8)
|
|
|
|
val.u &= ~8;
|
|
|
|
|
|
|
|
if ((opcode->flags & S390_INSTR_FLAG_OPTPARM)
|
|
|
|
&& val.u == 0
|
|
|
|
&& opindex[1] == 0)
|
|
|
|
break;
|
|
|
|
info->fprintf_func (info->stream, "%c%u", separator, val.u);
|
|
|
|
}
|
2014-08-19 16:42:13 +02:00
|
|
|
|
|
|
|
if (flags & S390_OPERAND_DISP)
|
|
|
|
separator = '(';
|
|
|
|
else if (flags & S390_OPERAND_BASE)
|
|
|
|
{
|
|
|
|
info->fprintf_func (info->stream, ")");
|
|
|
|
separator = ',';
|
|
|
|
}
|
|
|
|
else
|
|
|
|
separator = ',';
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Check whether opcode A's mask is more specific than that of B. */
|
2001-07-23 15:41:14 +02:00
|
|
|
|
2014-08-19 16:42:13 +02:00
|
|
|
static int
|
|
|
|
opcode_mask_more_specific (const struct s390_opcode *a,
|
|
|
|
const struct s390_opcode *b)
|
|
|
|
{
|
|
|
|
return (((int) a->mask[0] + a->mask[1] + a->mask[2]
|
|
|
|
+ a->mask[3] + a->mask[4] + a->mask[5])
|
|
|
|
> ((int) b->mask[0] + b->mask[1] + b->mask[2]
|
|
|
|
+ b->mask[3] + b->mask[4] + b->mask[5]));
|
2001-02-10 01:58:38 +01:00
|
|
|
}
|
|
|
|
|
|
|
|
/* Print a S390 instruction. */
|
|
|
|
|
|
|
|
int
|
2005-07-01 13:16:33 +02:00
|
|
|
print_insn_s390 (bfd_vma memaddr, struct disassemble_info *info)
|
2001-02-10 01:58:38 +01:00
|
|
|
{
|
|
|
|
bfd_byte buffer[6];
|
2014-08-19 16:42:13 +02:00
|
|
|
const struct s390_opcode *opcode = NULL;
|
2001-02-10 01:58:38 +01:00
|
|
|
unsigned int value;
|
2016-06-10 13:40:48 +02:00
|
|
|
int status, opsize, bufsize, bytes_to_dump, i;
|
2001-02-10 01:58:38 +01:00
|
|
|
|
|
|
|
/* The output looks better if we put 6 bytes on a line. */
|
|
|
|
info->bytes_per_line = 6;
|
|
|
|
|
|
|
|
/* Every S390 instruction is max 6 bytes long. */
|
2001-07-23 15:41:14 +02:00
|
|
|
memset (buffer, 0, 6);
|
2014-08-19 16:42:13 +02:00
|
|
|
status = info->read_memory_func (memaddr, buffer, 6, info);
|
2001-07-23 15:41:14 +02:00
|
|
|
if (status != 0)
|
|
|
|
{
|
|
|
|
for (bufsize = 0; bufsize < 6; bufsize++)
|
2014-08-19 16:42:13 +02:00
|
|
|
if (info->read_memory_func (memaddr, buffer, bufsize + 1, info) != 0)
|
2001-07-23 15:41:14 +02:00
|
|
|
break;
|
|
|
|
if (bufsize <= 0)
|
|
|
|
{
|
2014-08-19 16:42:13 +02:00
|
|
|
info->memory_error_func (status, memaddr, info);
|
2001-07-23 15:41:14 +02:00
|
|
|
return -1;
|
|
|
|
}
|
2014-08-19 16:42:13 +02:00
|
|
|
opsize = s390_insn_length (buffer);
|
2001-07-23 15:41:14 +02:00
|
|
|
status = opsize > bufsize;
|
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
|
|
|
bufsize = 6;
|
2014-08-19 16:42:13 +02:00
|
|
|
opsize = s390_insn_length (buffer);
|
2001-07-23 15:41:14 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
if (status == 0)
|
|
|
|
{
|
2010-09-27 15:33:00 +02:00
|
|
|
const struct s390_opcode *op;
|
|
|
|
|
2014-08-19 16:42:13 +02:00
|
|
|
/* Find the "best match" in the opcode table. */
|
|
|
|
for (op = s390_opcodes + opc_index[buffer[0]];
|
|
|
|
op != s390_opcodes + s390_num_opcodes
|
|
|
|
&& op->opcode[0] == buffer[0];
|
|
|
|
op++)
|
2001-07-23 15:41:14 +02:00
|
|
|
{
|
2014-08-19 16:42:13 +02:00
|
|
|
if ((op->modes & current_arch_mask)
|
|
|
|
&& s390_insn_matches_opcode (buffer, op)
|
|
|
|
&& (opcode == NULL
|
|
|
|
|| opcode_mask_more_specific (op, opcode)))
|
|
|
|
opcode = op;
|
2001-07-23 15:41:14 +02:00
|
|
|
}
|
|
|
|
|
2016-06-10 13:40:48 +02:00
|
|
|
if (opcode != NULL)
|
|
|
|
{
|
|
|
|
/* The instruction is valid. Print it and return its size. */
|
|
|
|
s390_print_insn_with_opcode (memaddr, info, buffer, opcode);
|
|
|
|
return opsize;
|
|
|
|
}
|
2014-08-19 16:42:13 +02:00
|
|
|
}
|
|
|
|
|
2016-06-10 13:40:48 +02:00
|
|
|
/* For code sections it makes sense to skip unknown instructions
|
|
|
|
according to their length bits. */
|
|
|
|
if (status == 0
|
|
|
|
&& option_use_insn_len_bits_p
|
|
|
|
&& info->section != NULL
|
|
|
|
&& (info->section->flags & SEC_CODE))
|
|
|
|
bytes_to_dump = opsize;
|
|
|
|
else
|
|
|
|
/* By default unknown instructions are printed as .long's/.short'
|
|
|
|
depending on how many bytes are available. */
|
|
|
|
bytes_to_dump = bufsize >= 4 ? 4 : bufsize;
|
|
|
|
|
|
|
|
if (bytes_to_dump == 0)
|
|
|
|
return 0;
|
|
|
|
|
2014-08-19 16:42:13 +02:00
|
|
|
/* Fall back to hex print. */
|
2016-06-10 13:40:48 +02:00
|
|
|
switch (bytes_to_dump)
|
2001-07-23 15:41:14 +02:00
|
|
|
{
|
2016-06-10 13:40:48 +02:00
|
|
|
case 4:
|
2001-07-23 15:41:14 +02:00
|
|
|
value = (unsigned int) buffer[0];
|
|
|
|
value = (value << 8) + (unsigned int) buffer[1];
|
|
|
|
value = (value << 8) + (unsigned int) buffer[2];
|
|
|
|
value = (value << 8) + (unsigned int) buffer[3];
|
2014-08-19 16:42:13 +02:00
|
|
|
info->fprintf_func (info->stream, ".long\t0x%08x", value);
|
2001-07-23 15:41:14 +02:00
|
|
|
return 4;
|
2016-06-10 13:40:48 +02:00
|
|
|
case 2:
|
2001-07-23 15:41:14 +02:00
|
|
|
value = (unsigned int) buffer[0];
|
|
|
|
value = (value << 8) + (unsigned int) buffer[1];
|
2014-08-19 16:42:13 +02:00
|
|
|
info->fprintf_func (info->stream, ".short\t0x%04x", value);
|
2001-07-23 15:41:14 +02:00
|
|
|
return 2;
|
2016-06-10 13:40:48 +02:00
|
|
|
default:
|
|
|
|
info->fprintf_func (info->stream, ".byte\t0x%02x",
|
|
|
|
(unsigned int) buffer[0]);
|
|
|
|
for (i = 1; i < bytes_to_dump; i++)
|
|
|
|
info->fprintf_func (info->stream, ",0x%02x",
|
|
|
|
(unsigned int) buffer[i]);
|
|
|
|
return bytes_to_dump;
|
2001-02-10 01:58:38 +01:00
|
|
|
}
|
2016-06-10 13:40:48 +02:00
|
|
|
return 0;
|
2001-02-10 01:58:38 +01:00
|
|
|
}
|
2008-04-10 15:36:43 +02:00
|
|
|
|
2017-02-28 19:32:07 +01:00
|
|
|
const disasm_options_t *
|
|
|
|
disassembler_options_s390 (void)
|
|
|
|
{
|
|
|
|
static disasm_options_t *opts = NULL;
|
|
|
|
|
|
|
|
if (opts == NULL)
|
|
|
|
{
|
|
|
|
size_t i, num_options = ARRAY_SIZE (options);
|
|
|
|
opts = XNEW (disasm_options_t);
|
|
|
|
opts->name = XNEWVEC (const char *, num_options + 1);
|
|
|
|
opts->description = XNEWVEC (const char *, num_options + 1);
|
|
|
|
for (i = 0; i < num_options; i++)
|
|
|
|
{
|
|
|
|
opts->name[i] = options[i].name;
|
|
|
|
opts->description[i] = _(options[i].description);
|
|
|
|
}
|
|
|
|
/* The array we return must be NULL terminated. */
|
|
|
|
opts->name[i] = NULL;
|
|
|
|
opts->description[i] = NULL;
|
|
|
|
}
|
|
|
|
|
|
|
|
return opts;
|
|
|
|
}
|
|
|
|
|
2008-04-10 15:36:43 +02:00
|
|
|
void
|
|
|
|
print_s390_disassembler_options (FILE *stream)
|
|
|
|
{
|
2017-02-28 19:32:07 +01:00
|
|
|
unsigned int i, max_len = 0;
|
2008-04-10 15:36:43 +02:00
|
|
|
fprintf (stream, _("\n\
|
|
|
|
The following S/390 specific disassembler options are supported for use\n\
|
|
|
|
with the -M switch (multiple options should be separated by commas):\n"));
|
|
|
|
|
2017-02-28 19:32:07 +01:00
|
|
|
for (i = 0; i < ARRAY_SIZE (options); i++)
|
|
|
|
{
|
|
|
|
unsigned int len = strlen (options[i].name);
|
|
|
|
if (max_len < len)
|
|
|
|
max_len = len;
|
|
|
|
}
|
|
|
|
|
|
|
|
for (i = 0, max_len++; i < ARRAY_SIZE (options); i++)
|
|
|
|
fprintf (stream, " %s%*c %s\n",
|
|
|
|
options[i].name,
|
|
|
|
(int)(max_len - strlen (options[i].name)), ' ',
|
|
|
|
_(options[i].description));
|
2008-04-10 15:36:43 +02:00
|
|
|
}
|