2013-02-08 10:00:35 +01:00
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/* Native-dependent code for GNU/Linux AArch64.
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2018-01-01 05:43:02 +01:00
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Copyright (C) 2011-2018 Free Software Foundation, Inc.
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2013-02-08 10:00:35 +01:00
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Contributed by ARM Ltd.
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This file is part of GDB.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program. If not, see <http://www.gnu.org/licenses/>. */
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#include "defs.h"
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#include "inferior.h"
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#include "gdbcore.h"
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#include "regcache.h"
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#include "linux-nat.h"
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#include "target-descriptions.h"
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#include "auxv.h"
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#include "gdbcmd.h"
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#include "aarch64-tdep.h"
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#include "aarch64-linux-tdep.h"
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2015-07-07 17:58:19 +02:00
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#include "aarch32-linux-nat.h"
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2015-08-25 12:38:29 +02:00
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#include "nat/aarch64-linux.h"
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Move common aarch64 HW breakpoint/watchpoint code to nat/
When I look at test fails related to watchpoint on aarch64-linux,
I find there are some code duplicates between GDB and GDBserver.
This patch is to move some of them to a nat/aarch64-linux-hw-point.{h,c}.
The only change I do is about the dr_changed_t typedef, which was
ULONGEST in GDB and 'unsigned long long' in GDBserver. Each bit
of dr_changed_t represents a status of each HW breakpoint or
watchpoint register, and the max number of HW breakpoint or watchpoint
registers is 16, so the width of 'unsigned long long' is sufficient.
gdb:
2015-07-17 Yao Qi <yao.qi@linaro.org>
* Makefile.in (HFILES_NO_SRCDIR): Add
nat/aarch64-linux-hw-point.h.
(aarch64-linux-hw-point.o): New rule.
* nat/aarch64-linux-hw-point.h: New file.
* nat/aarch64-linux-hw-point.c: New file.
* aarch64-linux-nat.c: Include nat/aarch64-linux-hw-point.h.
(AARCH64_HBP_MAX_NUM): Move to nat/aarch64-linux-hw-point.h.
(AARCH64_HWP_MAX_NUM, AARCH64_HBP_ALIGNMENT): Likewise.
(AARCH64_HWP_ALIGNMENT): Likewise.
(AARCH64_HWP_MAX_LEN_PER_REG): Likewise.
(AARCH64_DEBUG_NUM_SLOTS, AARCH64_DEBUG_ARCH): Likewise.
(AARCH64_DEBUG_ARCH_V8, DR_MARK_ALL_CHANGED): Likewise.
(DR_MARK_N_CHANGED, DR_CLEAR_CHANGED): Likewise.
(DR_HAS_CHANGED, DR_N_HAS_CHANGE): Likewise.
(aarch64_num_bp_regs, aarch64_num_wp_regs): Likewise.
(struct aarch64_debug_reg_state): Likewise.
(struct arch_lwp_info): Likewise.
(aarch64_linux_set_debug_regs): Likewise.
(aarch64_notify_debug_reg_change): Remove static.
(aarch64_align_watchpoint): Likewise.
(DR_CONTROL_ENABLED, DR_CONTROL_LENGTH): Likewise.
(aarch64_watchpoint_length): Likewise.
(aarch64_point_encode_ctrl_reg): Likewise
(aarch64_point_is_aligned): Likewise.
(aarch64_dr_state_insert_one_point): Likewise.
(aarch64_dr_state_remove_one_point): Likewise.
(aarch64_handle_breakpoint): Likewise.
(aarch64_handle_aligned_watchpoint): Likewise.
(aarch64_handle_unaligned_watchpoint): Likewise.
(aarch64_handle_watchpoint): Likewise.
* config/aarch64/linux.mh (NAT_FILE): Add
aarch64-linux-hw-point.o.
gdb/gdbserver:
2015-07-17 Yao Qi <yao.qi@linaro.org>
* Makefile.in (aarch64-linux-hw-point.o): New rule.
* configure.srv (srv_tgtobj): Append aarch64-linux-hw-point.o.
* linux-aarch64-low.c: Include nat/aarch64-linux-hw-point.h.
(AARCH64_HBP_MAX_NUM): Move to nat/aarch64-linux-hw-point.h.
(AARCH64_HWP_MAX_NUM, AARCH64_HBP_ALIGNMENT): Likewise.
(AARCH64_HWP_ALIGNMENT): Likewise.
(AARCH64_HWP_MAX_LEN_PER_REG): Likewise.
(AARCH64_DEBUG_NUM_SLOTS, AARCH64_DEBUG_ARCH): Likewise.
(aarch64_num_bp_regs, aarch64_num_wp_regs): Likewise.
(AARCH64_DEBUG_ARCH_V8, DR_MARK_ALL_CHANGED): Likewise.
(DR_MARK_N_CHANGED, DR_CLEAR_CHANGED): Likewise.
(DR_HAS_CHANGED, DR_N_HAS_CHANGE): Likewise.
(struct aarch64_debug_reg_state): Likewise.
(struct arch_lwp_info): Likewise.
(aarch64_align_watchpoint): Likewise.
(DR_CONTROL_ENABLED, DR_CONTROL_LENGTH): Likewise.
(aarch64_watchpoint_length): Likewise.
(aarch64_point_encode_ctrl_reg): Likewise
(aarch64_point_is_aligned): Likewise.
(aarch64_align_watchpoint): Likewise.
(aarch64_linux_set_debug_regs):
(aarch64_dr_state_insert_one_point): Likewise.
(aarch64_dr_state_remove_one_point): Likewise.
(aarch64_handle_breakpoint): Likewise.
(aarch64_handle_aligned_watchpoint): Likewise.
(aarch64_handle_unaligned_watchpoint): Likewise.
(aarch64_handle_watchpoint): Likewise.
2015-07-17 15:32:40 +02:00
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#include "nat/aarch64-linux-hw-point.h"
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2015-07-07 17:58:19 +02:00
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#include "elf/external.h"
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2013-02-08 10:00:35 +01:00
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#include "elf/common.h"
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2015-07-24 15:57:20 +02:00
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#include "nat/gdb_ptrace.h"
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2013-02-08 10:00:35 +01:00
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#include <sys/utsname.h>
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2014-05-22 17:07:20 +02:00
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#include <asm/ptrace.h>
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2013-02-08 10:00:35 +01:00
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#include "gregset.h"
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/* Defines ps_err_e, struct ps_prochandle. */
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#include "gdb_proc_service.h"
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#ifndef TRAP_HWBKPT
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#define TRAP_HWBKPT 0x0004
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#endif
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2013-02-14 14:50:30 +01:00
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/* Per-process data. We don't bind this to a per-inferior registry
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because of targets like x86 GNU/Linux that need to keep track of
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processes that aren't bound to any inferior (e.g., fork children,
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checkpoints). */
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2013-02-08 10:00:35 +01:00
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2013-02-14 14:50:30 +01:00
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struct aarch64_process_info
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2013-02-08 10:00:35 +01:00
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{
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2013-02-14 14:50:30 +01:00
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/* Linked list. */
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struct aarch64_process_info *next;
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2013-02-08 10:00:35 +01:00
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2013-02-14 14:50:30 +01:00
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/* The process identifier. */
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pid_t pid;
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2013-02-08 10:00:35 +01:00
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2013-02-14 14:50:30 +01:00
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/* Copy of aarch64 hardware debug registers. */
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struct aarch64_debug_reg_state state;
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};
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static struct aarch64_process_info *aarch64_process_list = NULL;
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/* Find process data for process PID. */
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static struct aarch64_process_info *
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aarch64_find_process_pid (pid_t pid)
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{
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struct aarch64_process_info *proc;
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for (proc = aarch64_process_list; proc; proc = proc->next)
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if (proc->pid == pid)
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return proc;
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return NULL;
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2013-02-08 10:00:35 +01:00
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}
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2013-02-14 14:50:30 +01:00
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/* Add process data for process PID. Returns newly allocated info
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object. */
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2013-02-08 10:00:35 +01:00
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2013-02-14 14:50:30 +01:00
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static struct aarch64_process_info *
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aarch64_add_process (pid_t pid)
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2013-02-08 10:00:35 +01:00
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{
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2013-02-14 14:50:30 +01:00
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struct aarch64_process_info *proc;
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2013-02-08 10:00:35 +01:00
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Replace some xmalloc-family functions with XNEW-family ones
This patch is part of the make-gdb-buildable-in-C++ effort. The idea is
to change some calls to the xmalloc family of functions to calls to the
equivalents in the XNEW family. This avoids adding an explicit cast, so
it keeps the code a bit more readable. Some of them also map relatively
well to a C++ equivalent (XNEW (struct foo) -> new foo), so it will be
possible to do scripted replacements if needed.
I only changed calls that were obviously allocating memory for one or
multiple "objects". Allocation of variable sizes (such as strings or
buffer handling) will be for later (and won't use XNEW).
- xmalloc (sizeof (struct foo)) -> XNEW (struct foo)
- xmalloc (num * sizeof (struct foo)) -> XNEWVEC (struct foo, num)
- xcalloc (1, sizeof (struct foo)) -> XCNEW (struct foo)
- xcalloc (num, sizeof (struct foo)) -> XCNEWVEC (struct foo, num)
- xrealloc (p, num * sizeof (struct foo) -> XRESIZEVEC (struct foo, p, num)
- obstack_alloc (ob, sizeof (struct foo)) -> XOBNEW (ob, struct foo)
- obstack_alloc (ob, num * sizeof (struct foo)) -> XOBNEWVEC (ob, struct foo, num)
- alloca (sizeof (struct foo)) -> XALLOCA (struct foo)
- alloca (num * sizeof (struct foo)) -> XALLOCAVEC (struct foo, num)
Some instances of xmalloc followed by memset to zero the buffer were
replaced by XCNEW or XCNEWVEC.
I regtested on x86-64, Ubuntu 14.04, but the patch touches many
architecture-specific files. For those I'll have to rely on the
buildbot or people complaining that I broke their gdb.
gdb/ChangeLog:
* aarch64-linux-nat.c (aarch64_add_process): Likewise.
* aarch64-tdep.c (aarch64_gdbarch_init): Likewise.
* ada-exp.y (write_ambiguous_var): Likewise.
* ada-lang.c (resolve_subexp): Likewise.
(user_select_syms): Likewise.
(assign_aggregate): Likewise.
(ada_evaluate_subexp): Likewise.
(cache_symbol): Likewise.
* addrmap.c (allocate_key): Likewise.
(addrmap_create_mutable): Likewise.
* aix-thread.c (sync_threadlists): Likewise.
* alpha-tdep.c (alpha_push_dummy_call): Likewise.
(alpha_gdbarch_init): Likewise.
* amd64-windows-tdep.c (amd64_windows_push_arguments): Likewise.
* arm-linux-nat.c (arm_linux_add_process): Likewise.
* arm-linux-tdep.c (arm_linux_displaced_step_copy_insn): Likewise.
* arm-tdep.c (push_stack_item): Likewise.
(arm_displaced_step_copy_insn): Likewise.
(arm_gdbarch_init): Likewise.
(_initialize_arm_tdep): Likewise.
* avr-tdep.c (push_stack_item): Likewise.
* ax-general.c (new_agent_expr): Likewise.
* block.c (block_initialize_namespace): Likewise.
* breakpoint.c (alloc_counted_command_line): Likewise.
(update_dprintf_command_list): Likewise.
(parse_breakpoint_sals): Likewise.
(decode_static_tracepoint_spec): Likewise.
(until_break_command): Likewise.
(clear_command): Likewise.
(update_global_location_list): Likewise.
(get_breakpoint_objfile_data) Likewise.
* btrace.c (ftrace_new_function): Likewise.
(btrace_set_insn_history): Likewise.
(btrace_set_call_history): Likewise.
* buildsym.c (add_symbol_to_list): Likewise.
(record_pending_block): Likewise.
(start_subfile): Likewise.
(start_buildsym_compunit): Likewise.
(push_subfile): Likewise.
(end_symtab_get_static_block): Likewise.
(buildsym_init): Likewise.
* cli/cli-cmds.c (source_command): Likewise.
* cli/cli-decode.c (add_cmd): Likewise.
* cli/cli-script.c (build_command_line): Likewise.
(setup_user_args): Likewise.
(realloc_body_list): Likewise.
(process_next_line): Likewise.
(copy_command_lines): Likewise.
* cli/cli-setshow.c (do_set_command): Likewise.
* coff-pe-read.c (read_pe_exported_syms): Likewise.
* coffread.c (coff_locate_sections): Likewise.
(coff_symtab_read): Likewise.
(coff_read_struct_type): Likewise.
* common/cleanups.c (make_my_cleanup2): Likewise.
* common/common-exceptions.c (throw_it): Likewise.
* common/filestuff.c (make_cleanup_close): Likewise.
* common/format.c (parse_format_string): Likewise.
* common/queue.h (DEFINE_QUEUE_P): Likewise.
* compile/compile-object-load.c (munmap_list_add): Likewise.
(compile_object_load): Likewise.
* compile/compile-object-run.c (compile_object_run): Likewise.
* compile/compile.c (append_args): Likewise.
* corefile.c (specify_exec_file_hook): Likewise.
* cp-support.c (make_symbol_overload_list): Likewise.
* cris-tdep.c (push_stack_item): Likewise.
(cris_gdbarch_init): Likewise.
* ctf.c (ctf_trace_file_writer_new): Likewise.
* dbxread.c (init_header_files): Likewise.
(add_new_header_file): Likewise.
(init_bincl_list): Likewise.
(dbx_end_psymtab): Likewise.
(start_psymtab): Likewise.
(dbx_end_psymtab): Likewise.
* dcache.c (dcache_init): Likewise.
* dictionary.c (dict_create_hashed): Likewise.
(dict_create_hashed_expandable): Likewise.
(dict_create_linear): Likewise.
(dict_create_linear_expandable): Likewise.
* dtrace-probe.c (dtrace_process_dof_probe): Likewise.
* dummy-frame.c (register_dummy_frame_dtor): Likewise.
* dwarf2-frame-tailcall.c (cache_new_ref1): Likewise.
* dwarf2-frame.c (dwarf2_build_frame_info): Likewise.
(decode_frame_entry_1): Likewise.
* dwarf2expr.c (new_dwarf_expr_context): Likewise.
* dwarf2loc.c (dwarf2_compile_expr_to_ax): Likewise.
* dwarf2read.c (dwarf2_has_info): Likewise.
(create_signatured_type_table_from_index): Likewise.
(dwarf2_read_index): Likewise.
(dw2_get_file_names_reader): Likewise.
(create_all_type_units): Likewise.
(read_cutu_die_from_dwo): Likewise.
(init_tu_and_read_dwo_dies): Likewise.
(init_cutu_and_read_dies): Likewise.
(create_all_comp_units): Likewise.
(queue_comp_unit): Likewise.
(inherit_abstract_dies): Likewise.
(read_call_site_scope): Likewise.
(dwarf2_add_field): Likewise.
(dwarf2_add_typedef): Likewise.
(dwarf2_add_member_fn): Likewise.
(attr_to_dynamic_prop): Likewise.
(abbrev_table_alloc_abbrev): Likewise.
(abbrev_table_read_table): Likewise.
(add_include_dir): Likewise.
(add_file_name): Likewise.
(dwarf_decode_line_header): Likewise.
(dwarf2_const_value_attr): Likewise.
(dwarf_alloc_block): Likewise.
(parse_macro_definition): Likewise.
(set_die_type): Likewise.
(write_psymtabs_to_index): Likewise.
(create_cus_from_index): Likewise.
(dwarf2_create_include_psymtab): Likewise.
(process_psymtab_comp_unit_reader): Likewise.
(build_type_psymtab_dependencies): Likewise.
(read_comp_units_from_section): Likewise.
(compute_compunit_symtab_includes): Likewise.
(create_dwo_unit_in_dwp_v1): Likewise.
(create_dwo_unit_in_dwp_v2): Likewise.
(read_func_scope): Likewise.
(process_structure_scope): Likewise.
(mark_common_block_symbol_computed): Likewise.
(load_partial_dies): Likewise.
(dwarf2_symbol_mark_computed): Likewise.
* elfread.c (elf_symfile_segments): Likewise.
(elf_read_minimal_symbols): Likewise.
* environ.c (make_environ): Likewise.
* eval.c (evaluate_subexp_standard): Likewise.
* event-loop.c (create_file_handler): Likewise.
(create_async_signal_handler): Likewise.
(create_async_event_handler): Likewise.
(create_timer): Likewise.
* exec.c (build_section_table): Likewise.
* fbsd-nat.c (fbsd_remember_child): Likewise.
* fork-child.c (fork_inferior): Likewise.
* frv-tdep.c (new_variant): Likewise.
* gdbarch.sh (gdbarch_alloc): Likewise.
(append_name): Likewise.
* gdbtypes.c (rank_function): Likewise.
(copy_type_recursive): Likewise.
(add_dyn_prop): Likewise.
* gnu-nat.c (make_proc): Likewise.
(make_inf): Likewise.
(gnu_write_inferior): Likewise.
* gnu-v3-abi.c (build_gdb_vtable_type): Likewise.
(build_std_type_info_type): Likewise.
* guile/scm-param.c (compute_enum_list): Likewise.
* guile/scm-utils.c (gdbscm_parse_function_args): Likewise.
* guile/scm-value.c (gdbscm_value_call): Likewise.
* h8300-tdep.c (h8300_gdbarch_init): Likewise.
* hppa-tdep.c (hppa_init_objfile_priv_data): Likewise.
(read_unwind_info): Likewise.
* ia64-tdep.c (ia64_gdbarch_init): Likewise.
* infcall.c (dummy_frame_context_saver_setup): Likewise.
(call_function_by_hand_dummy): Likewise.
* infcmd.c (step_once): Likewise.
(finish_forward): Likewise.
(attach_command): Likewise.
(notice_new_inferior): Likewise.
* inferior.c (add_inferior_silent): Likewise.
* infrun.c (add_displaced_stepping_state): Likewise.
(save_infcall_control_state): Likewise.
(save_inferior_ptid): Likewise.
(_initialize_infrun): Likewise.
* jit.c (bfd_open_from_target_memory): Likewise.
(jit_gdbarch_data_init): Likewise.
* language.c (add_language): Likewise.
* linespec.c (decode_line_2): Likewise.
* linux-nat.c (add_to_pid_list): Likewise.
(add_initial_lwp): Likewise.
* linux-thread-db.c (add_thread_db_info): Likewise.
(record_thread): Likewise.
(info_auto_load_libthread_db): Likewise.
* m32c-tdep.c (m32c_gdbarch_init): Likewise.
* m68hc11-tdep.c (m68hc11_gdbarch_init): Likewise.
* m68k-tdep.c (m68k_gdbarch_init): Likewise.
* m88k-tdep.c (m88k_analyze_prologue): Likewise.
* macrocmd.c (macro_define_command): Likewise.
* macroexp.c (gather_arguments): Likewise.
* macroscope.c (sal_macro_scope): Likewise.
* macrotab.c (new_macro_table): Likewise.
* mdebugread.c (push_parse_stack): Likewise.
(parse_partial_symbols): Likewise.
(parse_symbol): Likewise.
(psymtab_to_symtab_1): Likewise.
(new_block): Likewise.
(new_psymtab): Likewise.
(mdebug_build_psymtabs): Likewise.
(add_pending): Likewise.
(elfmdebug_build_psymtabs): Likewise.
* mep-tdep.c (mep_gdbarch_init): Likewise.
* mi/mi-main.c (mi_execute_command): Likewise.
* mi/mi-parse.c (mi_parse_argv): Likewise.
* minidebug.c (lzma_open): Likewise.
* minsyms.c (terminate_minimal_symbol_table): Likewise.
* mips-linux-nat.c (mips_linux_insert_watchpoint): Likewise.
* mips-tdep.c (mips_gdbarch_init): Likewise.
* mn10300-tdep.c (mn10300_gdbarch_init): Likewise.
* msp430-tdep.c (msp430_gdbarch_init): Likewise.
* mt-tdep.c (mt_registers_info): Likewise.
* nat/aarch64-linux.c (aarch64_linux_new_thread): Likewise.
* nat/linux-btrace.c (linux_enable_bts): Likewise.
(linux_enable_pt): Likewise.
* nat/linux-osdata.c (linux_xfer_osdata_processes): Likewise.
(linux_xfer_osdata_processgroups): Likewise.
* nios2-tdep.c (nios2_gdbarch_init): Likewise.
* nto-procfs.c (procfs_meminfo): Likewise.
* objc-lang.c (start_msglist): Likewise.
(selectors_info): Likewise.
(classes_info): Likewise.
(find_methods): Likewise.
* objfiles.c (allocate_objfile): Likewise.
(update_section_map): Likewise.
* osabi.c (gdbarch_register_osabi): Likewise.
(gdbarch_register_osabi_sniffer): Likewise.
* parse.c (start_arglist): Likewise.
* ppc-linux-nat.c (hwdebug_find_thread_points_by_tid): Likewise.
(hwdebug_insert_point): Likewise.
* printcmd.c (display_command): Likewise.
(ui_printf): Likewise.
* procfs.c (create_procinfo): Likewise.
(load_syscalls): Likewise.
(proc_get_LDT_entry): Likewise.
(proc_update_threads): Likewise.
* prologue-value.c (make_pv_area): Likewise.
(pv_area_store): Likewise.
* psymtab.c (extend_psymbol_list): Likewise.
(init_psymbol_list): Likewise.
(allocate_psymtab): Likewise.
* python/py-inferior.c (add_thread_object): Likewise.
* python/py-param.c (compute_enum_values): Likewise.
* python/py-value.c (valpy_call): Likewise.
* python/py-varobj.c (py_varobj_iter_next): Likewise.
* python/python.c (ensure_python_env): Likewise.
* record-btrace.c (record_btrace_start_replaying): Likewise.
* record-full.c (record_full_reg_alloc): Likewise.
(record_full_mem_alloc): Likewise.
(record_full_end_alloc): Likewise.
(record_full_core_xfer_partial): Likewise.
* regcache.c (get_thread_arch_aspace_regcache): Likewise.
* remote-fileio.c (remote_fileio_init_fd_map): Likewise.
* remote-notif.c (remote_notif_state_allocate): Likewise.
* remote.c (demand_private_info): Likewise.
(remote_notif_stop_alloc_reply): Likewise.
(remote_enable_btrace): Likewise.
* reverse.c (save_bookmark_command): Likewise.
* rl78-tdep.c (rl78_gdbarch_init): Likewise.
* rx-tdep.c (rx_gdbarch_init): Likewise.
* s390-linux-nat.c (s390_insert_watchpoint): Likewise.
* ser-go32.c (dos_get_tty_state): Likewise.
(dos_copy_tty_state): Likewise.
* ser-mingw.c (ser_windows_open): Likewise.
(ser_console_wait_handle): Likewise.
(ser_console_get_tty_state): Likewise.
(make_pipe_state): Likewise.
(net_windows_open): Likewise.
* ser-unix.c (hardwire_get_tty_state): Likewise.
(hardwire_copy_tty_state): Likewise.
* solib-aix.c (solib_aix_new_lm_info): Likewise.
* solib-dsbt.c (dsbt_current_sos): Likewise.
(dsbt_relocate_main_executable): Likewise.
* solib-frv.c (frv_current_sos): Likewise.
(frv_relocate_main_executable): Likewise.
* solib-spu.c (spu_bfd_fopen): Likewise.
* solib-svr4.c (lm_info_read): Likewise.
(svr4_copy_library_list): Likewise.
(svr4_default_sos): Likewise.
* source.c (find_source_lines): Likewise.
(line_info): Likewise.
(add_substitute_path_rule): Likewise.
* spu-linux-nat.c (spu_bfd_open): Likewise.
* spu-tdep.c (info_spu_dma_cmdlist): Likewise.
* stabsread.c (dbx_lookup_type): Likewise.
(read_type): Likewise.
(read_member_functions): Likewise.
(read_struct_fields): Likewise.
(read_baseclasses): Likewise.
(read_args): Likewise.
(_initialize_stabsread): Likewise.
* stack.c (func_command): Likewise.
* stap-probe.c (handle_stap_probe): Likewise.
* symfile.c (addrs_section_sort): Likewise.
(addr_info_make_relative): Likewise.
(load_section_callback): Likewise.
(add_symbol_file_command): Likewise.
(init_filename_language_table): Likewise.
* symtab.c (create_filename_seen_cache): Likewise.
(sort_search_symbols_remove_dups): Likewise.
(search_symbols): Likewise.
* target.c (make_cleanup_restore_target_terminal): Likewise.
* thread.c (new_thread): Likewise.
(enable_thread_stack_temporaries): Likewise.
(make_cleanup_restore_current_thread): Likewise.
(thread_apply_all_command): Likewise.
* tic6x-tdep.c (tic6x_gdbarch_init): Likewise.
* top.c (gdb_readline_wrapper): Likewise.
* tracefile-tfile.c (tfile_trace_file_writer_new): Likewise.
* tracepoint.c (trace_find_line_command): Likewise.
(all_tracepoint_actions_and_cleanup): Likewise.
(make_cleanup_restore_current_traceframe): Likewise.
(get_uploaded_tp): Likewise.
(get_uploaded_tsv): Likewise.
* tui/tui-data.c (tui_alloc_generic_win_info): Likewise.
(tui_alloc_win_info): Likewise.
(tui_alloc_content): Likewise.
(tui_add_content_elements): Likewise.
* tui/tui-disasm.c (tui_find_disassembly_address): Likewise.
(tui_set_disassem_content): Likewise.
* ui-file.c (ui_file_new): Likewise.
(stdio_file_new): Likewise.
(tee_file_new): Likewise.
* utils.c (make_cleanup_restore_integer): Likewise.
(add_internal_problem_command): Likewise.
* v850-tdep.c (v850_gdbarch_init): Likewise.
* valops.c (find_oload_champ): Likewise.
* value.c (allocate_value_lazy): Likewise.
(record_latest_value): Likewise.
(create_internalvar): Likewise.
* varobj.c (install_variable): Likewise.
(new_variable): Likewise.
(new_root_variable): Likewise.
(cppush): Likewise.
(_initialize_varobj): Likewise.
* windows-nat.c (windows_make_so): Likewise.
* x86-nat.c (x86_add_process): Likewise.
* xcoffread.c (arrange_linetable): Likewise.
(allocate_include_entry): Likewise.
(process_linenos): Likewise.
(SYMBOL_DUP): Likewise.
(xcoff_start_psymtab): Likewise.
(xcoff_end_psymtab): Likewise.
* xml-support.c (gdb_xml_parse_attr_ulongest): Likewise.
* xtensa-tdep.c (xtensa_register_type): Likewise.
* gdbarch.c: Regenerate.
* gdbarch.h: Regenerate.
gdb/gdbserver/ChangeLog:
* ax.c (gdb_parse_agent_expr): Likewise.
(compile_bytecodes): Likewise.
* dll.c (loaded_dll): Likewise.
* event-loop.c (append_callback_event): Likewise.
(create_file_handler): Likewise.
(create_file_event): Likewise.
* hostio.c (handle_open): Likewise.
* inferiors.c (add_thread): Likewise.
(add_process): Likewise.
* linux-aarch64-low.c (aarch64_linux_new_process): Likewise.
* linux-arm-low.c (arm_new_process): Likewise.
(arm_new_thread): Likewise.
* linux-low.c (add_to_pid_list): Likewise.
(linux_add_process): Likewise.
(handle_extended_wait): Likewise.
(add_lwp): Likewise.
(enqueue_one_deferred_signal): Likewise.
(enqueue_pending_signal): Likewise.
(linux_resume_one_lwp_throw): Likewise.
(linux_resume_one_thread): Likewise.
(linux_read_memory): Likewise.
(linux_write_memory): Likewise.
* linux-mips-low.c (mips_linux_new_process): Likewise.
(mips_linux_new_thread): Likewise.
(mips_add_watchpoint): Likewise.
* linux-x86-low.c (initialize_low_arch): Likewise.
* lynx-low.c (lynx_add_process): Likewise.
* mem-break.c (set_raw_breakpoint_at): Likewise.
(set_breakpoint): Likewise.
(add_condition_to_breakpoint): Likewise.
(add_commands_to_breakpoint): Likewise.
(clone_agent_expr): Likewise.
(clone_one_breakpoint): Likewise.
* regcache.c (new_register_cache): Likewise.
* remote-utils.c (look_up_one_symbol): Likewise.
* server.c (queue_stop_reply): Likewise.
(start_inferior): Likewise.
(queue_stop_reply_callback): Likewise.
(handle_target_event): Likewise.
* spu-low.c (fetch_ppc_memory): Likewise.
(store_ppc_memory): Likewise.
* target.c (set_target_ops): Likewise.
* thread-db.c (thread_db_load_search): Likewise.
(try_thread_db_load_1): Likewise.
* tracepoint.c (add_tracepoint): Likewise.
(add_tracepoint_action): Likewise.
(create_trace_state_variable): Likewise.
(cmd_qtdpsrc): Likewise.
(cmd_qtro): Likewise.
(add_while_stepping_state): Likewise.
* win32-low.c (child_add_thread): Likewise.
(get_image_name): Likewise.
2015-08-26 23:16:07 +02:00
|
|
|
|
proc = XCNEW (struct aarch64_process_info);
|
2013-02-14 14:50:30 +01:00
|
|
|
|
proc->pid = pid;
|
2013-02-08 10:00:35 +01:00
|
|
|
|
|
2013-02-14 14:50:30 +01:00
|
|
|
|
proc->next = aarch64_process_list;
|
|
|
|
|
aarch64_process_list = proc;
|
|
|
|
|
|
|
|
|
|
return proc;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Get data specific info for process PID, creating it if necessary.
|
|
|
|
|
Never returns NULL. */
|
|
|
|
|
|
|
|
|
|
static struct aarch64_process_info *
|
|
|
|
|
aarch64_process_info_get (pid_t pid)
|
2013-02-08 10:00:35 +01:00
|
|
|
|
{
|
2013-02-14 14:50:30 +01:00
|
|
|
|
struct aarch64_process_info *proc;
|
|
|
|
|
|
|
|
|
|
proc = aarch64_find_process_pid (pid);
|
|
|
|
|
if (proc == NULL)
|
|
|
|
|
proc = aarch64_add_process (pid);
|
2013-02-08 10:00:35 +01:00
|
|
|
|
|
2013-02-14 14:50:30 +01:00
|
|
|
|
return proc;
|
2013-02-08 10:00:35 +01:00
|
|
|
|
}
|
|
|
|
|
|
2013-02-14 14:50:30 +01:00
|
|
|
|
/* Called whenever GDB is no longer debugging process PID. It deletes
|
|
|
|
|
data structures that keep track of debug register state. */
|
2013-02-08 10:00:35 +01:00
|
|
|
|
|
2013-02-14 14:50:30 +01:00
|
|
|
|
static void
|
|
|
|
|
aarch64_forget_process (pid_t pid)
|
2013-02-08 10:00:35 +01:00
|
|
|
|
{
|
2013-02-14 14:50:30 +01:00
|
|
|
|
struct aarch64_process_info *proc, **proc_link;
|
2013-02-08 10:00:35 +01:00
|
|
|
|
|
2013-02-14 14:50:30 +01:00
|
|
|
|
proc = aarch64_process_list;
|
|
|
|
|
proc_link = &aarch64_process_list;
|
|
|
|
|
|
|
|
|
|
while (proc != NULL)
|
2013-02-08 10:00:35 +01:00
|
|
|
|
{
|
2013-02-14 14:50:30 +01:00
|
|
|
|
if (proc->pid == pid)
|
|
|
|
|
{
|
|
|
|
|
*proc_link = proc->next;
|
2013-02-08 10:00:35 +01:00
|
|
|
|
|
2013-02-14 14:50:30 +01:00
|
|
|
|
xfree (proc);
|
|
|
|
|
return;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
proc_link = &proc->next;
|
|
|
|
|
proc = *proc_link;
|
|
|
|
|
}
|
2013-02-08 10:00:35 +01:00
|
|
|
|
}
|
|
|
|
|
|
2013-02-14 14:50:30 +01:00
|
|
|
|
/* Get debug registers state for process PID. */
|
2013-02-08 10:00:35 +01:00
|
|
|
|
|
2015-08-25 12:38:29 +02:00
|
|
|
|
struct aarch64_debug_reg_state *
|
2013-02-14 14:50:30 +01:00
|
|
|
|
aarch64_get_debug_reg_state (pid_t pid)
|
2013-02-08 10:00:35 +01:00
|
|
|
|
{
|
2013-02-14 14:50:30 +01:00
|
|
|
|
return &aarch64_process_info_get (pid)->state;
|
2013-02-08 10:00:35 +01:00
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Fill GDB's register array with the general-purpose register values
|
|
|
|
|
from the current thread. */
|
|
|
|
|
|
|
|
|
|
static void
|
|
|
|
|
fetch_gregs_from_thread (struct regcache *regcache)
|
|
|
|
|
{
|
2015-07-07 17:58:19 +02:00
|
|
|
|
int ret, tid;
|
2017-10-25 17:37:03 +02:00
|
|
|
|
struct gdbarch *gdbarch = regcache->arch ();
|
2013-02-08 10:00:35 +01:00
|
|
|
|
elf_gregset_t regs;
|
|
|
|
|
struct iovec iovec;
|
|
|
|
|
|
2015-07-07 17:58:19 +02:00
|
|
|
|
/* Make sure REGS can hold all registers contents on both aarch64
|
|
|
|
|
and arm. */
|
|
|
|
|
gdb_static_assert (sizeof (regs) >= 18 * 4);
|
|
|
|
|
|
2017-03-13 23:51:39 +01:00
|
|
|
|
tid = ptid_get_lwp (regcache_get_ptid (regcache));
|
2013-02-08 10:00:35 +01:00
|
|
|
|
|
|
|
|
|
iovec.iov_base = ®s;
|
2015-07-07 17:58:19 +02:00
|
|
|
|
if (gdbarch_bfd_arch_info (gdbarch)->bits_per_word == 32)
|
|
|
|
|
iovec.iov_len = 18 * 4;
|
|
|
|
|
else
|
|
|
|
|
iovec.iov_len = sizeof (regs);
|
2013-02-08 10:00:35 +01:00
|
|
|
|
|
|
|
|
|
ret = ptrace (PTRACE_GETREGSET, tid, NT_PRSTATUS, &iovec);
|
|
|
|
|
if (ret < 0)
|
|
|
|
|
perror_with_name (_("Unable to fetch general registers."));
|
|
|
|
|
|
2015-07-07 17:58:19 +02:00
|
|
|
|
if (gdbarch_bfd_arch_info (gdbarch)->bits_per_word == 32)
|
|
|
|
|
aarch32_gp_regcache_supply (regcache, (uint32_t *) regs, 1);
|
|
|
|
|
else
|
|
|
|
|
{
|
|
|
|
|
int regno;
|
|
|
|
|
|
|
|
|
|
for (regno = AARCH64_X0_REGNUM; regno <= AARCH64_CPSR_REGNUM; regno++)
|
|
|
|
|
regcache_raw_supply (regcache, regno, ®s[regno - AARCH64_X0_REGNUM]);
|
|
|
|
|
}
|
2013-02-08 10:00:35 +01:00
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Store to the current thread the valid general-purpose register
|
|
|
|
|
values in the GDB's register array. */
|
|
|
|
|
|
|
|
|
|
static void
|
|
|
|
|
store_gregs_to_thread (const struct regcache *regcache)
|
|
|
|
|
{
|
2015-07-07 17:58:19 +02:00
|
|
|
|
int ret, tid;
|
2013-02-08 10:00:35 +01:00
|
|
|
|
elf_gregset_t regs;
|
|
|
|
|
struct iovec iovec;
|
2017-10-25 17:37:03 +02:00
|
|
|
|
struct gdbarch *gdbarch = regcache->arch ();
|
2013-02-08 10:00:35 +01:00
|
|
|
|
|
2015-07-07 17:58:19 +02:00
|
|
|
|
/* Make sure REGS can hold all registers contents on both aarch64
|
|
|
|
|
and arm. */
|
|
|
|
|
gdb_static_assert (sizeof (regs) >= 18 * 4);
|
2017-03-13 23:51:39 +01:00
|
|
|
|
tid = ptid_get_lwp (regcache_get_ptid (regcache));
|
2013-02-08 10:00:35 +01:00
|
|
|
|
|
|
|
|
|
iovec.iov_base = ®s;
|
2015-07-07 17:58:19 +02:00
|
|
|
|
if (gdbarch_bfd_arch_info (gdbarch)->bits_per_word == 32)
|
|
|
|
|
iovec.iov_len = 18 * 4;
|
|
|
|
|
else
|
|
|
|
|
iovec.iov_len = sizeof (regs);
|
2013-02-08 10:00:35 +01:00
|
|
|
|
|
|
|
|
|
ret = ptrace (PTRACE_GETREGSET, tid, NT_PRSTATUS, &iovec);
|
|
|
|
|
if (ret < 0)
|
|
|
|
|
perror_with_name (_("Unable to fetch general registers."));
|
|
|
|
|
|
2015-07-07 17:58:19 +02:00
|
|
|
|
if (gdbarch_bfd_arch_info (gdbarch)->bits_per_word == 32)
|
|
|
|
|
aarch32_gp_regcache_collect (regcache, (uint32_t *) regs, 1);
|
|
|
|
|
else
|
|
|
|
|
{
|
|
|
|
|
int regno;
|
|
|
|
|
|
|
|
|
|
for (regno = AARCH64_X0_REGNUM; regno <= AARCH64_CPSR_REGNUM; regno++)
|
|
|
|
|
if (REG_VALID == regcache_register_status (regcache, regno))
|
|
|
|
|
regcache_raw_collect (regcache, regno,
|
|
|
|
|
®s[regno - AARCH64_X0_REGNUM]);
|
|
|
|
|
}
|
2013-02-08 10:00:35 +01:00
|
|
|
|
|
|
|
|
|
ret = ptrace (PTRACE_SETREGSET, tid, NT_PRSTATUS, &iovec);
|
|
|
|
|
if (ret < 0)
|
|
|
|
|
perror_with_name (_("Unable to store general registers."));
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Fill GDB's register array with the fp/simd register values
|
|
|
|
|
from the current thread. */
|
|
|
|
|
|
|
|
|
|
static void
|
|
|
|
|
fetch_fpregs_from_thread (struct regcache *regcache)
|
|
|
|
|
{
|
2015-07-07 17:58:19 +02:00
|
|
|
|
int ret, tid;
|
2013-02-08 10:00:35 +01:00
|
|
|
|
elf_fpregset_t regs;
|
|
|
|
|
struct iovec iovec;
|
2017-10-25 17:37:03 +02:00
|
|
|
|
struct gdbarch *gdbarch = regcache->arch ();
|
2015-07-07 17:58:19 +02:00
|
|
|
|
|
|
|
|
|
/* Make sure REGS can hold all VFP registers contents on both aarch64
|
|
|
|
|
and arm. */
|
|
|
|
|
gdb_static_assert (sizeof regs >= VFP_REGS_SIZE);
|
2013-02-08 10:00:35 +01:00
|
|
|
|
|
2017-03-13 23:51:39 +01:00
|
|
|
|
tid = ptid_get_lwp (regcache_get_ptid (regcache));
|
2013-02-08 10:00:35 +01:00
|
|
|
|
|
|
|
|
|
iovec.iov_base = ®s;
|
|
|
|
|
|
2015-07-07 17:58:19 +02:00
|
|
|
|
if (gdbarch_bfd_arch_info (gdbarch)->bits_per_word == 32)
|
|
|
|
|
{
|
|
|
|
|
iovec.iov_len = VFP_REGS_SIZE;
|
|
|
|
|
|
|
|
|
|
ret = ptrace (PTRACE_GETREGSET, tid, NT_ARM_VFP, &iovec);
|
|
|
|
|
if (ret < 0)
|
|
|
|
|
perror_with_name (_("Unable to fetch VFP registers."));
|
|
|
|
|
|
|
|
|
|
aarch32_vfp_regcache_supply (regcache, (gdb_byte *) ®s, 32);
|
|
|
|
|
}
|
|
|
|
|
else
|
|
|
|
|
{
|
|
|
|
|
int regno;
|
|
|
|
|
|
|
|
|
|
iovec.iov_len = sizeof (regs);
|
2013-02-08 10:00:35 +01:00
|
|
|
|
|
2015-07-07 17:58:19 +02:00
|
|
|
|
ret = ptrace (PTRACE_GETREGSET, tid, NT_FPREGSET, &iovec);
|
|
|
|
|
if (ret < 0)
|
|
|
|
|
perror_with_name (_("Unable to fetch vFP/SIMD registers."));
|
2013-02-08 10:00:35 +01:00
|
|
|
|
|
2015-07-07 17:58:19 +02:00
|
|
|
|
for (regno = AARCH64_V0_REGNUM; regno <= AARCH64_V31_REGNUM; regno++)
|
|
|
|
|
regcache_raw_supply (regcache, regno,
|
|
|
|
|
®s.vregs[regno - AARCH64_V0_REGNUM]);
|
|
|
|
|
|
|
|
|
|
regcache_raw_supply (regcache, AARCH64_FPSR_REGNUM, ®s.fpsr);
|
|
|
|
|
regcache_raw_supply (regcache, AARCH64_FPCR_REGNUM, ®s.fpcr);
|
|
|
|
|
}
|
2013-02-08 10:00:35 +01:00
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Store to the current thread the valid fp/simd register
|
|
|
|
|
values in the GDB's register array. */
|
|
|
|
|
|
|
|
|
|
static void
|
|
|
|
|
store_fpregs_to_thread (const struct regcache *regcache)
|
|
|
|
|
{
|
2015-07-07 17:58:19 +02:00
|
|
|
|
int ret, tid;
|
2013-02-08 10:00:35 +01:00
|
|
|
|
elf_fpregset_t regs;
|
|
|
|
|
struct iovec iovec;
|
2017-10-25 17:37:03 +02:00
|
|
|
|
struct gdbarch *gdbarch = regcache->arch ();
|
2013-02-08 10:00:35 +01:00
|
|
|
|
|
2015-07-07 17:58:19 +02:00
|
|
|
|
/* Make sure REGS can hold all VFP registers contents on both aarch64
|
|
|
|
|
and arm. */
|
|
|
|
|
gdb_static_assert (sizeof regs >= VFP_REGS_SIZE);
|
2017-03-13 23:51:39 +01:00
|
|
|
|
tid = ptid_get_lwp (regcache_get_ptid (regcache));
|
2013-02-08 10:00:35 +01:00
|
|
|
|
|
|
|
|
|
iovec.iov_base = ®s;
|
|
|
|
|
|
2015-07-07 17:58:19 +02:00
|
|
|
|
if (gdbarch_bfd_arch_info (gdbarch)->bits_per_word == 32)
|
|
|
|
|
{
|
|
|
|
|
iovec.iov_len = VFP_REGS_SIZE;
|
2013-02-08 10:00:35 +01:00
|
|
|
|
|
2015-07-07 17:58:19 +02:00
|
|
|
|
ret = ptrace (PTRACE_GETREGSET, tid, NT_ARM_VFP, &iovec);
|
|
|
|
|
if (ret < 0)
|
|
|
|
|
perror_with_name (_("Unable to fetch VFP registers."));
|
2013-02-08 10:00:35 +01:00
|
|
|
|
|
2015-07-07 17:58:19 +02:00
|
|
|
|
aarch32_vfp_regcache_collect (regcache, (gdb_byte *) ®s, 32);
|
|
|
|
|
}
|
|
|
|
|
else
|
|
|
|
|
{
|
|
|
|
|
int regno;
|
2013-02-08 10:00:35 +01:00
|
|
|
|
|
2015-07-07 17:58:19 +02:00
|
|
|
|
iovec.iov_len = sizeof (regs);
|
|
|
|
|
|
|
|
|
|
ret = ptrace (PTRACE_GETREGSET, tid, NT_FPREGSET, &iovec);
|
|
|
|
|
if (ret < 0)
|
|
|
|
|
perror_with_name (_("Unable to fetch FP/SIMD registers."));
|
|
|
|
|
|
|
|
|
|
for (regno = AARCH64_V0_REGNUM; regno <= AARCH64_V31_REGNUM; regno++)
|
|
|
|
|
if (REG_VALID == regcache_register_status (regcache, regno))
|
|
|
|
|
regcache_raw_collect (regcache, regno,
|
|
|
|
|
(char *) ®s.vregs[regno - AARCH64_V0_REGNUM]);
|
|
|
|
|
|
|
|
|
|
if (REG_VALID == regcache_register_status (regcache, AARCH64_FPSR_REGNUM))
|
|
|
|
|
regcache_raw_collect (regcache, AARCH64_FPSR_REGNUM,
|
|
|
|
|
(char *) ®s.fpsr);
|
|
|
|
|
if (REG_VALID == regcache_register_status (regcache, AARCH64_FPCR_REGNUM))
|
|
|
|
|
regcache_raw_collect (regcache, AARCH64_FPCR_REGNUM,
|
|
|
|
|
(char *) ®s.fpcr);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
if (gdbarch_bfd_arch_info (gdbarch)->bits_per_word == 32)
|
|
|
|
|
{
|
|
|
|
|
ret = ptrace (PTRACE_SETREGSET, tid, NT_ARM_VFP, &iovec);
|
|
|
|
|
if (ret < 0)
|
|
|
|
|
perror_with_name (_("Unable to store VFP registers."));
|
|
|
|
|
}
|
|
|
|
|
else
|
|
|
|
|
{
|
|
|
|
|
ret = ptrace (PTRACE_SETREGSET, tid, NT_FPREGSET, &iovec);
|
|
|
|
|
if (ret < 0)
|
|
|
|
|
perror_with_name (_("Unable to store FP/SIMD registers."));
|
|
|
|
|
}
|
2013-02-08 10:00:35 +01:00
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Implement the "to_fetch_register" target_ops method. */
|
|
|
|
|
|
|
|
|
|
static void
|
|
|
|
|
aarch64_linux_fetch_inferior_registers (struct target_ops *ops,
|
|
|
|
|
struct regcache *regcache,
|
|
|
|
|
int regno)
|
|
|
|
|
{
|
|
|
|
|
if (regno == -1)
|
|
|
|
|
{
|
|
|
|
|
fetch_gregs_from_thread (regcache);
|
|
|
|
|
fetch_fpregs_from_thread (regcache);
|
|
|
|
|
}
|
|
|
|
|
else if (regno < AARCH64_V0_REGNUM)
|
|
|
|
|
fetch_gregs_from_thread (regcache);
|
|
|
|
|
else
|
|
|
|
|
fetch_fpregs_from_thread (regcache);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Implement the "to_store_register" target_ops method. */
|
|
|
|
|
|
|
|
|
|
static void
|
|
|
|
|
aarch64_linux_store_inferior_registers (struct target_ops *ops,
|
|
|
|
|
struct regcache *regcache,
|
|
|
|
|
int regno)
|
|
|
|
|
{
|
|
|
|
|
if (regno == -1)
|
|
|
|
|
{
|
|
|
|
|
store_gregs_to_thread (regcache);
|
|
|
|
|
store_fpregs_to_thread (regcache);
|
|
|
|
|
}
|
|
|
|
|
else if (regno < AARCH64_V0_REGNUM)
|
|
|
|
|
store_gregs_to_thread (regcache);
|
|
|
|
|
else
|
|
|
|
|
store_fpregs_to_thread (regcache);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Fill register REGNO (if it is a general-purpose register) in
|
|
|
|
|
*GREGSETPS with the value in GDB's register array. If REGNO is -1,
|
|
|
|
|
do this for all registers. */
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
fill_gregset (const struct regcache *regcache,
|
|
|
|
|
gdb_gregset_t *gregsetp, int regno)
|
|
|
|
|
{
|
2014-04-01 11:42:46 +02:00
|
|
|
|
regcache_collect_regset (&aarch64_linux_gregset, regcache,
|
|
|
|
|
regno, (gdb_byte *) gregsetp,
|
|
|
|
|
AARCH64_LINUX_SIZEOF_GREGSET);
|
2013-02-08 10:00:35 +01:00
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Fill GDB's register array with the general-purpose register values
|
|
|
|
|
in *GREGSETP. */
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
supply_gregset (struct regcache *regcache, const gdb_gregset_t *gregsetp)
|
|
|
|
|
{
|
2014-04-01 11:42:46 +02:00
|
|
|
|
regcache_supply_regset (&aarch64_linux_gregset, regcache, -1,
|
|
|
|
|
(const gdb_byte *) gregsetp,
|
|
|
|
|
AARCH64_LINUX_SIZEOF_GREGSET);
|
2013-02-08 10:00:35 +01:00
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Fill register REGNO (if it is a floating-point register) in
|
|
|
|
|
*FPREGSETP with the value in GDB's register array. If REGNO is -1,
|
|
|
|
|
do this for all registers. */
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
fill_fpregset (const struct regcache *regcache,
|
|
|
|
|
gdb_fpregset_t *fpregsetp, int regno)
|
|
|
|
|
{
|
2014-04-01 11:42:46 +02:00
|
|
|
|
regcache_collect_regset (&aarch64_linux_fpregset, regcache,
|
|
|
|
|
regno, (gdb_byte *) fpregsetp,
|
|
|
|
|
AARCH64_LINUX_SIZEOF_FPREGSET);
|
2013-02-08 10:00:35 +01:00
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Fill GDB's register array with the floating-point register values
|
|
|
|
|
in *FPREGSETP. */
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
supply_fpregset (struct regcache *regcache, const gdb_fpregset_t *fpregsetp)
|
|
|
|
|
{
|
2014-04-01 11:42:46 +02:00
|
|
|
|
regcache_supply_regset (&aarch64_linux_fpregset, regcache, -1,
|
|
|
|
|
(const gdb_byte *) fpregsetp,
|
|
|
|
|
AARCH64_LINUX_SIZEOF_FPREGSET);
|
2013-02-08 10:00:35 +01:00
|
|
|
|
}
|
|
|
|
|
|
2013-02-14 14:50:30 +01:00
|
|
|
|
/* linux_nat_new_fork hook. */
|
|
|
|
|
|
|
|
|
|
static void
|
|
|
|
|
aarch64_linux_new_fork (struct lwp_info *parent, pid_t child_pid)
|
|
|
|
|
{
|
|
|
|
|
pid_t parent_pid;
|
|
|
|
|
struct aarch64_debug_reg_state *parent_state;
|
|
|
|
|
struct aarch64_debug_reg_state *child_state;
|
|
|
|
|
|
|
|
|
|
/* NULL means no watchpoint has ever been set in the parent. In
|
|
|
|
|
that case, there's nothing to do. */
|
|
|
|
|
if (parent->arch_private == NULL)
|
|
|
|
|
return;
|
|
|
|
|
|
|
|
|
|
/* GDB core assumes the child inherits the watchpoints/hw
|
|
|
|
|
breakpoints of the parent, and will remove them all from the
|
|
|
|
|
forked off process. Copy the debug registers mirrors into the
|
|
|
|
|
new process so that all breakpoints and watchpoints can be
|
|
|
|
|
removed together. */
|
|
|
|
|
|
|
|
|
|
parent_pid = ptid_get_pid (parent->ptid);
|
|
|
|
|
parent_state = aarch64_get_debug_reg_state (parent_pid);
|
|
|
|
|
child_state = aarch64_get_debug_reg_state (child_pid);
|
|
|
|
|
*child_state = *parent_state;
|
|
|
|
|
}
|
2013-02-08 10:00:35 +01:00
|
|
|
|
|
|
|
|
|
|
|
|
|
|
/* Called by libthread_db. Returns a pointer to the thread local
|
|
|
|
|
storage (or its descriptor). */
|
|
|
|
|
|
|
|
|
|
ps_err_e
|
2016-08-25 09:42:03 +02:00
|
|
|
|
ps_get_thread_area (struct ps_prochandle *ph,
|
2013-02-08 10:00:35 +01:00
|
|
|
|
lwpid_t lwpid, int idx, void **base)
|
|
|
|
|
{
|
2015-09-18 14:59:42 +02:00
|
|
|
|
int is_64bit_p
|
|
|
|
|
= (gdbarch_bfd_arch_info (target_gdbarch ())->bits_per_word == 64);
|
2013-02-08 10:00:35 +01:00
|
|
|
|
|
2015-09-18 14:59:42 +02:00
|
|
|
|
return aarch64_ps_get_thread_area (ph, lwpid, idx, base, is_64bit_p);
|
2013-02-08 10:00:35 +01:00
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
2013-12-18 05:31:40 +01:00
|
|
|
|
static void (*super_post_startup_inferior) (struct target_ops *self,
|
|
|
|
|
ptid_t ptid);
|
2013-02-08 10:00:35 +01:00
|
|
|
|
|
|
|
|
|
/* Implement the "to_post_startup_inferior" target_ops method. */
|
|
|
|
|
|
|
|
|
|
static void
|
2013-12-18 05:31:40 +01:00
|
|
|
|
aarch64_linux_child_post_startup_inferior (struct target_ops *self,
|
|
|
|
|
ptid_t ptid)
|
2013-02-08 10:00:35 +01:00
|
|
|
|
{
|
2013-02-14 14:50:30 +01:00
|
|
|
|
aarch64_forget_process (ptid_get_pid (ptid));
|
2015-07-21 17:33:41 +02:00
|
|
|
|
aarch64_linux_get_debug_reg_capacity (ptid_get_pid (ptid));
|
2013-12-18 05:31:40 +01:00
|
|
|
|
super_post_startup_inferior (self, ptid);
|
2013-02-08 10:00:35 +01:00
|
|
|
|
}
|
|
|
|
|
|
2015-07-07 17:58:19 +02:00
|
|
|
|
extern struct target_desc *tdesc_arm_with_neon;
|
|
|
|
|
|
2013-02-08 10:00:35 +01:00
|
|
|
|
/* Implement the "to_read_description" target_ops method. */
|
|
|
|
|
|
|
|
|
|
static const struct target_desc *
|
|
|
|
|
aarch64_linux_read_description (struct target_ops *ops)
|
|
|
|
|
{
|
Determine target description for native aarch64
I find the following test fail when I test native aarch64 gdb with
arm program,
(gdb) PASS: gdb.base/attach-pie-noexec.exp: attach
set architecture arm^M
warning: Selected architecture arm is not compatible with reported target architecture aarch64^M
Architecture `arm' not recognized.^M
The target architecture is set automatically (currently aarch64)^M
(gdb) FAIL: gdb.base/attach-pie-noexec.exp: set architecture arm
GDB thinks the target is aarch64, but it isn't. Nowadays, we are
using some entries AT_PHENT and AT_HWCAP in auxv to determine whether
the process is a 32-bit arm one or 64-bit aarch64 one, and get the
right gdbarch. However, in the process of parsing auxv (in
inf_ptrace_auxv_parse), the size of int and data pointer of
target_gdbarch is used. If debug program exists (in most of cases),
target_gdbarch is already set according to the debug program, which
is arm in my case. Then, GDB can parse auxv successfully. However,
in gdb.base/attach-pie-noexec.exp, the debug program is removed,
target_gdbarch is aarch64 when GDB parse auxv, so GDB can't parse
it successfully.
Instead of using auxv, we check the return value of ptrace NT_ARM_VFP.
If the program is an arm process, NT_ARM_VFP is OK, otherwise, error
is returned.
Additionally, we only return tdesc_arm_with_neon for arm process,
because neon is mandatory on ARMv8.
gdb:
2016-08-04 Yao Qi <yao.qi@linaro.org>
* aarch64-linux-nat.c (tdesc_arm_with_vfpv3): Remove the
declaration.
(aarch64_linux_read_description): Remove code on getting
auxv and select target description on it. Select target
description by the result of NT_ARM_VFP ptrace request.
2016-08-04 12:37:57 +02:00
|
|
|
|
int ret, tid;
|
|
|
|
|
gdb_byte regbuf[VFP_REGS_SIZE];
|
|
|
|
|
struct iovec iovec;
|
2015-07-07 17:58:19 +02:00
|
|
|
|
|
Determine target description for native aarch64
I find the following test fail when I test native aarch64 gdb with
arm program,
(gdb) PASS: gdb.base/attach-pie-noexec.exp: attach
set architecture arm^M
warning: Selected architecture arm is not compatible with reported target architecture aarch64^M
Architecture `arm' not recognized.^M
The target architecture is set automatically (currently aarch64)^M
(gdb) FAIL: gdb.base/attach-pie-noexec.exp: set architecture arm
GDB thinks the target is aarch64, but it isn't. Nowadays, we are
using some entries AT_PHENT and AT_HWCAP in auxv to determine whether
the process is a 32-bit arm one or 64-bit aarch64 one, and get the
right gdbarch. However, in the process of parsing auxv (in
inf_ptrace_auxv_parse), the size of int and data pointer of
target_gdbarch is used. If debug program exists (in most of cases),
target_gdbarch is already set according to the debug program, which
is arm in my case. Then, GDB can parse auxv successfully. However,
in gdb.base/attach-pie-noexec.exp, the debug program is removed,
target_gdbarch is aarch64 when GDB parse auxv, so GDB can't parse
it successfully.
Instead of using auxv, we check the return value of ptrace NT_ARM_VFP.
If the program is an arm process, NT_ARM_VFP is OK, otherwise, error
is returned.
Additionally, we only return tdesc_arm_with_neon for arm process,
because neon is mandatory on ARMv8.
gdb:
2016-08-04 Yao Qi <yao.qi@linaro.org>
* aarch64-linux-nat.c (tdesc_arm_with_vfpv3): Remove the
declaration.
(aarch64_linux_read_description): Remove code on getting
auxv and select target description on it. Select target
description by the result of NT_ARM_VFP ptrace request.
2016-08-04 12:37:57 +02:00
|
|
|
|
tid = ptid_get_lwp (inferior_ptid);
|
2015-07-07 17:58:19 +02:00
|
|
|
|
|
Determine target description for native aarch64
I find the following test fail when I test native aarch64 gdb with
arm program,
(gdb) PASS: gdb.base/attach-pie-noexec.exp: attach
set architecture arm^M
warning: Selected architecture arm is not compatible with reported target architecture aarch64^M
Architecture `arm' not recognized.^M
The target architecture is set automatically (currently aarch64)^M
(gdb) FAIL: gdb.base/attach-pie-noexec.exp: set architecture arm
GDB thinks the target is aarch64, but it isn't. Nowadays, we are
using some entries AT_PHENT and AT_HWCAP in auxv to determine whether
the process is a 32-bit arm one or 64-bit aarch64 one, and get the
right gdbarch. However, in the process of parsing auxv (in
inf_ptrace_auxv_parse), the size of int and data pointer of
target_gdbarch is used. If debug program exists (in most of cases),
target_gdbarch is already set according to the debug program, which
is arm in my case. Then, GDB can parse auxv successfully. However,
in gdb.base/attach-pie-noexec.exp, the debug program is removed,
target_gdbarch is aarch64 when GDB parse auxv, so GDB can't parse
it successfully.
Instead of using auxv, we check the return value of ptrace NT_ARM_VFP.
If the program is an arm process, NT_ARM_VFP is OK, otherwise, error
is returned.
Additionally, we only return tdesc_arm_with_neon for arm process,
because neon is mandatory on ARMv8.
gdb:
2016-08-04 Yao Qi <yao.qi@linaro.org>
* aarch64-linux-nat.c (tdesc_arm_with_vfpv3): Remove the
declaration.
(aarch64_linux_read_description): Remove code on getting
auxv and select target description on it. Select target
description by the result of NT_ARM_VFP ptrace request.
2016-08-04 12:37:57 +02:00
|
|
|
|
iovec.iov_base = regbuf;
|
|
|
|
|
iovec.iov_len = VFP_REGS_SIZE;
|
2015-07-07 17:58:19 +02:00
|
|
|
|
|
Determine target description for native aarch64
I find the following test fail when I test native aarch64 gdb with
arm program,
(gdb) PASS: gdb.base/attach-pie-noexec.exp: attach
set architecture arm^M
warning: Selected architecture arm is not compatible with reported target architecture aarch64^M
Architecture `arm' not recognized.^M
The target architecture is set automatically (currently aarch64)^M
(gdb) FAIL: gdb.base/attach-pie-noexec.exp: set architecture arm
GDB thinks the target is aarch64, but it isn't. Nowadays, we are
using some entries AT_PHENT and AT_HWCAP in auxv to determine whether
the process is a 32-bit arm one or 64-bit aarch64 one, and get the
right gdbarch. However, in the process of parsing auxv (in
inf_ptrace_auxv_parse), the size of int and data pointer of
target_gdbarch is used. If debug program exists (in most of cases),
target_gdbarch is already set according to the debug program, which
is arm in my case. Then, GDB can parse auxv successfully. However,
in gdb.base/attach-pie-noexec.exp, the debug program is removed,
target_gdbarch is aarch64 when GDB parse auxv, so GDB can't parse
it successfully.
Instead of using auxv, we check the return value of ptrace NT_ARM_VFP.
If the program is an arm process, NT_ARM_VFP is OK, otherwise, error
is returned.
Additionally, we only return tdesc_arm_with_neon for arm process,
because neon is mandatory on ARMv8.
gdb:
2016-08-04 Yao Qi <yao.qi@linaro.org>
* aarch64-linux-nat.c (tdesc_arm_with_vfpv3): Remove the
declaration.
(aarch64_linux_read_description): Remove code on getting
auxv and select target description on it. Select target
description by the result of NT_ARM_VFP ptrace request.
2016-08-04 12:37:57 +02:00
|
|
|
|
ret = ptrace (PTRACE_GETREGSET, tid, NT_ARM_VFP, &iovec);
|
|
|
|
|
if (ret == 0)
|
|
|
|
|
return tdesc_arm_with_neon;
|
|
|
|
|
else
|
2017-11-24 11:00:54 +01:00
|
|
|
|
return aarch64_read_description ();
|
2013-02-08 10:00:35 +01:00
|
|
|
|
}
|
|
|
|
|
|
aarch64 multi-arch support (part 2): siginfo fixup
This patch is to fixup the siginfo_t when aarch64 gdb or gdbserver
read from or write to the arm inferior. It is to convert the
"struct siginfo_t" between aarch64 and arm, which is quite mechanical.
gdb/gdbserver:
2015-09-15 Yao Qi <yao.qi@linaro.org>
* linux-aarch64-low.c (aarch64_linux_siginfo_fixup): New
function.
(struct linux_target_ops the_low_target): Install
aarch64_linux_siginfo_fixup.
gdb:
2015-09-15 Yao Qi <yao.qi@linaro.org>
* aarch64-linux-nat.c (aarch64_linux_siginfo_fixup): New function.
(_initialize_aarch64_linux_nat): Call linux_nat_set_siginfo_fixup.
* nat/aarch64-linux.c (aarch64_compat_siginfo_from_siginfo):
New function.
(aarch64_siginfo_from_compat_siginfo): New function.
* nat/aarch64-linux.h: Include signal.h.
(compat_int_t, compat_uptr_t, compat_time_t): Typedef.
(compat_timer_t, compat_clock_t): Likewise.
(struct compat_timeval): New.
(union compat_sigval): New.
(struct compat_siginfo): New.
(cpt_si_pid, cpt_si_uid, cpt_si_timerid): New macros.
(cpt_si_overrun, cpt_si_status, cpt_si_utime): Likewise.
(cpt_si_stime, cpt_si_ptr, cpt_si_addr): Likewise.
(cpt_si_band, cpt_si_fd): Likewise.
2015-09-15 11:25:51 +02:00
|
|
|
|
/* Convert a native/host siginfo object, into/from the siginfo in the
|
|
|
|
|
layout of the inferiors' architecture. Returns true if any
|
|
|
|
|
conversion was done; false otherwise. If DIRECTION is 1, then copy
|
|
|
|
|
from INF to NATIVE. If DIRECTION is 0, copy from NATIVE to
|
|
|
|
|
INF. */
|
|
|
|
|
|
|
|
|
|
static int
|
|
|
|
|
aarch64_linux_siginfo_fixup (siginfo_t *native, gdb_byte *inf, int direction)
|
|
|
|
|
{
|
|
|
|
|
struct gdbarch *gdbarch = get_frame_arch (get_current_frame ());
|
|
|
|
|
|
|
|
|
|
/* Is the inferior 32-bit? If so, then do fixup the siginfo
|
|
|
|
|
object. */
|
|
|
|
|
if (gdbarch_bfd_arch_info (gdbarch)->bits_per_word == 32)
|
|
|
|
|
{
|
|
|
|
|
if (direction == 0)
|
|
|
|
|
aarch64_compat_siginfo_from_siginfo ((struct compat_siginfo *) inf,
|
|
|
|
|
native);
|
|
|
|
|
else
|
|
|
|
|
aarch64_siginfo_from_compat_siginfo (native,
|
|
|
|
|
(struct compat_siginfo *) inf);
|
|
|
|
|
|
|
|
|
|
return 1;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
|
}
|
|
|
|
|
|
2013-02-08 10:00:35 +01:00
|
|
|
|
/* Returns the number of hardware watchpoints of type TYPE that we can
|
|
|
|
|
set. Value is positive if we can set CNT watchpoints, zero if
|
|
|
|
|
setting watchpoints of type TYPE is not supported, and negative if
|
|
|
|
|
CNT is more than the maximum number of watchpoints of type TYPE
|
|
|
|
|
that we can support. TYPE is one of bp_hardware_watchpoint,
|
|
|
|
|
bp_read_watchpoint, bp_write_watchpoint, or bp_hardware_breakpoint.
|
|
|
|
|
CNT is the number of such watchpoints used so far (including this
|
|
|
|
|
one). OTHERTYPE is non-zero if other types of watchpoints are
|
2015-07-23 12:22:34 +02:00
|
|
|
|
currently enabled. */
|
2013-02-08 10:00:35 +01:00
|
|
|
|
|
|
|
|
|
static int
|
2013-12-18 05:28:37 +01:00
|
|
|
|
aarch64_linux_can_use_hw_breakpoint (struct target_ops *self,
|
2015-07-31 19:19:53 +02:00
|
|
|
|
enum bptype type,
|
|
|
|
|
int cnt, int othertype)
|
2013-02-08 10:00:35 +01:00
|
|
|
|
{
|
2015-07-23 12:22:34 +02:00
|
|
|
|
if (type == bp_hardware_watchpoint || type == bp_read_watchpoint
|
|
|
|
|
|| type == bp_access_watchpoint || type == bp_watchpoint)
|
|
|
|
|
{
|
|
|
|
|
if (aarch64_num_wp_regs == 0)
|
|
|
|
|
return 0;
|
|
|
|
|
}
|
|
|
|
|
else if (type == bp_hardware_breakpoint)
|
|
|
|
|
{
|
|
|
|
|
if (aarch64_num_bp_regs == 0)
|
|
|
|
|
return 0;
|
|
|
|
|
}
|
|
|
|
|
else
|
|
|
|
|
gdb_assert_not_reached ("unexpected breakpoint type");
|
|
|
|
|
|
|
|
|
|
/* We always return 1 here because we don't have enough information
|
|
|
|
|
about possible overlap of addresses that they want to watch. As an
|
|
|
|
|
extreme example, consider the case where all the watchpoints watch
|
|
|
|
|
the same address and the same region length: then we can handle a
|
|
|
|
|
virtually unlimited number of watchpoints, due to debug register
|
|
|
|
|
sharing implemented via reference counts. */
|
2013-02-08 10:00:35 +01:00
|
|
|
|
return 1;
|
|
|
|
|
}
|
|
|
|
|
|
Avoid software breakpoint's instruction shadow inconsistency
This change:
commit b775012e845380ed4c7421a1b87caf7bfae39f5f
Author: Luis Machado <luisgpm@br.ibm.com>
Date: Fri Feb 24 15:10:59 2012 +0000
2012-02-24 Luis Machado <lgustavo@codesourcery.com>
* remote.c (remote_supports_cond_breakpoints): New forward
declaration.
[...]
changed the way breakpoints are inserted and removed such that
`insert_bp_location' can now be called with the breakpoint being handled
already in place, while previously the call was only ever made for
breakpoints that have not been put in place. This in turn caused an
issue for software breakpoints and targets for which a breakpoint's
`placed_address' may not be the same as the original requested address.
The issue is `insert_bp_location' overwrites the previously adjusted
value in `placed_address' with the original address, that is only
replaced back with the correct adjusted address later on when
`gdbarch_breakpoint_from_pc' is called. Meanwhile there's a window
where the value in `placed_address' does not correspond to data stored
in `shadow_contents', leading to incorrect instruction bytes being
supplied when `one_breakpoint_xfer_memory' is called to supply the
instruction overlaid by the breakpoint.
And this is exactly what happens on the MIPS target with software
breakpoints placed in microMIPS code. In this case not only
`placed_address' is not the original address because of the ISA bit, but
`mips_breakpoint_from_pc' has to read the original instruction to
determine which one of the two software breakpoint instruction encodings
to choose as well. The 16-bit encoding is used to replace 16-bit
instructions and similarly the 32-bit one is used with 32-bit
instructions, to satisfy branch delay slot size requirements.
The mismatch between `placed_address' and the address data in
`shadow_contents' has been obtained from leads to the wrong encoding
being used in some cases, which in the case of a 32-bit software
breakpoint instruction replacing a 16-bit instruction causes corruption
to the adjacent following instruction and leads the debug session astray
if execution reaches there e.g. with a jump.
To address this problem I made the change below, that adds a
`reqstd_address' field to `struct bp_target_info' and leaves
`placed_address' unchanged once it has been set. This ensures data in
`shadow_contents' is always consistent with `placed_address'.
This approach also has this good side effect that all the places that
examine the breakpoint's address see a consistent value, either
`reqstd_address' or `placed_address', as required. Currently some
places see either the original or the adjusted address in
`placed_address', depending on whether they have been called before
`gdbarch_remote_breakpoint_from_pc' or afterwards. This is in
particular true for subsequent calls to
`gdbarch_remote_breakpoint_from_pc' itself, e.g. from
`one_breakpoint_xfer_memory'. This is also important for places like
`find_single_step_breakpoint' where a breakpoint's address is compared
to the raw value of $pc.
* breakpoint.h (bp_target_info): Add `reqstd_address' member,
update comments.
* breakpoint.c (one_breakpoint_xfer_memory): Use `reqstd_address'
for the breakpoint's address. Don't preinitialize `placed_size'.
(insert_bp_location): Set `reqstd_address' rather than
`placed_address'.
(bp_target_info_copy_insertion_state): Also copy `placed_address'.
(bkpt_insert_location): Use `reqstd_address' for the breakpoint's
address.
(bkpt_remove_location): Likewise.
(deprecated_insert_raw_breakpoint): Likewise.
(deprecated_remove_raw_breakpoint): Likewise.
(find_single_step_breakpoint): Likewise.
* mem-break.c (default_memory_insert_breakpoint): Use
`reqstd_address' for the breakpoint's address. Don't set
`placed_address' or `placed_size' if breakpoint contents couldn't
have been determined.
* remote.c (remote_insert_breakpoint): Use `reqstd_address' for
the breakpoint's address.
(remote_insert_hw_breakpoint): Likewise. Don't set
`placed_address' or `placed_size' if breakpoint couldn't have been
set.
* aarch64-linux-nat.c (aarch64_linux_insert_hw_breakpoint): Use
`reqstd_address' for the breakpoint's address.
* arm-linux-nat.c (arm_linux_hw_breakpoint_initialize): Likewise.
* ia64-tdep.c (ia64_memory_insert_breakpoint): Likewise.
* m32r-tdep.c (m32r_memory_insert_breakpoint): Likewise.
* microblaze-linux-tdep.c
(microblaze_linux_memory_remove_breakpoint): Likewise.
* monitor.c (monitor_insert_breakpoint): Likewise.
* nto-procfs.c (procfs_insert_breakpoint): Likewise.
(procfs_insert_hw_breakpoint): Likewise.
* ppc-linux-nat.c (ppc_linux_insert_hw_breakpoint): Likewise.
* ppc-linux-tdep.c (ppc_linux_memory_remove_breakpoint): Likewise.
* remote-m32r-sdi.c (m32r_insert_breakpoint): Likewise.
* remote-mips.c (mips_insert_breakpoint): Likewise.
* x86-nat.c (x86_insert_hw_breakpoint): Likewise.
2014-10-03 13:44:58 +02:00
|
|
|
|
/* Insert a hardware-assisted breakpoint at BP_TGT->reqstd_address.
|
2013-02-08 10:00:35 +01:00
|
|
|
|
Return 0 on success, -1 on failure. */
|
|
|
|
|
|
|
|
|
|
static int
|
2013-12-18 05:28:50 +01:00
|
|
|
|
aarch64_linux_insert_hw_breakpoint (struct target_ops *self,
|
|
|
|
|
struct gdbarch *gdbarch,
|
2013-02-08 10:00:35 +01:00
|
|
|
|
struct bp_target_info *bp_tgt)
|
|
|
|
|
{
|
|
|
|
|
int ret;
|
Avoid software breakpoint's instruction shadow inconsistency
This change:
commit b775012e845380ed4c7421a1b87caf7bfae39f5f
Author: Luis Machado <luisgpm@br.ibm.com>
Date: Fri Feb 24 15:10:59 2012 +0000
2012-02-24 Luis Machado <lgustavo@codesourcery.com>
* remote.c (remote_supports_cond_breakpoints): New forward
declaration.
[...]
changed the way breakpoints are inserted and removed such that
`insert_bp_location' can now be called with the breakpoint being handled
already in place, while previously the call was only ever made for
breakpoints that have not been put in place. This in turn caused an
issue for software breakpoints and targets for which a breakpoint's
`placed_address' may not be the same as the original requested address.
The issue is `insert_bp_location' overwrites the previously adjusted
value in `placed_address' with the original address, that is only
replaced back with the correct adjusted address later on when
`gdbarch_breakpoint_from_pc' is called. Meanwhile there's a window
where the value in `placed_address' does not correspond to data stored
in `shadow_contents', leading to incorrect instruction bytes being
supplied when `one_breakpoint_xfer_memory' is called to supply the
instruction overlaid by the breakpoint.
And this is exactly what happens on the MIPS target with software
breakpoints placed in microMIPS code. In this case not only
`placed_address' is not the original address because of the ISA bit, but
`mips_breakpoint_from_pc' has to read the original instruction to
determine which one of the two software breakpoint instruction encodings
to choose as well. The 16-bit encoding is used to replace 16-bit
instructions and similarly the 32-bit one is used with 32-bit
instructions, to satisfy branch delay slot size requirements.
The mismatch between `placed_address' and the address data in
`shadow_contents' has been obtained from leads to the wrong encoding
being used in some cases, which in the case of a 32-bit software
breakpoint instruction replacing a 16-bit instruction causes corruption
to the adjacent following instruction and leads the debug session astray
if execution reaches there e.g. with a jump.
To address this problem I made the change below, that adds a
`reqstd_address' field to `struct bp_target_info' and leaves
`placed_address' unchanged once it has been set. This ensures data in
`shadow_contents' is always consistent with `placed_address'.
This approach also has this good side effect that all the places that
examine the breakpoint's address see a consistent value, either
`reqstd_address' or `placed_address', as required. Currently some
places see either the original or the adjusted address in
`placed_address', depending on whether they have been called before
`gdbarch_remote_breakpoint_from_pc' or afterwards. This is in
particular true for subsequent calls to
`gdbarch_remote_breakpoint_from_pc' itself, e.g. from
`one_breakpoint_xfer_memory'. This is also important for places like
`find_single_step_breakpoint' where a breakpoint's address is compared
to the raw value of $pc.
* breakpoint.h (bp_target_info): Add `reqstd_address' member,
update comments.
* breakpoint.c (one_breakpoint_xfer_memory): Use `reqstd_address'
for the breakpoint's address. Don't preinitialize `placed_size'.
(insert_bp_location): Set `reqstd_address' rather than
`placed_address'.
(bp_target_info_copy_insertion_state): Also copy `placed_address'.
(bkpt_insert_location): Use `reqstd_address' for the breakpoint's
address.
(bkpt_remove_location): Likewise.
(deprecated_insert_raw_breakpoint): Likewise.
(deprecated_remove_raw_breakpoint): Likewise.
(find_single_step_breakpoint): Likewise.
* mem-break.c (default_memory_insert_breakpoint): Use
`reqstd_address' for the breakpoint's address. Don't set
`placed_address' or `placed_size' if breakpoint contents couldn't
have been determined.
* remote.c (remote_insert_breakpoint): Use `reqstd_address' for
the breakpoint's address.
(remote_insert_hw_breakpoint): Likewise. Don't set
`placed_address' or `placed_size' if breakpoint couldn't have been
set.
* aarch64-linux-nat.c (aarch64_linux_insert_hw_breakpoint): Use
`reqstd_address' for the breakpoint's address.
* arm-linux-nat.c (arm_linux_hw_breakpoint_initialize): Likewise.
* ia64-tdep.c (ia64_memory_insert_breakpoint): Likewise.
* m32r-tdep.c (m32r_memory_insert_breakpoint): Likewise.
* microblaze-linux-tdep.c
(microblaze_linux_memory_remove_breakpoint): Likewise.
* monitor.c (monitor_insert_breakpoint): Likewise.
* nto-procfs.c (procfs_insert_breakpoint): Likewise.
(procfs_insert_hw_breakpoint): Likewise.
* ppc-linux-nat.c (ppc_linux_insert_hw_breakpoint): Likewise.
* ppc-linux-tdep.c (ppc_linux_memory_remove_breakpoint): Likewise.
* remote-m32r-sdi.c (m32r_insert_breakpoint): Likewise.
* remote-mips.c (mips_insert_breakpoint): Likewise.
* x86-nat.c (x86_insert_hw_breakpoint): Likewise.
2014-10-03 13:44:58 +02:00
|
|
|
|
CORE_ADDR addr = bp_tgt->placed_address = bp_tgt->reqstd_address;
|
aarch64 multi-arch part 6: HW breakpoint on unaligned address
Nowadays, both aarch64 GDB and linux kernel assumes that address for
setting breakpoint should be 4-byte aligned. However that is not true
after we support multi-arch, because thumb instruction can be at 2-byte
aligned address. Patch http://lists.infradead.org/pipermail/linux-arm-kernel/2015-October/375141.html
to linux kernel is to teach kernel to handle 2-byte aligned address for
HW breakpoint, while this patch is to teach aarch64 GDB handle 2-byte
aligned address.
First of all, we call gdbarch_breakpoint_from_pc to get the instruction
length rather than using hard-coded 4. Secondly, in GDBserver, we set
length back to 2 if it is 3, because GDB encode 3 in it to indicate it
is a 32-bit thumb breakpoint. Then we relax the address alignment
check from 4-byte aligned to 2-byte aligned.
This patch enables some tests (such as gdb.base/break-idempotent.exp,
gdb.base/cond-eval-mode.exp, gdb.base/watchpoint-reuse-slot.exp,) and
fixes many fails (such as gdb.base/hbreak2.exp) when the program is
compiled in thumb mode on aarch64.
Regression tested on aarch64-linux, both native and gdbserver. This
is the last patch of multi-arch work.
gdb:
2015-10-15 Yao Qi <yao.qi@linaro.org>
* aarch64-linux-nat.c (aarch64_linux_insert_hw_breakpoint):
Call gdbarch_breakpoint_from_pc to instruction length.
(aarch64_linux_remove_hw_breakpoint): Likewise.
* common/common-regcache.h (regcache_register_size): Declare.
* nat/aarch64-linux-hw-point.c: Include "common-regcache.h".
(aarch64_point_is_aligned): Set alignment to 2 for breakpoint if
the process is 32bit, otherwise set alignment to 4.
(aarch64_handle_breakpoint): Update comments.
* regcache.c (regcache_register_size): New function.
gdb/gdbserver:
2015-10-15 Yao Qi <yao.qi@linaro.org>
* linux-aarch64-low.c (aarch64_insert_point): Set len to 2
if it is 3.
(aarch64_remove_point): Likewise.
* regcache.c (regcache_register_size): New function.
2015-10-15 16:05:10 +02:00
|
|
|
|
int len;
|
2015-07-17 15:32:40 +02:00
|
|
|
|
const enum target_hw_bp_type type = hw_execute;
|
2015-07-17 15:32:40 +02:00
|
|
|
|
struct aarch64_debug_reg_state *state
|
|
|
|
|
= aarch64_get_debug_reg_state (ptid_get_pid (inferior_ptid));
|
2013-02-08 10:00:35 +01:00
|
|
|
|
|
aarch64 multi-arch part 6: HW breakpoint on unaligned address
Nowadays, both aarch64 GDB and linux kernel assumes that address for
setting breakpoint should be 4-byte aligned. However that is not true
after we support multi-arch, because thumb instruction can be at 2-byte
aligned address. Patch http://lists.infradead.org/pipermail/linux-arm-kernel/2015-October/375141.html
to linux kernel is to teach kernel to handle 2-byte aligned address for
HW breakpoint, while this patch is to teach aarch64 GDB handle 2-byte
aligned address.
First of all, we call gdbarch_breakpoint_from_pc to get the instruction
length rather than using hard-coded 4. Secondly, in GDBserver, we set
length back to 2 if it is 3, because GDB encode 3 in it to indicate it
is a 32-bit thumb breakpoint. Then we relax the address alignment
check from 4-byte aligned to 2-byte aligned.
This patch enables some tests (such as gdb.base/break-idempotent.exp,
gdb.base/cond-eval-mode.exp, gdb.base/watchpoint-reuse-slot.exp,) and
fixes many fails (such as gdb.base/hbreak2.exp) when the program is
compiled in thumb mode on aarch64.
Regression tested on aarch64-linux, both native and gdbserver. This
is the last patch of multi-arch work.
gdb:
2015-10-15 Yao Qi <yao.qi@linaro.org>
* aarch64-linux-nat.c (aarch64_linux_insert_hw_breakpoint):
Call gdbarch_breakpoint_from_pc to instruction length.
(aarch64_linux_remove_hw_breakpoint): Likewise.
* common/common-regcache.h (regcache_register_size): Declare.
* nat/aarch64-linux-hw-point.c: Include "common-regcache.h".
(aarch64_point_is_aligned): Set alignment to 2 for breakpoint if
the process is 32bit, otherwise set alignment to 4.
(aarch64_handle_breakpoint): Update comments.
* regcache.c (regcache_register_size): New function.
gdb/gdbserver:
2015-10-15 Yao Qi <yao.qi@linaro.org>
* linux-aarch64-low.c (aarch64_insert_point): Set len to 2
if it is 3.
(aarch64_remove_point): Likewise.
* regcache.c (regcache_register_size): New function.
2015-10-15 16:05:10 +02:00
|
|
|
|
gdbarch_breakpoint_from_pc (gdbarch, &addr, &len);
|
|
|
|
|
|
2014-09-11 12:19:56 +02:00
|
|
|
|
if (show_debug_regs)
|
2013-02-08 10:00:35 +01:00
|
|
|
|
fprintf_unfiltered
|
|
|
|
|
(gdb_stdlog,
|
|
|
|
|
"insert_hw_breakpoint on entry (addr=0x%08lx, len=%d))\n",
|
|
|
|
|
(unsigned long) addr, len);
|
|
|
|
|
|
2015-07-17 15:32:40 +02:00
|
|
|
|
ret = aarch64_handle_breakpoint (type, addr, len, 1 /* is_insert */, state);
|
2013-02-08 10:00:35 +01:00
|
|
|
|
|
2014-09-11 12:19:56 +02:00
|
|
|
|
if (show_debug_regs)
|
2013-02-14 14:50:30 +01:00
|
|
|
|
{
|
|
|
|
|
aarch64_show_debug_reg_state (state,
|
2015-07-02 15:03:54 +02:00
|
|
|
|
"insert_hw_breakpoint", addr, len, type);
|
2013-02-14 14:50:30 +01:00
|
|
|
|
}
|
2013-02-08 10:00:35 +01:00
|
|
|
|
|
|
|
|
|
return ret;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Remove a hardware-assisted breakpoint at BP_TGT->placed_address.
|
|
|
|
|
Return 0 on success, -1 on failure. */
|
|
|
|
|
|
|
|
|
|
static int
|
2013-12-18 05:29:03 +01:00
|
|
|
|
aarch64_linux_remove_hw_breakpoint (struct target_ops *self,
|
|
|
|
|
struct gdbarch *gdbarch,
|
2013-02-08 10:00:35 +01:00
|
|
|
|
struct bp_target_info *bp_tgt)
|
|
|
|
|
{
|
|
|
|
|
int ret;
|
|
|
|
|
CORE_ADDR addr = bp_tgt->placed_address;
|
aarch64 multi-arch part 6: HW breakpoint on unaligned address
Nowadays, both aarch64 GDB and linux kernel assumes that address for
setting breakpoint should be 4-byte aligned. However that is not true
after we support multi-arch, because thumb instruction can be at 2-byte
aligned address. Patch http://lists.infradead.org/pipermail/linux-arm-kernel/2015-October/375141.html
to linux kernel is to teach kernel to handle 2-byte aligned address for
HW breakpoint, while this patch is to teach aarch64 GDB handle 2-byte
aligned address.
First of all, we call gdbarch_breakpoint_from_pc to get the instruction
length rather than using hard-coded 4. Secondly, in GDBserver, we set
length back to 2 if it is 3, because GDB encode 3 in it to indicate it
is a 32-bit thumb breakpoint. Then we relax the address alignment
check from 4-byte aligned to 2-byte aligned.
This patch enables some tests (such as gdb.base/break-idempotent.exp,
gdb.base/cond-eval-mode.exp, gdb.base/watchpoint-reuse-slot.exp,) and
fixes many fails (such as gdb.base/hbreak2.exp) when the program is
compiled in thumb mode on aarch64.
Regression tested on aarch64-linux, both native and gdbserver. This
is the last patch of multi-arch work.
gdb:
2015-10-15 Yao Qi <yao.qi@linaro.org>
* aarch64-linux-nat.c (aarch64_linux_insert_hw_breakpoint):
Call gdbarch_breakpoint_from_pc to instruction length.
(aarch64_linux_remove_hw_breakpoint): Likewise.
* common/common-regcache.h (regcache_register_size): Declare.
* nat/aarch64-linux-hw-point.c: Include "common-regcache.h".
(aarch64_point_is_aligned): Set alignment to 2 for breakpoint if
the process is 32bit, otherwise set alignment to 4.
(aarch64_handle_breakpoint): Update comments.
* regcache.c (regcache_register_size): New function.
gdb/gdbserver:
2015-10-15 Yao Qi <yao.qi@linaro.org>
* linux-aarch64-low.c (aarch64_insert_point): Set len to 2
if it is 3.
(aarch64_remove_point): Likewise.
* regcache.c (regcache_register_size): New function.
2015-10-15 16:05:10 +02:00
|
|
|
|
int len = 4;
|
2015-07-17 15:32:40 +02:00
|
|
|
|
const enum target_hw_bp_type type = hw_execute;
|
2015-07-17 15:32:40 +02:00
|
|
|
|
struct aarch64_debug_reg_state *state
|
|
|
|
|
= aarch64_get_debug_reg_state (ptid_get_pid (inferior_ptid));
|
2013-02-08 10:00:35 +01:00
|
|
|
|
|
aarch64 multi-arch part 6: HW breakpoint on unaligned address
Nowadays, both aarch64 GDB and linux kernel assumes that address for
setting breakpoint should be 4-byte aligned. However that is not true
after we support multi-arch, because thumb instruction can be at 2-byte
aligned address. Patch http://lists.infradead.org/pipermail/linux-arm-kernel/2015-October/375141.html
to linux kernel is to teach kernel to handle 2-byte aligned address for
HW breakpoint, while this patch is to teach aarch64 GDB handle 2-byte
aligned address.
First of all, we call gdbarch_breakpoint_from_pc to get the instruction
length rather than using hard-coded 4. Secondly, in GDBserver, we set
length back to 2 if it is 3, because GDB encode 3 in it to indicate it
is a 32-bit thumb breakpoint. Then we relax the address alignment
check from 4-byte aligned to 2-byte aligned.
This patch enables some tests (such as gdb.base/break-idempotent.exp,
gdb.base/cond-eval-mode.exp, gdb.base/watchpoint-reuse-slot.exp,) and
fixes many fails (such as gdb.base/hbreak2.exp) when the program is
compiled in thumb mode on aarch64.
Regression tested on aarch64-linux, both native and gdbserver. This
is the last patch of multi-arch work.
gdb:
2015-10-15 Yao Qi <yao.qi@linaro.org>
* aarch64-linux-nat.c (aarch64_linux_insert_hw_breakpoint):
Call gdbarch_breakpoint_from_pc to instruction length.
(aarch64_linux_remove_hw_breakpoint): Likewise.
* common/common-regcache.h (regcache_register_size): Declare.
* nat/aarch64-linux-hw-point.c: Include "common-regcache.h".
(aarch64_point_is_aligned): Set alignment to 2 for breakpoint if
the process is 32bit, otherwise set alignment to 4.
(aarch64_handle_breakpoint): Update comments.
* regcache.c (regcache_register_size): New function.
gdb/gdbserver:
2015-10-15 Yao Qi <yao.qi@linaro.org>
* linux-aarch64-low.c (aarch64_insert_point): Set len to 2
if it is 3.
(aarch64_remove_point): Likewise.
* regcache.c (regcache_register_size): New function.
2015-10-15 16:05:10 +02:00
|
|
|
|
gdbarch_breakpoint_from_pc (gdbarch, &addr, &len);
|
|
|
|
|
|
2014-09-11 12:19:56 +02:00
|
|
|
|
if (show_debug_regs)
|
2013-02-08 10:00:35 +01:00
|
|
|
|
fprintf_unfiltered
|
|
|
|
|
(gdb_stdlog, "remove_hw_breakpoint on entry (addr=0x%08lx, len=%d))\n",
|
|
|
|
|
(unsigned long) addr, len);
|
|
|
|
|
|
2015-07-17 15:32:40 +02:00
|
|
|
|
ret = aarch64_handle_breakpoint (type, addr, len, 0 /* is_insert */, state);
|
2013-02-08 10:00:35 +01:00
|
|
|
|
|
2014-09-11 12:19:56 +02:00
|
|
|
|
if (show_debug_regs)
|
2013-02-14 14:50:30 +01:00
|
|
|
|
{
|
|
|
|
|
aarch64_show_debug_reg_state (state,
|
|
|
|
|
"remove_hw_watchpoint", addr, len, type);
|
|
|
|
|
}
|
2013-02-08 10:00:35 +01:00
|
|
|
|
|
|
|
|
|
return ret;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Implement the "to_insert_watchpoint" target_ops method.
|
|
|
|
|
|
|
|
|
|
Insert a watchpoint to watch a memory region which starts at
|
|
|
|
|
address ADDR and whose length is LEN bytes. Watch memory accesses
|
|
|
|
|
of the type TYPE. Return 0 on success, -1 on failure. */
|
|
|
|
|
|
|
|
|
|
static int
|
2013-12-18 05:29:31 +01:00
|
|
|
|
aarch64_linux_insert_watchpoint (struct target_ops *self,
|
2015-07-31 19:19:53 +02:00
|
|
|
|
CORE_ADDR addr, int len,
|
|
|
|
|
enum target_hw_bp_type type,
|
2013-02-08 10:00:35 +01:00
|
|
|
|
struct expression *cond)
|
|
|
|
|
{
|
|
|
|
|
int ret;
|
2015-07-17 15:32:40 +02:00
|
|
|
|
struct aarch64_debug_reg_state *state
|
|
|
|
|
= aarch64_get_debug_reg_state (ptid_get_pid (inferior_ptid));
|
2013-02-08 10:00:35 +01:00
|
|
|
|
|
2014-09-11 12:19:56 +02:00
|
|
|
|
if (show_debug_regs)
|
2013-02-08 10:00:35 +01:00
|
|
|
|
fprintf_unfiltered (gdb_stdlog,
|
|
|
|
|
"insert_watchpoint on entry (addr=0x%08lx, len=%d)\n",
|
|
|
|
|
(unsigned long) addr, len);
|
|
|
|
|
|
|
|
|
|
gdb_assert (type != hw_execute);
|
|
|
|
|
|
2015-07-17 15:32:40 +02:00
|
|
|
|
ret = aarch64_handle_watchpoint (type, addr, len, 1 /* is_insert */, state);
|
2013-02-08 10:00:35 +01:00
|
|
|
|
|
2014-09-11 12:19:56 +02:00
|
|
|
|
if (show_debug_regs)
|
2013-02-14 14:50:30 +01:00
|
|
|
|
{
|
|
|
|
|
aarch64_show_debug_reg_state (state,
|
|
|
|
|
"insert_watchpoint", addr, len, type);
|
|
|
|
|
}
|
2013-02-08 10:00:35 +01:00
|
|
|
|
|
|
|
|
|
return ret;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Implement the "to_remove_watchpoint" target_ops method.
|
|
|
|
|
Remove a watchpoint that watched the memory region which starts at
|
|
|
|
|
address ADDR, whose length is LEN bytes, and for accesses of the
|
|
|
|
|
type TYPE. Return 0 on success, -1 on failure. */
|
|
|
|
|
|
|
|
|
|
static int
|
2013-12-18 05:29:17 +01:00
|
|
|
|
aarch64_linux_remove_watchpoint (struct target_ops *self,
|
2015-07-31 19:19:53 +02:00
|
|
|
|
CORE_ADDR addr, int len,
|
|
|
|
|
enum target_hw_bp_type type,
|
2013-02-08 10:00:35 +01:00
|
|
|
|
struct expression *cond)
|
|
|
|
|
{
|
|
|
|
|
int ret;
|
2015-07-17 15:32:40 +02:00
|
|
|
|
struct aarch64_debug_reg_state *state
|
|
|
|
|
= aarch64_get_debug_reg_state (ptid_get_pid (inferior_ptid));
|
2013-02-08 10:00:35 +01:00
|
|
|
|
|
2014-09-11 12:19:56 +02:00
|
|
|
|
if (show_debug_regs)
|
2013-02-08 10:00:35 +01:00
|
|
|
|
fprintf_unfiltered (gdb_stdlog,
|
|
|
|
|
"remove_watchpoint on entry (addr=0x%08lx, len=%d)\n",
|
|
|
|
|
(unsigned long) addr, len);
|
|
|
|
|
|
|
|
|
|
gdb_assert (type != hw_execute);
|
|
|
|
|
|
2015-07-17 15:32:40 +02:00
|
|
|
|
ret = aarch64_handle_watchpoint (type, addr, len, 0 /* is_insert */, state);
|
2013-02-08 10:00:35 +01:00
|
|
|
|
|
2014-09-11 12:19:56 +02:00
|
|
|
|
if (show_debug_regs)
|
2013-02-14 14:50:30 +01:00
|
|
|
|
{
|
|
|
|
|
aarch64_show_debug_reg_state (state,
|
|
|
|
|
"remove_watchpoint", addr, len, type);
|
|
|
|
|
}
|
2013-02-08 10:00:35 +01:00
|
|
|
|
|
|
|
|
|
return ret;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Implement the "to_region_ok_for_hw_watchpoint" target_ops method. */
|
|
|
|
|
|
|
|
|
|
static int
|
2013-12-18 05:29:45 +01:00
|
|
|
|
aarch64_linux_region_ok_for_hw_watchpoint (struct target_ops *self,
|
|
|
|
|
CORE_ADDR addr, int len)
|
2013-02-08 10:00:35 +01:00
|
|
|
|
{
|
[aarch64] Check region OK for HW watchpoint in GDBserver
Nowadays, if user requests HW watchpoint to monitor a large memory area
or unaligned area, aarch64 GDB will split into multiple aligned areas,
and use multiple debugging registers to watch them. However, the
registers are not updated in a transaction way. GDBserver doesn't revert
updates in previous iterations if some debugging registers fail to update
due to some reason, like no free debugging registers available, in the
latter iteration. For example, if we have a char buf[34], and watch buf
in gdb,
(gdb) watch buf
Hardware watchpoint 2: buf
(gdb) c
Continuing.
infrun: clear_proceed_status_thread (Thread 13466)
infrun: proceed (addr=0xffffffffffffffff, signal=GDB_SIGNAL_DEFAULT)
infrun: step-over queue now empty
infrun: resuming [Thread 13466] for step-over
Sending packet: $m410838,22#35...Packet received: 00000000000000000000000000000000000000000000000000000000000000000000
infrun: skipping breakpoint: stepping past insn at: 0x400524
infrun: skipping breakpoint: stepping past insn at: 0x400524
Sending packet: $Z2,410838,22#80...Packet received: E01 <----- [1]
Packet Z2 (write-watchpoint) is supported
Sending packet: $Z0,7fb7fe0a8c,4#43...Packet received: OK
Warning:
Could not insert hardware watchpoint 2.
Could not insert hardware breakpoints:
You may have requested too many hardware breakpoints/watchpoints.
GDB receives E01 for Z2 packet [1] but GDBserver updates the debugging
register status,
insert_point (addr=0x00410838, len=34, type=hw-write-watchpoint):
BREAKPOINTs:
BP0: addr=0x0, ctrl=0x00000000, ref.count=0
BP1: addr=0x0, ctrl=0x00000000, ref.count=0
BP2: addr=0x0, ctrl=0x00000000, ref.count=0
BP3: addr=0x0, ctrl=0x00000000, ref.count=0
BP4: addr=0x0, ctrl=0x00000000, ref.count=0
BP5: addr=0x0, ctrl=0x00000000, ref.count=0
WATCHPOINTs:
WP0: addr=0x410850, ctrl=0x00001ff5, ref.count=1
WP1: addr=0x410848, ctrl=0x00001ff5, ref.count=1
WP2: addr=0x410840, ctrl=0x00001ff5, ref.count=1
WP3: addr=0x410838, ctrl=0x00001ff5, ref.count=1
four debugging registers can not monitor 34-byte long area, so the last
iteration of updating debugging register state fails but previous
iterations succeed. This makes GDB think no HW watchpoint is inserted
but some debugging registers are used.
This problem was exposed by "watch buf" gdb.base/watchpoint.exp with
aarch64 GDBserver debugging arm 32-bit program. The buf is 30-byte long
but 4-byte aligned, and four debugging registers can't cover 34-byte
(extend 4 bytes to be 8-byte aligned) area. However, this problem
does exist on non-multi-arch debugging scenario as well.
This patch moves code in aarch64_linux_region_ok_for_hw_watchpoint to
aarch64_linux_region_ok_for_watchpoint in nat/aarch64-linux-hw-point.c.
Then, checks with aarch64_linux_region_ok_for_watchpoint, like what we
are doing in GDB. If the region is OK, call aarch64_handle_watchpoint.
Regression tested on aarch64 with both 64-bit program and 32-bit
program. Some fails in gdb.base/watchpoint.exp are fixed.
gdb:
2015-09-03 Yao Qi <yao.qi@linaro.org>
* aarch64-linux-nat.c (aarch64_linux_region_ok_for_hw_watchpoint):
Move code to aarch64_linux_region_ok_for_watchpoint. Call
aarch64_linux_region_ok_for_watchpoint.
* nat/aarch64-linux-hw-point.c (aarch64_linux_region_ok_for_watchpoint):
New function.
* nat/aarch64-linux-hw-point.h (aarch64_linux_region_ok_for_watchpoint):
Declare it.
gdb/gdbserver:
2015-09-03 Yao Qi <yao.qi@linaro.org>
* linux-aarch64-low.c (aarch64_insert_point): Call
aarch64_handle_watchpoint if aarch64_linux_region_ok_for_watchpoint
returns true.
2015-09-03 15:01:49 +02:00
|
|
|
|
return aarch64_linux_region_ok_for_watchpoint (addr, len);
|
2013-02-08 10:00:35 +01:00
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Implement the "to_stopped_data_address" target_ops method. */
|
|
|
|
|
|
|
|
|
|
static int
|
|
|
|
|
aarch64_linux_stopped_data_address (struct target_ops *target,
|
|
|
|
|
CORE_ADDR *addr_p)
|
|
|
|
|
{
|
|
|
|
|
siginfo_t siginfo;
|
|
|
|
|
int i, tid;
|
|
|
|
|
struct aarch64_debug_reg_state *state;
|
|
|
|
|
|
|
|
|
|
if (!linux_nat_get_siginfo (inferior_ptid, &siginfo))
|
|
|
|
|
return 0;
|
|
|
|
|
|
|
|
|
|
/* This must be a hardware breakpoint. */
|
|
|
|
|
if (siginfo.si_signo != SIGTRAP
|
|
|
|
|
|| (siginfo.si_code & 0xffff) != TRAP_HWBKPT)
|
|
|
|
|
return 0;
|
|
|
|
|
|
|
|
|
|
/* Check if the address matches any watched address. */
|
2013-02-14 14:50:30 +01:00
|
|
|
|
state = aarch64_get_debug_reg_state (ptid_get_pid (inferior_ptid));
|
2013-02-08 10:00:35 +01:00
|
|
|
|
for (i = aarch64_num_wp_regs - 1; i >= 0; --i)
|
|
|
|
|
{
|
|
|
|
|
const unsigned int len = aarch64_watchpoint_length (state->dr_ctrl_wp[i]);
|
|
|
|
|
const CORE_ADDR addr_trap = (CORE_ADDR) siginfo.si_addr;
|
|
|
|
|
const CORE_ADDR addr_watch = state->dr_addr_wp[i];
|
|
|
|
|
|
|
|
|
|
if (state->dr_ref_count_wp[i]
|
|
|
|
|
&& DR_CONTROL_ENABLED (state->dr_ctrl_wp[i])
|
|
|
|
|
&& addr_trap >= addr_watch
|
|
|
|
|
&& addr_trap < addr_watch + len)
|
|
|
|
|
{
|
|
|
|
|
*addr_p = addr_trap;
|
|
|
|
|
return 1;
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Implement the "to_stopped_by_watchpoint" target_ops method. */
|
|
|
|
|
|
|
|
|
|
static int
|
add "this" pointers to more target APIs
A subsequent pass introduces delegation helper functions to the target
API. This delegation is much cleaner if the target_ops pointer is
directly available at delegation time.
This patch adds the "this" pointer to various to_* methods for this
purpose.
This updates a number of ports which I am unable to test. Please give
them a look-over. Any possible problem here is trivial, though, as
all that is required is adding an argument to a function.
2014-02-19 Tom Tromey <tromey@redhat.com>
* aarch64-linux-nat.c (aarch64_linux_stopped_by_watchpoint):
Add 'ops' argument.
* arm-linux-nat.c (arm_linux_stopped_by_watchpoint): Add
'ops' argument.
* i386-nat.c (i386_stopped_by_watchpoint): Add 'ops' argument.
* ia64-linux-nat.c (ia64_linux_stopped_by_watchpoint): Add
'ops' argument.
* inf-ttrace.c (inf_ttrace_stopped_by_watchpoint): Add 'ops'
argument.
* linux-nat.c (save_sigtrap): Update.
(linux_nat_stopped_by_watchpoint, linux_nat_is_async_p)
(linux_nat_can_async_p, linux_nat_async): Add 'ops' argument.
(linux_nat_close): Update.
* mips-linux-nat.c (mips_linux_stopped_by_watchpoint): Add 'ops'
argument.
* ppc-linux-nat.c (ppc_linux_stopped_by_watchpoint): Add 'ops'
argument.
* procfs.c (procfs_stopped_by_watchpoint): Add 'ops' argument.
* record-full.c (record_full_beneath_to_stopped_by_watchpoint)
(record_full_beneath_to_async, tmp_to_stopped_by_watchpoint)
(tmp_to_async): Add 'ops' argument.
(record_full_stopped_by_watchpoint, record_full_async)
(record_full_can_async_p, record_full_is_async_p): Add 'ops'
argument.
* remote-m32r-sdi.c (m32r_insert_breakpoint, m32r_remove_breakpoint)
(m32r_stopped_by_watchpoint): Add 'ops' argument.
* remote-mips.c (mips_stopped_by_watchpoint): Add 'ops' argument.
* remote.c (remote_stopped_by_watchpoint_p, remote_can_async_p)
(remote_is_async_p, remote_async): Add 'ops' argument.
(remote_stopped_data_address): Update.
* s390-nat.c (s390_stopped_by_watchpoint): Add 'ops' argument.
* target.c (update_current_target)
(find_default_can_async_p, find_default_is_async_p): Update.
(init_dummy_target): Update.
(debug_to_stopped_by_watchpoint): Add 'ops' argument.
* target.h (struct target_ops) <to_stopped_by_watchpoint,
to_can_async_p, to_is_async_p, to_async>: Add 'ops' argument.
(target_can_async_p, target_is_async_p, target_async)
(target_stopped_by_watchpoint): Update.
2013-07-30 18:36:07 +02:00
|
|
|
|
aarch64_linux_stopped_by_watchpoint (struct target_ops *ops)
|
2013-02-08 10:00:35 +01:00
|
|
|
|
{
|
|
|
|
|
CORE_ADDR addr;
|
|
|
|
|
|
add "this" pointers to more target APIs
A subsequent pass introduces delegation helper functions to the target
API. This delegation is much cleaner if the target_ops pointer is
directly available at delegation time.
This patch adds the "this" pointer to various to_* methods for this
purpose.
This updates a number of ports which I am unable to test. Please give
them a look-over. Any possible problem here is trivial, though, as
all that is required is adding an argument to a function.
2014-02-19 Tom Tromey <tromey@redhat.com>
* aarch64-linux-nat.c (aarch64_linux_stopped_by_watchpoint):
Add 'ops' argument.
* arm-linux-nat.c (arm_linux_stopped_by_watchpoint): Add
'ops' argument.
* i386-nat.c (i386_stopped_by_watchpoint): Add 'ops' argument.
* ia64-linux-nat.c (ia64_linux_stopped_by_watchpoint): Add
'ops' argument.
* inf-ttrace.c (inf_ttrace_stopped_by_watchpoint): Add 'ops'
argument.
* linux-nat.c (save_sigtrap): Update.
(linux_nat_stopped_by_watchpoint, linux_nat_is_async_p)
(linux_nat_can_async_p, linux_nat_async): Add 'ops' argument.
(linux_nat_close): Update.
* mips-linux-nat.c (mips_linux_stopped_by_watchpoint): Add 'ops'
argument.
* ppc-linux-nat.c (ppc_linux_stopped_by_watchpoint): Add 'ops'
argument.
* procfs.c (procfs_stopped_by_watchpoint): Add 'ops' argument.
* record-full.c (record_full_beneath_to_stopped_by_watchpoint)
(record_full_beneath_to_async, tmp_to_stopped_by_watchpoint)
(tmp_to_async): Add 'ops' argument.
(record_full_stopped_by_watchpoint, record_full_async)
(record_full_can_async_p, record_full_is_async_p): Add 'ops'
argument.
* remote-m32r-sdi.c (m32r_insert_breakpoint, m32r_remove_breakpoint)
(m32r_stopped_by_watchpoint): Add 'ops' argument.
* remote-mips.c (mips_stopped_by_watchpoint): Add 'ops' argument.
* remote.c (remote_stopped_by_watchpoint_p, remote_can_async_p)
(remote_is_async_p, remote_async): Add 'ops' argument.
(remote_stopped_data_address): Update.
* s390-nat.c (s390_stopped_by_watchpoint): Add 'ops' argument.
* target.c (update_current_target)
(find_default_can_async_p, find_default_is_async_p): Update.
(init_dummy_target): Update.
(debug_to_stopped_by_watchpoint): Add 'ops' argument.
* target.h (struct target_ops) <to_stopped_by_watchpoint,
to_can_async_p, to_is_async_p, to_async>: Add 'ops' argument.
(target_can_async_p, target_is_async_p, target_async)
(target_stopped_by_watchpoint): Update.
2013-07-30 18:36:07 +02:00
|
|
|
|
return aarch64_linux_stopped_data_address (ops, &addr);
|
2013-02-08 10:00:35 +01:00
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Implement the "to_watchpoint_addr_within_range" target_ops method. */
|
|
|
|
|
|
|
|
|
|
static int
|
|
|
|
|
aarch64_linux_watchpoint_addr_within_range (struct target_ops *target,
|
|
|
|
|
CORE_ADDR addr,
|
|
|
|
|
CORE_ADDR start, int length)
|
|
|
|
|
{
|
|
|
|
|
return start <= addr && start + length - 1 >= addr;
|
|
|
|
|
}
|
|
|
|
|
|
Support single step by arch or target
Nowadays, GDB only knows whether architecture supports hardware single
step or software single step (through gdbarch hook software_single_step),
and for a given instruction or instruction sequence, GDB knows how to
do single step (hardware or software). However, GDB doesn't know whether
the target supports hardware single step. It is possible that the
architecture doesn't support hardware single step, such as arm, but
the target supports, such as simulator. This was discussed in this
thread https://www.sourceware.org/ml/gdb/2009-12/msg00033.html before.
I encounter this problem for aarch64 multi-arch support. When aarch64
debugs arm program, gdbarch is arm, so software single step is still
used. However, the underneath linux kernel does support hardware
single step, so IWBN to use it.
This patch is to add a new target_ops hook to_can_do_single_step, and
only use it in arm_linux_software_single_step to decide whether or not
to use hardware single step. On the native aarch64 linux target, 1 is
returned. On other targets, -1 is returned. On the remote target, if
the target supports s and S actions in the vCont? reply, then target
can do single step. However, old GDBserver will send s and S in the
reply to vCont?, which will confuse new GDB. For example, old GDBserver
on arm-linux will send s and S in the reply to vCont?, but it doesn't
support hardware single step. On the other hand, new GDBserver, on
arm-linux for example, will not send s and S in the reply to vCont?,
but old GDB thinks it doesn't support vCont packet at all. In order
to address this problem, I add a new qSupported feature vContSupported,
which indicates GDB wants to know the supported actions in the reply
to vCont?, and qSupported response contains vContSupported if the
stub is able tell supported vCont actions in the reply of vCont?.
If the patched GDB talks with patched GDBserver on x86, the RSP traffic
is like this:
-> $qSupported:...+;vContSupported+
<- ...+;vContSupported+
...
-> $vCont?
<- vCont;c;C;t;s;S;r
then, GDB knows the stub can do single step, and may stop using software
single step even the architecture doesn't support hardware single step.
If the patched GDB talks with patched GDBserver on arm, the last vCont?
reply will become:
<- vCont;c;C;t
GDB thinks the target doesn't support single step, so it will use software
single step.
If the patched GDB talks with unpatched GDBserver, the RSP traffic is like
this:
-> $qSupported:...+;vContSupported+
<- ...+
...
-> $vCont?
<- vCont;c;C;t;s;S;r
although GDBserver returns s and S, GDB still thinks GDBserver may not
support single step because it doesn't support vContSupported.
If the unpatched GDB talks with patched GDBserver on x86, the RSP traffic
is like:
-> $qSupported:...+;
<- ...+;vContSupported+
...
-> $vCont?
<- vCont;c;C;t;s;S;r
Since GDB doesn't sent vContSupported in the qSupported feature, GDBserver
sends s and S regardless of the support of hardware single step.
gdb:
2015-09-15 Yao Qi <yao.qi@linaro.org>
* aarch64-linux-nat.c (aarch64_linux_can_do_single_step): New
function.
(_initialize_aarch64_linux_nat): Install it to to_can_do_single_step.
* arm-linux-tdep.c (arm_linux_software_single_step): Return 0
if target_can_do_single_step returns 1.
* remote.c (struct vCont_action_support) <s, S>: New fields.
(PACKET_vContSupported): New enum.
(remote_protocol_features): New element for vContSupported.
(remote_query_supported): Append "vContSupported+".
(remote_vcont_probe): Remove support_s and support_S, use
rs->supports_vCont.s and rs->supports_vCont.S instead. Disable
vCont packet if c and C actions are not supported.
(remote_can_do_single_step): New function.
(init_remote_ops): Install it to to_can_do_single_step.
(_initialize_remote): Call add_packet_config_cmd.
* target.h (struct target_ops) <to_can_do_single_step>: New field.
(target_can_do_single_step): New macro.
* target-delegates.c: Re-generated.
gdb/gdbserver:
2015-09-15 Yao Qi <yao.qi@linaro.org>
* server.c (vCont_supported): New global variable.
(handle_query): Set vCont_supported to 1 if "vContSupported+"
matches. Append ";vContSupported+" to own_buf.
(handle_v_requests): Append ";s;S" to own_buf if target supports
hardware single step or vCont_supported is false.
(capture_main): Set vCont_supported to zero.
gdb/doc:
2015-09-15 Yao Qi <yao.qi@linaro.org>
* gdb.texinfo (General Query Packets): Add vContSupported to
tables of 'gdbfeatures' and 'stub features' supported in the
qSupported packet, as well as to the list containing stub
feature details.
2015-09-15 15:09:18 +02:00
|
|
|
|
/* Implement the "to_can_do_single_step" target_ops method. */
|
|
|
|
|
|
|
|
|
|
static int
|
|
|
|
|
aarch64_linux_can_do_single_step (struct target_ops *target)
|
|
|
|
|
{
|
|
|
|
|
return 1;
|
|
|
|
|
}
|
|
|
|
|
|
2013-02-08 10:00:35 +01:00
|
|
|
|
/* Define AArch64 maintenance commands. */
|
|
|
|
|
|
|
|
|
|
static void
|
|
|
|
|
add_show_debug_regs_command (void)
|
|
|
|
|
{
|
|
|
|
|
/* A maintenance command to enable printing the internal DRi mirror
|
|
|
|
|
variables. */
|
|
|
|
|
add_setshow_boolean_cmd ("show-debug-regs", class_maintenance,
|
2014-09-11 12:19:56 +02:00
|
|
|
|
&show_debug_regs, _("\
|
2013-02-08 10:00:35 +01:00
|
|
|
|
Set whether to show variables that mirror the AArch64 debug registers."), _("\
|
|
|
|
|
Show whether to show variables that mirror the AArch64 debug registers."), _("\
|
|
|
|
|
Use \"on\" to enable, \"off\" to disable.\n\
|
|
|
|
|
If enabled, the debug registers values are shown when GDB inserts\n\
|
|
|
|
|
or removes a hardware breakpoint or watchpoint, and when the inferior\n\
|
|
|
|
|
triggers a breakpoint or watchpoint."),
|
|
|
|
|
NULL,
|
|
|
|
|
NULL,
|
|
|
|
|
&maintenance_set_cmdlist,
|
|
|
|
|
&maintenance_show_cmdlist);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
_initialize_aarch64_linux_nat (void)
|
|
|
|
|
{
|
|
|
|
|
struct target_ops *t;
|
|
|
|
|
|
|
|
|
|
/* Fill in the generic GNU/Linux methods. */
|
|
|
|
|
t = linux_target ();
|
|
|
|
|
|
|
|
|
|
add_show_debug_regs_command ();
|
|
|
|
|
|
|
|
|
|
/* Add our register access methods. */
|
|
|
|
|
t->to_fetch_registers = aarch64_linux_fetch_inferior_registers;
|
|
|
|
|
t->to_store_registers = aarch64_linux_store_inferior_registers;
|
|
|
|
|
|
|
|
|
|
t->to_read_description = aarch64_linux_read_description;
|
|
|
|
|
|
|
|
|
|
t->to_can_use_hw_breakpoint = aarch64_linux_can_use_hw_breakpoint;
|
|
|
|
|
t->to_insert_hw_breakpoint = aarch64_linux_insert_hw_breakpoint;
|
|
|
|
|
t->to_remove_hw_breakpoint = aarch64_linux_remove_hw_breakpoint;
|
|
|
|
|
t->to_region_ok_for_hw_watchpoint =
|
|
|
|
|
aarch64_linux_region_ok_for_hw_watchpoint;
|
|
|
|
|
t->to_insert_watchpoint = aarch64_linux_insert_watchpoint;
|
|
|
|
|
t->to_remove_watchpoint = aarch64_linux_remove_watchpoint;
|
|
|
|
|
t->to_stopped_by_watchpoint = aarch64_linux_stopped_by_watchpoint;
|
|
|
|
|
t->to_stopped_data_address = aarch64_linux_stopped_data_address;
|
|
|
|
|
t->to_watchpoint_addr_within_range =
|
|
|
|
|
aarch64_linux_watchpoint_addr_within_range;
|
Support single step by arch or target
Nowadays, GDB only knows whether architecture supports hardware single
step or software single step (through gdbarch hook software_single_step),
and for a given instruction or instruction sequence, GDB knows how to
do single step (hardware or software). However, GDB doesn't know whether
the target supports hardware single step. It is possible that the
architecture doesn't support hardware single step, such as arm, but
the target supports, such as simulator. This was discussed in this
thread https://www.sourceware.org/ml/gdb/2009-12/msg00033.html before.
I encounter this problem for aarch64 multi-arch support. When aarch64
debugs arm program, gdbarch is arm, so software single step is still
used. However, the underneath linux kernel does support hardware
single step, so IWBN to use it.
This patch is to add a new target_ops hook to_can_do_single_step, and
only use it in arm_linux_software_single_step to decide whether or not
to use hardware single step. On the native aarch64 linux target, 1 is
returned. On other targets, -1 is returned. On the remote target, if
the target supports s and S actions in the vCont? reply, then target
can do single step. However, old GDBserver will send s and S in the
reply to vCont?, which will confuse new GDB. For example, old GDBserver
on arm-linux will send s and S in the reply to vCont?, but it doesn't
support hardware single step. On the other hand, new GDBserver, on
arm-linux for example, will not send s and S in the reply to vCont?,
but old GDB thinks it doesn't support vCont packet at all. In order
to address this problem, I add a new qSupported feature vContSupported,
which indicates GDB wants to know the supported actions in the reply
to vCont?, and qSupported response contains vContSupported if the
stub is able tell supported vCont actions in the reply of vCont?.
If the patched GDB talks with patched GDBserver on x86, the RSP traffic
is like this:
-> $qSupported:...+;vContSupported+
<- ...+;vContSupported+
...
-> $vCont?
<- vCont;c;C;t;s;S;r
then, GDB knows the stub can do single step, and may stop using software
single step even the architecture doesn't support hardware single step.
If the patched GDB talks with patched GDBserver on arm, the last vCont?
reply will become:
<- vCont;c;C;t
GDB thinks the target doesn't support single step, so it will use software
single step.
If the patched GDB talks with unpatched GDBserver, the RSP traffic is like
this:
-> $qSupported:...+;vContSupported+
<- ...+
...
-> $vCont?
<- vCont;c;C;t;s;S;r
although GDBserver returns s and S, GDB still thinks GDBserver may not
support single step because it doesn't support vContSupported.
If the unpatched GDB talks with patched GDBserver on x86, the RSP traffic
is like:
-> $qSupported:...+;
<- ...+;vContSupported+
...
-> $vCont?
<- vCont;c;C;t;s;S;r
Since GDB doesn't sent vContSupported in the qSupported feature, GDBserver
sends s and S regardless of the support of hardware single step.
gdb:
2015-09-15 Yao Qi <yao.qi@linaro.org>
* aarch64-linux-nat.c (aarch64_linux_can_do_single_step): New
function.
(_initialize_aarch64_linux_nat): Install it to to_can_do_single_step.
* arm-linux-tdep.c (arm_linux_software_single_step): Return 0
if target_can_do_single_step returns 1.
* remote.c (struct vCont_action_support) <s, S>: New fields.
(PACKET_vContSupported): New enum.
(remote_protocol_features): New element for vContSupported.
(remote_query_supported): Append "vContSupported+".
(remote_vcont_probe): Remove support_s and support_S, use
rs->supports_vCont.s and rs->supports_vCont.S instead. Disable
vCont packet if c and C actions are not supported.
(remote_can_do_single_step): New function.
(init_remote_ops): Install it to to_can_do_single_step.
(_initialize_remote): Call add_packet_config_cmd.
* target.h (struct target_ops) <to_can_do_single_step>: New field.
(target_can_do_single_step): New macro.
* target-delegates.c: Re-generated.
gdb/gdbserver:
2015-09-15 Yao Qi <yao.qi@linaro.org>
* server.c (vCont_supported): New global variable.
(handle_query): Set vCont_supported to 1 if "vContSupported+"
matches. Append ";vContSupported+" to own_buf.
(handle_v_requests): Append ";s;S" to own_buf if target supports
hardware single step or vCont_supported is false.
(capture_main): Set vCont_supported to zero.
gdb/doc:
2015-09-15 Yao Qi <yao.qi@linaro.org>
* gdb.texinfo (General Query Packets): Add vContSupported to
tables of 'gdbfeatures' and 'stub features' supported in the
qSupported packet, as well as to the list containing stub
feature details.
2015-09-15 15:09:18 +02:00
|
|
|
|
t->to_can_do_single_step = aarch64_linux_can_do_single_step;
|
2013-02-08 10:00:35 +01:00
|
|
|
|
|
|
|
|
|
/* Override the GNU/Linux inferior startup hook. */
|
|
|
|
|
super_post_startup_inferior = t->to_post_startup_inferior;
|
|
|
|
|
t->to_post_startup_inferior = aarch64_linux_child_post_startup_inferior;
|
|
|
|
|
|
|
|
|
|
/* Register the target. */
|
|
|
|
|
linux_nat_add_target (t);
|
|
|
|
|
linux_nat_set_new_thread (t, aarch64_linux_new_thread);
|
lwp_info: Make the arch code free arch_lwp_info
I have the goal of "poisoning" the XNEW/xfree-family of functions, so
that we catch their usages with non-POD types. A few things need to be
fixed in the mean time, this is one.
The common lwp code in linux-nat.c and gdbserver/linux-low.c xfrees the
private lwp data of type arch_lwp_info. However, that type is opaque
from its point of view, as its defined differently in each arch-specific
implementation. This trips on the std::is_pod<T> check, since the
compiler can't tell whether the type is POD or not if it doesn't know
about it.
My initial patch [1] made a class hierarchy with a virtual destructor.
However, as Pedro pointed out, we only have one native architecture at
the time built in gdb and gdbserver, so that's overkill. Instead, we
can move the responsibility of free'ing arch_lwp_info to the arch code
(which is also the one that allocated it in the first place). This is
what this patch does.
Also, I had the concern that if we wanted to use C++ features in these
structures, we would have a problem with the one-definition rule.
However, since a build will only have one version of arch_lwp_info,
that's not a problem.
There are changes in arch-specific files, I was only able to built-test
this patch with the following cross-compilers:
aarch64-linux-gnu
alpha-linux-gnu
arm-linux-gnueabihf
hppa-linux-gnu
m68k-linux-gnu
mips64el-linux-gnuabi64
powerpc64-linux-gnu
s390x-linux-gnu
sh4-linux-gnu
sparc64-linux-gnu
x86_64-linux-gnu
x86_64-w64-mingw32
A buildbot run didn't find any regression.
[1] https://sourceware.org/ml/gdb-patches/2017-08/msg00255.html
gdb/ChangeLog:
* linux-nat.h (linux_nat_set_delete_thread): New declaration.
* linux-nat.c (linux_nat_delete_thread): New variable.
(lwp_free): Invoke linux_nat_delete_thread if set.
(linux_nat_set_delete_thread): New function.
* aarch64-linux-nat.c (_initialize_aarch64_linux_nat): Assign
thread delete callback.
* arm-linux-nat.c (arm_linux_delete_thread): New function.
(_initialize_arm_linux_nat): Assign thread delete callback.
* s390-linux-nat.c (s390_delete_thread): New function.
(_initialize_s390_nat): Assign thread delete callback.
* x86-linux-nat.c (x86_linux_add_target): Likewise.
* nat/aarch64-linux.c (aarch64_linux_delete_thread): New
function.
* nat/aarch64-linux.h (aarch64_linux_delete_thread): New
declaration.
* nat/x86-linux.c (x86_linux_delete_thread): New function.
* nat/x86-linux.h (x86_linux_delete_thread): New declaration.
gdb/gdbserver/ChangeLog:
* linux-aarch64-low.c (the_low_target): Add thread delete
callback.
* linux-arm-low.c (arm_delete_thread): New function.
(the_low_target): Add thread delete callback.
* linux-bfin-low.c (the_low_target): Likewise.
* linux-crisv32-low.c (the_low_target): Likewise.
* linux-low.c (delete_lwp): Invoke delete_thread callback if
set.
* linux-low.h (struct linux_target_ops) <delete_thread>: New
field.
* linux-m32r-low.c (the_low_target): Add thread delete callback.
* linux-mips-low.c (mips_linux_delete_thread): New function.
(the_low_target): Add thread delete callback.
* linux-ppc-low.c (the_low_target): Likewise.
* linux-s390-low.c (the_low_target): Likewise.
* linux-sh-low.c (the_low_target): Likewise.
* linux-tic6x-low.c (the_low_target): Likewise.
* linux-tile-low.c (the_low_target): Likewise.
* linux-x86-low.c (the_low_target): Likewise.
* linux-xtensa-low.c (the_low_target): Likewise.
2017-10-12 22:48:22 +02:00
|
|
|
|
linux_nat_set_delete_thread (t, aarch64_linux_delete_thread);
|
2013-02-14 14:50:30 +01:00
|
|
|
|
linux_nat_set_new_fork (t, aarch64_linux_new_fork);
|
|
|
|
|
linux_nat_set_forget_process (t, aarch64_forget_process);
|
2013-02-08 10:00:35 +01:00
|
|
|
|
linux_nat_set_prepare_to_resume (t, aarch64_linux_prepare_to_resume);
|
aarch64 multi-arch support (part 2): siginfo fixup
This patch is to fixup the siginfo_t when aarch64 gdb or gdbserver
read from or write to the arm inferior. It is to convert the
"struct siginfo_t" between aarch64 and arm, which is quite mechanical.
gdb/gdbserver:
2015-09-15 Yao Qi <yao.qi@linaro.org>
* linux-aarch64-low.c (aarch64_linux_siginfo_fixup): New
function.
(struct linux_target_ops the_low_target): Install
aarch64_linux_siginfo_fixup.
gdb:
2015-09-15 Yao Qi <yao.qi@linaro.org>
* aarch64-linux-nat.c (aarch64_linux_siginfo_fixup): New function.
(_initialize_aarch64_linux_nat): Call linux_nat_set_siginfo_fixup.
* nat/aarch64-linux.c (aarch64_compat_siginfo_from_siginfo):
New function.
(aarch64_siginfo_from_compat_siginfo): New function.
* nat/aarch64-linux.h: Include signal.h.
(compat_int_t, compat_uptr_t, compat_time_t): Typedef.
(compat_timer_t, compat_clock_t): Likewise.
(struct compat_timeval): New.
(union compat_sigval): New.
(struct compat_siginfo): New.
(cpt_si_pid, cpt_si_uid, cpt_si_timerid): New macros.
(cpt_si_overrun, cpt_si_status, cpt_si_utime): Likewise.
(cpt_si_stime, cpt_si_ptr, cpt_si_addr): Likewise.
(cpt_si_band, cpt_si_fd): Likewise.
2015-09-15 11:25:51 +02:00
|
|
|
|
|
|
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/* Add our siginfo layout converter. */
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linux_nat_set_siginfo_fixup (t, aarch64_linux_siginfo_fixup);
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2013-02-08 10:00:35 +01:00
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}
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