binutils-gdb/bfd/elfxx-aarch64.c

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[AArch64, ILP32] 4/6 Split elfnn-aarch64.c to elfxx-aarch64.c bfd/ * Makefile.am (BFD64_BACKENDS): Add elfxx-aarch64.c. (BFD64_BACKENDS_CFILES): Add elfxx-aarch64.lo. * Makefile.in: Re-generated. * configure.in (bfd_elf64_bigaarch64_vec): Add elfxx-aarch64.lo. (bfd_elf64_littleaarch64_vec): Likewise. (bfd_elf32_bigaarch64_vec): Likewise. (bfd_elf32_littleaarch64_vec): Likewise. * configure: Re-generated. * elfxx-aarch64.c: New file; split from elf64-aarch64.c. * elfxx-aarch64.h: New file. * elfnn-aarch64.c: Include "elfxx-aarch64.h"; move the following stuff to elfxx-aarch64.c. (bfd_elf_aarch64_put_addend): Removed. (PG_OFFSET, PG): Likewise. (elfNN_aarch64_small_plt0_entry): Support ELF32. (elfNN_aarch64_tlsdesc_small_plt_entry): Likewise. (elf64_aarch64_grok_prstatus): Removed. (elf_backend_grok_prstatus): Removed. (insn32): Likewise. (aarch64_unsigned_overflow): Likewise. (aarch64_signed_overflow): Likewise. (aarch64_resolve_relocation): Likewise. (MASK): Likewise. (decode_branch_ofs_26): Likewise. (decode_cond_branch_ofs_19): Likewise. (decode_ld_lit_ofs_19): Likewise. (decode_tst_branch_ofs_14): Likewise. (decode_movw_imm): Likewise. (decode_adr_imm): Likewise. (decode_add_imm): Likewise. (reencode_branch_ofs_26): Likewise. (reencode_cond_branch_ofs_19): Likewise. (reencode_ld_lit_ofs_19): Likewise. (reencode_tst_branch_ofs_14): Likewise. (reencode_movw_imm): Likewise. (reencode_adr_imm): Likewise. (reencode_ldst_pos_imm): Likewise. (reencode_add_imm): Likewise. (reencode_movzn_to_movz): Likewise. (reencode_movzn_to_movn): Likewise. (aarch64_relocate): Update to call the new function names in elfxx-aarch64.c. (aarch64_calculate_got_entry_vma): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elf64_aarch64_update_plt_entry): Likewise; change the type of the parameter 'r_type' to bfd_reloc_code_real_type; rename to ... (elf_aarch64_update_plt_entry): ... this. (elfNN_aarch64_create_small_pltn_entry): Update. (elfNN_aarch64_init_small_plt0_entry): Remove plt_got_base; add bfd_vma plt_got_2nd_ent; update to call elf_aarch64_update_plt_entry. (elfNN_aarch64_finish_dynamic_sections): Add plt_entry; update to call elf_aarch64_update_plt_entry.
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/* AArch64-specific support for ELF.
Copyright (C) 2009-2015 Free Software Foundation, Inc.
[AArch64, ILP32] 4/6 Split elfnn-aarch64.c to elfxx-aarch64.c bfd/ * Makefile.am (BFD64_BACKENDS): Add elfxx-aarch64.c. (BFD64_BACKENDS_CFILES): Add elfxx-aarch64.lo. * Makefile.in: Re-generated. * configure.in (bfd_elf64_bigaarch64_vec): Add elfxx-aarch64.lo. (bfd_elf64_littleaarch64_vec): Likewise. (bfd_elf32_bigaarch64_vec): Likewise. (bfd_elf32_littleaarch64_vec): Likewise. * configure: Re-generated. * elfxx-aarch64.c: New file; split from elf64-aarch64.c. * elfxx-aarch64.h: New file. * elfnn-aarch64.c: Include "elfxx-aarch64.h"; move the following stuff to elfxx-aarch64.c. (bfd_elf_aarch64_put_addend): Removed. (PG_OFFSET, PG): Likewise. (elfNN_aarch64_small_plt0_entry): Support ELF32. (elfNN_aarch64_tlsdesc_small_plt_entry): Likewise. (elf64_aarch64_grok_prstatus): Removed. (elf_backend_grok_prstatus): Removed. (insn32): Likewise. (aarch64_unsigned_overflow): Likewise. (aarch64_signed_overflow): Likewise. (aarch64_resolve_relocation): Likewise. (MASK): Likewise. (decode_branch_ofs_26): Likewise. (decode_cond_branch_ofs_19): Likewise. (decode_ld_lit_ofs_19): Likewise. (decode_tst_branch_ofs_14): Likewise. (decode_movw_imm): Likewise. (decode_adr_imm): Likewise. (decode_add_imm): Likewise. (reencode_branch_ofs_26): Likewise. (reencode_cond_branch_ofs_19): Likewise. (reencode_ld_lit_ofs_19): Likewise. (reencode_tst_branch_ofs_14): Likewise. (reencode_movw_imm): Likewise. (reencode_adr_imm): Likewise. (reencode_ldst_pos_imm): Likewise. (reencode_add_imm): Likewise. (reencode_movzn_to_movz): Likewise. (reencode_movzn_to_movn): Likewise. (aarch64_relocate): Update to call the new function names in elfxx-aarch64.c. (aarch64_calculate_got_entry_vma): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elf64_aarch64_update_plt_entry): Likewise; change the type of the parameter 'r_type' to bfd_reloc_code_real_type; rename to ... (elf_aarch64_update_plt_entry): ... this. (elfNN_aarch64_create_small_pltn_entry): Update. (elfNN_aarch64_init_small_plt0_entry): Remove plt_got_base; add bfd_vma plt_got_2nd_ent; update to call elf_aarch64_update_plt_entry. (elfNN_aarch64_finish_dynamic_sections): Add plt_entry; update to call elf_aarch64_update_plt_entry.
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Contributed by ARM Ltd.
This file is part of BFD, the Binary File Descriptor library.
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3 of the License, or
(at your option) any later version.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program; see the file COPYING3. If not,
see <http://www.gnu.org/licenses/>. */
#include "sysdep.h"
#include "elfxx-aarch64.h"
#include <stdarg.h>
#include <string.h>
[AArch64, ILP32] 4/6 Split elfnn-aarch64.c to elfxx-aarch64.c bfd/ * Makefile.am (BFD64_BACKENDS): Add elfxx-aarch64.c. (BFD64_BACKENDS_CFILES): Add elfxx-aarch64.lo. * Makefile.in: Re-generated. * configure.in (bfd_elf64_bigaarch64_vec): Add elfxx-aarch64.lo. (bfd_elf64_littleaarch64_vec): Likewise. (bfd_elf32_bigaarch64_vec): Likewise. (bfd_elf32_littleaarch64_vec): Likewise. * configure: Re-generated. * elfxx-aarch64.c: New file; split from elf64-aarch64.c. * elfxx-aarch64.h: New file. * elfnn-aarch64.c: Include "elfxx-aarch64.h"; move the following stuff to elfxx-aarch64.c. (bfd_elf_aarch64_put_addend): Removed. (PG_OFFSET, PG): Likewise. (elfNN_aarch64_small_plt0_entry): Support ELF32. (elfNN_aarch64_tlsdesc_small_plt_entry): Likewise. (elf64_aarch64_grok_prstatus): Removed. (elf_backend_grok_prstatus): Removed. (insn32): Likewise. (aarch64_unsigned_overflow): Likewise. (aarch64_signed_overflow): Likewise. (aarch64_resolve_relocation): Likewise. (MASK): Likewise. (decode_branch_ofs_26): Likewise. (decode_cond_branch_ofs_19): Likewise. (decode_ld_lit_ofs_19): Likewise. (decode_tst_branch_ofs_14): Likewise. (decode_movw_imm): Likewise. (decode_adr_imm): Likewise. (decode_add_imm): Likewise. (reencode_branch_ofs_26): Likewise. (reencode_cond_branch_ofs_19): Likewise. (reencode_ld_lit_ofs_19): Likewise. (reencode_tst_branch_ofs_14): Likewise. (reencode_movw_imm): Likewise. (reencode_adr_imm): Likewise. (reencode_ldst_pos_imm): Likewise. (reencode_add_imm): Likewise. (reencode_movzn_to_movz): Likewise. (reencode_movzn_to_movn): Likewise. (aarch64_relocate): Update to call the new function names in elfxx-aarch64.c. (aarch64_calculate_got_entry_vma): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elf64_aarch64_update_plt_entry): Likewise; change the type of the parameter 'r_type' to bfd_reloc_code_real_type; rename to ... (elf_aarch64_update_plt_entry): ... this. (elfNN_aarch64_create_small_pltn_entry): Update. (elfNN_aarch64_init_small_plt0_entry): Remove plt_got_base; add bfd_vma plt_got_2nd_ent; update to call elf_aarch64_update_plt_entry. (elfNN_aarch64_finish_dynamic_sections): Add plt_entry; update to call elf_aarch64_update_plt_entry.
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#define MASK(n) ((1u << (n)) - 1)
/* Sign-extend VALUE, which has the indicated number of BITS. */
bfd_signed_vma
_bfd_aarch64_sign_extend (bfd_vma value, int bits)
{
if (value & ((bfd_vma) 1 << (bits - 1)))
/* VALUE is negative. */
value |= ((bfd_vma) - 1) << bits;
return value;
}
/* Decode the IMM field of ADRP. */
uint32_t
_bfd_aarch64_decode_adrp_imm (uint32_t insn)
{
return (((insn >> 5) & MASK (19)) << 2) | ((insn >> 29) & MASK (2));
}
[AArch64, ILP32] 4/6 Split elfnn-aarch64.c to elfxx-aarch64.c bfd/ * Makefile.am (BFD64_BACKENDS): Add elfxx-aarch64.c. (BFD64_BACKENDS_CFILES): Add elfxx-aarch64.lo. * Makefile.in: Re-generated. * configure.in (bfd_elf64_bigaarch64_vec): Add elfxx-aarch64.lo. (bfd_elf64_littleaarch64_vec): Likewise. (bfd_elf32_bigaarch64_vec): Likewise. (bfd_elf32_littleaarch64_vec): Likewise. * configure: Re-generated. * elfxx-aarch64.c: New file; split from elf64-aarch64.c. * elfxx-aarch64.h: New file. * elfnn-aarch64.c: Include "elfxx-aarch64.h"; move the following stuff to elfxx-aarch64.c. (bfd_elf_aarch64_put_addend): Removed. (PG_OFFSET, PG): Likewise. (elfNN_aarch64_small_plt0_entry): Support ELF32. (elfNN_aarch64_tlsdesc_small_plt_entry): Likewise. (elf64_aarch64_grok_prstatus): Removed. (elf_backend_grok_prstatus): Removed. (insn32): Likewise. (aarch64_unsigned_overflow): Likewise. (aarch64_signed_overflow): Likewise. (aarch64_resolve_relocation): Likewise. (MASK): Likewise. (decode_branch_ofs_26): Likewise. (decode_cond_branch_ofs_19): Likewise. (decode_ld_lit_ofs_19): Likewise. (decode_tst_branch_ofs_14): Likewise. (decode_movw_imm): Likewise. (decode_adr_imm): Likewise. (decode_add_imm): Likewise. (reencode_branch_ofs_26): Likewise. (reencode_cond_branch_ofs_19): Likewise. (reencode_ld_lit_ofs_19): Likewise. (reencode_tst_branch_ofs_14): Likewise. (reencode_movw_imm): Likewise. (reencode_adr_imm): Likewise. (reencode_ldst_pos_imm): Likewise. (reencode_add_imm): Likewise. (reencode_movzn_to_movz): Likewise. (reencode_movzn_to_movn): Likewise. (aarch64_relocate): Update to call the new function names in elfxx-aarch64.c. (aarch64_calculate_got_entry_vma): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elf64_aarch64_update_plt_entry): Likewise; change the type of the parameter 'r_type' to bfd_reloc_code_real_type; rename to ... (elf_aarch64_update_plt_entry): ... this. (elfNN_aarch64_create_small_pltn_entry): Update. (elfNN_aarch64_init_small_plt0_entry): Remove plt_got_base; add bfd_vma plt_got_2nd_ent; update to call elf_aarch64_update_plt_entry. (elfNN_aarch64_finish_dynamic_sections): Add plt_entry; update to call elf_aarch64_update_plt_entry.
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/* Reencode the imm field of add immediate. */
static inline uint32_t
reencode_add_imm (uint32_t insn, uint32_t imm)
{
return (insn & ~(MASK (12) << 10)) | ((imm & MASK (12)) << 10);
}
/* Reencode the IMM field of ADR. */
uint32_t
_bfd_aarch64_reencode_adr_imm (uint32_t insn, uint32_t imm)
[AArch64, ILP32] 4/6 Split elfnn-aarch64.c to elfxx-aarch64.c bfd/ * Makefile.am (BFD64_BACKENDS): Add elfxx-aarch64.c. (BFD64_BACKENDS_CFILES): Add elfxx-aarch64.lo. * Makefile.in: Re-generated. * configure.in (bfd_elf64_bigaarch64_vec): Add elfxx-aarch64.lo. (bfd_elf64_littleaarch64_vec): Likewise. (bfd_elf32_bigaarch64_vec): Likewise. (bfd_elf32_littleaarch64_vec): Likewise. * configure: Re-generated. * elfxx-aarch64.c: New file; split from elf64-aarch64.c. * elfxx-aarch64.h: New file. * elfnn-aarch64.c: Include "elfxx-aarch64.h"; move the following stuff to elfxx-aarch64.c. (bfd_elf_aarch64_put_addend): Removed. (PG_OFFSET, PG): Likewise. (elfNN_aarch64_small_plt0_entry): Support ELF32. (elfNN_aarch64_tlsdesc_small_plt_entry): Likewise. (elf64_aarch64_grok_prstatus): Removed. (elf_backend_grok_prstatus): Removed. (insn32): Likewise. (aarch64_unsigned_overflow): Likewise. (aarch64_signed_overflow): Likewise. (aarch64_resolve_relocation): Likewise. (MASK): Likewise. (decode_branch_ofs_26): Likewise. (decode_cond_branch_ofs_19): Likewise. (decode_ld_lit_ofs_19): Likewise. (decode_tst_branch_ofs_14): Likewise. (decode_movw_imm): Likewise. (decode_adr_imm): Likewise. (decode_add_imm): Likewise. (reencode_branch_ofs_26): Likewise. (reencode_cond_branch_ofs_19): Likewise. (reencode_ld_lit_ofs_19): Likewise. (reencode_tst_branch_ofs_14): Likewise. (reencode_movw_imm): Likewise. (reencode_adr_imm): Likewise. (reencode_ldst_pos_imm): Likewise. (reencode_add_imm): Likewise. (reencode_movzn_to_movz): Likewise. (reencode_movzn_to_movn): Likewise. (aarch64_relocate): Update to call the new function names in elfxx-aarch64.c. (aarch64_calculate_got_entry_vma): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elf64_aarch64_update_plt_entry): Likewise; change the type of the parameter 'r_type' to bfd_reloc_code_real_type; rename to ... (elf_aarch64_update_plt_entry): ... this. (elfNN_aarch64_create_small_pltn_entry): Update. (elfNN_aarch64_init_small_plt0_entry): Remove plt_got_base; add bfd_vma plt_got_2nd_ent; update to call elf_aarch64_update_plt_entry. (elfNN_aarch64_finish_dynamic_sections): Add plt_entry; update to call elf_aarch64_update_plt_entry.
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{
return (insn & ~((MASK (2) << 29) | (MASK (19) << 5)))
| ((imm & MASK (2)) << 29) | ((imm & (MASK (19) << 2)) << 3);
}
/* Reencode the imm field of ld/st pos immediate. */
static inline uint32_t
reencode_ldst_pos_imm (uint32_t insn, uint32_t imm)
{
return (insn & ~(MASK (12) << 10)) | ((imm & MASK (12)) << 10);
}
/* Encode the 26-bit offset of unconditional branch. */
static inline uint32_t
reencode_branch_ofs_26 (uint32_t insn, uint32_t ofs)
{
return (insn & ~MASK (26)) | (ofs & MASK (26));
}
/* Encode the 19-bit offset of conditional branch and compare & branch. */
static inline uint32_t
reencode_cond_branch_ofs_19 (uint32_t insn, uint32_t ofs)
{
return (insn & ~(MASK (19) << 5)) | ((ofs & MASK (19)) << 5);
}
/* Decode the 19-bit offset of load literal. */
static inline uint32_t
reencode_ld_lit_ofs_19 (uint32_t insn, uint32_t ofs)
{
return (insn & ~(MASK (19) << 5)) | ((ofs & MASK (19)) << 5);
}
/* Encode the 14-bit offset of test & branch. */
static inline uint32_t
reencode_tst_branch_ofs_14 (uint32_t insn, uint32_t ofs)
{
return (insn & ~(MASK (14) << 5)) | ((ofs & MASK (14)) << 5);
}
/* Reencode the imm field of move wide. */
static inline uint32_t
reencode_movw_imm (uint32_t insn, uint32_t imm)
{
return (insn & ~(MASK (16) << 5)) | ((imm & MASK (16)) << 5);
}
/* Reencode mov[zn] to movz. */
static inline uint32_t
reencode_movzn_to_movz (uint32_t opcode)
{
return opcode | (1 << 30);
}
/* Reencode mov[zn] to movn. */
static inline uint32_t
reencode_movzn_to_movn (uint32_t opcode)
{
return opcode & ~(1 << 30);
}
/* Return non-zero if the indicated VALUE has overflowed the maximum
range expressible by a unsigned number with the indicated number of
BITS. */
static bfd_reloc_status_type
aarch64_unsigned_overflow (bfd_vma value, unsigned int bits)
{
bfd_vma lim;
if (bits >= sizeof (bfd_vma) * 8)
return bfd_reloc_ok;
lim = (bfd_vma) 1 << bits;
if (value >= lim)
return bfd_reloc_overflow;
return bfd_reloc_ok;
}
/* Return non-zero if the indicated VALUE has overflowed the maximum
range expressible by an signed number with the indicated number of
BITS. */
static bfd_reloc_status_type
aarch64_signed_overflow (bfd_vma value, unsigned int bits)
{
bfd_signed_vma svalue = (bfd_signed_vma) value;
bfd_signed_vma lim;
if (bits >= sizeof (bfd_vma) * 8)
return bfd_reloc_ok;
lim = (bfd_signed_vma) 1 << (bits - 1);
if (svalue < -lim || svalue >= lim)
return bfd_reloc_overflow;
return bfd_reloc_ok;
}
/* Insert the addend/value into the instruction or data object being
relocated. */
bfd_reloc_status_type
_bfd_aarch64_elf_put_addend (bfd *abfd,
bfd_byte *address, bfd_reloc_code_real_type r_type,
reloc_howto_type *howto, bfd_signed_vma addend)
{
bfd_reloc_status_type status = bfd_reloc_ok;
bfd_signed_vma old_addend = addend;
bfd_vma contents;
int size;
size = bfd_get_reloc_size (howto);
switch (size)
{
Fallout from recent bfd_reloc_outofrange changes Commit ec93045b and cd21f5da introduced a large number of tic4x and tic54x regressions, due to the new checks being wrong for targets with octets_per_byte != 1. To fix that I introduced a new bfd_get_section_limit_octets and performed the check on octets rather than byte adresses, reducing the number of bfd_octets_per_byte calls. bfd_octets_per_byte is rather expensive.. I then wondered why the same bfd_reloc_outofrange check added to bfd_perform_relocation wasn't also added to bfd_install_relocation. The two functions are virtually identical and ought to remain that way. However, adding the same check to bfd_install_relocation resulted in ld-elf "FAIL Link eh-group.o to eh-group" on many ELF targets, including x64_64-linux. The reason being that eh-group.o has NONE relocs at the end of a section, and most targets give NONE relocs a non-zero size. So if we are to keep the new outofrange check it appears that NONE relocs must have a zero size. * bfd-in.h (bfd_get_section_limit_octets): New define, extracted from.. (bfd_get_section_limit): ..here. * reloc.c (bfd_perform_relocation): Correct bfd_reloc_outofrange check. (bfd_install_relocation, _bfd_final_link_relocate): Add same check here. * elf32-sh.c (sh_elf_reloc): Correct bfd_reloc_outofrange check. * elf32-ppc.c (ppc_elf_addr16_ha_reloc): Remove duplicated bfd_reloc_outofrange check. * bfd-in2.h: Regenerate. * cpu-ns32k.c (_bfd_do_ns32k_reloc_contents): Return bfd_reloc_ok on zero size relocs. * ecoff.c (ecoff_reloc_link_order): Likewise. * elf32-nds32.c (nds32_relocate_contents): Likewise. * elfxx-aarch64.c (_bfd_aarch64_elf_put_addend): Likewise. * reloc.c (_bfd_relocate_contents): Don't bomb on zero size relocs. (_bfd_clear_contents): Likewise. * elfxx-mips.c (mips_elf_obtain_contents): Likewise. (mips_elf_perform_relocation): Likewise. * aoutx.h (aout_link_reloc_link_order): Allow for NULL return from malloc on zero size alloc. * cofflink.c (_bfd_coff_reloc_link_order): Likewise. * elflink.c (elf_reloc_link_order): Likewise. * linker.c (_bfd_generic_reloc_link_order): Likewise. * pdp11.c (aout_link_reloc_link_order): Likewise. * xcofflink.c (xcoff_reloc_link_order): Likewise. * aoutx.h (howto_table_ext): Ensure NONE relocs have size 3, bitsize 0, and complain_overflow_dont. * coff-sparc.c (coff_sparc_howto_table): Likewise. * elf-hppa.h (elf_hppa_howto_table): Likewise. * elf-m10200.c (elf_mn10200_howto_table): Likewise. * elf-m10300.c (elf_mn10300_howto_table): Likewise. * elf32-arc.c (elf_arc_howto_table): Likewise. * elf32-arm.c (elf32_arm_howto_table_1): Likewise. * elf32-avr.c (elf_avr_howto_table): Likewise. * elf32-bfin.c (bfin_howto_table): Likewise. * elf32-cr16.c (cr16_elf_howto_table): Likewise. * elf32-cris.c (cris_elf_howto_table): Likewise. * elf32-crx.c (crx_elf_howto_table): Likewise. * elf32-d10v.c (elf_d10v_howto_table): Likewise. * elf32-d30v.c (elf_d30v_howto_table): Likewise. * elf32-dlx.c (dlx_elf_howto_table): Likewise. * elf32-epiphany.c (epiphany_elf_howto_table): Likewise. * elf32-fr30.c (fr30_elf_howto_table): Likewise. * elf32-frv.c (elf32_frv_howto_table): Likewise. * elf32-h8300.c (h8_elf_howto_table): Likewise. * elf32-i370.c (i370_elf_howto_raw): Likewise. * elf32-i386.c (elf_howto_table): Likewise. * elf32-i860.c (elf32_i860_howto_table): Likewise. * elf32-i960.c (elf32_i960_relocate): Likewise. * elf32-ip2k.c (ip2k_elf_howto_table): Likewise. * elf32-iq2000.c (iq2000_elf_howto_table): Likewise. * elf32-lm32.c (lm32_elf_howto_table): Likewise. * elf32-m32c.c (m32c_elf_howto_table): Likewise. * elf32-m32r.c (m32r_elf_howto_table): Likewise. * elf32-m68hc11.c (elf_m68hc11_howto_table): Likewise. * elf32-m68hc12.c (elf_m68hc11_howto_table): Likewise. * elf32-m68k.c (howto_table): Likewise. * elf32-mcore.c (mcore_elf_howto_raw): Likewise. * elf32-mep.c (mep_elf_howto_table): Likewise. * elf32-metag.c (elf_metag_howto_table): Likewise. * elf32-microblaze.c (microblaze_elf_howto_raw): Likewise. * elf32-mips.c (elf_mips_howto_table_rel): Likewise. * elf32-moxie.c (moxie_elf_howto_table): Likewise. * elf32-msp430.c (elf_msp430_howto_table): Likewise. * elf32-mt.c (mt_elf_howto_table): Likewise. * elf32-nds32.c (nds32_elf_howto_table): Likewise. * elf32-nios2.c (elf_nios2_howto_table_rel): Likewise. * elf32-or1k.c (or1k_elf_howto_table): Likewise. * elf32-pj.c (pj_elf_howto_table): Likewise. * elf32-ppc.c (ppc_elf_howto_raw): Likewise. * elf32-rl78.c (rl78_elf_howto_table): Likewise. * elf32-rx.c (rx_elf_howto_table): Likewise. * elf32-s390.c (elf_howto_table): Likewise. * elf32-score.c (elf32_score_howto_table): Likewise. * elf32-score7.c (elf32_score_howto_table): Likewise. * elf32-sh-relocs.h (R_SH_NONE): Likewise. * elf32-spu.c (elf_howto_table): Likewise. * elf32-tic6x.c (elf32_tic6x_howto_table): Likewise. * elf32-tilepro.c (tilepro_elf_howto_table): Likewise. * elf32-v850.c (v850_elf_howto_table): Likewise. * elf32-vax.c (howto_table): Likewise. * elf32-visium.c (visium_elf_howto_table): Likewise. * elf32-xc16x.c (xc16x_elf_howto_table): Likewise. * elf32-xgate.c (elf_xgate_howto_table): Likewise. * elf32-xstormy16.c (xstormy16_elf_howto_table): Likewise. * elf32-xtensa.c (elf_howto_table): Likewise. * elf64-alpha.c (elf64_alpha_howto_table): Likewise. * elf64-mips.c (mips_elf64_howto_table_rel): Likewise. * elf64-mmix.c (elf_mmix_howto_table): Likewise. * elf64-ppc.c (ppc64_elf_howto_raw): Likewise. * elf64-s390.c (elf_howto_table): Likewise. * elf64-sh64.c (sh_elf64_howto_table): Likewise. * elf64-x86-64.c (x86_64_elf_howto_table): Likewise. * elfn32-mips.c (elf_mips_howto_table_rel): Likewise. * elfnn-aarch64.c (elfNN_aarch64_howto_table): Likewise. (elfNN_aarch64_howto_none): Likewise. * elfxx-ia64.c (ia64_howto_table): Likewise. * elfxx-sparc.c (_bfd_sparc_elf_howto_table): Likewise. * elfxx-tilegx.c (tilegx_elf_howto_table): Likewise. * nlm32-sparc.c (nlm32_sparc_howto_table): Likewise.
2015-01-19 01:06:26 +01:00
case 0:
return status;
[AArch64, ILP32] 4/6 Split elfnn-aarch64.c to elfxx-aarch64.c bfd/ * Makefile.am (BFD64_BACKENDS): Add elfxx-aarch64.c. (BFD64_BACKENDS_CFILES): Add elfxx-aarch64.lo. * Makefile.in: Re-generated. * configure.in (bfd_elf64_bigaarch64_vec): Add elfxx-aarch64.lo. (bfd_elf64_littleaarch64_vec): Likewise. (bfd_elf32_bigaarch64_vec): Likewise. (bfd_elf32_littleaarch64_vec): Likewise. * configure: Re-generated. * elfxx-aarch64.c: New file; split from elf64-aarch64.c. * elfxx-aarch64.h: New file. * elfnn-aarch64.c: Include "elfxx-aarch64.h"; move the following stuff to elfxx-aarch64.c. (bfd_elf_aarch64_put_addend): Removed. (PG_OFFSET, PG): Likewise. (elfNN_aarch64_small_plt0_entry): Support ELF32. (elfNN_aarch64_tlsdesc_small_plt_entry): Likewise. (elf64_aarch64_grok_prstatus): Removed. (elf_backend_grok_prstatus): Removed. (insn32): Likewise. (aarch64_unsigned_overflow): Likewise. (aarch64_signed_overflow): Likewise. (aarch64_resolve_relocation): Likewise. (MASK): Likewise. (decode_branch_ofs_26): Likewise. (decode_cond_branch_ofs_19): Likewise. (decode_ld_lit_ofs_19): Likewise. (decode_tst_branch_ofs_14): Likewise. (decode_movw_imm): Likewise. (decode_adr_imm): Likewise. (decode_add_imm): Likewise. (reencode_branch_ofs_26): Likewise. (reencode_cond_branch_ofs_19): Likewise. (reencode_ld_lit_ofs_19): Likewise. (reencode_tst_branch_ofs_14): Likewise. (reencode_movw_imm): Likewise. (reencode_adr_imm): Likewise. (reencode_ldst_pos_imm): Likewise. (reencode_add_imm): Likewise. (reencode_movzn_to_movz): Likewise. (reencode_movzn_to_movn): Likewise. (aarch64_relocate): Update to call the new function names in elfxx-aarch64.c. (aarch64_calculate_got_entry_vma): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elf64_aarch64_update_plt_entry): Likewise; change the type of the parameter 'r_type' to bfd_reloc_code_real_type; rename to ... (elf_aarch64_update_plt_entry): ... this. (elfNN_aarch64_create_small_pltn_entry): Update. (elfNN_aarch64_init_small_plt0_entry): Remove plt_got_base; add bfd_vma plt_got_2nd_ent; update to call elf_aarch64_update_plt_entry. (elfNN_aarch64_finish_dynamic_sections): Add plt_entry; update to call elf_aarch64_update_plt_entry.
2013-06-26 12:49:29 +02:00
case 2:
contents = bfd_get_16 (abfd, address);
break;
case 4:
if (howto->src_mask != 0xffffffff)
/* Must be 32-bit instruction, always little-endian. */
contents = bfd_getl32 (address);
else
/* Must be 32-bit data (endianness dependent). */
contents = bfd_get_32 (abfd, address);
break;
case 8:
contents = bfd_get_64 (abfd, address);
break;
default:
abort ();
}
switch (howto->complain_on_overflow)
{
case complain_overflow_dont:
break;
case complain_overflow_signed:
status = aarch64_signed_overflow (addend,
howto->bitsize + howto->rightshift);
break;
case complain_overflow_unsigned:
status = aarch64_unsigned_overflow (addend,
howto->bitsize + howto->rightshift);
break;
case complain_overflow_bitfield:
default:
abort ();
}
addend >>= howto->rightshift;
switch (r_type)
{
case BFD_RELOC_AARCH64_CALL26:
case BFD_RELOC_AARCH64_JUMP26:
[AArch64, ILP32] 4/6 Split elfnn-aarch64.c to elfxx-aarch64.c bfd/ * Makefile.am (BFD64_BACKENDS): Add elfxx-aarch64.c. (BFD64_BACKENDS_CFILES): Add elfxx-aarch64.lo. * Makefile.in: Re-generated. * configure.in (bfd_elf64_bigaarch64_vec): Add elfxx-aarch64.lo. (bfd_elf64_littleaarch64_vec): Likewise. (bfd_elf32_bigaarch64_vec): Likewise. (bfd_elf32_littleaarch64_vec): Likewise. * configure: Re-generated. * elfxx-aarch64.c: New file; split from elf64-aarch64.c. * elfxx-aarch64.h: New file. * elfnn-aarch64.c: Include "elfxx-aarch64.h"; move the following stuff to elfxx-aarch64.c. (bfd_elf_aarch64_put_addend): Removed. (PG_OFFSET, PG): Likewise. (elfNN_aarch64_small_plt0_entry): Support ELF32. (elfNN_aarch64_tlsdesc_small_plt_entry): Likewise. (elf64_aarch64_grok_prstatus): Removed. (elf_backend_grok_prstatus): Removed. (insn32): Likewise. (aarch64_unsigned_overflow): Likewise. (aarch64_signed_overflow): Likewise. (aarch64_resolve_relocation): Likewise. (MASK): Likewise. (decode_branch_ofs_26): Likewise. (decode_cond_branch_ofs_19): Likewise. (decode_ld_lit_ofs_19): Likewise. (decode_tst_branch_ofs_14): Likewise. (decode_movw_imm): Likewise. (decode_adr_imm): Likewise. (decode_add_imm): Likewise. (reencode_branch_ofs_26): Likewise. (reencode_cond_branch_ofs_19): Likewise. (reencode_ld_lit_ofs_19): Likewise. (reencode_tst_branch_ofs_14): Likewise. (reencode_movw_imm): Likewise. (reencode_adr_imm): Likewise. (reencode_ldst_pos_imm): Likewise. (reencode_add_imm): Likewise. (reencode_movzn_to_movz): Likewise. (reencode_movzn_to_movn): Likewise. (aarch64_relocate): Update to call the new function names in elfxx-aarch64.c. (aarch64_calculate_got_entry_vma): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elf64_aarch64_update_plt_entry): Likewise; change the type of the parameter 'r_type' to bfd_reloc_code_real_type; rename to ... (elf_aarch64_update_plt_entry): ... this. (elfNN_aarch64_create_small_pltn_entry): Update. (elfNN_aarch64_init_small_plt0_entry): Remove plt_got_base; add bfd_vma plt_got_2nd_ent; update to call elf_aarch64_update_plt_entry. (elfNN_aarch64_finish_dynamic_sections): Add plt_entry; update to call elf_aarch64_update_plt_entry.
2013-06-26 12:49:29 +02:00
contents = reencode_branch_ofs_26 (contents, addend);
break;
case BFD_RELOC_AARCH64_BRANCH19:
contents = reencode_cond_branch_ofs_19 (contents, addend);
break;
case BFD_RELOC_AARCH64_TSTBR14:
contents = reencode_tst_branch_ofs_14 (contents, addend);
break;
case BFD_RELOC_AARCH64_GOT_LD_PREL19:
case BFD_RELOC_AARCH64_LD_LO19_PCREL:
case BFD_RELOC_AARCH64_TLSDESC_LD_PREL19:
case BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_PREL19:
[AArch64, ILP32] 4/6 Split elfnn-aarch64.c to elfxx-aarch64.c bfd/ * Makefile.am (BFD64_BACKENDS): Add elfxx-aarch64.c. (BFD64_BACKENDS_CFILES): Add elfxx-aarch64.lo. * Makefile.in: Re-generated. * configure.in (bfd_elf64_bigaarch64_vec): Add elfxx-aarch64.lo. (bfd_elf64_littleaarch64_vec): Likewise. (bfd_elf32_bigaarch64_vec): Likewise. (bfd_elf32_littleaarch64_vec): Likewise. * configure: Re-generated. * elfxx-aarch64.c: New file; split from elf64-aarch64.c. * elfxx-aarch64.h: New file. * elfnn-aarch64.c: Include "elfxx-aarch64.h"; move the following stuff to elfxx-aarch64.c. (bfd_elf_aarch64_put_addend): Removed. (PG_OFFSET, PG): Likewise. (elfNN_aarch64_small_plt0_entry): Support ELF32. (elfNN_aarch64_tlsdesc_small_plt_entry): Likewise. (elf64_aarch64_grok_prstatus): Removed. (elf_backend_grok_prstatus): Removed. (insn32): Likewise. (aarch64_unsigned_overflow): Likewise. (aarch64_signed_overflow): Likewise. (aarch64_resolve_relocation): Likewise. (MASK): Likewise. (decode_branch_ofs_26): Likewise. (decode_cond_branch_ofs_19): Likewise. (decode_ld_lit_ofs_19): Likewise. (decode_tst_branch_ofs_14): Likewise. (decode_movw_imm): Likewise. (decode_adr_imm): Likewise. (decode_add_imm): Likewise. (reencode_branch_ofs_26): Likewise. (reencode_cond_branch_ofs_19): Likewise. (reencode_ld_lit_ofs_19): Likewise. (reencode_tst_branch_ofs_14): Likewise. (reencode_movw_imm): Likewise. (reencode_adr_imm): Likewise. (reencode_ldst_pos_imm): Likewise. (reencode_add_imm): Likewise. (reencode_movzn_to_movz): Likewise. (reencode_movzn_to_movn): Likewise. (aarch64_relocate): Update to call the new function names in elfxx-aarch64.c. (aarch64_calculate_got_entry_vma): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elf64_aarch64_update_plt_entry): Likewise; change the type of the parameter 'r_type' to bfd_reloc_code_real_type; rename to ... (elf_aarch64_update_plt_entry): ... this. (elfNN_aarch64_create_small_pltn_entry): Update. (elfNN_aarch64_init_small_plt0_entry): Remove plt_got_base; add bfd_vma plt_got_2nd_ent; update to call elf_aarch64_update_plt_entry. (elfNN_aarch64_finish_dynamic_sections): Add plt_entry; update to call elf_aarch64_update_plt_entry.
2013-06-26 12:49:29 +02:00
if (old_addend & ((1 << howto->rightshift) - 1))
return bfd_reloc_overflow;
contents = reencode_ld_lit_ofs_19 (contents, addend);
break;
case BFD_RELOC_AARCH64_TLSDESC_CALL:
break;
case BFD_RELOC_AARCH64_ADR_GOT_PAGE:
case BFD_RELOC_AARCH64_ADR_HI21_NC_PCREL:
case BFD_RELOC_AARCH64_ADR_HI21_PCREL:
case BFD_RELOC_AARCH64_ADR_LO21_PCREL:
case BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE21:
case BFD_RELOC_AARCH64_TLSDESC_ADR_PREL21:
[AArch64, ILP32] 4/6 Split elfnn-aarch64.c to elfxx-aarch64.c bfd/ * Makefile.am (BFD64_BACKENDS): Add elfxx-aarch64.c. (BFD64_BACKENDS_CFILES): Add elfxx-aarch64.lo. * Makefile.in: Re-generated. * configure.in (bfd_elf64_bigaarch64_vec): Add elfxx-aarch64.lo. (bfd_elf64_littleaarch64_vec): Likewise. (bfd_elf32_bigaarch64_vec): Likewise. (bfd_elf32_littleaarch64_vec): Likewise. * configure: Re-generated. * elfxx-aarch64.c: New file; split from elf64-aarch64.c. * elfxx-aarch64.h: New file. * elfnn-aarch64.c: Include "elfxx-aarch64.h"; move the following stuff to elfxx-aarch64.c. (bfd_elf_aarch64_put_addend): Removed. (PG_OFFSET, PG): Likewise. (elfNN_aarch64_small_plt0_entry): Support ELF32. (elfNN_aarch64_tlsdesc_small_plt_entry): Likewise. (elf64_aarch64_grok_prstatus): Removed. (elf_backend_grok_prstatus): Removed. (insn32): Likewise. (aarch64_unsigned_overflow): Likewise. (aarch64_signed_overflow): Likewise. (aarch64_resolve_relocation): Likewise. (MASK): Likewise. (decode_branch_ofs_26): Likewise. (decode_cond_branch_ofs_19): Likewise. (decode_ld_lit_ofs_19): Likewise. (decode_tst_branch_ofs_14): Likewise. (decode_movw_imm): Likewise. (decode_adr_imm): Likewise. (decode_add_imm): Likewise. (reencode_branch_ofs_26): Likewise. (reencode_cond_branch_ofs_19): Likewise. (reencode_ld_lit_ofs_19): Likewise. (reencode_tst_branch_ofs_14): Likewise. (reencode_movw_imm): Likewise. (reencode_adr_imm): Likewise. (reencode_ldst_pos_imm): Likewise. (reencode_add_imm): Likewise. (reencode_movzn_to_movz): Likewise. (reencode_movzn_to_movn): Likewise. (aarch64_relocate): Update to call the new function names in elfxx-aarch64.c. (aarch64_calculate_got_entry_vma): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elf64_aarch64_update_plt_entry): Likewise; change the type of the parameter 'r_type' to bfd_reloc_code_real_type; rename to ... (elf_aarch64_update_plt_entry): ... this. (elfNN_aarch64_create_small_pltn_entry): Update. (elfNN_aarch64_init_small_plt0_entry): Remove plt_got_base; add bfd_vma plt_got_2nd_ent; update to call elf_aarch64_update_plt_entry. (elfNN_aarch64_finish_dynamic_sections): Add plt_entry; update to call elf_aarch64_update_plt_entry.
2013-06-26 12:49:29 +02:00
case BFD_RELOC_AARCH64_TLSGD_ADR_PAGE21:
case BFD_RELOC_AARCH64_TLSGD_ADR_PREL21:
[AArch64, ILP32] 4/6 Split elfnn-aarch64.c to elfxx-aarch64.c bfd/ * Makefile.am (BFD64_BACKENDS): Add elfxx-aarch64.c. (BFD64_BACKENDS_CFILES): Add elfxx-aarch64.lo. * Makefile.in: Re-generated. * configure.in (bfd_elf64_bigaarch64_vec): Add elfxx-aarch64.lo. (bfd_elf64_littleaarch64_vec): Likewise. (bfd_elf32_bigaarch64_vec): Likewise. (bfd_elf32_littleaarch64_vec): Likewise. * configure: Re-generated. * elfxx-aarch64.c: New file; split from elf64-aarch64.c. * elfxx-aarch64.h: New file. * elfnn-aarch64.c: Include "elfxx-aarch64.h"; move the following stuff to elfxx-aarch64.c. (bfd_elf_aarch64_put_addend): Removed. (PG_OFFSET, PG): Likewise. (elfNN_aarch64_small_plt0_entry): Support ELF32. (elfNN_aarch64_tlsdesc_small_plt_entry): Likewise. (elf64_aarch64_grok_prstatus): Removed. (elf_backend_grok_prstatus): Removed. (insn32): Likewise. (aarch64_unsigned_overflow): Likewise. (aarch64_signed_overflow): Likewise. (aarch64_resolve_relocation): Likewise. (MASK): Likewise. (decode_branch_ofs_26): Likewise. (decode_cond_branch_ofs_19): Likewise. (decode_ld_lit_ofs_19): Likewise. (decode_tst_branch_ofs_14): Likewise. (decode_movw_imm): Likewise. (decode_adr_imm): Likewise. (decode_add_imm): Likewise. (reencode_branch_ofs_26): Likewise. (reencode_cond_branch_ofs_19): Likewise. (reencode_ld_lit_ofs_19): Likewise. (reencode_tst_branch_ofs_14): Likewise. (reencode_movw_imm): Likewise. (reencode_adr_imm): Likewise. (reencode_ldst_pos_imm): Likewise. (reencode_add_imm): Likewise. (reencode_movzn_to_movz): Likewise. (reencode_movzn_to_movn): Likewise. (aarch64_relocate): Update to call the new function names in elfxx-aarch64.c. (aarch64_calculate_got_entry_vma): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elf64_aarch64_update_plt_entry): Likewise; change the type of the parameter 'r_type' to bfd_reloc_code_real_type; rename to ... (elf_aarch64_update_plt_entry): ... this. (elfNN_aarch64_create_small_pltn_entry): Update. (elfNN_aarch64_init_small_plt0_entry): Remove plt_got_base; add bfd_vma plt_got_2nd_ent; update to call elf_aarch64_update_plt_entry. (elfNN_aarch64_finish_dynamic_sections): Add plt_entry; update to call elf_aarch64_update_plt_entry.
2013-06-26 12:49:29 +02:00
case BFD_RELOC_AARCH64_TLSIE_ADR_GOTTPREL_PAGE21:
case BFD_RELOC_AARCH64_TLSLD_ADR_PAGE21:
case BFD_RELOC_AARCH64_TLSLD_ADR_PREL21:
contents = _bfd_aarch64_reencode_adr_imm (contents, addend);
[AArch64, ILP32] 4/6 Split elfnn-aarch64.c to elfxx-aarch64.c bfd/ * Makefile.am (BFD64_BACKENDS): Add elfxx-aarch64.c. (BFD64_BACKENDS_CFILES): Add elfxx-aarch64.lo. * Makefile.in: Re-generated. * configure.in (bfd_elf64_bigaarch64_vec): Add elfxx-aarch64.lo. (bfd_elf64_littleaarch64_vec): Likewise. (bfd_elf32_bigaarch64_vec): Likewise. (bfd_elf32_littleaarch64_vec): Likewise. * configure: Re-generated. * elfxx-aarch64.c: New file; split from elf64-aarch64.c. * elfxx-aarch64.h: New file. * elfnn-aarch64.c: Include "elfxx-aarch64.h"; move the following stuff to elfxx-aarch64.c. (bfd_elf_aarch64_put_addend): Removed. (PG_OFFSET, PG): Likewise. (elfNN_aarch64_small_plt0_entry): Support ELF32. (elfNN_aarch64_tlsdesc_small_plt_entry): Likewise. (elf64_aarch64_grok_prstatus): Removed. (elf_backend_grok_prstatus): Removed. (insn32): Likewise. (aarch64_unsigned_overflow): Likewise. (aarch64_signed_overflow): Likewise. (aarch64_resolve_relocation): Likewise. (MASK): Likewise. (decode_branch_ofs_26): Likewise. (decode_cond_branch_ofs_19): Likewise. (decode_ld_lit_ofs_19): Likewise. (decode_tst_branch_ofs_14): Likewise. (decode_movw_imm): Likewise. (decode_adr_imm): Likewise. (decode_add_imm): Likewise. (reencode_branch_ofs_26): Likewise. (reencode_cond_branch_ofs_19): Likewise. (reencode_ld_lit_ofs_19): Likewise. (reencode_tst_branch_ofs_14): Likewise. (reencode_movw_imm): Likewise. (reencode_adr_imm): Likewise. (reencode_ldst_pos_imm): Likewise. (reencode_add_imm): Likewise. (reencode_movzn_to_movz): Likewise. (reencode_movzn_to_movn): Likewise. (aarch64_relocate): Update to call the new function names in elfxx-aarch64.c. (aarch64_calculate_got_entry_vma): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elf64_aarch64_update_plt_entry): Likewise; change the type of the parameter 'r_type' to bfd_reloc_code_real_type; rename to ... (elf_aarch64_update_plt_entry): ... this. (elfNN_aarch64_create_small_pltn_entry): Update. (elfNN_aarch64_init_small_plt0_entry): Remove plt_got_base; add bfd_vma plt_got_2nd_ent; update to call elf_aarch64_update_plt_entry. (elfNN_aarch64_finish_dynamic_sections): Add plt_entry; update to call elf_aarch64_update_plt_entry.
2013-06-26 12:49:29 +02:00
break;
case BFD_RELOC_AARCH64_ADD_LO12:
case BFD_RELOC_AARCH64_TLSDESC_ADD_LO12_NC:
[AArch64, ILP32] 4/6 Split elfnn-aarch64.c to elfxx-aarch64.c bfd/ * Makefile.am (BFD64_BACKENDS): Add elfxx-aarch64.c. (BFD64_BACKENDS_CFILES): Add elfxx-aarch64.lo. * Makefile.in: Re-generated. * configure.in (bfd_elf64_bigaarch64_vec): Add elfxx-aarch64.lo. (bfd_elf64_littleaarch64_vec): Likewise. (bfd_elf32_bigaarch64_vec): Likewise. (bfd_elf32_littleaarch64_vec): Likewise. * configure: Re-generated. * elfxx-aarch64.c: New file; split from elf64-aarch64.c. * elfxx-aarch64.h: New file. * elfnn-aarch64.c: Include "elfxx-aarch64.h"; move the following stuff to elfxx-aarch64.c. (bfd_elf_aarch64_put_addend): Removed. (PG_OFFSET, PG): Likewise. (elfNN_aarch64_small_plt0_entry): Support ELF32. (elfNN_aarch64_tlsdesc_small_plt_entry): Likewise. (elf64_aarch64_grok_prstatus): Removed. (elf_backend_grok_prstatus): Removed. (insn32): Likewise. (aarch64_unsigned_overflow): Likewise. (aarch64_signed_overflow): Likewise. (aarch64_resolve_relocation): Likewise. (MASK): Likewise. (decode_branch_ofs_26): Likewise. (decode_cond_branch_ofs_19): Likewise. (decode_ld_lit_ofs_19): Likewise. (decode_tst_branch_ofs_14): Likewise. (decode_movw_imm): Likewise. (decode_adr_imm): Likewise. (decode_add_imm): Likewise. (reencode_branch_ofs_26): Likewise. (reencode_cond_branch_ofs_19): Likewise. (reencode_ld_lit_ofs_19): Likewise. (reencode_tst_branch_ofs_14): Likewise. (reencode_movw_imm): Likewise. (reencode_adr_imm): Likewise. (reencode_ldst_pos_imm): Likewise. (reencode_add_imm): Likewise. (reencode_movzn_to_movz): Likewise. (reencode_movzn_to_movn): Likewise. (aarch64_relocate): Update to call the new function names in elfxx-aarch64.c. (aarch64_calculate_got_entry_vma): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elf64_aarch64_update_plt_entry): Likewise; change the type of the parameter 'r_type' to bfd_reloc_code_real_type; rename to ... (elf_aarch64_update_plt_entry): ... this. (elfNN_aarch64_create_small_pltn_entry): Update. (elfNN_aarch64_init_small_plt0_entry): Remove plt_got_base; add bfd_vma plt_got_2nd_ent; update to call elf_aarch64_update_plt_entry. (elfNN_aarch64_finish_dynamic_sections): Add plt_entry; update to call elf_aarch64_update_plt_entry.
2013-06-26 12:49:29 +02:00
case BFD_RELOC_AARCH64_TLSGD_ADD_LO12_NC:
[AArch64][4/6] LD support TLSLD move/add relocation types 2015-08-19 Jiong Wang <jiong.wang@arm.com> bfd/ PR ld/18276 * elfnn-aarch64.c (IS_AARCH64_TLS_RELOC): Recognize new relocation types, including BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_HI12, BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G0, BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G0_NC, BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G1, BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G1_NC, BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G2. (elfNN_aarch64_final_link_relocate): Likewise. * elfxx-aarch64.c (_bfd_aarch64_elf_put_addend): Likewise. (_bfd_aarch64_elf_resolve_relocation): Likewise. ld/testsuite/ * ld-aarch64/emit-relocs-87.s: New testcase. * ld-aarch64/emit-relocs-88.s: Likewise. * ld-aarch64/emit-relocs-88-overflow.s: Likewise. * ld-aarch64/emit-relocs-89.s: Likewise. * ld-aarch64/emit-relocs-90.s: Likewise. * ld-aarch64/emit-relocs-90-overflow.s: Likewise. * ld-aarch64/emit-relocs-523.s: Likewise. * ld-aarch64/emit-relocs-524.s: Likewise. * ld-aarch64/emit-relocs-525.s: Likewise. * ld-aarch64/emit-relocs-527.s: Likewise. * ld-aarch64/emit-relocs-526.s: Likewise. * ld-aarch64/emit-relocs-528.s: Likewise. * ld-aarch64/emit-relocs-528-overflow.s: Likewise. * ld-aarch64/emit-relocs-87.d: New expectation file. * ld-aarch64/emit-relocs-88.d: Likewise. * ld-aarch64/emit-relocs-88-overflow.d: Likewise. * ld-aarch64/emit-relocs-89.d: Likewise. * ld-aarch64/emit-relocs-90.d: Likewise. * ld-aarch64/emit-relocs-90-overflow.d: Likewise. * ld-aarch64/emit-relocs-91.d: Likewise. * ld-aarch64/emit-relocs-523.d: Likewise. * ld-aarch64/emit-relocs-524.d: Likewise. * ld-aarch64/emit-relocs-525.d: Likewise. * ld-aarch64/emit-relocs-526.d: Likewise. * ld-aarch64/emit-relocs-527.d: Likewise. * ld-aarch64/emit-relocs-528.d: Likewise. * ld-aarch64/emit-relocs-528-overflow.d: Likewise. * ld-aarch64/aarch64-elf.exp: Run new testcases.
2015-08-19 12:18:25 +02:00
case BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_HI12:
case BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12:
case BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12_NC:
case BFD_RELOC_AARCH64_TLSLD_ADD_LO12_NC:
[AArch64, ILP32] 4/6 Split elfnn-aarch64.c to elfxx-aarch64.c bfd/ * Makefile.am (BFD64_BACKENDS): Add elfxx-aarch64.c. (BFD64_BACKENDS_CFILES): Add elfxx-aarch64.lo. * Makefile.in: Re-generated. * configure.in (bfd_elf64_bigaarch64_vec): Add elfxx-aarch64.lo. (bfd_elf64_littleaarch64_vec): Likewise. (bfd_elf32_bigaarch64_vec): Likewise. (bfd_elf32_littleaarch64_vec): Likewise. * configure: Re-generated. * elfxx-aarch64.c: New file; split from elf64-aarch64.c. * elfxx-aarch64.h: New file. * elfnn-aarch64.c: Include "elfxx-aarch64.h"; move the following stuff to elfxx-aarch64.c. (bfd_elf_aarch64_put_addend): Removed. (PG_OFFSET, PG): Likewise. (elfNN_aarch64_small_plt0_entry): Support ELF32. (elfNN_aarch64_tlsdesc_small_plt_entry): Likewise. (elf64_aarch64_grok_prstatus): Removed. (elf_backend_grok_prstatus): Removed. (insn32): Likewise. (aarch64_unsigned_overflow): Likewise. (aarch64_signed_overflow): Likewise. (aarch64_resolve_relocation): Likewise. (MASK): Likewise. (decode_branch_ofs_26): Likewise. (decode_cond_branch_ofs_19): Likewise. (decode_ld_lit_ofs_19): Likewise. (decode_tst_branch_ofs_14): Likewise. (decode_movw_imm): Likewise. (decode_adr_imm): Likewise. (decode_add_imm): Likewise. (reencode_branch_ofs_26): Likewise. (reencode_cond_branch_ofs_19): Likewise. (reencode_ld_lit_ofs_19): Likewise. (reencode_tst_branch_ofs_14): Likewise. (reencode_movw_imm): Likewise. (reencode_adr_imm): Likewise. (reencode_ldst_pos_imm): Likewise. (reencode_add_imm): Likewise. (reencode_movzn_to_movz): Likewise. (reencode_movzn_to_movn): Likewise. (aarch64_relocate): Update to call the new function names in elfxx-aarch64.c. (aarch64_calculate_got_entry_vma): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elf64_aarch64_update_plt_entry): Likewise; change the type of the parameter 'r_type' to bfd_reloc_code_real_type; rename to ... (elf_aarch64_update_plt_entry): ... this. (elfNN_aarch64_create_small_pltn_entry): Update. (elfNN_aarch64_init_small_plt0_entry): Remove plt_got_base; add bfd_vma plt_got_2nd_ent; update to call elf_aarch64_update_plt_entry. (elfNN_aarch64_finish_dynamic_sections): Add plt_entry; update to call elf_aarch64_update_plt_entry.
2013-06-26 12:49:29 +02:00
case BFD_RELOC_AARCH64_TLSLE_ADD_TPREL_HI12:
case BFD_RELOC_AARCH64_TLSLE_ADD_TPREL_LO12:
[AArch64, ILP32] 4/6 Split elfnn-aarch64.c to elfxx-aarch64.c bfd/ * Makefile.am (BFD64_BACKENDS): Add elfxx-aarch64.c. (BFD64_BACKENDS_CFILES): Add elfxx-aarch64.lo. * Makefile.in: Re-generated. * configure.in (bfd_elf64_bigaarch64_vec): Add elfxx-aarch64.lo. (bfd_elf64_littleaarch64_vec): Likewise. (bfd_elf32_bigaarch64_vec): Likewise. (bfd_elf32_littleaarch64_vec): Likewise. * configure: Re-generated. * elfxx-aarch64.c: New file; split from elf64-aarch64.c. * elfxx-aarch64.h: New file. * elfnn-aarch64.c: Include "elfxx-aarch64.h"; move the following stuff to elfxx-aarch64.c. (bfd_elf_aarch64_put_addend): Removed. (PG_OFFSET, PG): Likewise. (elfNN_aarch64_small_plt0_entry): Support ELF32. (elfNN_aarch64_tlsdesc_small_plt_entry): Likewise. (elf64_aarch64_grok_prstatus): Removed. (elf_backend_grok_prstatus): Removed. (insn32): Likewise. (aarch64_unsigned_overflow): Likewise. (aarch64_signed_overflow): Likewise. (aarch64_resolve_relocation): Likewise. (MASK): Likewise. (decode_branch_ofs_26): Likewise. (decode_cond_branch_ofs_19): Likewise. (decode_ld_lit_ofs_19): Likewise. (decode_tst_branch_ofs_14): Likewise. (decode_movw_imm): Likewise. (decode_adr_imm): Likewise. (decode_add_imm): Likewise. (reencode_branch_ofs_26): Likewise. (reencode_cond_branch_ofs_19): Likewise. (reencode_ld_lit_ofs_19): Likewise. (reencode_tst_branch_ofs_14): Likewise. (reencode_movw_imm): Likewise. (reencode_adr_imm): Likewise. (reencode_ldst_pos_imm): Likewise. (reencode_add_imm): Likewise. (reencode_movzn_to_movz): Likewise. (reencode_movzn_to_movn): Likewise. (aarch64_relocate): Update to call the new function names in elfxx-aarch64.c. (aarch64_calculate_got_entry_vma): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elf64_aarch64_update_plt_entry): Likewise; change the type of the parameter 'r_type' to bfd_reloc_code_real_type; rename to ... (elf_aarch64_update_plt_entry): ... this. (elfNN_aarch64_create_small_pltn_entry): Update. (elfNN_aarch64_init_small_plt0_entry): Remove plt_got_base; add bfd_vma plt_got_2nd_ent; update to call elf_aarch64_update_plt_entry. (elfNN_aarch64_finish_dynamic_sections): Add plt_entry; update to call elf_aarch64_update_plt_entry.
2013-06-26 12:49:29 +02:00
case BFD_RELOC_AARCH64_TLSLE_ADD_TPREL_LO12_NC:
/* Corresponds to: add rd, rn, #uimm12 to provide the low order
12 bits of the page offset following
BFD_RELOC_AARCH64_ADR_HI21_PCREL which computes the
(pc-relative) page base. */
contents = reencode_add_imm (contents, addend);
break;
case BFD_RELOC_AARCH64_LD32_GOTPAGE_LO14:
case BFD_RELOC_AARCH64_LD32_GOT_LO12_NC:
case BFD_RELOC_AARCH64_LD64_GOTOFF_LO15:
case BFD_RELOC_AARCH64_LD64_GOTPAGE_LO15:
case BFD_RELOC_AARCH64_LD64_GOT_LO12_NC:
case BFD_RELOC_AARCH64_LDST128_LO12:
[AArch64, ILP32] 4/6 Split elfnn-aarch64.c to elfxx-aarch64.c bfd/ * Makefile.am (BFD64_BACKENDS): Add elfxx-aarch64.c. (BFD64_BACKENDS_CFILES): Add elfxx-aarch64.lo. * Makefile.in: Re-generated. * configure.in (bfd_elf64_bigaarch64_vec): Add elfxx-aarch64.lo. (bfd_elf64_littleaarch64_vec): Likewise. (bfd_elf32_bigaarch64_vec): Likewise. (bfd_elf32_littleaarch64_vec): Likewise. * configure: Re-generated. * elfxx-aarch64.c: New file; split from elf64-aarch64.c. * elfxx-aarch64.h: New file. * elfnn-aarch64.c: Include "elfxx-aarch64.h"; move the following stuff to elfxx-aarch64.c. (bfd_elf_aarch64_put_addend): Removed. (PG_OFFSET, PG): Likewise. (elfNN_aarch64_small_plt0_entry): Support ELF32. (elfNN_aarch64_tlsdesc_small_plt_entry): Likewise. (elf64_aarch64_grok_prstatus): Removed. (elf_backend_grok_prstatus): Removed. (insn32): Likewise. (aarch64_unsigned_overflow): Likewise. (aarch64_signed_overflow): Likewise. (aarch64_resolve_relocation): Likewise. (MASK): Likewise. (decode_branch_ofs_26): Likewise. (decode_cond_branch_ofs_19): Likewise. (decode_ld_lit_ofs_19): Likewise. (decode_tst_branch_ofs_14): Likewise. (decode_movw_imm): Likewise. (decode_adr_imm): Likewise. (decode_add_imm): Likewise. (reencode_branch_ofs_26): Likewise. (reencode_cond_branch_ofs_19): Likewise. (reencode_ld_lit_ofs_19): Likewise. (reencode_tst_branch_ofs_14): Likewise. (reencode_movw_imm): Likewise. (reencode_adr_imm): Likewise. (reencode_ldst_pos_imm): Likewise. (reencode_add_imm): Likewise. (reencode_movzn_to_movz): Likewise. (reencode_movzn_to_movn): Likewise. (aarch64_relocate): Update to call the new function names in elfxx-aarch64.c. (aarch64_calculate_got_entry_vma): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elf64_aarch64_update_plt_entry): Likewise; change the type of the parameter 'r_type' to bfd_reloc_code_real_type; rename to ... (elf_aarch64_update_plt_entry): ... this. (elfNN_aarch64_create_small_pltn_entry): Update. (elfNN_aarch64_init_small_plt0_entry): Remove plt_got_base; add bfd_vma plt_got_2nd_ent; update to call elf_aarch64_update_plt_entry. (elfNN_aarch64_finish_dynamic_sections): Add plt_entry; update to call elf_aarch64_update_plt_entry.
2013-06-26 12:49:29 +02:00
case BFD_RELOC_AARCH64_LDST16_LO12:
case BFD_RELOC_AARCH64_LDST32_LO12:
case BFD_RELOC_AARCH64_LDST64_LO12:
case BFD_RELOC_AARCH64_LDST8_LO12:
[AArch64, ILP32] 4/6 Split elfnn-aarch64.c to elfxx-aarch64.c bfd/ * Makefile.am (BFD64_BACKENDS): Add elfxx-aarch64.c. (BFD64_BACKENDS_CFILES): Add elfxx-aarch64.lo. * Makefile.in: Re-generated. * configure.in (bfd_elf64_bigaarch64_vec): Add elfxx-aarch64.lo. (bfd_elf64_littleaarch64_vec): Likewise. (bfd_elf32_bigaarch64_vec): Likewise. (bfd_elf32_littleaarch64_vec): Likewise. * configure: Re-generated. * elfxx-aarch64.c: New file; split from elf64-aarch64.c. * elfxx-aarch64.h: New file. * elfnn-aarch64.c: Include "elfxx-aarch64.h"; move the following stuff to elfxx-aarch64.c. (bfd_elf_aarch64_put_addend): Removed. (PG_OFFSET, PG): Likewise. (elfNN_aarch64_small_plt0_entry): Support ELF32. (elfNN_aarch64_tlsdesc_small_plt_entry): Likewise. (elf64_aarch64_grok_prstatus): Removed. (elf_backend_grok_prstatus): Removed. (insn32): Likewise. (aarch64_unsigned_overflow): Likewise. (aarch64_signed_overflow): Likewise. (aarch64_resolve_relocation): Likewise. (MASK): Likewise. (decode_branch_ofs_26): Likewise. (decode_cond_branch_ofs_19): Likewise. (decode_ld_lit_ofs_19): Likewise. (decode_tst_branch_ofs_14): Likewise. (decode_movw_imm): Likewise. (decode_adr_imm): Likewise. (decode_add_imm): Likewise. (reencode_branch_ofs_26): Likewise. (reencode_cond_branch_ofs_19): Likewise. (reencode_ld_lit_ofs_19): Likewise. (reencode_tst_branch_ofs_14): Likewise. (reencode_movw_imm): Likewise. (reencode_adr_imm): Likewise. (reencode_ldst_pos_imm): Likewise. (reencode_add_imm): Likewise. (reencode_movzn_to_movz): Likewise. (reencode_movzn_to_movn): Likewise. (aarch64_relocate): Update to call the new function names in elfxx-aarch64.c. (aarch64_calculate_got_entry_vma): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elf64_aarch64_update_plt_entry): Likewise; change the type of the parameter 'r_type' to bfd_reloc_code_real_type; rename to ... (elf_aarch64_update_plt_entry): ... this. (elfNN_aarch64_create_small_pltn_entry): Update. (elfNN_aarch64_init_small_plt0_entry): Remove plt_got_base; add bfd_vma plt_got_2nd_ent; update to call elf_aarch64_update_plt_entry. (elfNN_aarch64_finish_dynamic_sections): Add plt_entry; update to call elf_aarch64_update_plt_entry.
2013-06-26 12:49:29 +02:00
case BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC:
case BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC:
[AArch64, ILP32] 4/6 Split elfnn-aarch64.c to elfxx-aarch64.c bfd/ * Makefile.am (BFD64_BACKENDS): Add elfxx-aarch64.c. (BFD64_BACKENDS_CFILES): Add elfxx-aarch64.lo. * Makefile.in: Re-generated. * configure.in (bfd_elf64_bigaarch64_vec): Add elfxx-aarch64.lo. (bfd_elf64_littleaarch64_vec): Likewise. (bfd_elf32_bigaarch64_vec): Likewise. (bfd_elf32_littleaarch64_vec): Likewise. * configure: Re-generated. * elfxx-aarch64.c: New file; split from elf64-aarch64.c. * elfxx-aarch64.h: New file. * elfnn-aarch64.c: Include "elfxx-aarch64.h"; move the following stuff to elfxx-aarch64.c. (bfd_elf_aarch64_put_addend): Removed. (PG_OFFSET, PG): Likewise. (elfNN_aarch64_small_plt0_entry): Support ELF32. (elfNN_aarch64_tlsdesc_small_plt_entry): Likewise. (elf64_aarch64_grok_prstatus): Removed. (elf_backend_grok_prstatus): Removed. (insn32): Likewise. (aarch64_unsigned_overflow): Likewise. (aarch64_signed_overflow): Likewise. (aarch64_resolve_relocation): Likewise. (MASK): Likewise. (decode_branch_ofs_26): Likewise. (decode_cond_branch_ofs_19): Likewise. (decode_ld_lit_ofs_19): Likewise. (decode_tst_branch_ofs_14): Likewise. (decode_movw_imm): Likewise. (decode_adr_imm): Likewise. (decode_add_imm): Likewise. (reencode_branch_ofs_26): Likewise. (reencode_cond_branch_ofs_19): Likewise. (reencode_ld_lit_ofs_19): Likewise. (reencode_tst_branch_ofs_14): Likewise. (reencode_movw_imm): Likewise. (reencode_adr_imm): Likewise. (reencode_ldst_pos_imm): Likewise. (reencode_add_imm): Likewise. (reencode_movzn_to_movz): Likewise. (reencode_movzn_to_movn): Likewise. (aarch64_relocate): Update to call the new function names in elfxx-aarch64.c. (aarch64_calculate_got_entry_vma): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elf64_aarch64_update_plt_entry): Likewise; change the type of the parameter 'r_type' to bfd_reloc_code_real_type; rename to ... (elf_aarch64_update_plt_entry): ... this. (elfNN_aarch64_create_small_pltn_entry): Update. (elfNN_aarch64_init_small_plt0_entry): Remove plt_got_base; add bfd_vma plt_got_2nd_ent; update to call elf_aarch64_update_plt_entry. (elfNN_aarch64_finish_dynamic_sections): Add plt_entry; update to call elf_aarch64_update_plt_entry.
2013-06-26 12:49:29 +02:00
case BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC:
case BFD_RELOC_AARCH64_TLSIE_LD64_GOTTPREL_LO12_NC:
[AArch64][6/6] LD support TLSLD load/store relocation types 2015-08-19 Jiong Wang <jiong.wang@arm.com> bfd/ * elfnn-aarch64.c (IS_AARCH64_TLS_RELOC): Recognize new relocation types, including BFD_RELOC_AARCH64_TLSLD_LDST16_DTPREL_LO12, BFD_RELOC_AARCH64_TLSLD_LDST16_DTPREL_LO12_NC, BFD_RELOC_AARCH64_TLSLD_LDST32_DTPREL_LO12, BFD_RELOC_AARCH64_TLSLD_LDST32_DTPREL_LO12_NC, BFD_RELOC_AARCH64_TLSLD_LDST64_DTPREL_LO12, BFD_RELOC_AARCH64_TLSLD_LDST64_DTPREL_LO12_NC, BFD_RELOC_AARCH64_TLSLD_LDST8_DTPREL_LO12, BFD_RELOC_AARCH64_TLSLD_LDST8_DTPREL_LO12_NC. (elfNN_aarch64_final_link_relocate): Likewise. * elfxx-aarch64.c (_bfd_aarch64_elf_put_addend): Likewise. (_bfd_aarch64_elf_resolve_relocation): Likewise. ld/testsuite/ * ld-aarch64/emit-relocs-531.s: New testcase. * ld-aarch64/emit-relocs-531-overflow.s: Likewise. * ld-aarch64/emit-relocs-532.s: Likewise. * ld-aarch64/emit-relocs-533.s: Likewise. * ld-aarch64/emit-relocs-533-overflow.s: Likewise. * ld-aarch64/emit-relocs-534.s: Likewise. * ld-aarch64/emit-relocs-535.s: Likewise. * ld-aarch64/emit-relocs-535-overflow.s: Likewise. * ld-aarch64/emit-relocs-536.s: Likewise. * ld-aarch64/emit-relocs-537.s: Likewise. * ld-aarch64/emit-relocs-537-overflow.s: Likewise. * ld-aarch64/emit-relocs-538.s: Likewise. * ld-aarch64/emit-relocs-531.d: New expectation file. * ld-aarch64/emit-relocs-531-overflow.d: Likewise. * ld-aarch64/emit-relocs-532.d: Likewise. * ld-aarch64/emit-relocs-533.d: Likewise. * ld-aarch64/emit-relocs-533-overflow.d: Likewise. * ld-aarch64/emit-relocs-534.d: Likewise. * ld-aarch64/emit-relocs-535.d: Likewise. * ld-aarch64/emit-relocs-535-overflow.d: Likewise. * ld-aarch64/emit-relocs-536.d: Likewise. * ld-aarch64/emit-relocs-537.d: Likewise. * ld-aarch64/emit-relocs-537-overflow.d: Likewise. * ld-aarch64/emit-relocs-538.d: Likewise. * ld-aarch64/aarch64-elf.exp: Run new testcases.
2015-08-19 12:26:56 +02:00
case BFD_RELOC_AARCH64_TLSLD_LDST16_DTPREL_LO12:
case BFD_RELOC_AARCH64_TLSLD_LDST16_DTPREL_LO12_NC:
case BFD_RELOC_AARCH64_TLSLD_LDST32_DTPREL_LO12:
case BFD_RELOC_AARCH64_TLSLD_LDST32_DTPREL_LO12_NC:
case BFD_RELOC_AARCH64_TLSLD_LDST64_DTPREL_LO12:
case BFD_RELOC_AARCH64_TLSLD_LDST64_DTPREL_LO12_NC:
case BFD_RELOC_AARCH64_TLSLD_LDST8_DTPREL_LO12:
case BFD_RELOC_AARCH64_TLSLD_LDST8_DTPREL_LO12_NC:
[AArch64, ILP32] 4/6 Split elfnn-aarch64.c to elfxx-aarch64.c bfd/ * Makefile.am (BFD64_BACKENDS): Add elfxx-aarch64.c. (BFD64_BACKENDS_CFILES): Add elfxx-aarch64.lo. * Makefile.in: Re-generated. * configure.in (bfd_elf64_bigaarch64_vec): Add elfxx-aarch64.lo. (bfd_elf64_littleaarch64_vec): Likewise. (bfd_elf32_bigaarch64_vec): Likewise. (bfd_elf32_littleaarch64_vec): Likewise. * configure: Re-generated. * elfxx-aarch64.c: New file; split from elf64-aarch64.c. * elfxx-aarch64.h: New file. * elfnn-aarch64.c: Include "elfxx-aarch64.h"; move the following stuff to elfxx-aarch64.c. (bfd_elf_aarch64_put_addend): Removed. (PG_OFFSET, PG): Likewise. (elfNN_aarch64_small_plt0_entry): Support ELF32. (elfNN_aarch64_tlsdesc_small_plt_entry): Likewise. (elf64_aarch64_grok_prstatus): Removed. (elf_backend_grok_prstatus): Removed. (insn32): Likewise. (aarch64_unsigned_overflow): Likewise. (aarch64_signed_overflow): Likewise. (aarch64_resolve_relocation): Likewise. (MASK): Likewise. (decode_branch_ofs_26): Likewise. (decode_cond_branch_ofs_19): Likewise. (decode_ld_lit_ofs_19): Likewise. (decode_tst_branch_ofs_14): Likewise. (decode_movw_imm): Likewise. (decode_adr_imm): Likewise. (decode_add_imm): Likewise. (reencode_branch_ofs_26): Likewise. (reencode_cond_branch_ofs_19): Likewise. (reencode_ld_lit_ofs_19): Likewise. (reencode_tst_branch_ofs_14): Likewise. (reencode_movw_imm): Likewise. (reencode_adr_imm): Likewise. (reencode_ldst_pos_imm): Likewise. (reencode_add_imm): Likewise. (reencode_movzn_to_movz): Likewise. (reencode_movzn_to_movn): Likewise. (aarch64_relocate): Update to call the new function names in elfxx-aarch64.c. (aarch64_calculate_got_entry_vma): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elf64_aarch64_update_plt_entry): Likewise; change the type of the parameter 'r_type' to bfd_reloc_code_real_type; rename to ... (elf_aarch64_update_plt_entry): ... this. (elfNN_aarch64_create_small_pltn_entry): Update. (elfNN_aarch64_init_small_plt0_entry): Remove plt_got_base; add bfd_vma plt_got_2nd_ent; update to call elf_aarch64_update_plt_entry. (elfNN_aarch64_finish_dynamic_sections): Add plt_entry; update to call elf_aarch64_update_plt_entry.
2013-06-26 12:49:29 +02:00
if (old_addend & ((1 << howto->rightshift) - 1))
return bfd_reloc_overflow;
/* Used for ldr*|str* rt, [rn, #uimm12] to provide the low order
12 bits of the page offset following BFD_RELOC_AARCH64_ADR_HI21_PCREL
which computes the (pc-relative) page base. */
contents = reencode_ldst_pos_imm (contents, addend);
break;
/* Group relocations to create high bits of a 16, 32, 48 or 64
bit signed data or abs address inline. Will change
instruction to MOVN or MOVZ depending on sign of calculated
value. */
case BFD_RELOC_AARCH64_MOVW_G0_S:
case BFD_RELOC_AARCH64_MOVW_G1_S:
case BFD_RELOC_AARCH64_MOVW_G2_S:
[AArch64][4/6] LD support TLSLD move/add relocation types 2015-08-19 Jiong Wang <jiong.wang@arm.com> bfd/ PR ld/18276 * elfnn-aarch64.c (IS_AARCH64_TLS_RELOC): Recognize new relocation types, including BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_HI12, BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G0, BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G0_NC, BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G1, BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G1_NC, BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G2. (elfNN_aarch64_final_link_relocate): Likewise. * elfxx-aarch64.c (_bfd_aarch64_elf_put_addend): Likewise. (_bfd_aarch64_elf_resolve_relocation): Likewise. ld/testsuite/ * ld-aarch64/emit-relocs-87.s: New testcase. * ld-aarch64/emit-relocs-88.s: Likewise. * ld-aarch64/emit-relocs-88-overflow.s: Likewise. * ld-aarch64/emit-relocs-89.s: Likewise. * ld-aarch64/emit-relocs-90.s: Likewise. * ld-aarch64/emit-relocs-90-overflow.s: Likewise. * ld-aarch64/emit-relocs-523.s: Likewise. * ld-aarch64/emit-relocs-524.s: Likewise. * ld-aarch64/emit-relocs-525.s: Likewise. * ld-aarch64/emit-relocs-527.s: Likewise. * ld-aarch64/emit-relocs-526.s: Likewise. * ld-aarch64/emit-relocs-528.s: Likewise. * ld-aarch64/emit-relocs-528-overflow.s: Likewise. * ld-aarch64/emit-relocs-87.d: New expectation file. * ld-aarch64/emit-relocs-88.d: Likewise. * ld-aarch64/emit-relocs-88-overflow.d: Likewise. * ld-aarch64/emit-relocs-89.d: Likewise. * ld-aarch64/emit-relocs-90.d: Likewise. * ld-aarch64/emit-relocs-90-overflow.d: Likewise. * ld-aarch64/emit-relocs-91.d: Likewise. * ld-aarch64/emit-relocs-523.d: Likewise. * ld-aarch64/emit-relocs-524.d: Likewise. * ld-aarch64/emit-relocs-525.d: Likewise. * ld-aarch64/emit-relocs-526.d: Likewise. * ld-aarch64/emit-relocs-527.d: Likewise. * ld-aarch64/emit-relocs-528.d: Likewise. * ld-aarch64/emit-relocs-528-overflow.d: Likewise. * ld-aarch64/aarch64-elf.exp: Run new testcases.
2015-08-19 12:18:25 +02:00
case BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G0:
case BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G1:
case BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G2:
case BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G0:
case BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G1:
case BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G2:
[AArch64, ILP32] 4/6 Split elfnn-aarch64.c to elfxx-aarch64.c bfd/ * Makefile.am (BFD64_BACKENDS): Add elfxx-aarch64.c. (BFD64_BACKENDS_CFILES): Add elfxx-aarch64.lo. * Makefile.in: Re-generated. * configure.in (bfd_elf64_bigaarch64_vec): Add elfxx-aarch64.lo. (bfd_elf64_littleaarch64_vec): Likewise. (bfd_elf32_bigaarch64_vec): Likewise. (bfd_elf32_littleaarch64_vec): Likewise. * configure: Re-generated. * elfxx-aarch64.c: New file; split from elf64-aarch64.c. * elfxx-aarch64.h: New file. * elfnn-aarch64.c: Include "elfxx-aarch64.h"; move the following stuff to elfxx-aarch64.c. (bfd_elf_aarch64_put_addend): Removed. (PG_OFFSET, PG): Likewise. (elfNN_aarch64_small_plt0_entry): Support ELF32. (elfNN_aarch64_tlsdesc_small_plt_entry): Likewise. (elf64_aarch64_grok_prstatus): Removed. (elf_backend_grok_prstatus): Removed. (insn32): Likewise. (aarch64_unsigned_overflow): Likewise. (aarch64_signed_overflow): Likewise. (aarch64_resolve_relocation): Likewise. (MASK): Likewise. (decode_branch_ofs_26): Likewise. (decode_cond_branch_ofs_19): Likewise. (decode_ld_lit_ofs_19): Likewise. (decode_tst_branch_ofs_14): Likewise. (decode_movw_imm): Likewise. (decode_adr_imm): Likewise. (decode_add_imm): Likewise. (reencode_branch_ofs_26): Likewise. (reencode_cond_branch_ofs_19): Likewise. (reencode_ld_lit_ofs_19): Likewise. (reencode_tst_branch_ofs_14): Likewise. (reencode_movw_imm): Likewise. (reencode_adr_imm): Likewise. (reencode_ldst_pos_imm): Likewise. (reencode_add_imm): Likewise. (reencode_movzn_to_movz): Likewise. (reencode_movzn_to_movn): Likewise. (aarch64_relocate): Update to call the new function names in elfxx-aarch64.c. (aarch64_calculate_got_entry_vma): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elf64_aarch64_update_plt_entry): Likewise; change the type of the parameter 'r_type' to bfd_reloc_code_real_type; rename to ... (elf_aarch64_update_plt_entry): ... this. (elfNN_aarch64_create_small_pltn_entry): Update. (elfNN_aarch64_init_small_plt0_entry): Remove plt_got_base; add bfd_vma plt_got_2nd_ent; update to call elf_aarch64_update_plt_entry. (elfNN_aarch64_finish_dynamic_sections): Add plt_entry; update to call elf_aarch64_update_plt_entry.
2013-06-26 12:49:29 +02:00
/* NOTE: We can only come here with movz or movn. */
if (addend < 0)
{
/* Force use of MOVN. */
addend = ~addend;
contents = reencode_movzn_to_movn (contents);
}
else
{
/* Force use of MOVZ. */
contents = reencode_movzn_to_movz (contents);
}
/* fall through */
/* Group relocations to create a 16, 32, 48 or 64 bit unsigned
data or abs address inline. */
case BFD_RELOC_AARCH64_MOVW_G0:
case BFD_RELOC_AARCH64_MOVW_G0_NC:
case BFD_RELOC_AARCH64_MOVW_G1:
case BFD_RELOC_AARCH64_MOVW_G1_NC:
case BFD_RELOC_AARCH64_MOVW_G2:
case BFD_RELOC_AARCH64_MOVW_G2_NC:
case BFD_RELOC_AARCH64_MOVW_G3:
case BFD_RELOC_AARCH64_MOVW_GOTOFF_G0_NC:
case BFD_RELOC_AARCH64_MOVW_GOTOFF_G1:
case BFD_RELOC_AARCH64_TLSDESC_OFF_G0_NC:
case BFD_RELOC_AARCH64_TLSDESC_OFF_G1:
case BFD_RELOC_AARCH64_TLSGD_MOVW_G0_NC:
case BFD_RELOC_AARCH64_TLSGD_MOVW_G1:
case BFD_RELOC_AARCH64_TLSIE_MOVW_GOTTPREL_G0_NC:
case BFD_RELOC_AARCH64_TLSIE_MOVW_GOTTPREL_G1:
[AArch64][4/6] LD support TLSLD move/add relocation types 2015-08-19 Jiong Wang <jiong.wang@arm.com> bfd/ PR ld/18276 * elfnn-aarch64.c (IS_AARCH64_TLS_RELOC): Recognize new relocation types, including BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_HI12, BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G0, BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G0_NC, BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G1, BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G1_NC, BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G2. (elfNN_aarch64_final_link_relocate): Likewise. * elfxx-aarch64.c (_bfd_aarch64_elf_put_addend): Likewise. (_bfd_aarch64_elf_resolve_relocation): Likewise. ld/testsuite/ * ld-aarch64/emit-relocs-87.s: New testcase. * ld-aarch64/emit-relocs-88.s: Likewise. * ld-aarch64/emit-relocs-88-overflow.s: Likewise. * ld-aarch64/emit-relocs-89.s: Likewise. * ld-aarch64/emit-relocs-90.s: Likewise. * ld-aarch64/emit-relocs-90-overflow.s: Likewise. * ld-aarch64/emit-relocs-523.s: Likewise. * ld-aarch64/emit-relocs-524.s: Likewise. * ld-aarch64/emit-relocs-525.s: Likewise. * ld-aarch64/emit-relocs-527.s: Likewise. * ld-aarch64/emit-relocs-526.s: Likewise. * ld-aarch64/emit-relocs-528.s: Likewise. * ld-aarch64/emit-relocs-528-overflow.s: Likewise. * ld-aarch64/emit-relocs-87.d: New expectation file. * ld-aarch64/emit-relocs-88.d: Likewise. * ld-aarch64/emit-relocs-88-overflow.d: Likewise. * ld-aarch64/emit-relocs-89.d: Likewise. * ld-aarch64/emit-relocs-90.d: Likewise. * ld-aarch64/emit-relocs-90-overflow.d: Likewise. * ld-aarch64/emit-relocs-91.d: Likewise. * ld-aarch64/emit-relocs-523.d: Likewise. * ld-aarch64/emit-relocs-524.d: Likewise. * ld-aarch64/emit-relocs-525.d: Likewise. * ld-aarch64/emit-relocs-526.d: Likewise. * ld-aarch64/emit-relocs-527.d: Likewise. * ld-aarch64/emit-relocs-528.d: Likewise. * ld-aarch64/emit-relocs-528-overflow.d: Likewise. * ld-aarch64/aarch64-elf.exp: Run new testcases.
2015-08-19 12:18:25 +02:00
case BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G0_NC:
case BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G1_NC:
case BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G0_NC:
case BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G1_NC:
[AArch64, ILP32] 4/6 Split elfnn-aarch64.c to elfxx-aarch64.c bfd/ * Makefile.am (BFD64_BACKENDS): Add elfxx-aarch64.c. (BFD64_BACKENDS_CFILES): Add elfxx-aarch64.lo. * Makefile.in: Re-generated. * configure.in (bfd_elf64_bigaarch64_vec): Add elfxx-aarch64.lo. (bfd_elf64_littleaarch64_vec): Likewise. (bfd_elf32_bigaarch64_vec): Likewise. (bfd_elf32_littleaarch64_vec): Likewise. * configure: Re-generated. * elfxx-aarch64.c: New file; split from elf64-aarch64.c. * elfxx-aarch64.h: New file. * elfnn-aarch64.c: Include "elfxx-aarch64.h"; move the following stuff to elfxx-aarch64.c. (bfd_elf_aarch64_put_addend): Removed. (PG_OFFSET, PG): Likewise. (elfNN_aarch64_small_plt0_entry): Support ELF32. (elfNN_aarch64_tlsdesc_small_plt_entry): Likewise. (elf64_aarch64_grok_prstatus): Removed. (elf_backend_grok_prstatus): Removed. (insn32): Likewise. (aarch64_unsigned_overflow): Likewise. (aarch64_signed_overflow): Likewise. (aarch64_resolve_relocation): Likewise. (MASK): Likewise. (decode_branch_ofs_26): Likewise. (decode_cond_branch_ofs_19): Likewise. (decode_ld_lit_ofs_19): Likewise. (decode_tst_branch_ofs_14): Likewise. (decode_movw_imm): Likewise. (decode_adr_imm): Likewise. (decode_add_imm): Likewise. (reencode_branch_ofs_26): Likewise. (reencode_cond_branch_ofs_19): Likewise. (reencode_ld_lit_ofs_19): Likewise. (reencode_tst_branch_ofs_14): Likewise. (reencode_movw_imm): Likewise. (reencode_adr_imm): Likewise. (reencode_ldst_pos_imm): Likewise. (reencode_add_imm): Likewise. (reencode_movzn_to_movz): Likewise. (reencode_movzn_to_movn): Likewise. (aarch64_relocate): Update to call the new function names in elfxx-aarch64.c. (aarch64_calculate_got_entry_vma): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elf64_aarch64_update_plt_entry): Likewise; change the type of the parameter 'r_type' to bfd_reloc_code_real_type; rename to ... (elf_aarch64_update_plt_entry): ... this. (elfNN_aarch64_create_small_pltn_entry): Update. (elfNN_aarch64_init_small_plt0_entry): Remove plt_got_base; add bfd_vma plt_got_2nd_ent; update to call elf_aarch64_update_plt_entry. (elfNN_aarch64_finish_dynamic_sections): Add plt_entry; update to call elf_aarch64_update_plt_entry.
2013-06-26 12:49:29 +02:00
contents = reencode_movw_imm (contents, addend);
break;
default:
/* Repack simple data */
if (howto->dst_mask & (howto->dst_mask + 1))
return bfd_reloc_notsupported;
contents = ((contents & ~howto->dst_mask) | (addend & howto->dst_mask));
break;
}
switch (size)
{
case 2:
bfd_put_16 (abfd, contents, address);
break;
case 4:
if (howto->dst_mask != 0xffffffff)
/* must be 32-bit instruction, always little-endian */
bfd_putl32 (contents, address);
else
/* must be 32-bit data (endianness dependent) */
bfd_put_32 (abfd, contents, address);
break;
case 8:
bfd_put_64 (abfd, contents, address);
break;
default:
abort ();
}
return status;
}
bfd_vma
_bfd_aarch64_elf_resolve_relocation (bfd_reloc_code_real_type r_type,
bfd_vma place, bfd_vma value,
bfd_vma addend, bfd_boolean weak_undef_p)
{
switch (r_type)
{
case BFD_RELOC_AARCH64_NONE:
case BFD_RELOC_AARCH64_TLSDESC_CALL:
[AArch64, ILP32] 4/6 Split elfnn-aarch64.c to elfxx-aarch64.c bfd/ * Makefile.am (BFD64_BACKENDS): Add elfxx-aarch64.c. (BFD64_BACKENDS_CFILES): Add elfxx-aarch64.lo. * Makefile.in: Re-generated. * configure.in (bfd_elf64_bigaarch64_vec): Add elfxx-aarch64.lo. (bfd_elf64_littleaarch64_vec): Likewise. (bfd_elf32_bigaarch64_vec): Likewise. (bfd_elf32_littleaarch64_vec): Likewise. * configure: Re-generated. * elfxx-aarch64.c: New file; split from elf64-aarch64.c. * elfxx-aarch64.h: New file. * elfnn-aarch64.c: Include "elfxx-aarch64.h"; move the following stuff to elfxx-aarch64.c. (bfd_elf_aarch64_put_addend): Removed. (PG_OFFSET, PG): Likewise. (elfNN_aarch64_small_plt0_entry): Support ELF32. (elfNN_aarch64_tlsdesc_small_plt_entry): Likewise. (elf64_aarch64_grok_prstatus): Removed. (elf_backend_grok_prstatus): Removed. (insn32): Likewise. (aarch64_unsigned_overflow): Likewise. (aarch64_signed_overflow): Likewise. (aarch64_resolve_relocation): Likewise. (MASK): Likewise. (decode_branch_ofs_26): Likewise. (decode_cond_branch_ofs_19): Likewise. (decode_ld_lit_ofs_19): Likewise. (decode_tst_branch_ofs_14): Likewise. (decode_movw_imm): Likewise. (decode_adr_imm): Likewise. (decode_add_imm): Likewise. (reencode_branch_ofs_26): Likewise. (reencode_cond_branch_ofs_19): Likewise. (reencode_ld_lit_ofs_19): Likewise. (reencode_tst_branch_ofs_14): Likewise. (reencode_movw_imm): Likewise. (reencode_adr_imm): Likewise. (reencode_ldst_pos_imm): Likewise. (reencode_add_imm): Likewise. (reencode_movzn_to_movz): Likewise. (reencode_movzn_to_movn): Likewise. (aarch64_relocate): Update to call the new function names in elfxx-aarch64.c. (aarch64_calculate_got_entry_vma): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elf64_aarch64_update_plt_entry): Likewise; change the type of the parameter 'r_type' to bfd_reloc_code_real_type; rename to ... (elf_aarch64_update_plt_entry): ... this. (elfNN_aarch64_create_small_pltn_entry): Update. (elfNN_aarch64_init_small_plt0_entry): Remove plt_got_base; add bfd_vma plt_got_2nd_ent; update to call elf_aarch64_update_plt_entry. (elfNN_aarch64_finish_dynamic_sections): Add plt_entry; update to call elf_aarch64_update_plt_entry.
2013-06-26 12:49:29 +02:00
break;
case BFD_RELOC_AARCH64_16_PCREL:
case BFD_RELOC_AARCH64_32_PCREL:
case BFD_RELOC_AARCH64_64_PCREL:
case BFD_RELOC_AARCH64_ADR_LO21_PCREL:
case BFD_RELOC_AARCH64_BRANCH19:
case BFD_RELOC_AARCH64_LD_LO19_PCREL:
case BFD_RELOC_AARCH64_TLSDESC_ADR_PREL21:
case BFD_RELOC_AARCH64_TLSDESC_LD_PREL19:
case BFD_RELOC_AARCH64_TLSGD_ADR_PREL21:
case BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_PREL19:
case BFD_RELOC_AARCH64_TLSLD_ADR_PREL21:
[AArch64, ILP32] 4/6 Split elfnn-aarch64.c to elfxx-aarch64.c bfd/ * Makefile.am (BFD64_BACKENDS): Add elfxx-aarch64.c. (BFD64_BACKENDS_CFILES): Add elfxx-aarch64.lo. * Makefile.in: Re-generated. * configure.in (bfd_elf64_bigaarch64_vec): Add elfxx-aarch64.lo. (bfd_elf64_littleaarch64_vec): Likewise. (bfd_elf32_bigaarch64_vec): Likewise. (bfd_elf32_littleaarch64_vec): Likewise. * configure: Re-generated. * elfxx-aarch64.c: New file; split from elf64-aarch64.c. * elfxx-aarch64.h: New file. * elfnn-aarch64.c: Include "elfxx-aarch64.h"; move the following stuff to elfxx-aarch64.c. (bfd_elf_aarch64_put_addend): Removed. (PG_OFFSET, PG): Likewise. (elfNN_aarch64_small_plt0_entry): Support ELF32. (elfNN_aarch64_tlsdesc_small_plt_entry): Likewise. (elf64_aarch64_grok_prstatus): Removed. (elf_backend_grok_prstatus): Removed. (insn32): Likewise. (aarch64_unsigned_overflow): Likewise. (aarch64_signed_overflow): Likewise. (aarch64_resolve_relocation): Likewise. (MASK): Likewise. (decode_branch_ofs_26): Likewise. (decode_cond_branch_ofs_19): Likewise. (decode_ld_lit_ofs_19): Likewise. (decode_tst_branch_ofs_14): Likewise. (decode_movw_imm): Likewise. (decode_adr_imm): Likewise. (decode_add_imm): Likewise. (reencode_branch_ofs_26): Likewise. (reencode_cond_branch_ofs_19): Likewise. (reencode_ld_lit_ofs_19): Likewise. (reencode_tst_branch_ofs_14): Likewise. (reencode_movw_imm): Likewise. (reencode_adr_imm): Likewise. (reencode_ldst_pos_imm): Likewise. (reencode_add_imm): Likewise. (reencode_movzn_to_movz): Likewise. (reencode_movzn_to_movn): Likewise. (aarch64_relocate): Update to call the new function names in elfxx-aarch64.c. (aarch64_calculate_got_entry_vma): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elf64_aarch64_update_plt_entry): Likewise; change the type of the parameter 'r_type' to bfd_reloc_code_real_type; rename to ... (elf_aarch64_update_plt_entry): ... this. (elfNN_aarch64_create_small_pltn_entry): Update. (elfNN_aarch64_init_small_plt0_entry): Remove plt_got_base; add bfd_vma plt_got_2nd_ent; update to call elf_aarch64_update_plt_entry. (elfNN_aarch64_finish_dynamic_sections): Add plt_entry; update to call elf_aarch64_update_plt_entry.
2013-06-26 12:49:29 +02:00
case BFD_RELOC_AARCH64_TSTBR14:
if (weak_undef_p)
value = place;
value = value + addend - place;
break;
case BFD_RELOC_AARCH64_CALL26:
case BFD_RELOC_AARCH64_JUMP26:
value = value + addend - place;
break;
case BFD_RELOC_AARCH64_16:
case BFD_RELOC_AARCH64_32:
case BFD_RELOC_AARCH64_LD64_GOTOFF_LO15:
[AArch64, ILP32] 4/6 Split elfnn-aarch64.c to elfxx-aarch64.c bfd/ * Makefile.am (BFD64_BACKENDS): Add elfxx-aarch64.c. (BFD64_BACKENDS_CFILES): Add elfxx-aarch64.lo. * Makefile.in: Re-generated. * configure.in (bfd_elf64_bigaarch64_vec): Add elfxx-aarch64.lo. (bfd_elf64_littleaarch64_vec): Likewise. (bfd_elf32_bigaarch64_vec): Likewise. (bfd_elf32_littleaarch64_vec): Likewise. * configure: Re-generated. * elfxx-aarch64.c: New file; split from elf64-aarch64.c. * elfxx-aarch64.h: New file. * elfnn-aarch64.c: Include "elfxx-aarch64.h"; move the following stuff to elfxx-aarch64.c. (bfd_elf_aarch64_put_addend): Removed. (PG_OFFSET, PG): Likewise. (elfNN_aarch64_small_plt0_entry): Support ELF32. (elfNN_aarch64_tlsdesc_small_plt_entry): Likewise. (elf64_aarch64_grok_prstatus): Removed. (elf_backend_grok_prstatus): Removed. (insn32): Likewise. (aarch64_unsigned_overflow): Likewise. (aarch64_signed_overflow): Likewise. (aarch64_resolve_relocation): Likewise. (MASK): Likewise. (decode_branch_ofs_26): Likewise. (decode_cond_branch_ofs_19): Likewise. (decode_ld_lit_ofs_19): Likewise. (decode_tst_branch_ofs_14): Likewise. (decode_movw_imm): Likewise. (decode_adr_imm): Likewise. (decode_add_imm): Likewise. (reencode_branch_ofs_26): Likewise. (reencode_cond_branch_ofs_19): Likewise. (reencode_ld_lit_ofs_19): Likewise. (reencode_tst_branch_ofs_14): Likewise. (reencode_movw_imm): Likewise. (reencode_adr_imm): Likewise. (reencode_ldst_pos_imm): Likewise. (reencode_add_imm): Likewise. (reencode_movzn_to_movz): Likewise. (reencode_movzn_to_movn): Likewise. (aarch64_relocate): Update to call the new function names in elfxx-aarch64.c. (aarch64_calculate_got_entry_vma): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elf64_aarch64_update_plt_entry): Likewise; change the type of the parameter 'r_type' to bfd_reloc_code_real_type; rename to ... (elf_aarch64_update_plt_entry): ... this. (elfNN_aarch64_create_small_pltn_entry): Update. (elfNN_aarch64_init_small_plt0_entry): Remove plt_got_base; add bfd_vma plt_got_2nd_ent; update to call elf_aarch64_update_plt_entry. (elfNN_aarch64_finish_dynamic_sections): Add plt_entry; update to call elf_aarch64_update_plt_entry.
2013-06-26 12:49:29 +02:00
case BFD_RELOC_AARCH64_MOVW_G0:
case BFD_RELOC_AARCH64_MOVW_G0_NC:
case BFD_RELOC_AARCH64_MOVW_G0_S:
[AArch64, ILP32] 4/6 Split elfnn-aarch64.c to elfxx-aarch64.c bfd/ * Makefile.am (BFD64_BACKENDS): Add elfxx-aarch64.c. (BFD64_BACKENDS_CFILES): Add elfxx-aarch64.lo. * Makefile.in: Re-generated. * configure.in (bfd_elf64_bigaarch64_vec): Add elfxx-aarch64.lo. (bfd_elf64_littleaarch64_vec): Likewise. (bfd_elf32_bigaarch64_vec): Likewise. (bfd_elf32_littleaarch64_vec): Likewise. * configure: Re-generated. * elfxx-aarch64.c: New file; split from elf64-aarch64.c. * elfxx-aarch64.h: New file. * elfnn-aarch64.c: Include "elfxx-aarch64.h"; move the following stuff to elfxx-aarch64.c. (bfd_elf_aarch64_put_addend): Removed. (PG_OFFSET, PG): Likewise. (elfNN_aarch64_small_plt0_entry): Support ELF32. (elfNN_aarch64_tlsdesc_small_plt_entry): Likewise. (elf64_aarch64_grok_prstatus): Removed. (elf_backend_grok_prstatus): Removed. (insn32): Likewise. (aarch64_unsigned_overflow): Likewise. (aarch64_signed_overflow): Likewise. (aarch64_resolve_relocation): Likewise. (MASK): Likewise. (decode_branch_ofs_26): Likewise. (decode_cond_branch_ofs_19): Likewise. (decode_ld_lit_ofs_19): Likewise. (decode_tst_branch_ofs_14): Likewise. (decode_movw_imm): Likewise. (decode_adr_imm): Likewise. (decode_add_imm): Likewise. (reencode_branch_ofs_26): Likewise. (reencode_cond_branch_ofs_19): Likewise. (reencode_ld_lit_ofs_19): Likewise. (reencode_tst_branch_ofs_14): Likewise. (reencode_movw_imm): Likewise. (reencode_adr_imm): Likewise. (reencode_ldst_pos_imm): Likewise. (reencode_add_imm): Likewise. (reencode_movzn_to_movz): Likewise. (reencode_movzn_to_movn): Likewise. (aarch64_relocate): Update to call the new function names in elfxx-aarch64.c. (aarch64_calculate_got_entry_vma): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elf64_aarch64_update_plt_entry): Likewise; change the type of the parameter 'r_type' to bfd_reloc_code_real_type; rename to ... (elf_aarch64_update_plt_entry): ... this. (elfNN_aarch64_create_small_pltn_entry): Update. (elfNN_aarch64_init_small_plt0_entry): Remove plt_got_base; add bfd_vma plt_got_2nd_ent; update to call elf_aarch64_update_plt_entry. (elfNN_aarch64_finish_dynamic_sections): Add plt_entry; update to call elf_aarch64_update_plt_entry.
2013-06-26 12:49:29 +02:00
case BFD_RELOC_AARCH64_MOVW_G1:
case BFD_RELOC_AARCH64_MOVW_G1_NC:
case BFD_RELOC_AARCH64_MOVW_G1_S:
[AArch64, ILP32] 4/6 Split elfnn-aarch64.c to elfxx-aarch64.c bfd/ * Makefile.am (BFD64_BACKENDS): Add elfxx-aarch64.c. (BFD64_BACKENDS_CFILES): Add elfxx-aarch64.lo. * Makefile.in: Re-generated. * configure.in (bfd_elf64_bigaarch64_vec): Add elfxx-aarch64.lo. (bfd_elf64_littleaarch64_vec): Likewise. (bfd_elf32_bigaarch64_vec): Likewise. (bfd_elf32_littleaarch64_vec): Likewise. * configure: Re-generated. * elfxx-aarch64.c: New file; split from elf64-aarch64.c. * elfxx-aarch64.h: New file. * elfnn-aarch64.c: Include "elfxx-aarch64.h"; move the following stuff to elfxx-aarch64.c. (bfd_elf_aarch64_put_addend): Removed. (PG_OFFSET, PG): Likewise. (elfNN_aarch64_small_plt0_entry): Support ELF32. (elfNN_aarch64_tlsdesc_small_plt_entry): Likewise. (elf64_aarch64_grok_prstatus): Removed. (elf_backend_grok_prstatus): Removed. (insn32): Likewise. (aarch64_unsigned_overflow): Likewise. (aarch64_signed_overflow): Likewise. (aarch64_resolve_relocation): Likewise. (MASK): Likewise. (decode_branch_ofs_26): Likewise. (decode_cond_branch_ofs_19): Likewise. (decode_ld_lit_ofs_19): Likewise. (decode_tst_branch_ofs_14): Likewise. (decode_movw_imm): Likewise. (decode_adr_imm): Likewise. (decode_add_imm): Likewise. (reencode_branch_ofs_26): Likewise. (reencode_cond_branch_ofs_19): Likewise. (reencode_ld_lit_ofs_19): Likewise. (reencode_tst_branch_ofs_14): Likewise. (reencode_movw_imm): Likewise. (reencode_adr_imm): Likewise. (reencode_ldst_pos_imm): Likewise. (reencode_add_imm): Likewise. (reencode_movzn_to_movz): Likewise. (reencode_movzn_to_movn): Likewise. (aarch64_relocate): Update to call the new function names in elfxx-aarch64.c. (aarch64_calculate_got_entry_vma): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elf64_aarch64_update_plt_entry): Likewise; change the type of the parameter 'r_type' to bfd_reloc_code_real_type; rename to ... (elf_aarch64_update_plt_entry): ... this. (elfNN_aarch64_create_small_pltn_entry): Update. (elfNN_aarch64_init_small_plt0_entry): Remove plt_got_base; add bfd_vma plt_got_2nd_ent; update to call elf_aarch64_update_plt_entry. (elfNN_aarch64_finish_dynamic_sections): Add plt_entry; update to call elf_aarch64_update_plt_entry.
2013-06-26 12:49:29 +02:00
case BFD_RELOC_AARCH64_MOVW_G2:
case BFD_RELOC_AARCH64_MOVW_G2_NC:
case BFD_RELOC_AARCH64_MOVW_G2_S:
[AArch64, ILP32] 4/6 Split elfnn-aarch64.c to elfxx-aarch64.c bfd/ * Makefile.am (BFD64_BACKENDS): Add elfxx-aarch64.c. (BFD64_BACKENDS_CFILES): Add elfxx-aarch64.lo. * Makefile.in: Re-generated. * configure.in (bfd_elf64_bigaarch64_vec): Add elfxx-aarch64.lo. (bfd_elf64_littleaarch64_vec): Likewise. (bfd_elf32_bigaarch64_vec): Likewise. (bfd_elf32_littleaarch64_vec): Likewise. * configure: Re-generated. * elfxx-aarch64.c: New file; split from elf64-aarch64.c. * elfxx-aarch64.h: New file. * elfnn-aarch64.c: Include "elfxx-aarch64.h"; move the following stuff to elfxx-aarch64.c. (bfd_elf_aarch64_put_addend): Removed. (PG_OFFSET, PG): Likewise. (elfNN_aarch64_small_plt0_entry): Support ELF32. (elfNN_aarch64_tlsdesc_small_plt_entry): Likewise. (elf64_aarch64_grok_prstatus): Removed. (elf_backend_grok_prstatus): Removed. (insn32): Likewise. (aarch64_unsigned_overflow): Likewise. (aarch64_signed_overflow): Likewise. (aarch64_resolve_relocation): Likewise. (MASK): Likewise. (decode_branch_ofs_26): Likewise. (decode_cond_branch_ofs_19): Likewise. (decode_ld_lit_ofs_19): Likewise. (decode_tst_branch_ofs_14): Likewise. (decode_movw_imm): Likewise. (decode_adr_imm): Likewise. (decode_add_imm): Likewise. (reencode_branch_ofs_26): Likewise. (reencode_cond_branch_ofs_19): Likewise. (reencode_ld_lit_ofs_19): Likewise. (reencode_tst_branch_ofs_14): Likewise. (reencode_movw_imm): Likewise. (reencode_adr_imm): Likewise. (reencode_ldst_pos_imm): Likewise. (reencode_add_imm): Likewise. (reencode_movzn_to_movz): Likewise. (reencode_movzn_to_movn): Likewise. (aarch64_relocate): Update to call the new function names in elfxx-aarch64.c. (aarch64_calculate_got_entry_vma): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elf64_aarch64_update_plt_entry): Likewise; change the type of the parameter 'r_type' to bfd_reloc_code_real_type; rename to ... (elf_aarch64_update_plt_entry): ... this. (elfNN_aarch64_create_small_pltn_entry): Update. (elfNN_aarch64_init_small_plt0_entry): Remove plt_got_base; add bfd_vma plt_got_2nd_ent; update to call elf_aarch64_update_plt_entry. (elfNN_aarch64_finish_dynamic_sections): Add plt_entry; update to call elf_aarch64_update_plt_entry.
2013-06-26 12:49:29 +02:00
case BFD_RELOC_AARCH64_MOVW_G3:
case BFD_RELOC_AARCH64_MOVW_GOTOFF_G0_NC:
case BFD_RELOC_AARCH64_MOVW_GOTOFF_G1:
case BFD_RELOC_AARCH64_TLSDESC_OFF_G0_NC:
case BFD_RELOC_AARCH64_TLSDESC_OFF_G1:
case BFD_RELOC_AARCH64_TLSGD_MOVW_G0_NC:
case BFD_RELOC_AARCH64_TLSGD_MOVW_G1:
[AArch64][4/6] LD support TLSLD move/add relocation types 2015-08-19 Jiong Wang <jiong.wang@arm.com> bfd/ PR ld/18276 * elfnn-aarch64.c (IS_AARCH64_TLS_RELOC): Recognize new relocation types, including BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_HI12, BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G0, BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G0_NC, BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G1, BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G1_NC, BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G2. (elfNN_aarch64_final_link_relocate): Likewise. * elfxx-aarch64.c (_bfd_aarch64_elf_put_addend): Likewise. (_bfd_aarch64_elf_resolve_relocation): Likewise. ld/testsuite/ * ld-aarch64/emit-relocs-87.s: New testcase. * ld-aarch64/emit-relocs-88.s: Likewise. * ld-aarch64/emit-relocs-88-overflow.s: Likewise. * ld-aarch64/emit-relocs-89.s: Likewise. * ld-aarch64/emit-relocs-90.s: Likewise. * ld-aarch64/emit-relocs-90-overflow.s: Likewise. * ld-aarch64/emit-relocs-523.s: Likewise. * ld-aarch64/emit-relocs-524.s: Likewise. * ld-aarch64/emit-relocs-525.s: Likewise. * ld-aarch64/emit-relocs-527.s: Likewise. * ld-aarch64/emit-relocs-526.s: Likewise. * ld-aarch64/emit-relocs-528.s: Likewise. * ld-aarch64/emit-relocs-528-overflow.s: Likewise. * ld-aarch64/emit-relocs-87.d: New expectation file. * ld-aarch64/emit-relocs-88.d: Likewise. * ld-aarch64/emit-relocs-88-overflow.d: Likewise. * ld-aarch64/emit-relocs-89.d: Likewise. * ld-aarch64/emit-relocs-90.d: Likewise. * ld-aarch64/emit-relocs-90-overflow.d: Likewise. * ld-aarch64/emit-relocs-91.d: Likewise. * ld-aarch64/emit-relocs-523.d: Likewise. * ld-aarch64/emit-relocs-524.d: Likewise. * ld-aarch64/emit-relocs-525.d: Likewise. * ld-aarch64/emit-relocs-526.d: Likewise. * ld-aarch64/emit-relocs-527.d: Likewise. * ld-aarch64/emit-relocs-528.d: Likewise. * ld-aarch64/emit-relocs-528-overflow.d: Likewise. * ld-aarch64/aarch64-elf.exp: Run new testcases.
2015-08-19 12:18:25 +02:00
case BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_HI12:
case BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12:
case BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12_NC:
[AArch64][6/6] LD support TLSLD load/store relocation types 2015-08-19 Jiong Wang <jiong.wang@arm.com> bfd/ * elfnn-aarch64.c (IS_AARCH64_TLS_RELOC): Recognize new relocation types, including BFD_RELOC_AARCH64_TLSLD_LDST16_DTPREL_LO12, BFD_RELOC_AARCH64_TLSLD_LDST16_DTPREL_LO12_NC, BFD_RELOC_AARCH64_TLSLD_LDST32_DTPREL_LO12, BFD_RELOC_AARCH64_TLSLD_LDST32_DTPREL_LO12_NC, BFD_RELOC_AARCH64_TLSLD_LDST64_DTPREL_LO12, BFD_RELOC_AARCH64_TLSLD_LDST64_DTPREL_LO12_NC, BFD_RELOC_AARCH64_TLSLD_LDST8_DTPREL_LO12, BFD_RELOC_AARCH64_TLSLD_LDST8_DTPREL_LO12_NC. (elfNN_aarch64_final_link_relocate): Likewise. * elfxx-aarch64.c (_bfd_aarch64_elf_put_addend): Likewise. (_bfd_aarch64_elf_resolve_relocation): Likewise. ld/testsuite/ * ld-aarch64/emit-relocs-531.s: New testcase. * ld-aarch64/emit-relocs-531-overflow.s: Likewise. * ld-aarch64/emit-relocs-532.s: Likewise. * ld-aarch64/emit-relocs-533.s: Likewise. * ld-aarch64/emit-relocs-533-overflow.s: Likewise. * ld-aarch64/emit-relocs-534.s: Likewise. * ld-aarch64/emit-relocs-535.s: Likewise. * ld-aarch64/emit-relocs-535-overflow.s: Likewise. * ld-aarch64/emit-relocs-536.s: Likewise. * ld-aarch64/emit-relocs-537.s: Likewise. * ld-aarch64/emit-relocs-537-overflow.s: Likewise. * ld-aarch64/emit-relocs-538.s: Likewise. * ld-aarch64/emit-relocs-531.d: New expectation file. * ld-aarch64/emit-relocs-531-overflow.d: Likewise. * ld-aarch64/emit-relocs-532.d: Likewise. * ld-aarch64/emit-relocs-533.d: Likewise. * ld-aarch64/emit-relocs-533-overflow.d: Likewise. * ld-aarch64/emit-relocs-534.d: Likewise. * ld-aarch64/emit-relocs-535.d: Likewise. * ld-aarch64/emit-relocs-535-overflow.d: Likewise. * ld-aarch64/emit-relocs-536.d: Likewise. * ld-aarch64/emit-relocs-537.d: Likewise. * ld-aarch64/emit-relocs-537-overflow.d: Likewise. * ld-aarch64/emit-relocs-538.d: Likewise. * ld-aarch64/aarch64-elf.exp: Run new testcases.
2015-08-19 12:26:56 +02:00
case BFD_RELOC_AARCH64_TLSLD_LDST16_DTPREL_LO12:
case BFD_RELOC_AARCH64_TLSLD_LDST16_DTPREL_LO12_NC:
case BFD_RELOC_AARCH64_TLSLD_LDST32_DTPREL_LO12:
case BFD_RELOC_AARCH64_TLSLD_LDST32_DTPREL_LO12_NC:
case BFD_RELOC_AARCH64_TLSLD_LDST64_DTPREL_LO12:
case BFD_RELOC_AARCH64_TLSLD_LDST64_DTPREL_LO12_NC:
case BFD_RELOC_AARCH64_TLSLD_LDST8_DTPREL_LO12:
case BFD_RELOC_AARCH64_TLSLD_LDST8_DTPREL_LO12_NC:
[AArch64][4/6] LD support TLSLD move/add relocation types 2015-08-19 Jiong Wang <jiong.wang@arm.com> bfd/ PR ld/18276 * elfnn-aarch64.c (IS_AARCH64_TLS_RELOC): Recognize new relocation types, including BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_HI12, BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G0, BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G0_NC, BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G1, BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G1_NC, BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G2. (elfNN_aarch64_final_link_relocate): Likewise. * elfxx-aarch64.c (_bfd_aarch64_elf_put_addend): Likewise. (_bfd_aarch64_elf_resolve_relocation): Likewise. ld/testsuite/ * ld-aarch64/emit-relocs-87.s: New testcase. * ld-aarch64/emit-relocs-88.s: Likewise. * ld-aarch64/emit-relocs-88-overflow.s: Likewise. * ld-aarch64/emit-relocs-89.s: Likewise. * ld-aarch64/emit-relocs-90.s: Likewise. * ld-aarch64/emit-relocs-90-overflow.s: Likewise. * ld-aarch64/emit-relocs-523.s: Likewise. * ld-aarch64/emit-relocs-524.s: Likewise. * ld-aarch64/emit-relocs-525.s: Likewise. * ld-aarch64/emit-relocs-527.s: Likewise. * ld-aarch64/emit-relocs-526.s: Likewise. * ld-aarch64/emit-relocs-528.s: Likewise. * ld-aarch64/emit-relocs-528-overflow.s: Likewise. * ld-aarch64/emit-relocs-87.d: New expectation file. * ld-aarch64/emit-relocs-88.d: Likewise. * ld-aarch64/emit-relocs-88-overflow.d: Likewise. * ld-aarch64/emit-relocs-89.d: Likewise. * ld-aarch64/emit-relocs-90.d: Likewise. * ld-aarch64/emit-relocs-90-overflow.d: Likewise. * ld-aarch64/emit-relocs-91.d: Likewise. * ld-aarch64/emit-relocs-523.d: Likewise. * ld-aarch64/emit-relocs-524.d: Likewise. * ld-aarch64/emit-relocs-525.d: Likewise. * ld-aarch64/emit-relocs-526.d: Likewise. * ld-aarch64/emit-relocs-527.d: Likewise. * ld-aarch64/emit-relocs-528.d: Likewise. * ld-aarch64/emit-relocs-528-overflow.d: Likewise. * ld-aarch64/aarch64-elf.exp: Run new testcases.
2015-08-19 12:18:25 +02:00
case BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G0:
case BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G0_NC:
case BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G1:
case BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G1_NC:
case BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G2:
[AArch64, ILP32] 4/6 Split elfnn-aarch64.c to elfxx-aarch64.c bfd/ * Makefile.am (BFD64_BACKENDS): Add elfxx-aarch64.c. (BFD64_BACKENDS_CFILES): Add elfxx-aarch64.lo. * Makefile.in: Re-generated. * configure.in (bfd_elf64_bigaarch64_vec): Add elfxx-aarch64.lo. (bfd_elf64_littleaarch64_vec): Likewise. (bfd_elf32_bigaarch64_vec): Likewise. (bfd_elf32_littleaarch64_vec): Likewise. * configure: Re-generated. * elfxx-aarch64.c: New file; split from elf64-aarch64.c. * elfxx-aarch64.h: New file. * elfnn-aarch64.c: Include "elfxx-aarch64.h"; move the following stuff to elfxx-aarch64.c. (bfd_elf_aarch64_put_addend): Removed. (PG_OFFSET, PG): Likewise. (elfNN_aarch64_small_plt0_entry): Support ELF32. (elfNN_aarch64_tlsdesc_small_plt_entry): Likewise. (elf64_aarch64_grok_prstatus): Removed. (elf_backend_grok_prstatus): Removed. (insn32): Likewise. (aarch64_unsigned_overflow): Likewise. (aarch64_signed_overflow): Likewise. (aarch64_resolve_relocation): Likewise. (MASK): Likewise. (decode_branch_ofs_26): Likewise. (decode_cond_branch_ofs_19): Likewise. (decode_ld_lit_ofs_19): Likewise. (decode_tst_branch_ofs_14): Likewise. (decode_movw_imm): Likewise. (decode_adr_imm): Likewise. (decode_add_imm): Likewise. (reencode_branch_ofs_26): Likewise. (reencode_cond_branch_ofs_19): Likewise. (reencode_ld_lit_ofs_19): Likewise. (reencode_tst_branch_ofs_14): Likewise. (reencode_movw_imm): Likewise. (reencode_adr_imm): Likewise. (reencode_ldst_pos_imm): Likewise. (reencode_add_imm): Likewise. (reencode_movzn_to_movz): Likewise. (reencode_movzn_to_movn): Likewise. (aarch64_relocate): Update to call the new function names in elfxx-aarch64.c. (aarch64_calculate_got_entry_vma): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elf64_aarch64_update_plt_entry): Likewise; change the type of the parameter 'r_type' to bfd_reloc_code_real_type; rename to ... (elf_aarch64_update_plt_entry): ... this. (elfNN_aarch64_create_small_pltn_entry): Update. (elfNN_aarch64_init_small_plt0_entry): Remove plt_got_base; add bfd_vma plt_got_2nd_ent; update to call elf_aarch64_update_plt_entry. (elfNN_aarch64_finish_dynamic_sections): Add plt_entry; update to call elf_aarch64_update_plt_entry.
2013-06-26 12:49:29 +02:00
value = value + addend;
break;
case BFD_RELOC_AARCH64_ADR_HI21_NC_PCREL:
case BFD_RELOC_AARCH64_ADR_HI21_PCREL:
[AArch64, ILP32] 4/6 Split elfnn-aarch64.c to elfxx-aarch64.c bfd/ * Makefile.am (BFD64_BACKENDS): Add elfxx-aarch64.c. (BFD64_BACKENDS_CFILES): Add elfxx-aarch64.lo. * Makefile.in: Re-generated. * configure.in (bfd_elf64_bigaarch64_vec): Add elfxx-aarch64.lo. (bfd_elf64_littleaarch64_vec): Likewise. (bfd_elf32_bigaarch64_vec): Likewise. (bfd_elf32_littleaarch64_vec): Likewise. * configure: Re-generated. * elfxx-aarch64.c: New file; split from elf64-aarch64.c. * elfxx-aarch64.h: New file. * elfnn-aarch64.c: Include "elfxx-aarch64.h"; move the following stuff to elfxx-aarch64.c. (bfd_elf_aarch64_put_addend): Removed. (PG_OFFSET, PG): Likewise. (elfNN_aarch64_small_plt0_entry): Support ELF32. (elfNN_aarch64_tlsdesc_small_plt_entry): Likewise. (elf64_aarch64_grok_prstatus): Removed. (elf_backend_grok_prstatus): Removed. (insn32): Likewise. (aarch64_unsigned_overflow): Likewise. (aarch64_signed_overflow): Likewise. (aarch64_resolve_relocation): Likewise. (MASK): Likewise. (decode_branch_ofs_26): Likewise. (decode_cond_branch_ofs_19): Likewise. (decode_ld_lit_ofs_19): Likewise. (decode_tst_branch_ofs_14): Likewise. (decode_movw_imm): Likewise. (decode_adr_imm): Likewise. (decode_add_imm): Likewise. (reencode_branch_ofs_26): Likewise. (reencode_cond_branch_ofs_19): Likewise. (reencode_ld_lit_ofs_19): Likewise. (reencode_tst_branch_ofs_14): Likewise. (reencode_movw_imm): Likewise. (reencode_adr_imm): Likewise. (reencode_ldst_pos_imm): Likewise. (reencode_add_imm): Likewise. (reencode_movzn_to_movz): Likewise. (reencode_movzn_to_movn): Likewise. (aarch64_relocate): Update to call the new function names in elfxx-aarch64.c. (aarch64_calculate_got_entry_vma): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elf64_aarch64_update_plt_entry): Likewise; change the type of the parameter 'r_type' to bfd_reloc_code_real_type; rename to ... (elf_aarch64_update_plt_entry): ... this. (elfNN_aarch64_create_small_pltn_entry): Update. (elfNN_aarch64_init_small_plt0_entry): Remove plt_got_base; add bfd_vma plt_got_2nd_ent; update to call elf_aarch64_update_plt_entry. (elfNN_aarch64_finish_dynamic_sections): Add plt_entry; update to call elf_aarch64_update_plt_entry.
2013-06-26 12:49:29 +02:00
if (weak_undef_p)
value = PG (place);
value = PG (value + addend) - PG (place);
break;
case BFD_RELOC_AARCH64_GOT_LD_PREL19:
value = value + addend - place;
break;
case BFD_RELOC_AARCH64_ADR_GOT_PAGE:
case BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE21:
case BFD_RELOC_AARCH64_TLSGD_ADR_PAGE21:
case BFD_RELOC_AARCH64_TLSIE_ADR_GOTTPREL_PAGE21:
case BFD_RELOC_AARCH64_TLSLD_ADR_PAGE21:
[AArch64, ILP32] 4/6 Split elfnn-aarch64.c to elfxx-aarch64.c bfd/ * Makefile.am (BFD64_BACKENDS): Add elfxx-aarch64.c. (BFD64_BACKENDS_CFILES): Add elfxx-aarch64.lo. * Makefile.in: Re-generated. * configure.in (bfd_elf64_bigaarch64_vec): Add elfxx-aarch64.lo. (bfd_elf64_littleaarch64_vec): Likewise. (bfd_elf32_bigaarch64_vec): Likewise. (bfd_elf32_littleaarch64_vec): Likewise. * configure: Re-generated. * elfxx-aarch64.c: New file; split from elf64-aarch64.c. * elfxx-aarch64.h: New file. * elfnn-aarch64.c: Include "elfxx-aarch64.h"; move the following stuff to elfxx-aarch64.c. (bfd_elf_aarch64_put_addend): Removed. (PG_OFFSET, PG): Likewise. (elfNN_aarch64_small_plt0_entry): Support ELF32. (elfNN_aarch64_tlsdesc_small_plt_entry): Likewise. (elf64_aarch64_grok_prstatus): Removed. (elf_backend_grok_prstatus): Removed. (insn32): Likewise. (aarch64_unsigned_overflow): Likewise. (aarch64_signed_overflow): Likewise. (aarch64_resolve_relocation): Likewise. (MASK): Likewise. (decode_branch_ofs_26): Likewise. (decode_cond_branch_ofs_19): Likewise. (decode_ld_lit_ofs_19): Likewise. (decode_tst_branch_ofs_14): Likewise. (decode_movw_imm): Likewise. (decode_adr_imm): Likewise. (decode_add_imm): Likewise. (reencode_branch_ofs_26): Likewise. (reencode_cond_branch_ofs_19): Likewise. (reencode_ld_lit_ofs_19): Likewise. (reencode_tst_branch_ofs_14): Likewise. (reencode_movw_imm): Likewise. (reencode_adr_imm): Likewise. (reencode_ldst_pos_imm): Likewise. (reencode_add_imm): Likewise. (reencode_movzn_to_movz): Likewise. (reencode_movzn_to_movn): Likewise. (aarch64_relocate): Update to call the new function names in elfxx-aarch64.c. (aarch64_calculate_got_entry_vma): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elf64_aarch64_update_plt_entry): Likewise; change the type of the parameter 'r_type' to bfd_reloc_code_real_type; rename to ... (elf_aarch64_update_plt_entry): ... this. (elfNN_aarch64_create_small_pltn_entry): Update. (elfNN_aarch64_init_small_plt0_entry): Remove plt_got_base; add bfd_vma plt_got_2nd_ent; update to call elf_aarch64_update_plt_entry. (elfNN_aarch64_finish_dynamic_sections): Add plt_entry; update to call elf_aarch64_update_plt_entry.
2013-06-26 12:49:29 +02:00
value = PG (value + addend) - PG (place);
break;
case BFD_RELOC_AARCH64_LD32_GOTPAGE_LO14:
case BFD_RELOC_AARCH64_LD64_GOTPAGE_LO15:
/* Caller must make sure addend is the base address of .got section. */
value = value - PG (addend);
break;
[AArch64, ILP32] 4/6 Split elfnn-aarch64.c to elfxx-aarch64.c bfd/ * Makefile.am (BFD64_BACKENDS): Add elfxx-aarch64.c. (BFD64_BACKENDS_CFILES): Add elfxx-aarch64.lo. * Makefile.in: Re-generated. * configure.in (bfd_elf64_bigaarch64_vec): Add elfxx-aarch64.lo. (bfd_elf64_littleaarch64_vec): Likewise. (bfd_elf32_bigaarch64_vec): Likewise. (bfd_elf32_littleaarch64_vec): Likewise. * configure: Re-generated. * elfxx-aarch64.c: New file; split from elf64-aarch64.c. * elfxx-aarch64.h: New file. * elfnn-aarch64.c: Include "elfxx-aarch64.h"; move the following stuff to elfxx-aarch64.c. (bfd_elf_aarch64_put_addend): Removed. (PG_OFFSET, PG): Likewise. (elfNN_aarch64_small_plt0_entry): Support ELF32. (elfNN_aarch64_tlsdesc_small_plt_entry): Likewise. (elf64_aarch64_grok_prstatus): Removed. (elf_backend_grok_prstatus): Removed. (insn32): Likewise. (aarch64_unsigned_overflow): Likewise. (aarch64_signed_overflow): Likewise. (aarch64_resolve_relocation): Likewise. (MASK): Likewise. (decode_branch_ofs_26): Likewise. (decode_cond_branch_ofs_19): Likewise. (decode_ld_lit_ofs_19): Likewise. (decode_tst_branch_ofs_14): Likewise. (decode_movw_imm): Likewise. (decode_adr_imm): Likewise. (decode_add_imm): Likewise. (reencode_branch_ofs_26): Likewise. (reencode_cond_branch_ofs_19): Likewise. (reencode_ld_lit_ofs_19): Likewise. (reencode_tst_branch_ofs_14): Likewise. (reencode_movw_imm): Likewise. (reencode_adr_imm): Likewise. (reencode_ldst_pos_imm): Likewise. (reencode_add_imm): Likewise. (reencode_movzn_to_movz): Likewise. (reencode_movzn_to_movn): Likewise. (aarch64_relocate): Update to call the new function names in elfxx-aarch64.c. (aarch64_calculate_got_entry_vma): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elf64_aarch64_update_plt_entry): Likewise; change the type of the parameter 'r_type' to bfd_reloc_code_real_type; rename to ... (elf_aarch64_update_plt_entry): ... this. (elfNN_aarch64_create_small_pltn_entry): Update. (elfNN_aarch64_init_small_plt0_entry): Remove plt_got_base; add bfd_vma plt_got_2nd_ent; update to call elf_aarch64_update_plt_entry. (elfNN_aarch64_finish_dynamic_sections): Add plt_entry; update to call elf_aarch64_update_plt_entry.
2013-06-26 12:49:29 +02:00
case BFD_RELOC_AARCH64_ADD_LO12:
case BFD_RELOC_AARCH64_LD32_GOT_LO12_NC:
case BFD_RELOC_AARCH64_LD64_GOT_LO12_NC:
case BFD_RELOC_AARCH64_LDST128_LO12:
[AArch64, ILP32] 4/6 Split elfnn-aarch64.c to elfxx-aarch64.c bfd/ * Makefile.am (BFD64_BACKENDS): Add elfxx-aarch64.c. (BFD64_BACKENDS_CFILES): Add elfxx-aarch64.lo. * Makefile.in: Re-generated. * configure.in (bfd_elf64_bigaarch64_vec): Add elfxx-aarch64.lo. (bfd_elf64_littleaarch64_vec): Likewise. (bfd_elf32_bigaarch64_vec): Likewise. (bfd_elf32_littleaarch64_vec): Likewise. * configure: Re-generated. * elfxx-aarch64.c: New file; split from elf64-aarch64.c. * elfxx-aarch64.h: New file. * elfnn-aarch64.c: Include "elfxx-aarch64.h"; move the following stuff to elfxx-aarch64.c. (bfd_elf_aarch64_put_addend): Removed. (PG_OFFSET, PG): Likewise. (elfNN_aarch64_small_plt0_entry): Support ELF32. (elfNN_aarch64_tlsdesc_small_plt_entry): Likewise. (elf64_aarch64_grok_prstatus): Removed. (elf_backend_grok_prstatus): Removed. (insn32): Likewise. (aarch64_unsigned_overflow): Likewise. (aarch64_signed_overflow): Likewise. (aarch64_resolve_relocation): Likewise. (MASK): Likewise. (decode_branch_ofs_26): Likewise. (decode_cond_branch_ofs_19): Likewise. (decode_ld_lit_ofs_19): Likewise. (decode_tst_branch_ofs_14): Likewise. (decode_movw_imm): Likewise. (decode_adr_imm): Likewise. (decode_add_imm): Likewise. (reencode_branch_ofs_26): Likewise. (reencode_cond_branch_ofs_19): Likewise. (reencode_ld_lit_ofs_19): Likewise. (reencode_tst_branch_ofs_14): Likewise. (reencode_movw_imm): Likewise. (reencode_adr_imm): Likewise. (reencode_ldst_pos_imm): Likewise. (reencode_add_imm): Likewise. (reencode_movzn_to_movz): Likewise. (reencode_movzn_to_movn): Likewise. (aarch64_relocate): Update to call the new function names in elfxx-aarch64.c. (aarch64_calculate_got_entry_vma): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elf64_aarch64_update_plt_entry): Likewise; change the type of the parameter 'r_type' to bfd_reloc_code_real_type; rename to ... (elf_aarch64_update_plt_entry): ... this. (elfNN_aarch64_create_small_pltn_entry): Update. (elfNN_aarch64_init_small_plt0_entry): Remove plt_got_base; add bfd_vma plt_got_2nd_ent; update to call elf_aarch64_update_plt_entry. (elfNN_aarch64_finish_dynamic_sections): Add plt_entry; update to call elf_aarch64_update_plt_entry.
2013-06-26 12:49:29 +02:00
case BFD_RELOC_AARCH64_LDST16_LO12:
case BFD_RELOC_AARCH64_LDST32_LO12:
case BFD_RELOC_AARCH64_LDST64_LO12:
case BFD_RELOC_AARCH64_LDST8_LO12:
[AArch64, ILP32] 4/6 Split elfnn-aarch64.c to elfxx-aarch64.c bfd/ * Makefile.am (BFD64_BACKENDS): Add elfxx-aarch64.c. (BFD64_BACKENDS_CFILES): Add elfxx-aarch64.lo. * Makefile.in: Re-generated. * configure.in (bfd_elf64_bigaarch64_vec): Add elfxx-aarch64.lo. (bfd_elf64_littleaarch64_vec): Likewise. (bfd_elf32_bigaarch64_vec): Likewise. (bfd_elf32_littleaarch64_vec): Likewise. * configure: Re-generated. * elfxx-aarch64.c: New file; split from elf64-aarch64.c. * elfxx-aarch64.h: New file. * elfnn-aarch64.c: Include "elfxx-aarch64.h"; move the following stuff to elfxx-aarch64.c. (bfd_elf_aarch64_put_addend): Removed. (PG_OFFSET, PG): Likewise. (elfNN_aarch64_small_plt0_entry): Support ELF32. (elfNN_aarch64_tlsdesc_small_plt_entry): Likewise. (elf64_aarch64_grok_prstatus): Removed. (elf_backend_grok_prstatus): Removed. (insn32): Likewise. (aarch64_unsigned_overflow): Likewise. (aarch64_signed_overflow): Likewise. (aarch64_resolve_relocation): Likewise. (MASK): Likewise. (decode_branch_ofs_26): Likewise. (decode_cond_branch_ofs_19): Likewise. (decode_ld_lit_ofs_19): Likewise. (decode_tst_branch_ofs_14): Likewise. (decode_movw_imm): Likewise. (decode_adr_imm): Likewise. (decode_add_imm): Likewise. (reencode_branch_ofs_26): Likewise. (reencode_cond_branch_ofs_19): Likewise. (reencode_ld_lit_ofs_19): Likewise. (reencode_tst_branch_ofs_14): Likewise. (reencode_movw_imm): Likewise. (reencode_adr_imm): Likewise. (reencode_ldst_pos_imm): Likewise. (reencode_add_imm): Likewise. (reencode_movzn_to_movz): Likewise. (reencode_movzn_to_movn): Likewise. (aarch64_relocate): Update to call the new function names in elfxx-aarch64.c. (aarch64_calculate_got_entry_vma): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elf64_aarch64_update_plt_entry): Likewise; change the type of the parameter 'r_type' to bfd_reloc_code_real_type; rename to ... (elf_aarch64_update_plt_entry): ... this. (elfNN_aarch64_create_small_pltn_entry): Update. (elfNN_aarch64_init_small_plt0_entry): Remove plt_got_base; add bfd_vma plt_got_2nd_ent; update to call elf_aarch64_update_plt_entry. (elfNN_aarch64_finish_dynamic_sections): Add plt_entry; update to call elf_aarch64_update_plt_entry.
2013-06-26 12:49:29 +02:00
case BFD_RELOC_AARCH64_TLSDESC_ADD:
case BFD_RELOC_AARCH64_TLSDESC_ADD_LO12_NC:
[AArch64, ILP32] 4/6 Split elfnn-aarch64.c to elfxx-aarch64.c bfd/ * Makefile.am (BFD64_BACKENDS): Add elfxx-aarch64.c. (BFD64_BACKENDS_CFILES): Add elfxx-aarch64.lo. * Makefile.in: Re-generated. * configure.in (bfd_elf64_bigaarch64_vec): Add elfxx-aarch64.lo. (bfd_elf64_littleaarch64_vec): Likewise. (bfd_elf32_bigaarch64_vec): Likewise. (bfd_elf32_littleaarch64_vec): Likewise. * configure: Re-generated. * elfxx-aarch64.c: New file; split from elf64-aarch64.c. * elfxx-aarch64.h: New file. * elfnn-aarch64.c: Include "elfxx-aarch64.h"; move the following stuff to elfxx-aarch64.c. (bfd_elf_aarch64_put_addend): Removed. (PG_OFFSET, PG): Likewise. (elfNN_aarch64_small_plt0_entry): Support ELF32. (elfNN_aarch64_tlsdesc_small_plt_entry): Likewise. (elf64_aarch64_grok_prstatus): Removed. (elf_backend_grok_prstatus): Removed. (insn32): Likewise. (aarch64_unsigned_overflow): Likewise. (aarch64_signed_overflow): Likewise. (aarch64_resolve_relocation): Likewise. (MASK): Likewise. (decode_branch_ofs_26): Likewise. (decode_cond_branch_ofs_19): Likewise. (decode_ld_lit_ofs_19): Likewise. (decode_tst_branch_ofs_14): Likewise. (decode_movw_imm): Likewise. (decode_adr_imm): Likewise. (decode_add_imm): Likewise. (reencode_branch_ofs_26): Likewise. (reencode_cond_branch_ofs_19): Likewise. (reencode_ld_lit_ofs_19): Likewise. (reencode_tst_branch_ofs_14): Likewise. (reencode_movw_imm): Likewise. (reencode_adr_imm): Likewise. (reencode_ldst_pos_imm): Likewise. (reencode_add_imm): Likewise. (reencode_movzn_to_movz): Likewise. (reencode_movzn_to_movn): Likewise. (aarch64_relocate): Update to call the new function names in elfxx-aarch64.c. (aarch64_calculate_got_entry_vma): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elf64_aarch64_update_plt_entry): Likewise; change the type of the parameter 'r_type' to bfd_reloc_code_real_type; rename to ... (elf_aarch64_update_plt_entry): ... this. (elfNN_aarch64_create_small_pltn_entry): Update. (elfNN_aarch64_init_small_plt0_entry): Remove plt_got_base; add bfd_vma plt_got_2nd_ent; update to call elf_aarch64_update_plt_entry. (elfNN_aarch64_finish_dynamic_sections): Add plt_entry; update to call elf_aarch64_update_plt_entry.
2013-06-26 12:49:29 +02:00
case BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC:
case BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC:
[AArch64, ILP32] 4/6 Split elfnn-aarch64.c to elfxx-aarch64.c bfd/ * Makefile.am (BFD64_BACKENDS): Add elfxx-aarch64.c. (BFD64_BACKENDS_CFILES): Add elfxx-aarch64.lo. * Makefile.in: Re-generated. * configure.in (bfd_elf64_bigaarch64_vec): Add elfxx-aarch64.lo. (bfd_elf64_littleaarch64_vec): Likewise. (bfd_elf32_bigaarch64_vec): Likewise. (bfd_elf32_littleaarch64_vec): Likewise. * configure: Re-generated. * elfxx-aarch64.c: New file; split from elf64-aarch64.c. * elfxx-aarch64.h: New file. * elfnn-aarch64.c: Include "elfxx-aarch64.h"; move the following stuff to elfxx-aarch64.c. (bfd_elf_aarch64_put_addend): Removed. (PG_OFFSET, PG): Likewise. (elfNN_aarch64_small_plt0_entry): Support ELF32. (elfNN_aarch64_tlsdesc_small_plt_entry): Likewise. (elf64_aarch64_grok_prstatus): Removed. (elf_backend_grok_prstatus): Removed. (insn32): Likewise. (aarch64_unsigned_overflow): Likewise. (aarch64_signed_overflow): Likewise. (aarch64_resolve_relocation): Likewise. (MASK): Likewise. (decode_branch_ofs_26): Likewise. (decode_cond_branch_ofs_19): Likewise. (decode_ld_lit_ofs_19): Likewise. (decode_tst_branch_ofs_14): Likewise. (decode_movw_imm): Likewise. (decode_adr_imm): Likewise. (decode_add_imm): Likewise. (reencode_branch_ofs_26): Likewise. (reencode_cond_branch_ofs_19): Likewise. (reencode_ld_lit_ofs_19): Likewise. (reencode_tst_branch_ofs_14): Likewise. (reencode_movw_imm): Likewise. (reencode_adr_imm): Likewise. (reencode_ldst_pos_imm): Likewise. (reencode_add_imm): Likewise. (reencode_movzn_to_movz): Likewise. (reencode_movzn_to_movn): Likewise. (aarch64_relocate): Update to call the new function names in elfxx-aarch64.c. (aarch64_calculate_got_entry_vma): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elf64_aarch64_update_plt_entry): Likewise; change the type of the parameter 'r_type' to bfd_reloc_code_real_type; rename to ... (elf_aarch64_update_plt_entry): ... this. (elfNN_aarch64_create_small_pltn_entry): Update. (elfNN_aarch64_init_small_plt0_entry): Remove plt_got_base; add bfd_vma plt_got_2nd_ent; update to call elf_aarch64_update_plt_entry. (elfNN_aarch64_finish_dynamic_sections): Add plt_entry; update to call elf_aarch64_update_plt_entry.
2013-06-26 12:49:29 +02:00
case BFD_RELOC_AARCH64_TLSDESC_LDR:
case BFD_RELOC_AARCH64_TLSGD_ADD_LO12_NC:
case BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC:
case BFD_RELOC_AARCH64_TLSIE_LD64_GOTTPREL_LO12_NC:
[AArch64, ILP32] 4/6 Split elfnn-aarch64.c to elfxx-aarch64.c bfd/ * Makefile.am (BFD64_BACKENDS): Add elfxx-aarch64.c. (BFD64_BACKENDS_CFILES): Add elfxx-aarch64.lo. * Makefile.in: Re-generated. * configure.in (bfd_elf64_bigaarch64_vec): Add elfxx-aarch64.lo. (bfd_elf64_littleaarch64_vec): Likewise. (bfd_elf32_bigaarch64_vec): Likewise. (bfd_elf32_littleaarch64_vec): Likewise. * configure: Re-generated. * elfxx-aarch64.c: New file; split from elf64-aarch64.c. * elfxx-aarch64.h: New file. * elfnn-aarch64.c: Include "elfxx-aarch64.h"; move the following stuff to elfxx-aarch64.c. (bfd_elf_aarch64_put_addend): Removed. (PG_OFFSET, PG): Likewise. (elfNN_aarch64_small_plt0_entry): Support ELF32. (elfNN_aarch64_tlsdesc_small_plt_entry): Likewise. (elf64_aarch64_grok_prstatus): Removed. (elf_backend_grok_prstatus): Removed. (insn32): Likewise. (aarch64_unsigned_overflow): Likewise. (aarch64_signed_overflow): Likewise. (aarch64_resolve_relocation): Likewise. (MASK): Likewise. (decode_branch_ofs_26): Likewise. (decode_cond_branch_ofs_19): Likewise. (decode_ld_lit_ofs_19): Likewise. (decode_tst_branch_ofs_14): Likewise. (decode_movw_imm): Likewise. (decode_adr_imm): Likewise. (decode_add_imm): Likewise. (reencode_branch_ofs_26): Likewise. (reencode_cond_branch_ofs_19): Likewise. (reencode_ld_lit_ofs_19): Likewise. (reencode_tst_branch_ofs_14): Likewise. (reencode_movw_imm): Likewise. (reencode_adr_imm): Likewise. (reencode_ldst_pos_imm): Likewise. (reencode_add_imm): Likewise. (reencode_movzn_to_movz): Likewise. (reencode_movzn_to_movn): Likewise. (aarch64_relocate): Update to call the new function names in elfxx-aarch64.c. (aarch64_calculate_got_entry_vma): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elf64_aarch64_update_plt_entry): Likewise; change the type of the parameter 'r_type' to bfd_reloc_code_real_type; rename to ... (elf_aarch64_update_plt_entry): ... this. (elfNN_aarch64_create_small_pltn_entry): Update. (elfNN_aarch64_init_small_plt0_entry): Remove plt_got_base; add bfd_vma plt_got_2nd_ent; update to call elf_aarch64_update_plt_entry. (elfNN_aarch64_finish_dynamic_sections): Add plt_entry; update to call elf_aarch64_update_plt_entry.
2013-06-26 12:49:29 +02:00
case BFD_RELOC_AARCH64_TLSLE_ADD_TPREL_LO12_NC:
value = PG_OFFSET (value + addend);
break;
case BFD_RELOC_AARCH64_TLSLE_ADD_TPREL_LO12:
value = value + addend;
break;
case BFD_RELOC_AARCH64_TLSIE_MOVW_GOTTPREL_G1:
[AArch64, ILP32] 4/6 Split elfnn-aarch64.c to elfxx-aarch64.c bfd/ * Makefile.am (BFD64_BACKENDS): Add elfxx-aarch64.c. (BFD64_BACKENDS_CFILES): Add elfxx-aarch64.lo. * Makefile.in: Re-generated. * configure.in (bfd_elf64_bigaarch64_vec): Add elfxx-aarch64.lo. (bfd_elf64_littleaarch64_vec): Likewise. (bfd_elf32_bigaarch64_vec): Likewise. (bfd_elf32_littleaarch64_vec): Likewise. * configure: Re-generated. * elfxx-aarch64.c: New file; split from elf64-aarch64.c. * elfxx-aarch64.h: New file. * elfnn-aarch64.c: Include "elfxx-aarch64.h"; move the following stuff to elfxx-aarch64.c. (bfd_elf_aarch64_put_addend): Removed. (PG_OFFSET, PG): Likewise. (elfNN_aarch64_small_plt0_entry): Support ELF32. (elfNN_aarch64_tlsdesc_small_plt_entry): Likewise. (elf64_aarch64_grok_prstatus): Removed. (elf_backend_grok_prstatus): Removed. (insn32): Likewise. (aarch64_unsigned_overflow): Likewise. (aarch64_signed_overflow): Likewise. (aarch64_resolve_relocation): Likewise. (MASK): Likewise. (decode_branch_ofs_26): Likewise. (decode_cond_branch_ofs_19): Likewise. (decode_ld_lit_ofs_19): Likewise. (decode_tst_branch_ofs_14): Likewise. (decode_movw_imm): Likewise. (decode_adr_imm): Likewise. (decode_add_imm): Likewise. (reencode_branch_ofs_26): Likewise. (reencode_cond_branch_ofs_19): Likewise. (reencode_ld_lit_ofs_19): Likewise. (reencode_tst_branch_ofs_14): Likewise. (reencode_movw_imm): Likewise. (reencode_adr_imm): Likewise. (reencode_ldst_pos_imm): Likewise. (reencode_add_imm): Likewise. (reencode_movzn_to_movz): Likewise. (reencode_movzn_to_movn): Likewise. (aarch64_relocate): Update to call the new function names in elfxx-aarch64.c. (aarch64_calculate_got_entry_vma): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elf64_aarch64_update_plt_entry): Likewise; change the type of the parameter 'r_type' to bfd_reloc_code_real_type; rename to ... (elf_aarch64_update_plt_entry): ... this. (elfNN_aarch64_create_small_pltn_entry): Update. (elfNN_aarch64_init_small_plt0_entry): Remove plt_got_base; add bfd_vma plt_got_2nd_ent; update to call elf_aarch64_update_plt_entry. (elfNN_aarch64_finish_dynamic_sections): Add plt_entry; update to call elf_aarch64_update_plt_entry.
2013-06-26 12:49:29 +02:00
case BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G1:
case BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G1_NC:
value = (value + addend) & (bfd_vma) 0xffff0000;
break;
case BFD_RELOC_AARCH64_TLSLE_ADD_TPREL_HI12:
/* Mask off low 12bits, keep all other high bits, so that the later
generic code could check whehter there is overflow. */
value = (value + addend) & ~(bfd_vma) 0xfff;
[AArch64, ILP32] 4/6 Split elfnn-aarch64.c to elfxx-aarch64.c bfd/ * Makefile.am (BFD64_BACKENDS): Add elfxx-aarch64.c. (BFD64_BACKENDS_CFILES): Add elfxx-aarch64.lo. * Makefile.in: Re-generated. * configure.in (bfd_elf64_bigaarch64_vec): Add elfxx-aarch64.lo. (bfd_elf64_littleaarch64_vec): Likewise. (bfd_elf32_bigaarch64_vec): Likewise. (bfd_elf32_littleaarch64_vec): Likewise. * configure: Re-generated. * elfxx-aarch64.c: New file; split from elf64-aarch64.c. * elfxx-aarch64.h: New file. * elfnn-aarch64.c: Include "elfxx-aarch64.h"; move the following stuff to elfxx-aarch64.c. (bfd_elf_aarch64_put_addend): Removed. (PG_OFFSET, PG): Likewise. (elfNN_aarch64_small_plt0_entry): Support ELF32. (elfNN_aarch64_tlsdesc_small_plt_entry): Likewise. (elf64_aarch64_grok_prstatus): Removed. (elf_backend_grok_prstatus): Removed. (insn32): Likewise. (aarch64_unsigned_overflow): Likewise. (aarch64_signed_overflow): Likewise. (aarch64_resolve_relocation): Likewise. (MASK): Likewise. (decode_branch_ofs_26): Likewise. (decode_cond_branch_ofs_19): Likewise. (decode_ld_lit_ofs_19): Likewise. (decode_tst_branch_ofs_14): Likewise. (decode_movw_imm): Likewise. (decode_adr_imm): Likewise. (decode_add_imm): Likewise. (reencode_branch_ofs_26): Likewise. (reencode_cond_branch_ofs_19): Likewise. (reencode_ld_lit_ofs_19): Likewise. (reencode_tst_branch_ofs_14): Likewise. (reencode_movw_imm): Likewise. (reencode_adr_imm): Likewise. (reencode_ldst_pos_imm): Likewise. (reencode_add_imm): Likewise. (reencode_movzn_to_movz): Likewise. (reencode_movzn_to_movn): Likewise. (aarch64_relocate): Update to call the new function names in elfxx-aarch64.c. (aarch64_calculate_got_entry_vma): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elf64_aarch64_update_plt_entry): Likewise; change the type of the parameter 'r_type' to bfd_reloc_code_real_type; rename to ... (elf_aarch64_update_plt_entry): ... this. (elfNN_aarch64_create_small_pltn_entry): Update. (elfNN_aarch64_init_small_plt0_entry): Remove plt_got_base; add bfd_vma plt_got_2nd_ent; update to call elf_aarch64_update_plt_entry. (elfNN_aarch64_finish_dynamic_sections): Add plt_entry; update to call elf_aarch64_update_plt_entry.
2013-06-26 12:49:29 +02:00
break;
case BFD_RELOC_AARCH64_TLSIE_MOVW_GOTTPREL_G0_NC:
[AArch64, ILP32] 4/6 Split elfnn-aarch64.c to elfxx-aarch64.c bfd/ * Makefile.am (BFD64_BACKENDS): Add elfxx-aarch64.c. (BFD64_BACKENDS_CFILES): Add elfxx-aarch64.lo. * Makefile.in: Re-generated. * configure.in (bfd_elf64_bigaarch64_vec): Add elfxx-aarch64.lo. (bfd_elf64_littleaarch64_vec): Likewise. (bfd_elf32_bigaarch64_vec): Likewise. (bfd_elf32_littleaarch64_vec): Likewise. * configure: Re-generated. * elfxx-aarch64.c: New file; split from elf64-aarch64.c. * elfxx-aarch64.h: New file. * elfnn-aarch64.c: Include "elfxx-aarch64.h"; move the following stuff to elfxx-aarch64.c. (bfd_elf_aarch64_put_addend): Removed. (PG_OFFSET, PG): Likewise. (elfNN_aarch64_small_plt0_entry): Support ELF32. (elfNN_aarch64_tlsdesc_small_plt_entry): Likewise. (elf64_aarch64_grok_prstatus): Removed. (elf_backend_grok_prstatus): Removed. (insn32): Likewise. (aarch64_unsigned_overflow): Likewise. (aarch64_signed_overflow): Likewise. (aarch64_resolve_relocation): Likewise. (MASK): Likewise. (decode_branch_ofs_26): Likewise. (decode_cond_branch_ofs_19): Likewise. (decode_ld_lit_ofs_19): Likewise. (decode_tst_branch_ofs_14): Likewise. (decode_movw_imm): Likewise. (decode_adr_imm): Likewise. (decode_add_imm): Likewise. (reencode_branch_ofs_26): Likewise. (reencode_cond_branch_ofs_19): Likewise. (reencode_ld_lit_ofs_19): Likewise. (reencode_tst_branch_ofs_14): Likewise. (reencode_movw_imm): Likewise. (reencode_adr_imm): Likewise. (reencode_ldst_pos_imm): Likewise. (reencode_add_imm): Likewise. (reencode_movzn_to_movz): Likewise. (reencode_movzn_to_movn): Likewise. (aarch64_relocate): Update to call the new function names in elfxx-aarch64.c. (aarch64_calculate_got_entry_vma): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elf64_aarch64_update_plt_entry): Likewise; change the type of the parameter 'r_type' to bfd_reloc_code_real_type; rename to ... (elf_aarch64_update_plt_entry): ... this. (elfNN_aarch64_create_small_pltn_entry): Update. (elfNN_aarch64_init_small_plt0_entry): Remove plt_got_base; add bfd_vma plt_got_2nd_ent; update to call elf_aarch64_update_plt_entry. (elfNN_aarch64_finish_dynamic_sections): Add plt_entry; update to call elf_aarch64_update_plt_entry.
2013-06-26 12:49:29 +02:00
case BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G0:
case BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G0_NC:
value = (value + addend) & (bfd_vma) 0xffff;
break;
case BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G2:
value = (value + addend) & ~(bfd_vma) 0xffffffff;
value -= place & ~(bfd_vma) 0xffffffff;
break;
default:
break;
}
return value;
}
/* Hook called by the linker routine which adds symbols from an object
file. */
bfd_boolean
_bfd_aarch64_elf_add_symbol_hook (bfd *abfd, struct bfd_link_info *info,
Elf_Internal_Sym *sym,
const char **namep ATTRIBUTE_UNUSED,
flagword *flagsp ATTRIBUTE_UNUSED,
asection **secp ATTRIBUTE_UNUSED,
bfd_vma *valp ATTRIBUTE_UNUSED)
{
if ((ELF_ST_TYPE (sym->st_info) == STT_GNU_IFUNC
|| ELF_ST_BIND (sym->st_info) == STB_GNU_UNIQUE)
&& (abfd->flags & DYNAMIC) == 0
&& bfd_get_flavour (info->output_bfd) == bfd_target_elf_flavour)
Set EI_OSABI to ELFOSABI_GNU for local IFUNC symbols Since the backend elf_add_symbol_hook isn't called on local symbols, the EI_OSABI field isn't to ELFOSABI_GNU where are local IFUNC symbols. This patch changes the x86 backends to set has_gnu_symbols if there are relocations against IFUNC symbols. Other backends with IFUNC support may need a similar change. This patch also changes the type of has_gnu_symbols from bfd_boolean to enum elf_gnu_symbols. bfd/ PR ld/18815 * elf-bfd.h (elf_gnu_symbols): New enum. (elf_obj_tdata): Use elf_gnu_symbols on has_gnu_symbols. * elf-s390-common.c (elf_s390_add_symbol_hook): Set has_gnu_symbols to elf_gnu_symbol_any. * elf32-arm.c (elf32_arm_add_symbol_hook): Likewise. * elf32-m68k.c (elf_m68k_add_symbol_hook): Likewise. * elf32-ppc.c (ppc_elf_add_symbol_hook): Likewise. * elf32-sparc.c (elf32_sparc_add_symbol_hook): Likewise. * elf64-ppc.c (ppc64_elf_add_symbol_hook): Likewise. * elf64-sparc.c (elf64_sparc_add_symbol_hook): Likewise. * lfxx-aarch64.c (_bfd_aarch64_elf_add_symbol_hook): Likewise. * elf32-i386.c (elf_i386_check_relocs): Update has_gnu_symbols if there are relocations against IFUNC symbols. (elf_i386_add_symbol_hook): Don't check STT_GNU_IFUNC here. * elf64-x86-64. (elf_x86_64_check_relocs): Update has_gnu_symbols if there are relocations against IFUNC symbols. (elf_x86_64_add_symbol_hook): Don't check STT_GNU_IFUNC here. ld/testsuite/ PR ld/18815 * ld-i386/i386.exp: Run pr18815. * ld-x86-64/x86-64.exp: Likewise. * ld-i386/pr18815.d: New file. * ld-i386/pr18815.s: Likewise. * ld-x86-64/pr18815.d: Likewise. * ld-x86-64/pr18815.s: Likewise.
2015-08-12 22:31:29 +02:00
elf_tdata (info->output_bfd)->has_gnu_symbols = elf_gnu_symbol_any;
[AArch64, ILP32] 4/6 Split elfnn-aarch64.c to elfxx-aarch64.c bfd/ * Makefile.am (BFD64_BACKENDS): Add elfxx-aarch64.c. (BFD64_BACKENDS_CFILES): Add elfxx-aarch64.lo. * Makefile.in: Re-generated. * configure.in (bfd_elf64_bigaarch64_vec): Add elfxx-aarch64.lo. (bfd_elf64_littleaarch64_vec): Likewise. (bfd_elf32_bigaarch64_vec): Likewise. (bfd_elf32_littleaarch64_vec): Likewise. * configure: Re-generated. * elfxx-aarch64.c: New file; split from elf64-aarch64.c. * elfxx-aarch64.h: New file. * elfnn-aarch64.c: Include "elfxx-aarch64.h"; move the following stuff to elfxx-aarch64.c. (bfd_elf_aarch64_put_addend): Removed. (PG_OFFSET, PG): Likewise. (elfNN_aarch64_small_plt0_entry): Support ELF32. (elfNN_aarch64_tlsdesc_small_plt_entry): Likewise. (elf64_aarch64_grok_prstatus): Removed. (elf_backend_grok_prstatus): Removed. (insn32): Likewise. (aarch64_unsigned_overflow): Likewise. (aarch64_signed_overflow): Likewise. (aarch64_resolve_relocation): Likewise. (MASK): Likewise. (decode_branch_ofs_26): Likewise. (decode_cond_branch_ofs_19): Likewise. (decode_ld_lit_ofs_19): Likewise. (decode_tst_branch_ofs_14): Likewise. (decode_movw_imm): Likewise. (decode_adr_imm): Likewise. (decode_add_imm): Likewise. (reencode_branch_ofs_26): Likewise. (reencode_cond_branch_ofs_19): Likewise. (reencode_ld_lit_ofs_19): Likewise. (reencode_tst_branch_ofs_14): Likewise. (reencode_movw_imm): Likewise. (reencode_adr_imm): Likewise. (reencode_ldst_pos_imm): Likewise. (reencode_add_imm): Likewise. (reencode_movzn_to_movz): Likewise. (reencode_movzn_to_movn): Likewise. (aarch64_relocate): Update to call the new function names in elfxx-aarch64.c. (aarch64_calculate_got_entry_vma): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elf64_aarch64_update_plt_entry): Likewise; change the type of the parameter 'r_type' to bfd_reloc_code_real_type; rename to ... (elf_aarch64_update_plt_entry): ... this. (elfNN_aarch64_create_small_pltn_entry): Update. (elfNN_aarch64_init_small_plt0_entry): Remove plt_got_base; add bfd_vma plt_got_2nd_ent; update to call elf_aarch64_update_plt_entry. (elfNN_aarch64_finish_dynamic_sections): Add plt_entry; update to call elf_aarch64_update_plt_entry.
2013-06-26 12:49:29 +02:00
return TRUE;
}
/* Support for core dump NOTE sections. */
bfd_boolean
_bfd_aarch64_elf_grok_prstatus (bfd *abfd, Elf_Internal_Note *note)
{
int offset;
size_t size;
switch (note->descsz)
{
default:
return FALSE;
case 392: /* sizeof(struct elf_prstatus) on Linux/arm64. */
[AArch64, ILP32] 4/6 Split elfnn-aarch64.c to elfxx-aarch64.c bfd/ * Makefile.am (BFD64_BACKENDS): Add elfxx-aarch64.c. (BFD64_BACKENDS_CFILES): Add elfxx-aarch64.lo. * Makefile.in: Re-generated. * configure.in (bfd_elf64_bigaarch64_vec): Add elfxx-aarch64.lo. (bfd_elf64_littleaarch64_vec): Likewise. (bfd_elf32_bigaarch64_vec): Likewise. (bfd_elf32_littleaarch64_vec): Likewise. * configure: Re-generated. * elfxx-aarch64.c: New file; split from elf64-aarch64.c. * elfxx-aarch64.h: New file. * elfnn-aarch64.c: Include "elfxx-aarch64.h"; move the following stuff to elfxx-aarch64.c. (bfd_elf_aarch64_put_addend): Removed. (PG_OFFSET, PG): Likewise. (elfNN_aarch64_small_plt0_entry): Support ELF32. (elfNN_aarch64_tlsdesc_small_plt_entry): Likewise. (elf64_aarch64_grok_prstatus): Removed. (elf_backend_grok_prstatus): Removed. (insn32): Likewise. (aarch64_unsigned_overflow): Likewise. (aarch64_signed_overflow): Likewise. (aarch64_resolve_relocation): Likewise. (MASK): Likewise. (decode_branch_ofs_26): Likewise. (decode_cond_branch_ofs_19): Likewise. (decode_ld_lit_ofs_19): Likewise. (decode_tst_branch_ofs_14): Likewise. (decode_movw_imm): Likewise. (decode_adr_imm): Likewise. (decode_add_imm): Likewise. (reencode_branch_ofs_26): Likewise. (reencode_cond_branch_ofs_19): Likewise. (reencode_ld_lit_ofs_19): Likewise. (reencode_tst_branch_ofs_14): Likewise. (reencode_movw_imm): Likewise. (reencode_adr_imm): Likewise. (reencode_ldst_pos_imm): Likewise. (reencode_add_imm): Likewise. (reencode_movzn_to_movz): Likewise. (reencode_movzn_to_movn): Likewise. (aarch64_relocate): Update to call the new function names in elfxx-aarch64.c. (aarch64_calculate_got_entry_vma): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elf64_aarch64_update_plt_entry): Likewise; change the type of the parameter 'r_type' to bfd_reloc_code_real_type; rename to ... (elf_aarch64_update_plt_entry): ... this. (elfNN_aarch64_create_small_pltn_entry): Update. (elfNN_aarch64_init_small_plt0_entry): Remove plt_got_base; add bfd_vma plt_got_2nd_ent; update to call elf_aarch64_update_plt_entry. (elfNN_aarch64_finish_dynamic_sections): Add plt_entry; update to call elf_aarch64_update_plt_entry.
2013-06-26 12:49:29 +02:00
/* pr_cursig */
elf_tdata (abfd)->core->signal
= bfd_get_16 (abfd, note->descdata + 12);
/* pr_pid */
elf_tdata (abfd)->core->lwpid
= bfd_get_32 (abfd, note->descdata + 32);
/* pr_reg */
offset = 112;
size = 272;
break;
}
/* Make a ".reg/999" section. */
return _bfd_elfcore_make_pseudosection (abfd, ".reg",
size, note->descpos + offset);
}
bfd_boolean
_bfd_aarch64_elf_grok_psinfo (bfd *abfd, Elf_Internal_Note *note)
{
switch (note->descsz)
{
default:
return FALSE;
case 136: /* This is sizeof(struct elf_prpsinfo) on Linux/aarch64. */
elf_tdata (abfd)->core->pid = bfd_get_32 (abfd, note->descdata + 24);
elf_tdata (abfd)->core->program
= _bfd_elfcore_strndup (abfd, note->descdata + 40, 16);
elf_tdata (abfd)->core->command
= _bfd_elfcore_strndup (abfd, note->descdata + 56, 80);
}
/* Note that for some reason, a spurious space is tacked
onto the end of the args in some (at least one anyway)
implementations, so strip it off if it exists. */
{
char *command = elf_tdata (abfd)->core->command;
int n = strlen (command);
if (0 < n && command[n - 1] == ' ')
command[n - 1] = '\0';
}
return TRUE;
}
char *
_bfd_aarch64_elf_write_core_note (bfd *abfd, char *buf, int *bufsiz, int note_type,
...)
{
switch (note_type)
{
default:
return NULL;
case NT_PRPSINFO:
{
char data[136];
va_list ap;
va_start (ap, note_type);
memset (data, 0, sizeof (data));
strncpy (data + 40, va_arg (ap, const char *), 16);
strncpy (data + 56, va_arg (ap, const char *), 80);
va_end (ap);
return elfcore_write_note (abfd, buf, bufsiz, "CORE",
note_type, data, sizeof (data));
}
case NT_PRSTATUS:
{
char data[392];
va_list ap;
long pid;
int cursig;
const void *greg;
va_start (ap, note_type);
memset (data, 0, sizeof (data));
pid = va_arg (ap, long);
bfd_put_32 (abfd, pid, data + 32);
cursig = va_arg (ap, int);
bfd_put_16 (abfd, cursig, data + 12);
greg = va_arg (ap, const void *);
memcpy (data + 112, greg, 272);
va_end (ap);
return elfcore_write_note (abfd, buf, bufsiz, "CORE",
note_type, data, sizeof (data));
}
}
}