gdb: clean up x86 cpuid implementations
We've currently got 3 files doing open coded implementations of cpuid.
Each has its own set of workarounds and varying levels of how well
they're written and are generally hardcoded to specific cpuid functions.
If you try to build the latest gdb as a PIE on an i386 system, the build
will fail because one of them lacks PIC workarounds (wrt ebx).
Specifically, we have:
common/linux-btrace.c:
two copies of cpuid asm w/specific args, one has no workarounds
while the other implicitly does to avoid memcpy
go32-nat.c:
two copies of cpuid asm w/specific args, one has workarounds to
avoid memcpy
gdb/testsuite/gdb.arch/i386-cpuid.h:
one general cpuid asm w/many workarounds copied from older gcc
Fortunately, that last header there is pretty damn good -- it handles
lots of edge cases, the code is nice & tight (uses gcc asm operands
rather than manual movs), and is already almost a general library type
header. It's also the basis of what is now the public cpuid.h that is
shipped with gcc-4.3+.
So what I've done is pull that test header out and into gdb/common/
(not sure if there's a better place), synced to the version found in
gcc-4.8.0, put a wrapper API around it, and then cut over all the
existing call points to this new header.
Since the func already has support for "is cpuid supported on this proc",
it makes it trivial to push the i386/x86_64 ifdefs down into this wrapper
API too. Now it can be safely used for all targets and gcc will elide
the unused code for us.
I've verified the gdb.arch testsuite still passes, and this code compiles
for an armv7a host as well as x86_64. The go32-nat code has been left
ifdef-ed out until someone can test & verify the new stuff works (and if
it doesn't, figure out how to make the new code work).
URL: https://bugs.gentoo.org/467806
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2013-06-20 00:29:36 +02:00
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/*
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2016-12-05 15:03:06 +01:00
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* Helper cpuid.h file copied from gcc-6.0.0. Code in gdb should not
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Rename 32- and 64-bit Intel files from "i386" to "x86"
This commit renames nine files that contain code used by both 32- and
64-bit Intel ports such that their names are prefixed with "x86"
rather than "i386". All types, functions and variables within these
files are likewise renamed such that their names are prefixed with
"x86" rather than "i386". This makes GDB follow the convention used
by gdbserver such that 32-bit Intel code lives in files called
"i386-*", 64-bit Intel code lives in files called "amd64-*", and code
for both 32- and 64-bit Intel lives in files called "x86-*".
This commit only renames OS-independent files. The Linux ports of
both GDB and gdbserver now follow the i386/amd64/x86 convention fully.
Some ports still use the old convention where "i386" in file/function/
type/variable names can mean "32-bit only" or "32- and 64-bit" but I
don't want to touch ports I can't fully test except where absolutely
necessary.
gdb/ChangeLog:
* i386-nat.h: Renamed as...
* x86-nat.h: New file. All type, function and variable name
prefixes changed from "i386_" to "x86_". All references updated.
* i386-nat.c: Renamed as...
* x86-nat.c: New file. All type, function and variable name
prefixes changed from "i386_" to "x86_". All references updated.
* common/i386-xstate.h: Renamed as...
* common/x86-xstate.h: New file. All type, function and variable
name prefixes changed from "i386_" to "x86_". All references
updated.
* nat/i386-cpuid.h: Renamed as...
* nat/x86-cpuid.h: New file. All type, function and variable name
prefixes changed from "i386_" to "x86_". All references updated.
* nat/i386-gcc-cpuid.h: Renamed as...
* nat/x86-gcc-cpuid.h: New file. All type, function and variable
name prefixes changed from "i386_" to "x86_". All references
updated.
* nat/i386-dregs.h: Renamed as...
* nat/x86-dregs.h: New file. All type, function and variable name
prefixes changed from "i386_" to "x86_". All references updated.
* nat/i386-dregs.c: Renamed as...
* nat/x86-dregs.c: New file. All type, function and variable name
prefixes changed from "i386_" to "x86_". All references updated.
gdb/gdbserver/ChangeLog:
* i386-low.h: Renamed as...
* x86-low.h: New file. All type, function and variable name
prefixes changed from "i386_" to "x86_". All references updated.
* i386-low.c: Renamed as...
* x86-low.c: New file. All type, function and variable name
prefixes changed from "i386_" to "x86_". All references updated.
2014-08-19 16:16:11 +02:00
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* include this directly, but pull in x86-cpuid.h and use that func.
|
gdb: clean up x86 cpuid implementations
We've currently got 3 files doing open coded implementations of cpuid.
Each has its own set of workarounds and varying levels of how well
they're written and are generally hardcoded to specific cpuid functions.
If you try to build the latest gdb as a PIE on an i386 system, the build
will fail because one of them lacks PIC workarounds (wrt ebx).
Specifically, we have:
common/linux-btrace.c:
two copies of cpuid asm w/specific args, one has no workarounds
while the other implicitly does to avoid memcpy
go32-nat.c:
two copies of cpuid asm w/specific args, one has workarounds to
avoid memcpy
gdb/testsuite/gdb.arch/i386-cpuid.h:
one general cpuid asm w/many workarounds copied from older gcc
Fortunately, that last header there is pretty damn good -- it handles
lots of edge cases, the code is nice & tight (uses gcc asm operands
rather than manual movs), and is already almost a general library type
header. It's also the basis of what is now the public cpuid.h that is
shipped with gcc-4.3+.
So what I've done is pull that test header out and into gdb/common/
(not sure if there's a better place), synced to the version found in
gcc-4.8.0, put a wrapper API around it, and then cut over all the
existing call points to this new header.
Since the func already has support for "is cpuid supported on this proc",
it makes it trivial to push the i386/x86_64 ifdefs down into this wrapper
API too. Now it can be safely used for all targets and gcc will elide
the unused code for us.
I've verified the gdb.arch testsuite still passes, and this code compiles
for an armv7a host as well as x86_64. The go32-nat code has been left
ifdef-ed out until someone can test & verify the new stuff works (and if
it doesn't, figure out how to make the new code work).
URL: https://bugs.gentoo.org/467806
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2013-06-20 00:29:36 +02:00
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*/
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/*
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2018-01-01 05:43:02 +01:00
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* Copyright (C) 2007-2018 Free Software Foundation, Inc.
|
2010-04-07 20:46:50 +02:00
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*
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* This file is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 3, or (at your option) any
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* later version.
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*
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* This file is distributed in the hope that it will be useful, but
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* WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* General Public License for more details.
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*
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* Under Section 7 of GPL version 3, you are granted additional
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* permissions described in the GCC Runtime Library Exception, version
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* 3.1, as published by the Free Software Foundation.
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*
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* You should have received a copy of the GNU General Public License and
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* a copy of the GCC Runtime Library Exception along with this program;
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* see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
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* <http://www.gnu.org/licenses/>.
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*/
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2004-06-07 17:38:52 +02:00
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2010-04-07 20:46:50 +02:00
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/* %ecx */
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|
|
|
#define bit_SSE3 (1 << 0)
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|
|
|
#define bit_PCLMUL (1 << 1)
|
gdb: clean up x86 cpuid implementations
We've currently got 3 files doing open coded implementations of cpuid.
Each has its own set of workarounds and varying levels of how well
they're written and are generally hardcoded to specific cpuid functions.
If you try to build the latest gdb as a PIE on an i386 system, the build
will fail because one of them lacks PIC workarounds (wrt ebx).
Specifically, we have:
common/linux-btrace.c:
two copies of cpuid asm w/specific args, one has no workarounds
while the other implicitly does to avoid memcpy
go32-nat.c:
two copies of cpuid asm w/specific args, one has workarounds to
avoid memcpy
gdb/testsuite/gdb.arch/i386-cpuid.h:
one general cpuid asm w/many workarounds copied from older gcc
Fortunately, that last header there is pretty damn good -- it handles
lots of edge cases, the code is nice & tight (uses gcc asm operands
rather than manual movs), and is already almost a general library type
header. It's also the basis of what is now the public cpuid.h that is
shipped with gcc-4.3+.
So what I've done is pull that test header out and into gdb/common/
(not sure if there's a better place), synced to the version found in
gcc-4.8.0, put a wrapper API around it, and then cut over all the
existing call points to this new header.
Since the func already has support for "is cpuid supported on this proc",
it makes it trivial to push the i386/x86_64 ifdefs down into this wrapper
API too. Now it can be safely used for all targets and gcc will elide
the unused code for us.
I've verified the gdb.arch testsuite still passes, and this code compiles
for an armv7a host as well as x86_64. The go32-nat code has been left
ifdef-ed out until someone can test & verify the new stuff works (and if
it doesn't, figure out how to make the new code work).
URL: https://bugs.gentoo.org/467806
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2013-06-20 00:29:36 +02:00
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#define bit_LZCNT (1 << 5)
|
2010-04-07 20:46:50 +02:00
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|
|
#define bit_SSSE3 (1 << 9)
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#define bit_FMA (1 << 12)
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#define bit_CMPXCHG16B (1 << 13)
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#define bit_SSE4_1 (1 << 19)
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#define bit_SSE4_2 (1 << 20)
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#define bit_MOVBE (1 << 22)
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#define bit_POPCNT (1 << 23)
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#define bit_AES (1 << 25)
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#define bit_XSAVE (1 << 26)
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#define bit_OSXSAVE (1 << 27)
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|
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#define bit_AVX (1 << 28)
|
gdb: clean up x86 cpuid implementations
We've currently got 3 files doing open coded implementations of cpuid.
Each has its own set of workarounds and varying levels of how well
they're written and are generally hardcoded to specific cpuid functions.
If you try to build the latest gdb as a PIE on an i386 system, the build
will fail because one of them lacks PIC workarounds (wrt ebx).
Specifically, we have:
common/linux-btrace.c:
two copies of cpuid asm w/specific args, one has no workarounds
while the other implicitly does to avoid memcpy
go32-nat.c:
two copies of cpuid asm w/specific args, one has workarounds to
avoid memcpy
gdb/testsuite/gdb.arch/i386-cpuid.h:
one general cpuid asm w/many workarounds copied from older gcc
Fortunately, that last header there is pretty damn good -- it handles
lots of edge cases, the code is nice & tight (uses gcc asm operands
rather than manual movs), and is already almost a general library type
header. It's also the basis of what is now the public cpuid.h that is
shipped with gcc-4.3+.
So what I've done is pull that test header out and into gdb/common/
(not sure if there's a better place), synced to the version found in
gcc-4.8.0, put a wrapper API around it, and then cut over all the
existing call points to this new header.
Since the func already has support for "is cpuid supported on this proc",
it makes it trivial to push the i386/x86_64 ifdefs down into this wrapper
API too. Now it can be safely used for all targets and gcc will elide
the unused code for us.
I've verified the gdb.arch testsuite still passes, and this code compiles
for an armv7a host as well as x86_64. The go32-nat code has been left
ifdef-ed out until someone can test & verify the new stuff works (and if
it doesn't, figure out how to make the new code work).
URL: https://bugs.gentoo.org/467806
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2013-06-20 00:29:36 +02:00
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#define bit_F16C (1 << 29)
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#define bit_RDRND (1 << 30)
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2004-06-07 17:38:52 +02:00
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2010-04-07 20:46:50 +02:00
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/* %edx */
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#define bit_CMPXCHG8B (1 << 8)
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#define bit_CMOV (1 << 15)
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#define bit_MMX (1 << 23)
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#define bit_FXSAVE (1 << 24)
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#define bit_SSE (1 << 25)
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#define bit_SSE2 (1 << 26)
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2004-06-07 17:38:52 +02:00
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2010-04-07 20:46:50 +02:00
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/* Extended Features */
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/* %ecx */
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#define bit_LAHF_LM (1 << 0)
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#define bit_ABM (1 << 5)
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#define bit_SSE4a (1 << 6)
|
gdb: clean up x86 cpuid implementations
We've currently got 3 files doing open coded implementations of cpuid.
Each has its own set of workarounds and varying levels of how well
they're written and are generally hardcoded to specific cpuid functions.
If you try to build the latest gdb as a PIE on an i386 system, the build
will fail because one of them lacks PIC workarounds (wrt ebx).
Specifically, we have:
common/linux-btrace.c:
two copies of cpuid asm w/specific args, one has no workarounds
while the other implicitly does to avoid memcpy
go32-nat.c:
two copies of cpuid asm w/specific args, one has workarounds to
avoid memcpy
gdb/testsuite/gdb.arch/i386-cpuid.h:
one general cpuid asm w/many workarounds copied from older gcc
Fortunately, that last header there is pretty damn good -- it handles
lots of edge cases, the code is nice & tight (uses gcc asm operands
rather than manual movs), and is already almost a general library type
header. It's also the basis of what is now the public cpuid.h that is
shipped with gcc-4.3+.
So what I've done is pull that test header out and into gdb/common/
(not sure if there's a better place), synced to the version found in
gcc-4.8.0, put a wrapper API around it, and then cut over all the
existing call points to this new header.
Since the func already has support for "is cpuid supported on this proc",
it makes it trivial to push the i386/x86_64 ifdefs down into this wrapper
API too. Now it can be safely used for all targets and gcc will elide
the unused code for us.
I've verified the gdb.arch testsuite still passes, and this code compiles
for an armv7a host as well as x86_64. The go32-nat code has been left
ifdef-ed out until someone can test & verify the new stuff works (and if
it doesn't, figure out how to make the new code work).
URL: https://bugs.gentoo.org/467806
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2013-06-20 00:29:36 +02:00
|
|
|
#define bit_PRFCHW (1 << 8)
|
2010-04-07 20:46:50 +02:00
|
|
|
#define bit_XOP (1 << 11)
|
|
|
|
#define bit_LWP (1 << 15)
|
|
|
|
#define bit_FMA4 (1 << 16)
|
gdb: clean up x86 cpuid implementations
We've currently got 3 files doing open coded implementations of cpuid.
Each has its own set of workarounds and varying levels of how well
they're written and are generally hardcoded to specific cpuid functions.
If you try to build the latest gdb as a PIE on an i386 system, the build
will fail because one of them lacks PIC workarounds (wrt ebx).
Specifically, we have:
common/linux-btrace.c:
two copies of cpuid asm w/specific args, one has no workarounds
while the other implicitly does to avoid memcpy
go32-nat.c:
two copies of cpuid asm w/specific args, one has workarounds to
avoid memcpy
gdb/testsuite/gdb.arch/i386-cpuid.h:
one general cpuid asm w/many workarounds copied from older gcc
Fortunately, that last header there is pretty damn good -- it handles
lots of edge cases, the code is nice & tight (uses gcc asm operands
rather than manual movs), and is already almost a general library type
header. It's also the basis of what is now the public cpuid.h that is
shipped with gcc-4.3+.
So what I've done is pull that test header out and into gdb/common/
(not sure if there's a better place), synced to the version found in
gcc-4.8.0, put a wrapper API around it, and then cut over all the
existing call points to this new header.
Since the func already has support for "is cpuid supported on this proc",
it makes it trivial to push the i386/x86_64 ifdefs down into this wrapper
API too. Now it can be safely used for all targets and gcc will elide
the unused code for us.
I've verified the gdb.arch testsuite still passes, and this code compiles
for an armv7a host as well as x86_64. The go32-nat code has been left
ifdef-ed out until someone can test & verify the new stuff works (and if
it doesn't, figure out how to make the new code work).
URL: https://bugs.gentoo.org/467806
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2013-06-20 00:29:36 +02:00
|
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|
#define bit_TBM (1 << 21)
|
2016-12-05 15:03:06 +01:00
|
|
|
#define bit_MWAITX (1 << 29)
|
2007-08-23 20:08:50 +02:00
|
|
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2010-04-07 20:46:50 +02:00
|
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|
/* %edx */
|
2016-12-05 15:03:06 +01:00
|
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#define bit_AVX5124VNNIW (1 << 2)
|
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|
#define bit_AVX5124FMAPS (1 << 3)
|
gdb: clean up x86 cpuid implementations
We've currently got 3 files doing open coded implementations of cpuid.
Each has its own set of workarounds and varying levels of how well
they're written and are generally hardcoded to specific cpuid functions.
If you try to build the latest gdb as a PIE on an i386 system, the build
will fail because one of them lacks PIC workarounds (wrt ebx).
Specifically, we have:
common/linux-btrace.c:
two copies of cpuid asm w/specific args, one has no workarounds
while the other implicitly does to avoid memcpy
go32-nat.c:
two copies of cpuid asm w/specific args, one has workarounds to
avoid memcpy
gdb/testsuite/gdb.arch/i386-cpuid.h:
one general cpuid asm w/many workarounds copied from older gcc
Fortunately, that last header there is pretty damn good -- it handles
lots of edge cases, the code is nice & tight (uses gcc asm operands
rather than manual movs), and is already almost a general library type
header. It's also the basis of what is now the public cpuid.h that is
shipped with gcc-4.3+.
So what I've done is pull that test header out and into gdb/common/
(not sure if there's a better place), synced to the version found in
gcc-4.8.0, put a wrapper API around it, and then cut over all the
existing call points to this new header.
Since the func already has support for "is cpuid supported on this proc",
it makes it trivial to push the i386/x86_64 ifdefs down into this wrapper
API too. Now it can be safely used for all targets and gcc will elide
the unused code for us.
I've verified the gdb.arch testsuite still passes, and this code compiles
for an armv7a host as well as x86_64. The go32-nat code has been left
ifdef-ed out until someone can test & verify the new stuff works (and if
it doesn't, figure out how to make the new code work).
URL: https://bugs.gentoo.org/467806
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2013-06-20 00:29:36 +02:00
|
|
|
#define bit_MMXEXT (1 << 22)
|
2010-04-07 20:46:50 +02:00
|
|
|
#define bit_LM (1 << 29)
|
|
|
|
#define bit_3DNOWP (1 << 30)
|
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|
#define bit_3DNOW (1 << 31)
|
2007-08-23 20:08:50 +02:00
|
|
|
|
2016-12-05 15:03:06 +01:00
|
|
|
/* %ebx. */
|
|
|
|
#define bit_CLZERO (1 << 0)
|
|
|
|
|
gdb: clean up x86 cpuid implementations
We've currently got 3 files doing open coded implementations of cpuid.
Each has its own set of workarounds and varying levels of how well
they're written and are generally hardcoded to specific cpuid functions.
If you try to build the latest gdb as a PIE on an i386 system, the build
will fail because one of them lacks PIC workarounds (wrt ebx).
Specifically, we have:
common/linux-btrace.c:
two copies of cpuid asm w/specific args, one has no workarounds
while the other implicitly does to avoid memcpy
go32-nat.c:
two copies of cpuid asm w/specific args, one has workarounds to
avoid memcpy
gdb/testsuite/gdb.arch/i386-cpuid.h:
one general cpuid asm w/many workarounds copied from older gcc
Fortunately, that last header there is pretty damn good -- it handles
lots of edge cases, the code is nice & tight (uses gcc asm operands
rather than manual movs), and is already almost a general library type
header. It's also the basis of what is now the public cpuid.h that is
shipped with gcc-4.3+.
So what I've done is pull that test header out and into gdb/common/
(not sure if there's a better place), synced to the version found in
gcc-4.8.0, put a wrapper API around it, and then cut over all the
existing call points to this new header.
Since the func already has support for "is cpuid supported on this proc",
it makes it trivial to push the i386/x86_64 ifdefs down into this wrapper
API too. Now it can be safely used for all targets and gcc will elide
the unused code for us.
I've verified the gdb.arch testsuite still passes, and this code compiles
for an armv7a host as well as x86_64. The go32-nat code has been left
ifdef-ed out until someone can test & verify the new stuff works (and if
it doesn't, figure out how to make the new code work).
URL: https://bugs.gentoo.org/467806
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2013-06-20 00:29:36 +02:00
|
|
|
/* Extended Features (%eax == 7) */
|
2016-12-05 15:03:06 +01:00
|
|
|
/* %ebx */
|
gdb: clean up x86 cpuid implementations
We've currently got 3 files doing open coded implementations of cpuid.
Each has its own set of workarounds and varying levels of how well
they're written and are generally hardcoded to specific cpuid functions.
If you try to build the latest gdb as a PIE on an i386 system, the build
will fail because one of them lacks PIC workarounds (wrt ebx).
Specifically, we have:
common/linux-btrace.c:
two copies of cpuid asm w/specific args, one has no workarounds
while the other implicitly does to avoid memcpy
go32-nat.c:
two copies of cpuid asm w/specific args, one has workarounds to
avoid memcpy
gdb/testsuite/gdb.arch/i386-cpuid.h:
one general cpuid asm w/many workarounds copied from older gcc
Fortunately, that last header there is pretty damn good -- it handles
lots of edge cases, the code is nice & tight (uses gcc asm operands
rather than manual movs), and is already almost a general library type
header. It's also the basis of what is now the public cpuid.h that is
shipped with gcc-4.3+.
So what I've done is pull that test header out and into gdb/common/
(not sure if there's a better place), synced to the version found in
gcc-4.8.0, put a wrapper API around it, and then cut over all the
existing call points to this new header.
Since the func already has support for "is cpuid supported on this proc",
it makes it trivial to push the i386/x86_64 ifdefs down into this wrapper
API too. Now it can be safely used for all targets and gcc will elide
the unused code for us.
I've verified the gdb.arch testsuite still passes, and this code compiles
for an armv7a host as well as x86_64. The go32-nat code has been left
ifdef-ed out until someone can test & verify the new stuff works (and if
it doesn't, figure out how to make the new code work).
URL: https://bugs.gentoo.org/467806
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2013-06-20 00:29:36 +02:00
|
|
|
#define bit_FSGSBASE (1 << 0)
|
|
|
|
#define bit_BMI (1 << 3)
|
|
|
|
#define bit_HLE (1 << 4)
|
|
|
|
#define bit_AVX2 (1 << 5)
|
|
|
|
#define bit_BMI2 (1 << 8)
|
|
|
|
#define bit_RTM (1 << 11)
|
2016-12-05 15:03:06 +01:00
|
|
|
#define bit_MPX (1 << 14)
|
2013-09-05 11:09:23 +02:00
|
|
|
#define bit_AVX512F (1 << 16)
|
2016-12-05 15:03:06 +01:00
|
|
|
#define bit_AVX512DQ (1 << 17)
|
gdb: clean up x86 cpuid implementations
We've currently got 3 files doing open coded implementations of cpuid.
Each has its own set of workarounds and varying levels of how well
they're written and are generally hardcoded to specific cpuid functions.
If you try to build the latest gdb as a PIE on an i386 system, the build
will fail because one of them lacks PIC workarounds (wrt ebx).
Specifically, we have:
common/linux-btrace.c:
two copies of cpuid asm w/specific args, one has no workarounds
while the other implicitly does to avoid memcpy
go32-nat.c:
two copies of cpuid asm w/specific args, one has workarounds to
avoid memcpy
gdb/testsuite/gdb.arch/i386-cpuid.h:
one general cpuid asm w/many workarounds copied from older gcc
Fortunately, that last header there is pretty damn good -- it handles
lots of edge cases, the code is nice & tight (uses gcc asm operands
rather than manual movs), and is already almost a general library type
header. It's also the basis of what is now the public cpuid.h that is
shipped with gcc-4.3+.
So what I've done is pull that test header out and into gdb/common/
(not sure if there's a better place), synced to the version found in
gcc-4.8.0, put a wrapper API around it, and then cut over all the
existing call points to this new header.
Since the func already has support for "is cpuid supported on this proc",
it makes it trivial to push the i386/x86_64 ifdefs down into this wrapper
API too. Now it can be safely used for all targets and gcc will elide
the unused code for us.
I've verified the gdb.arch testsuite still passes, and this code compiles
for an armv7a host as well as x86_64. The go32-nat code has been left
ifdef-ed out until someone can test & verify the new stuff works (and if
it doesn't, figure out how to make the new code work).
URL: https://bugs.gentoo.org/467806
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2013-06-20 00:29:36 +02:00
|
|
|
#define bit_RDSEED (1 << 18)
|
|
|
|
#define bit_ADX (1 << 19)
|
2016-12-05 15:03:06 +01:00
|
|
|
#define bit_AVX512IFMA (1 << 21)
|
|
|
|
#define bit_CLFLUSHOPT (1 << 23)
|
|
|
|
#define bit_CLWB (1 << 24)
|
2013-09-05 11:09:23 +02:00
|
|
|
#define bit_AVX512PF (1 << 26)
|
|
|
|
#define bit_AVX512ER (1 << 27)
|
|
|
|
#define bit_AVX512CD (1 << 28)
|
|
|
|
#define bit_SHA (1 << 29)
|
2016-12-05 15:03:06 +01:00
|
|
|
#define bit_AVX512BW (1 << 30)
|
|
|
|
#define bit_AVX512VL (1 << 31)
|
|
|
|
|
|
|
|
/* %ecx */
|
|
|
|
#define bit_PREFETCHWT1 (1 << 0)
|
|
|
|
#define bit_AVX512VBMI (1 << 1)
|
|
|
|
#define bit_PKU (1 << 3)
|
|
|
|
#define bit_OSPKE (1 << 4)
|
|
|
|
|
|
|
|
/* XFEATURE_ENABLED_MASK register bits (%eax == 13, %ecx == 0) */
|
|
|
|
#define bit_BNDREGS (1 << 3)
|
|
|
|
#define bit_BNDCSR (1 << 4)
|
gdb: clean up x86 cpuid implementations
We've currently got 3 files doing open coded implementations of cpuid.
Each has its own set of workarounds and varying levels of how well
they're written and are generally hardcoded to specific cpuid functions.
If you try to build the latest gdb as a PIE on an i386 system, the build
will fail because one of them lacks PIC workarounds (wrt ebx).
Specifically, we have:
common/linux-btrace.c:
two copies of cpuid asm w/specific args, one has no workarounds
while the other implicitly does to avoid memcpy
go32-nat.c:
two copies of cpuid asm w/specific args, one has workarounds to
avoid memcpy
gdb/testsuite/gdb.arch/i386-cpuid.h:
one general cpuid asm w/many workarounds copied from older gcc
Fortunately, that last header there is pretty damn good -- it handles
lots of edge cases, the code is nice & tight (uses gcc asm operands
rather than manual movs), and is already almost a general library type
header. It's also the basis of what is now the public cpuid.h that is
shipped with gcc-4.3+.
So what I've done is pull that test header out and into gdb/common/
(not sure if there's a better place), synced to the version found in
gcc-4.8.0, put a wrapper API around it, and then cut over all the
existing call points to this new header.
Since the func already has support for "is cpuid supported on this proc",
it makes it trivial to push the i386/x86_64 ifdefs down into this wrapper
API too. Now it can be safely used for all targets and gcc will elide
the unused code for us.
I've verified the gdb.arch testsuite still passes, and this code compiles
for an armv7a host as well as x86_64. The go32-nat code has been left
ifdef-ed out until someone can test & verify the new stuff works (and if
it doesn't, figure out how to make the new code work).
URL: https://bugs.gentoo.org/467806
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2013-06-20 00:29:36 +02:00
|
|
|
|
|
|
|
/* Extended State Enumeration Sub-leaf (%eax == 13, %ecx == 1) */
|
|
|
|
#define bit_XSAVEOPT (1 << 0)
|
2016-12-05 15:03:06 +01:00
|
|
|
#define bit_XSAVEC (1 << 1)
|
|
|
|
#define bit_XSAVES (1 << 3)
|
gdb: clean up x86 cpuid implementations
We've currently got 3 files doing open coded implementations of cpuid.
Each has its own set of workarounds and varying levels of how well
they're written and are generally hardcoded to specific cpuid functions.
If you try to build the latest gdb as a PIE on an i386 system, the build
will fail because one of them lacks PIC workarounds (wrt ebx).
Specifically, we have:
common/linux-btrace.c:
two copies of cpuid asm w/specific args, one has no workarounds
while the other implicitly does to avoid memcpy
go32-nat.c:
two copies of cpuid asm w/specific args, one has workarounds to
avoid memcpy
gdb/testsuite/gdb.arch/i386-cpuid.h:
one general cpuid asm w/many workarounds copied from older gcc
Fortunately, that last header there is pretty damn good -- it handles
lots of edge cases, the code is nice & tight (uses gcc asm operands
rather than manual movs), and is already almost a general library type
header. It's also the basis of what is now the public cpuid.h that is
shipped with gcc-4.3+.
So what I've done is pull that test header out and into gdb/common/
(not sure if there's a better place), synced to the version found in
gcc-4.8.0, put a wrapper API around it, and then cut over all the
existing call points to this new header.
Since the func already has support for "is cpuid supported on this proc",
it makes it trivial to push the i386/x86_64 ifdefs down into this wrapper
API too. Now it can be safely used for all targets and gcc will elide
the unused code for us.
I've verified the gdb.arch testsuite still passes, and this code compiles
for an armv7a host as well as x86_64. The go32-nat code has been left
ifdef-ed out until someone can test & verify the new stuff works (and if
it doesn't, figure out how to make the new code work).
URL: https://bugs.gentoo.org/467806
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2013-06-20 00:29:36 +02:00
|
|
|
|
|
|
|
/* Signatures for different CPU implementations as returned in uses
|
|
|
|
of cpuid with level 0. */
|
|
|
|
#define signature_AMD_ebx 0x68747541
|
|
|
|
#define signature_AMD_ecx 0x444d4163
|
|
|
|
#define signature_AMD_edx 0x69746e65
|
|
|
|
|
|
|
|
#define signature_CENTAUR_ebx 0x746e6543
|
|
|
|
#define signature_CENTAUR_ecx 0x736c7561
|
|
|
|
#define signature_CENTAUR_edx 0x48727561
|
|
|
|
|
|
|
|
#define signature_CYRIX_ebx 0x69727943
|
|
|
|
#define signature_CYRIX_ecx 0x64616574
|
|
|
|
#define signature_CYRIX_edx 0x736e4978
|
|
|
|
|
|
|
|
#define signature_INTEL_ebx 0x756e6547
|
|
|
|
#define signature_INTEL_ecx 0x6c65746e
|
|
|
|
#define signature_INTEL_edx 0x49656e69
|
|
|
|
|
|
|
|
#define signature_TM1_ebx 0x6e617254
|
|
|
|
#define signature_TM1_ecx 0x55504361
|
|
|
|
#define signature_TM1_edx 0x74656d73
|
|
|
|
|
|
|
|
#define signature_TM2_ebx 0x756e6547
|
|
|
|
#define signature_TM2_ecx 0x3638784d
|
|
|
|
#define signature_TM2_edx 0x54656e69
|
|
|
|
|
|
|
|
#define signature_NSC_ebx 0x646f6547
|
|
|
|
#define signature_NSC_ecx 0x43534e20
|
|
|
|
#define signature_NSC_edx 0x79622065
|
|
|
|
|
|
|
|
#define signature_NEXGEN_ebx 0x4778654e
|
|
|
|
#define signature_NEXGEN_ecx 0x6e657669
|
|
|
|
#define signature_NEXGEN_edx 0x72446e65
|
|
|
|
|
|
|
|
#define signature_RISE_ebx 0x65736952
|
|
|
|
#define signature_RISE_ecx 0x65736952
|
|
|
|
#define signature_RISE_edx 0x65736952
|
|
|
|
|
|
|
|
#define signature_SIS_ebx 0x20536953
|
|
|
|
#define signature_SIS_ecx 0x20536953
|
|
|
|
#define signature_SIS_edx 0x20536953
|
|
|
|
|
|
|
|
#define signature_UMC_ebx 0x20434d55
|
|
|
|
#define signature_UMC_ecx 0x20434d55
|
|
|
|
#define signature_UMC_edx 0x20434d55
|
|
|
|
|
|
|
|
#define signature_VIA_ebx 0x20414956
|
|
|
|
#define signature_VIA_ecx 0x20414956
|
|
|
|
#define signature_VIA_edx 0x20414956
|
|
|
|
|
|
|
|
#define signature_VORTEX_ebx 0x74726f56
|
|
|
|
#define signature_VORTEX_ecx 0x436f5320
|
|
|
|
#define signature_VORTEX_edx 0x36387865
|
2004-06-07 17:38:52 +02:00
|
|
|
|
2010-04-07 20:46:50 +02:00
|
|
|
#define __cpuid(level, a, b, c, d) \
|
|
|
|
__asm__ ("cpuid\n\t" \
|
|
|
|
: "=a" (a), "=b" (b), "=c" (c), "=d" (d) \
|
|
|
|
: "0" (level))
|
2004-06-07 17:38:52 +02:00
|
|
|
|
2010-04-07 20:46:50 +02:00
|
|
|
#define __cpuid_count(level, count, a, b, c, d) \
|
|
|
|
__asm__ ("cpuid\n\t" \
|
|
|
|
: "=a" (a), "=b" (b), "=c" (c), "=d" (d) \
|
|
|
|
: "0" (level), "2" (count))
|
2016-12-05 15:03:06 +01:00
|
|
|
|
2004-06-07 17:38:52 +02:00
|
|
|
|
2010-04-07 20:46:50 +02:00
|
|
|
/* Return highest supported input value for cpuid instruction. ext can
|
|
|
|
be either 0x0 or 0x8000000 to return highest supported value for
|
|
|
|
basic or extended cpuid information. Function returns 0 if cpuid
|
|
|
|
is not supported or whatever cpuid returns in eax register. If sig
|
|
|
|
pointer is non-null, then first four bytes of the signature
|
|
|
|
(as found in ebx register) are returned in location pointed by sig. */
|
|
|
|
|
|
|
|
static __inline unsigned int
|
|
|
|
__get_cpuid_max (unsigned int __ext, unsigned int *__sig)
|
2004-06-07 17:38:52 +02:00
|
|
|
{
|
2010-04-07 20:46:50 +02:00
|
|
|
unsigned int __eax, __ebx, __ecx, __edx;
|
2004-06-07 17:38:52 +02:00
|
|
|
|
2013-09-05 11:09:23 +02:00
|
|
|
#ifndef __x86_64__
|
2004-06-07 17:38:52 +02:00
|
|
|
/* See if we can use cpuid. On AMD64 we always can. */
|
gdb: clean up x86 cpuid implementations
We've currently got 3 files doing open coded implementations of cpuid.
Each has its own set of workarounds and varying levels of how well
they're written and are generally hardcoded to specific cpuid functions.
If you try to build the latest gdb as a PIE on an i386 system, the build
will fail because one of them lacks PIC workarounds (wrt ebx).
Specifically, we have:
common/linux-btrace.c:
two copies of cpuid asm w/specific args, one has no workarounds
while the other implicitly does to avoid memcpy
go32-nat.c:
two copies of cpuid asm w/specific args, one has workarounds to
avoid memcpy
gdb/testsuite/gdb.arch/i386-cpuid.h:
one general cpuid asm w/many workarounds copied from older gcc
Fortunately, that last header there is pretty damn good -- it handles
lots of edge cases, the code is nice & tight (uses gcc asm operands
rather than manual movs), and is already almost a general library type
header. It's also the basis of what is now the public cpuid.h that is
shipped with gcc-4.3+.
So what I've done is pull that test header out and into gdb/common/
(not sure if there's a better place), synced to the version found in
gcc-4.8.0, put a wrapper API around it, and then cut over all the
existing call points to this new header.
Since the func already has support for "is cpuid supported on this proc",
it makes it trivial to push the i386/x86_64 ifdefs down into this wrapper
API too. Now it can be safely used for all targets and gcc will elide
the unused code for us.
I've verified the gdb.arch testsuite still passes, and this code compiles
for an armv7a host as well as x86_64. The go32-nat code has been left
ifdef-ed out until someone can test & verify the new stuff works (and if
it doesn't, figure out how to make the new code work).
URL: https://bugs.gentoo.org/467806
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2013-06-20 00:29:36 +02:00
|
|
|
#if __GNUC__ >= 3
|
2010-04-07 20:46:50 +02:00
|
|
|
__asm__ ("pushf{l|d}\n\t"
|
|
|
|
"pushf{l|d}\n\t"
|
|
|
|
"pop{l}\t%0\n\t"
|
|
|
|
"mov{l}\t{%0, %1|%1, %0}\n\t"
|
|
|
|
"xor{l}\t{%2, %0|%0, %2}\n\t"
|
|
|
|
"push{l}\t%0\n\t"
|
|
|
|
"popf{l|d}\n\t"
|
|
|
|
"pushf{l|d}\n\t"
|
|
|
|
"pop{l}\t%0\n\t"
|
|
|
|
"popf{l|d}\n\t"
|
|
|
|
: "=&r" (__eax), "=&r" (__ebx)
|
|
|
|
: "i" (0x00200000));
|
|
|
|
#else
|
|
|
|
/* Host GCCs older than 3.0 weren't supporting Intel asm syntax
|
|
|
|
nor alternatives in i386 code. */
|
|
|
|
__asm__ ("pushfl\n\t"
|
|
|
|
"pushfl\n\t"
|
|
|
|
"popl\t%0\n\t"
|
|
|
|
"movl\t%0, %1\n\t"
|
|
|
|
"xorl\t%2, %0\n\t"
|
|
|
|
"pushl\t%0\n\t"
|
|
|
|
"popfl\n\t"
|
|
|
|
"pushfl\n\t"
|
|
|
|
"popl\t%0\n\t"
|
|
|
|
"popfl\n\t"
|
|
|
|
: "=&r" (__eax), "=&r" (__ebx)
|
2004-06-07 17:38:52 +02:00
|
|
|
: "i" (0x00200000));
|
|
|
|
#endif
|
|
|
|
|
2010-04-07 20:46:50 +02:00
|
|
|
if (!((__eax ^ __ebx) & 0x00200000))
|
|
|
|
return 0;
|
2004-06-07 17:38:52 +02:00
|
|
|
#endif
|
2010-04-07 20:46:50 +02:00
|
|
|
|
|
|
|
/* Host supports cpuid. Return highest supported cpuid input value. */
|
|
|
|
__cpuid (__ext, __eax, __ebx, __ecx, __edx);
|
|
|
|
|
|
|
|
if (__sig)
|
|
|
|
*__sig = __ebx;
|
|
|
|
|
|
|
|
return __eax;
|
|
|
|
}
|
|
|
|
|
2016-12-05 15:03:06 +01:00
|
|
|
/* Return cpuid data for requested cpuid leaf, as found in returned
|
2010-04-07 20:46:50 +02:00
|
|
|
eax, ebx, ecx and edx registers. The function checks if cpuid is
|
|
|
|
supported and returns 1 for valid cpuid information or 0 for
|
2016-12-05 15:03:06 +01:00
|
|
|
unsupported cpuid leaf. All pointers are required to be non-null. */
|
2010-04-07 20:46:50 +02:00
|
|
|
|
|
|
|
static __inline int
|
2016-12-05 15:03:06 +01:00
|
|
|
__get_cpuid (unsigned int __leaf,
|
2010-04-07 20:46:50 +02:00
|
|
|
unsigned int *__eax, unsigned int *__ebx,
|
|
|
|
unsigned int *__ecx, unsigned int *__edx)
|
|
|
|
{
|
2016-12-05 15:03:06 +01:00
|
|
|
unsigned int __ext = __leaf & 0x80000000;
|
|
|
|
|
|
|
|
if (__get_cpuid_max (__ext, 0) < __leaf)
|
|
|
|
return 0;
|
|
|
|
|
|
|
|
__cpuid (__leaf, *__eax, *__ebx, *__ecx, *__edx);
|
|
|
|
return 1;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Same as above, but sub-leaf can be specified. */
|
|
|
|
|
|
|
|
static __inline int
|
|
|
|
__get_cpuid_count (unsigned int __leaf, unsigned int __subleaf,
|
|
|
|
unsigned int *__eax, unsigned int *__ebx,
|
|
|
|
unsigned int *__ecx, unsigned int *__edx)
|
|
|
|
{
|
|
|
|
unsigned int __ext = __leaf & 0x80000000;
|
2010-04-07 20:46:50 +02:00
|
|
|
|
2016-12-05 15:03:06 +01:00
|
|
|
if (__get_cpuid_max (__ext, 0) < __leaf)
|
2010-04-07 20:46:50 +02:00
|
|
|
return 0;
|
|
|
|
|
2016-12-05 15:03:06 +01:00
|
|
|
__cpuid_count (__leaf, __subleaf, *__eax, *__ebx, *__ecx, *__edx);
|
2010-04-07 20:46:50 +02:00
|
|
|
return 1;
|
|
|
|
}
|