2005-01-28 05:29:00 +01:00
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/* Simulator support for cris.
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THIS FILE IS MACHINE GENERATED WITH CGEN.
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2014-01-01 04:54:24 +01:00
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Copyright 1996-2014 Free Software Foundation, Inc.
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2005-01-28 05:29:00 +01:00
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This file is part of the GNU simulators.
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* cris/arch.c, cris/arch.h, cris/cpuall.h, cris/cpuv10.c,
cris/cpuv10.h, cris/cpuv32.c, cris/cpuv32.h, cris/cris-desc.c,
cris/cris-desc.h, cris/cris-opc.h, cris/decodev10.c,
cris/decodev10.h, cris/decodev32.c, cris/decodev32.h,
cris/modelv10.c, cris/modelv32.c, cris/semcrisv10f-switch.c,
cris/semcrisv32f-switch.c: Regenerate.
2007-10-22 18:06:38 +02:00
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This file is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3, or (at your option)
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any later version.
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2005-01-28 05:29:00 +01:00
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* cris/arch.c, cris/arch.h, cris/cpuall.h, cris/cpuv10.c,
cris/cpuv10.h, cris/cpuv32.c, cris/cpuv32.h, cris/cris-desc.c,
cris/cris-desc.h, cris/cris-opc.h, cris/decodev10.c,
cris/decodev10.h, cris/decodev32.c, cris/decodev32.h,
cris/modelv10.c, cris/modelv32.c, cris/semcrisv10f-switch.c,
cris/semcrisv32f-switch.c: Regenerate.
2007-10-22 18:06:38 +02:00
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It is distributed in the hope that it will be useful, but WITHOUT
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ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
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or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
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License for more details.
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2005-01-28 05:29:00 +01:00
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* cris/arch.c, cris/arch.h, cris/cpuall.h, cris/cpuv10.c,
cris/cpuv10.h, cris/cpuv32.c, cris/cpuv32.h, cris/cris-desc.c,
cris/cris-desc.h, cris/cris-opc.h, cris/decodev10.c,
cris/decodev10.h, cris/decodev32.c, cris/decodev32.h,
cris/modelv10.c, cris/modelv32.c, cris/semcrisv10f-switch.c,
cris/semcrisv32f-switch.c: Regenerate.
2007-10-22 18:06:38 +02:00
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You should have received a copy of the GNU General Public License along
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2012-12-19 08:18:22 +01:00
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with this program; if not, see <http://www.gnu.org/licenses/>.
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2005-01-28 05:29:00 +01:00
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*/
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#include "sim-main.h"
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#include "bfd.h"
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const MACH *sim_machs[] =
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{
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#ifdef HAVE_CPU_CRISV10F
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& crisv10_mach,
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#endif
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#ifdef HAVE_CPU_CRISV32F
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& crisv32_mach,
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#endif
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0
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};
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