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RISC-V/GAS: Support more relocs against constant addresses Previously, some pseudoinstructions like "call" only accepted symbolic addresses and rejected constant addresses with an esoteric internal error. This patch enables them by deferring application of constant relocations to md_apply_fix, rather than eagerly applying them during instruction assembly. gas/ChangeLog 2017-01-09 Andrew Waterman <andrew@sifive.com> * config/tc-riscv.c (append_insn): Don't eagerly apply relocations against constants. (md_apply_fix): Mark relocations against constants as "done."
2016-12-22 03:05:28 +01:00
2017-01-09 Andrew Waterman <andrew@sifive.com>
* config/tc-riscv.c (append_insn): Don't eagerly apply relocations
against constants.
(md_apply_fix): Mark relocations against constants as "done."
RISC-V/GAS: Improve handling of invalid relocs TLS relocs against constants previously segfaulted, and illegal symbol subtractions were silently ignored. The previous behavior was to segfault. gas/ChangeLog 2017-01-09 Andrew Waterman <andrew@sifive.com> * config/tc-riscv.c (md_apply_fix): Report TLS relocations against constants. Report disallowed symbol subtractions.
2016-12-21 21:47:13 +01:00
2017-01-09 Andrew Waterman <andrew@sifive.com>
* config/tc-riscv.c (append_insn): Don't eagerly apply relocations
against constants.
(md_apply_fix): Mark relocations against constants as "done."
Remove some custom sections from RISC-V's default linker scripts This was added so compressed loads could have smaller offsets for accessing the data section, but the result was that writable sections ended up in INITIAL_READONLY_SECTIONS. This is a bad idea. The fix is to just remove this micro-optimization. Thanks to Alan Morda for finding the problem! ld/ChangeLog 2017-01-09 Palmer Dabbelt <palmer@dabbelt.com> Kito Cheng <kito.cheng@gmail.com> * emulparams/elf32lriscv-defs.sh (INITIAL_READONLY_SECTIONS): Removed. (SDATA_START_SYMBOLS): Likewise.
2016-12-30 02:29:53 +01:00
2017-01-09 Palmer Dabbelt <palmer@dabbelt.com>
Kito Cheng <kito.cheng@gmail.com>
* emulparams/elf32lriscv-defs.sh (INITIAL_READONLY_SECTIONS):
Removed.
(SDATA_START_SYMBOLS): Likewise.
Add Swedish translation for GAS. * po/sv.po: New Swedish translation. * configure.ac (ALL_LINGUAS): Add sv. * configure: Regenerate.
2017-01-09 11:11:50 +01:00
2017-01-09 Nick Clifton <nickc@redhat.com>
* po/sv.po: New Swedish translation.
* configure.ac (ALL_LINGUAS): Add sv.
* configure: Regenerate.
RISC-V/GAS: Correct branch relaxation for weak symbols. * config/tc-riscv.c (relaxed_branch_length): Use the long sequence when the target is a weak symbol.
2017-01-09 10:22:33 +01:00
2017-01-09 Andrew Waterman <andrew@sifive.com>
* config/tc-riscv.c (relaxed_branch_length): Use the long
sequence when the target is a weak symbol.
[AArch64] Add separate feature flag for weaker release consistent load insns The weaker release consistency support of ARMv8.3-A is allowed as an optional extension for ARMv8.2-A, so separate command line option and feature flag is added: -march=armv8.2-a+rcpc turns LDAPR, LDAPRB, LDAPRH instructions on. opcodes/ * aarch64-tbl.h (RCPC, RCPC_INSN): Define. (aarch64_opcode_table): Use RCPC_INSN. include/ * opcode/aarch64.h (AARCH64_FEATURE_RCPC): Define. (AARCH64_ARCH_V8_3): Update. gas/ * config/tc-aarch64.c (aarch64_features): Add rcpc. * doc/c-aarch64.texi (AArch64 Extensions): Document rcpc. * testsuite/gas/aarch64/ldst-exclusive-armv8_3.d: Rename to ... * testsuite/gas/aarch64/ldst-rcpc.d: This. * testsuite/gas/aarch64/ldst-exclusive-armv8_3.s: Rename to ... * testsuite/gas/aarch64/ldst-rcpc.s: This. * testsuite/gas/aarch64/ldst-rcpc-armv8_2.d: New test.
2017-01-04 13:27:10 +01:00
2017-01-04 Szabolcs Nagy <szabolcs.nagy@arm.com>
* config/tc-aarch64.c (aarch64_features): Add rcpc.
* doc/c-aarch64.texi (AArch64 Extensions): Document rcpc.
* testsuite/gas/aarch64/ldst-exclusive-armv8_3.d: Rename to ...
* testsuite/gas/aarch64/ldst-rcpc.d: This.
* testsuite/gas/aarch64/ldst-exclusive-armv8_3.s: Rename to ...
* testsuite/gas/aarch64/ldst-rcpc.s: This.
* testsuite/gas/aarch64/ldst-rcpc-armv8_2.d: New test.
When configuring GAS treat as sparcv9 target the same way as a sparc64 target. PR gas/20992 * configure.tgt: Treat sparcv9 as sparc64.
2017-01-04 12:49:00 +01:00
2017-01-04 Norm Jacobs <norm.jacobs@oracle.com>
PR gas/20992
* configure.tgt: Treat sparcv9 as sparc64.
Add support for the Q extension to the RISCV ISA. gas * config/tc-riscv.c (riscv_set_arch): Whitelist the "q" ISA extension. (riscv_after_parse_args): Set FLOAT_ABI_QUAD when the Q ISA is enabled and no other ABI is specified. include * opcode/riscv-opc.h: Add support for the "q" ISA extension. opcodes * riscv-opc.c (riscv-opcodes): Add support for the "q" ISA extension. * riscv-opcodes/all-opcodes: Likewise.
2017-01-03 18:42:01 +01:00
2017-01-03 Kito Cheng <kito.cheng@gmail.com>
* config/tc-riscv.c (riscv_set_arch): Whitelist the "q" ISA
extension.
(riscv_after_parse_args): Set FLOAT_ABI_QUAD when the Q ISA is
enabled and no other ABI is specified.
Fix PRU GAS for 32-bit hosts The PRU GAS port I originally submitted does not build on 32bit hosts. This patch fixes it by aligning md_number_to_chars's definition with the global declaration in tc.h. Here is the original bug report I got: https://github.com/rcn-ee/repos/pull/23#issuecomment-269915175 * config/tc-pru.c (md_number_to_chars): Fix parameter to be valueT, as declared in tc.h. (md_apply_fix): Fix to work on 32-bit hosts. Signed-off-by: Dimitar Dimitrov <dimitar@dinux.eu>
2017-01-02 17:20:21 +01:00
2017-01-03 Dimitar Dimitrov <dimitar@dinux.eu>
* config/tc-pru.c (md_number_to_chars): Fix parameter to be
valueT, as declared in tc.h.
(md_apply_fix): Fix to work on 32-bit hosts.
Update year range in copyright notice of all files.
2017-01-02 04:36:43 +01:00
2017-01-02 Alan Modra <amodra@gmail.com>
Update year range in copyright notice of all files.
ChangeLog rotation
2017-01-02 04:25:05 +01:00
For older changes see ChangeLog-2016
New 2016 binutils ChangeLog files Note that this does not create bfd/doc/ChangeLog, */testsuite/ChangeLog and include/*/ChangeLog files.
2016-01-01 11:44:31 +01:00
ChangeLog rotation
2017-01-02 04:25:05 +01:00
Copyright (C) 2017 Free Software Foundation, Inc.
New 2016 binutils ChangeLog files Note that this does not create bfd/doc/ChangeLog, */testsuite/ChangeLog and include/*/ChangeLog files.
2016-01-01 11:44:31 +01:00
Copying and distribution of this file, with or without modification,
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