Use the WR_HILO, RD_HILO, MOD_HILO, and MOD_LO macros.
This commit is contained in:
parent
e70f259005
commit
08fe7a7e60
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@ -1,3 +1,8 @@
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2000-12-03 Chris Demetriou cgd@sibyte.com
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* mips-opc.c (mips_builtin_opcodes): Use the WR_HILO, RD_HILO,
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MOD_HILO, and MOD_LO macros.
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2000-12-03 Ed Satterthwaite ehs@sibyte.com and
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Chris Demetriou cgd@sibyte.com
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@ -115,20 +115,20 @@ const struct mips_opcode mips_builtin_opcodes[] =
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/* These instructions appear first so that the disassembler will find
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them first. The assemblers uses a hash table based on the
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instruction name anyhow. */
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/* name, args, match, mask, pinfo, membership */
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{"pref", "k,o(b)", 0xcc000000, 0xfc000000, RD_b, I32|G3|M1},
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{"nop", "", 0x00000000, 0xffffffff, 0, I1 },
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{"ssnop", "", 0x00000040, 0xffffffff, 0, I32|M1 },
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{"li", "t,j", 0x24000000, 0xffe00000, WR_t, I1 }, /* addiu */
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{"li", "t,i", 0x34000000, 0xffe00000, WR_t, I1 }, /* ori */
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{"li", "t,I", 0, (int) M_LI, INSN_MACRO, I1 },
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{"move", "d,s", 0x00000025, 0xfc1f07ff, WR_d|RD_s, I1|G6 },/* or */
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{"move", "d,s", 0x0000002d, 0xfc1f07ff, WR_d|RD_s, I3 },/* daddu */
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{"move", "d,s", 0x00000021, 0xfc1f07ff, WR_d|RD_s, I1 },/* addu */
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{"move", "d,s", 0x00000025, 0xfc1f07ff, WR_d|RD_s, I1 },/* or */
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{"b", "p", 0x10000000, 0xffff0000, UBD, I1 },/* beq 0,0 */
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{"b", "p", 0x04010000, 0xffff0000, UBD, I1 },/* bgez 0 */
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{"bal", "p", 0x04110000, 0xffff0000, UBD|WR_31, I1 },/* bgezal 0*/
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/* name, args, match, mask, pinfo, membership */
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{"pref", "k,o(b)", 0xcc000000, 0xfc000000, RD_b, I32|G3|M1},
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{"nop", "", 0x00000000, 0xffffffff, 0, I1 },
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{"ssnop", "", 0x00000040, 0xffffffff, 0, I32|M1 },
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{"li", "t,j", 0x24000000, 0xffe00000, WR_t, I1 }, /* addiu */
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{"li", "t,i", 0x34000000, 0xffe00000, WR_t, I1 }, /* ori */
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{"li", "t,I", 0, (int) M_LI, INSN_MACRO, I1 },
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{"move", "d,s", 0x00000025, 0xfc1f07ff, WR_d|RD_s, I1|G6 },/* or */
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{"move", "d,s", 0x0000002d, 0xfc1f07ff, WR_d|RD_s, I3 },/* daddu */
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{"move", "d,s", 0x00000021, 0xfc1f07ff, WR_d|RD_s, I1 },/* addu */
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{"move", "d,s", 0x00000025, 0xfc1f07ff, WR_d|RD_s, I1 },/* or */
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{"b", "p", 0x10000000, 0xffff0000, UBD, I1 },/* beq 0,0 */
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{"b", "p", 0x04010000, 0xffff0000, UBD, I1 },/* bgez 0 */
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{"bal", "p", 0x04110000, 0xffff0000, UBD|WR_31, I1 },/* bgezal 0*/
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{"abs", "d,v", 0, (int) M_ABS, INSN_MACRO, I1 },
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{"abs.s", "D,V", 0x46000005, 0xffff003f, WR_D|RD_S|FP_S, I1 },
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@ -149,86 +149,86 @@ const struct mips_opcode mips_builtin_opcodes[] =
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{"andi", "t,r,i", 0x30000000, 0xfc000000, WR_t|RD_s, I1 },
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/* b is at the top of the table. */
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/* bal is at the top of the table. */
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{"bc0f", "p", 0x41000000, 0xffff0000, CBD|RD_CC, I1 },
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{"bc0fl", "p", 0x41020000, 0xffff0000, CBL|RD_CC, I2|T3 },
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{"bc1f", "p", 0x45000000, 0xffff0000, CBD|RD_CC|FP_S, I1|M1 },
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{"bc1f", "N,p", 0x45000000, 0xffe30000, CBD|RD_CC|FP_S, I4|I32|M1},
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{"bc1fl", "p", 0x45020000, 0xffff0000, CBL|RD_CC|FP_S, I2|T3|M1},
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{"bc1fl", "N,p", 0x45020000, 0xffe30000, CBL|RD_CC|FP_S, I4|I32|M1},
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{"bc2f", "p", 0x49000000, 0xffff0000, CBD|RD_CC, I1 },
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{"bc2fl", "p", 0x49020000, 0xffff0000, CBL|RD_CC, I2|T3 },
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{"bc3f", "p", 0x4d000000, 0xffff0000, CBD|RD_CC, I1 },
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{"bc3fl", "p", 0x4d020000, 0xffff0000, CBL|RD_CC, I2|T3 },
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{"bc0t", "p", 0x41010000, 0xffff0000, CBD|RD_CC, I1 },
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{"bc0tl", "p", 0x41030000, 0xffff0000, CBL|RD_CC, I2|T3 },
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{"bc1t", "p", 0x45010000, 0xffff0000, CBD|RD_CC|FP_S, I1 },
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{"bc1t", "N,p", 0x45010000, 0xffe30000, CBD|RD_CC|FP_S, I4|I32|M1},
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{"bc1tl", "p", 0x45030000, 0xffff0000, CBL|RD_CC|FP_S, I2|T3 },
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{"bc1tl", "N,p", 0x45030000, 0xffe30000, CBL|RD_CC|FP_S, I4|I32|M1},
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{"bc2t", "p", 0x49010000, 0xffff0000, CBD|RD_CC, I1 },
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{"bc2tl", "p", 0x49030000, 0xffff0000, CBL|RD_CC, I2|T3 },
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{"bc3t", "p", 0x4d010000, 0xffff0000, CBD|RD_CC, I1 },
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{"bc3tl", "p", 0x4d030000, 0xffff0000, CBL|RD_CC, I2|T3 },
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{"beqz", "s,p", 0x10000000, 0xfc1f0000, CBD|RD_s, I1 },
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{"beqzl", "s,p", 0x50000000, 0xfc1f0000, CBL|RD_s, I2|T3 },
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{"beq", "s,t,p", 0x10000000, 0xfc000000, CBD|RD_s|RD_t, I1 },
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{"beq", "s,I,p", 0, (int) M_BEQ_I, INSN_MACRO, I1 },
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{"beql", "s,t,p", 0x50000000, 0xfc000000, CBL|RD_s|RD_t, I2|T3 },
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{"beql", "s,I,p", 0, (int) M_BEQL_I, INSN_MACRO, I2 },
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{"bge", "s,t,p", 0, (int) M_BGE, INSN_MACRO, I1 },
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{"bge", "s,I,p", 0, (int) M_BGE_I, INSN_MACRO, I1 },
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{"bgel", "s,t,p", 0, (int) M_BGEL, INSN_MACRO, I2 },
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{"bgel", "s,I,p", 0, (int) M_BGEL_I, INSN_MACRO, I2 },
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{"bgeu", "s,t,p", 0, (int) M_BGEU, INSN_MACRO, I1 },
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{"bgeu", "s,I,p", 0, (int) M_BGEU_I, INSN_MACRO, I1 },
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{"bgeul", "s,t,p", 0, (int) M_BGEUL, INSN_MACRO, I2 },
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{"bgeul", "s,I,p", 0, (int) M_BGEUL_I, INSN_MACRO, I2 },
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{"bgez", "s,p", 0x04010000, 0xfc1f0000, CBD|RD_s, I1 },
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{"bgezl", "s,p", 0x04030000, 0xfc1f0000, CBL|RD_s, I2|T3 },
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{"bgezal", "s,p", 0x04110000, 0xfc1f0000, CBD|RD_s|WR_31, I1 },
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{"bgezall", "s,p", 0x04130000, 0xfc1f0000, CBL|RD_s, I2|T3 },
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{"bgt", "s,t,p", 0, (int) M_BGT, INSN_MACRO, I1 },
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{"bgt", "s,I,p", 0, (int) M_BGT_I, INSN_MACRO, I1 },
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{"bgtl", "s,t,p", 0, (int) M_BGTL, INSN_MACRO, I2 },
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{"bgtl", "s,I,p", 0, (int) M_BGTL_I, INSN_MACRO, I2 },
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{"bgtu", "s,t,p", 0, (int) M_BGTU, INSN_MACRO, I1 },
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{"bgtu", "s,I,p", 0, (int) M_BGTU_I, INSN_MACRO, I1 },
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{"bgtul", "s,t,p", 0, (int) M_BGTUL, INSN_MACRO, I2 },
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{"bgtul", "s,I,p", 0, (int) M_BGTUL_I, INSN_MACRO, I2 },
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{"bgtz", "s,p", 0x1c000000, 0xfc1f0000, CBD|RD_s, I1 },
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{"bgtzl", "s,p", 0x5c000000, 0xfc1f0000, CBL|RD_s, I2|T3 },
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{"ble", "s,t,p", 0, (int) M_BLE, INSN_MACRO, I1 },
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{"ble", "s,I,p", 0, (int) M_BLE_I, INSN_MACRO, I1 },
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{"blel", "s,t,p", 0, (int) M_BLEL, INSN_MACRO, I2 },
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{"blel", "s,I,p", 0, (int) M_BLEL_I, INSN_MACRO, I2 },
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{"bleu", "s,t,p", 0, (int) M_BLEU, INSN_MACRO, I1 },
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{"bleu", "s,I,p", 0, (int) M_BLEU_I, INSN_MACRO, I1 },
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{"bleul", "s,t,p", 0, (int) M_BLEUL, INSN_MACRO, I2 },
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{"bleul", "s,I,p", 0, (int) M_BLEUL_I, INSN_MACRO, I2 },
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{"blez", "s,p", 0x18000000, 0xfc1f0000, CBD|RD_s, I1 },
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{"blezl", "s,p", 0x58000000, 0xfc1f0000, CBL|RD_s, I2|T3 },
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{"blt", "s,t,p", 0, (int) M_BLT, INSN_MACRO, I1 },
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{"blt", "s,I,p", 0, (int) M_BLT_I, INSN_MACRO, I1 },
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{"bltl", "s,t,p", 0, (int) M_BLTL, INSN_MACRO, I2 },
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{"bltl", "s,I,p", 0, (int) M_BLTL_I, INSN_MACRO, I2 },
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{"bltu", "s,t,p", 0, (int) M_BLTU, INSN_MACRO, I1 },
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{"bltu", "s,I,p", 0, (int) M_BLTU_I, INSN_MACRO, I1 },
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{"bltul", "s,t,p", 0, (int) M_BLTUL, INSN_MACRO, I2 },
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{"bltul", "s,I,p", 0, (int) M_BLTUL_I, INSN_MACRO, I2 },
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{"bltz", "s,p", 0x04000000, 0xfc1f0000, CBD|RD_s, I1 },
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{"bltzl", "s,p", 0x04020000, 0xfc1f0000, CBL|RD_s, I2|T3 },
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{"bltzal", "s,p", 0x04100000, 0xfc1f0000, CBD|RD_s|WR_31, I1 },
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{"bltzall", "s,p", 0x04120000, 0xfc1f0000, CBL|RD_s, I2|T3 },
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{"bnez", "s,p", 0x14000000, 0xfc1f0000, CBD|RD_s, I1 },
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{"bnezl", "s,p", 0x54000000, 0xfc1f0000, CBL|RD_s, I2|T3 },
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{"bne", "s,t,p", 0x14000000, 0xfc000000, CBD|RD_s|RD_t, I1 },
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{"bne", "s,I,p", 0, (int) M_BNE_I, INSN_MACRO, I1 },
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{"bnel", "s,t,p", 0x54000000, 0xfc000000, CBL|RD_s|RD_t, I2|T3 },
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{"bnel", "s,I,p", 0, (int) M_BNEL_I, INSN_MACRO, I2 },
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{"break", "", 0x0000000d, 0xffffffff, TRAP, I1 },
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{"break", "B", 0x0000000d, 0xfc00003f, TRAP, I32 },
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{"break", "c", 0x0000000d, 0xfc00ffff, TRAP, I1 },
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{"break", "c,q", 0x0000000d, 0xfc00003f, TRAP, I1 },
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{"bc0f", "p", 0x41000000, 0xffff0000, CBD|RD_CC, I1 },
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{"bc0fl", "p", 0x41020000, 0xffff0000, CBL|RD_CC, I2|T3 },
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{"bc1f", "p", 0x45000000, 0xffff0000, CBD|RD_CC|FP_S, I1|M1 },
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{"bc1f", "N,p", 0x45000000, 0xffe30000, CBD|RD_CC|FP_S, I4|I32|M1},
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{"bc1fl", "p", 0x45020000, 0xffff0000, CBL|RD_CC|FP_S, I2|T3|M1},
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{"bc1fl", "N,p", 0x45020000, 0xffe30000, CBL|RD_CC|FP_S, I4|I32|M1},
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{"bc2f", "p", 0x49000000, 0xffff0000, CBD|RD_CC, I1 },
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{"bc2fl", "p", 0x49020000, 0xffff0000, CBL|RD_CC, I2|T3 },
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{"bc3f", "p", 0x4d000000, 0xffff0000, CBD|RD_CC, I1 },
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{"bc3fl", "p", 0x4d020000, 0xffff0000, CBL|RD_CC, I2|T3 },
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{"bc0t", "p", 0x41010000, 0xffff0000, CBD|RD_CC, I1 },
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{"bc0tl", "p", 0x41030000, 0xffff0000, CBL|RD_CC, I2|T3 },
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{"bc1t", "p", 0x45010000, 0xffff0000, CBD|RD_CC|FP_S, I1 },
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{"bc1t", "N,p", 0x45010000, 0xffe30000, CBD|RD_CC|FP_S, I4|I32|M1},
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{"bc1tl", "p", 0x45030000, 0xffff0000, CBL|RD_CC|FP_S, I2|T3 },
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{"bc1tl", "N,p", 0x45030000, 0xffe30000, CBL|RD_CC|FP_S, I4|I32|M1},
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{"bc2t", "p", 0x49010000, 0xffff0000, CBD|RD_CC, I1 },
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{"bc2tl", "p", 0x49030000, 0xffff0000, CBL|RD_CC, I2|T3 },
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{"bc3t", "p", 0x4d010000, 0xffff0000, CBD|RD_CC, I1 },
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{"bc3tl", "p", 0x4d030000, 0xffff0000, CBL|RD_CC, I2|T3 },
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{"beqz", "s,p", 0x10000000, 0xfc1f0000, CBD|RD_s, I1 },
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{"beqzl", "s,p", 0x50000000, 0xfc1f0000, CBL|RD_s, I2|T3 },
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{"beq", "s,t,p", 0x10000000, 0xfc000000, CBD|RD_s|RD_t, I1 },
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{"beq", "s,I,p", 0, (int) M_BEQ_I, INSN_MACRO, I1 },
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{"beql", "s,t,p", 0x50000000, 0xfc000000, CBL|RD_s|RD_t, I2|T3 },
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{"beql", "s,I,p", 0, (int) M_BEQL_I, INSN_MACRO, I2 },
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{"bge", "s,t,p", 0, (int) M_BGE, INSN_MACRO, I1 },
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{"bge", "s,I,p", 0, (int) M_BGE_I, INSN_MACRO, I1 },
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{"bgel", "s,t,p", 0, (int) M_BGEL, INSN_MACRO, I2 },
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{"bgel", "s,I,p", 0, (int) M_BGEL_I, INSN_MACRO, I2 },
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{"bgeu", "s,t,p", 0, (int) M_BGEU, INSN_MACRO, I1 },
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{"bgeu", "s,I,p", 0, (int) M_BGEU_I, INSN_MACRO, I1 },
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{"bgeul", "s,t,p", 0, (int) M_BGEUL, INSN_MACRO, I2 },
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{"bgeul", "s,I,p", 0, (int) M_BGEUL_I, INSN_MACRO, I2 },
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{"bgez", "s,p", 0x04010000, 0xfc1f0000, CBD|RD_s, I1 },
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{"bgezl", "s,p", 0x04030000, 0xfc1f0000, CBL|RD_s, I2|T3 },
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{"bgezal", "s,p", 0x04110000, 0xfc1f0000, CBD|RD_s|WR_31, I1 },
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{"bgezall", "s,p", 0x04130000, 0xfc1f0000, CBL|RD_s, I2|T3 },
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{"bgt", "s,t,p", 0, (int) M_BGT, INSN_MACRO, I1 },
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{"bgt", "s,I,p", 0, (int) M_BGT_I, INSN_MACRO, I1 },
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{"bgtl", "s,t,p", 0, (int) M_BGTL, INSN_MACRO, I2 },
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{"bgtl", "s,I,p", 0, (int) M_BGTL_I, INSN_MACRO, I2 },
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{"bgtu", "s,t,p", 0, (int) M_BGTU, INSN_MACRO, I1 },
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{"bgtu", "s,I,p", 0, (int) M_BGTU_I, INSN_MACRO, I1 },
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{"bgtul", "s,t,p", 0, (int) M_BGTUL, INSN_MACRO, I2 },
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{"bgtul", "s,I,p", 0, (int) M_BGTUL_I, INSN_MACRO, I2 },
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{"bgtz", "s,p", 0x1c000000, 0xfc1f0000, CBD|RD_s, I1 },
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{"bgtzl", "s,p", 0x5c000000, 0xfc1f0000, CBL|RD_s, I2|T3 },
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{"ble", "s,t,p", 0, (int) M_BLE, INSN_MACRO, I1 },
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{"ble", "s,I,p", 0, (int) M_BLE_I, INSN_MACRO, I1 },
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{"blel", "s,t,p", 0, (int) M_BLEL, INSN_MACRO, I2 },
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{"blel", "s,I,p", 0, (int) M_BLEL_I, INSN_MACRO, I2 },
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{"bleu", "s,t,p", 0, (int) M_BLEU, INSN_MACRO, I1 },
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{"bleu", "s,I,p", 0, (int) M_BLEU_I, INSN_MACRO, I1 },
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{"bleul", "s,t,p", 0, (int) M_BLEUL, INSN_MACRO, I2 },
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{"bleul", "s,I,p", 0, (int) M_BLEUL_I, INSN_MACRO, I2 },
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{"blez", "s,p", 0x18000000, 0xfc1f0000, CBD|RD_s, I1 },
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{"blezl", "s,p", 0x58000000, 0xfc1f0000, CBL|RD_s, I2|T3 },
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{"blt", "s,t,p", 0, (int) M_BLT, INSN_MACRO, I1 },
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{"blt", "s,I,p", 0, (int) M_BLT_I, INSN_MACRO, I1 },
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{"bltl", "s,t,p", 0, (int) M_BLTL, INSN_MACRO, I2 },
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{"bltl", "s,I,p", 0, (int) M_BLTL_I, INSN_MACRO, I2 },
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{"bltu", "s,t,p", 0, (int) M_BLTU, INSN_MACRO, I1 },
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{"bltu", "s,I,p", 0, (int) M_BLTU_I, INSN_MACRO, I1 },
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{"bltul", "s,t,p", 0, (int) M_BLTUL, INSN_MACRO, I2 },
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{"bltul", "s,I,p", 0, (int) M_BLTUL_I, INSN_MACRO, I2 },
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{"bltz", "s,p", 0x04000000, 0xfc1f0000, CBD|RD_s, I1 },
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{"bltzl", "s,p", 0x04020000, 0xfc1f0000, CBL|RD_s, I2|T3 },
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{"bltzal", "s,p", 0x04100000, 0xfc1f0000, CBD|RD_s|WR_31, I1 },
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{"bltzall", "s,p", 0x04120000, 0xfc1f0000, CBL|RD_s, I2|T3 },
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{"bnez", "s,p", 0x14000000, 0xfc1f0000, CBD|RD_s, I1 },
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{"bnezl", "s,p", 0x54000000, 0xfc1f0000, CBL|RD_s, I2|T3 },
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{"bne", "s,t,p", 0x14000000, 0xfc000000, CBD|RD_s|RD_t, I1 },
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{"bne", "s,I,p", 0, (int) M_BNE_I, INSN_MACRO, I1 },
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{"bnel", "s,t,p", 0x54000000, 0xfc000000, CBL|RD_s|RD_t, I2|T3 },
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{"bnel", "s,I,p", 0, (int) M_BNEL_I, INSN_MACRO, I2 },
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{"break", "", 0x0000000d, 0xffffffff, TRAP, I1 },
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{"break", "B", 0x0000000d, 0xfc00003f, TRAP, I32 },
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{"break", "c", 0x0000000d, 0xfc00ffff, TRAP, I1 },
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||||
{"break", "c,q", 0x0000000d, 0xfc00003f, TRAP, I1 },
|
||||
{"c.f.d", "S,T", 0x46200030, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D, I1 },
|
||||
{"c.f.d", "M,S,T", 0x46200030, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, I4|I32|M1},
|
||||
{"c.f.s", "S,T", 0x46000030, 0xffe007ff, RD_S|RD_T|WR_CC|FP_S, I1 },
|
||||
|
@ -367,26 +367,26 @@ const struct mips_opcode mips_builtin_opcodes[] =
|
|||
{"dctw", "o(b)", 0xbc090000, 0xfc1f0000, RD_b, I3 },
|
||||
{"deret", "", 0x4200001f, 0xffffffff, 0, I32|G2|M1},
|
||||
/* For ddiv, see the comments about div. */
|
||||
{"ddiv", "z,s,t", 0x0000001e, 0xfc00ffff, RD_s|RD_t|WR_HI|WR_LO, I3 },
|
||||
{"ddiv", "z,s,t", 0x0000001e, 0xfc00ffff, RD_s|RD_t|WR_HILO, I3 },
|
||||
{"ddiv", "d,v,t", 0, (int) M_DDIV_3, INSN_MACRO, I3 },
|
||||
{"ddiv", "d,v,I", 0, (int) M_DDIV_3I, INSN_MACRO, I3 },
|
||||
/* For ddivu, see the comments about div. */
|
||||
{"ddivu", "z,s,t", 0x0000001f, 0xfc00ffff, RD_s|RD_t|WR_HI|WR_LO, I3 },
|
||||
{"ddivu", "z,s,t", 0x0000001f, 0xfc00ffff, RD_s|RD_t|WR_HILO, I3 },
|
||||
{"ddivu", "d,v,t", 0, (int) M_DDIVU_3, INSN_MACRO, I3 },
|
||||
{"ddivu", "d,v,I", 0, (int) M_DDIVU_3I, INSN_MACRO, I3 },
|
||||
/* The MIPS assembler treats the div opcode with two operands as
|
||||
though the first operand appeared twice (the first operand is both
|
||||
a source and a destination). To get the div machine instruction,
|
||||
you must use an explicit destination of $0. */
|
||||
{"div", "z,s,t", 0x0000001a, 0xfc00ffff, RD_s|RD_t|WR_HI|WR_LO, I1 },
|
||||
{"div", "z,t", 0x0000001a, 0xffe0ffff, RD_s|RD_t|WR_HI|WR_LO, I1 },
|
||||
{"div", "z,s,t", 0x0000001a, 0xfc00ffff, RD_s|RD_t|WR_HILO, I1 },
|
||||
{"div", "z,t", 0x0000001a, 0xffe0ffff, RD_s|RD_t|WR_HILO, I1 },
|
||||
{"div", "d,v,t", 0, (int) M_DIV_3, INSN_MACRO, I1 },
|
||||
{"div", "d,v,I", 0, (int) M_DIV_3I, INSN_MACRO, I1 },
|
||||
{"div.d", "D,V,T", 0x46200003, 0xffe0003f, WR_D|RD_S|RD_T|FP_D, I1 },
|
||||
{"div.s", "D,V,T", 0x46000003, 0xffe0003f, WR_D|RD_S|RD_T|FP_S, I1 },
|
||||
/* For divu, see the comments about div. */
|
||||
{"divu", "z,s,t", 0x0000001b, 0xfc00ffff, RD_s|RD_t|WR_HI|WR_LO, I1 },
|
||||
{"divu", "z,t", 0x0000001b, 0xffe0ffff, RD_s|RD_t|WR_HI|WR_LO, I1 },
|
||||
{"divu", "z,s,t", 0x0000001b, 0xfc00ffff, RD_s|RD_t|WR_HILO, I1 },
|
||||
{"divu", "z,t", 0x0000001b, 0xffe0ffff, RD_s|RD_t|WR_HILO, I1 },
|
||||
{"divu", "d,v,t", 0, (int) M_DIVU_3, INSN_MACRO, I1 },
|
||||
{"divu", "d,v,I", 0, (int) M_DIVU_3I, INSN_MACRO, I1 },
|
||||
{"dla", "t,o(b)", 0x64000000, 0xfc000000, WR_t|RD_s, I3 }, /* daddiu */
|
||||
|
@ -395,7 +395,7 @@ const struct mips_opcode mips_builtin_opcodes[] =
|
|||
{"dli", "t,i", 0x34000000, 0xffe00000, WR_t, I3 }, /* ori */
|
||||
{"dli", "t,I", 0, (int) M_DLI, INSN_MACRO, I3 },
|
||||
|
||||
{"dmadd16", "s,t", 0x00000029, 0xfc00ffff, RD_s|RD_t|WR_LO|RD_LO, V1 },
|
||||
{"dmadd16", "s,t", 0x00000029, 0xfc00ffff, RD_s|RD_t|MOD_LO, V1 },
|
||||
{"dmfc0", "t,G", 0x40200000, 0xffe007ff, LCD|WR_t|RD_C0, I3 },
|
||||
{"dmtc0", "t,G", 0x40a00000, 0xffe007ff, COD|RD_t|WR_C0|WR_CC, I3 },
|
||||
{"dmfc1", "t,S", 0x44200000, 0xffe007ff, LCD|WR_t|RD_S|FP_S, I3 },
|
||||
|
@ -408,14 +408,14 @@ const struct mips_opcode mips_builtin_opcodes[] =
|
|||
{"dmulo", "d,v,I", 0, (int) M_DMULO_I, INSN_MACRO, I3 },
|
||||
{"dmulou", "d,v,t", 0, (int) M_DMULOU, INSN_MACRO, I3 },
|
||||
{"dmulou", "d,v,I", 0, (int) M_DMULOU_I, INSN_MACRO, I3 },
|
||||
{"dmult", "s,t", 0x0000001c, 0xfc00ffff, RD_s|RD_t|WR_HI|WR_LO, I3 },
|
||||
{"dmultu", "s,t", 0x0000001d, 0xfc00ffff, RD_s|RD_t|WR_HI|WR_LO, I3 },
|
||||
{"dmult", "s,t", 0x0000001c, 0xfc00ffff, RD_s|RD_t|WR_HILO, I3 },
|
||||
{"dmultu", "s,t", 0x0000001d, 0xfc00ffff, RD_s|RD_t|WR_HILO, I3 },
|
||||
{"dneg", "d,w", 0x0000002e, 0xffe007ff, WR_d|RD_t, I3 }, /* dsub 0 */
|
||||
{"dnegu", "d,w", 0x0000002f, 0xffe007ff, WR_d|RD_t, I3 }, /* dsubu 0*/
|
||||
{"drem", "z,s,t", 0x0000001e, 0xfc00ffff, RD_s|RD_t|WR_HI|WR_LO, I3 },
|
||||
{"drem", "z,s,t", 0x0000001e, 0xfc00ffff, RD_s|RD_t|WR_HILO, I3 },
|
||||
{"drem", "d,v,t", 3, (int) M_DREM_3, INSN_MACRO, I3 },
|
||||
{"drem", "d,v,I", 3, (int) M_DREM_3I, INSN_MACRO, I3 },
|
||||
{"dremu", "z,s,t", 0x0000001f, 0xfc00ffff, RD_s|RD_t|WR_HI|WR_LO, I3 },
|
||||
{"dremu", "z,s,t", 0x0000001f, 0xfc00ffff, RD_s|RD_t|WR_HILO, I3 },
|
||||
{"dremu", "d,v,t", 3, (int) M_DREMU_3, INSN_MACRO, I3 },
|
||||
{"dremu", "d,v,I", 3, (int) M_DREMU_3I, INSN_MACRO, I3 },
|
||||
{"dsllv", "d,t,s", 0x00000014, 0xfc0007ff, WR_d|RD_t|RD_s, I3 },
|
||||
|
@ -534,20 +534,20 @@ const struct mips_opcode mips_builtin_opcodes[] =
|
|||
{"lwu", "t,o(b)", 0x9c000000, 0xfc000000, LDD|RD_b|WR_t, I3 },
|
||||
{"lwu", "t,A(b)", 0, (int) M_LWU_AB, INSN_MACRO, I3 },
|
||||
{"lwxc1", "D,t(b)", 0x4c000000, 0xfc00f83f, LDD|WR_D|RD_t|RD_b, I4 },
|
||||
{"mad", "s,t", 0x70000000, 0xfc00ffff, RD_s|RD_t|WR_HI|WR_LO|RD_HI|RD_LO, P3 },
|
||||
{"madu", "s,t", 0x70000001, 0xfc00ffff, RD_s|RD_t|WR_HI|WR_LO|RD_HI|RD_LO, P3 },
|
||||
{"madd.d", "D,R,S,T", 0x4c000021, 0xfc00003f, RD_R|RD_S|RD_T|WR_D|FP_D, I4 },
|
||||
{"madd.s", "D,R,S,T", 0x4c000020, 0xfc00003f, RD_R|RD_S|RD_T|WR_D|FP_S, I4 },
|
||||
{"madd.ps", "D,R,S,T", 0x4c000026, 0xfc00003f, RD_R|RD_S|RD_T|WR_D|FP_D, I5 },
|
||||
{"madd", "s,t", 0x0000001c, 0xfc00ffff, RD_s|RD_t|WR_HI|WR_LO, L1 },
|
||||
{"madd", "s,t", 0x70000000, 0xfc00ffff, RD_s|RD_t|WR_HI|WR_LO|RD_HI|RD_LO, I32 },
|
||||
{"madd", "s,t", 0x70000000, 0xfc00ffff, RD_s|RD_t|WR_HI|WR_LO|IS_M, G1|M1 },
|
||||
{"madd", "d,s,t", 0x70000000, 0xfc0007ff, RD_s|RD_t|WR_HI|WR_LO|WR_d|IS_M, G1 },
|
||||
{"maddu", "s,t", 0x0000001d, 0xfc00ffff, RD_s|RD_t|WR_HI|WR_LO, L1 },
|
||||
{"maddu", "s,t", 0x70000001, 0xfc00ffff, RD_s|RD_t|WR_HI|WR_LO|RD_HI|RD_LO, I32 },
|
||||
{"maddu", "s,t", 0x70000001, 0xfc00ffff, RD_s|RD_t|WR_HI|WR_LO|IS_M, G1|M1 },
|
||||
{"maddu", "d,s,t", 0x70000001, 0xfc0007ff, RD_s|RD_t|WR_HI|WR_LO|WR_d|IS_M, G1 },
|
||||
{"madd16", "s,t", 0x00000028, 0xfc00ffff, RD_s|RD_t|WR_HI|WR_LO|RD_HI|RD_LO, V1 },
|
||||
{"mad", "s,t", 0x70000000, 0xfc00ffff, RD_s|RD_t|MOD_HILO, P3 },
|
||||
{"madu", "s,t", 0x70000001, 0xfc00ffff, RD_s|RD_t|MOD_HILO, P3 },
|
||||
{"madd.d", "D,R,S,T", 0x4c000021, 0xfc00003f, RD_R|RD_S|RD_T|WR_D|FP_D, I4 },
|
||||
{"madd.s", "D,R,S,T", 0x4c000020, 0xfc00003f, RD_R|RD_S|RD_T|WR_D|FP_S, I4 },
|
||||
{"madd.ps", "D,R,S,T", 0x4c000026, 0xfc00003f, RD_R|RD_S|RD_T|WR_D|FP_D, I5 },
|
||||
{"madd", "s,t", 0x0000001c, 0xfc00ffff, RD_s|RD_t|WR_HILO, L1 },
|
||||
{"madd", "s,t", 0x70000000, 0xfc00ffff, RD_s|RD_t|MOD_HILO, I32 },
|
||||
{"madd", "s,t", 0x70000000, 0xfc00ffff, RD_s|RD_t|WR_HILO|IS_M, G1|M1 },
|
||||
{"madd", "d,s,t", 0x70000000, 0xfc0007ff, RD_s|RD_t|WR_HILO|WR_d|IS_M, G1 },
|
||||
{"maddu", "s,t", 0x0000001d, 0xfc00ffff, RD_s|RD_t|WR_HILO, L1 },
|
||||
{"maddu", "s,t", 0x70000001, 0xfc00ffff, RD_s|RD_t|MOD_HILO, I32 },
|
||||
{"maddu", "s,t", 0x70000001, 0xfc00ffff, RD_s|RD_t|WR_HILO|IS_M, G1|M1 },
|
||||
{"maddu", "d,s,t", 0x70000001, 0xfc0007ff, RD_s|RD_t|WR_HILO|WR_d|IS_M, G1 },
|
||||
{"madd16", "s,t", 0x00000028, 0xfc00ffff, RD_s|RD_t|MOD_HILO, V1 },
|
||||
{"mfc0", "t,G", 0x40000000, 0xffe007ff, LCD|WR_t|RD_C0, I1 },
|
||||
{"mfc0", "t,G,H", 0x40000000, 0xffe007f8, LCD|WR_t|RD_C0, I32 },
|
||||
{"mfc1", "t,S", 0x44000000, 0xffe007ff, LCD|WR_t|RD_S|FP_S, I1 },
|
||||
|
@ -582,10 +582,10 @@ const struct mips_opcode mips_builtin_opcodes[] =
|
|||
{"msub.d", "D,R,S,T", 0x4c000029, 0xfc00003f, RD_R|RD_S|RD_T|WR_D|FP_D, I4 },
|
||||
{"msub.s", "D,R,S,T", 0x4c000028, 0xfc00003f, RD_R|RD_S|RD_T|WR_D|FP_S, I4 },
|
||||
{"msub.ps", "D,R,S,T", 0x4c00002e, 0xfc00003f, RD_R|RD_S|RD_T|WR_D|FP_D, I5 },
|
||||
{"msub", "s,t", 0x0000001e, 0xfc00ffff, RD_s|RD_t|WR_HI|WR_LO, L1 },
|
||||
{"msub", "s,t", 0x70000004, 0xfc00ffff, RD_s|RD_t|WR_HI|WR_LO|RD_HI|RD_LO, I32 },
|
||||
{"msubu", "s,t", 0x0000001f, 0xfc00ffff, RD_s|RD_t|WR_HI|WR_LO, L1 },
|
||||
{"msubu", "s,t", 0x70000005, 0xfc00ffff, RD_s|RD_t|WR_HI|WR_LO|RD_HI|RD_LO, I32 },
|
||||
{"msub", "s,t", 0x0000001e, 0xfc00ffff, RD_s|RD_t|WR_HILO, L1 },
|
||||
{"msub", "s,t", 0x70000004, 0xfc00ffff, RD_s|RD_t|MOD_HILO, I32 },
|
||||
{"msubu", "s,t", 0x0000001f, 0xfc00ffff, RD_s|RD_t|WR_HILO, L1 },
|
||||
{"msubu", "s,t", 0x70000005, 0xfc00ffff, RD_s|RD_t|MOD_HILO, I32 },
|
||||
{"mtc0", "t,G", 0x40800000, 0xffe007ff, COD|RD_t|WR_C0|WR_CC, I1 },
|
||||
{"mtc0", "t,G,H", 0x40800000, 0xffe007f8, COD|RD_t|WR_C0|WR_CC, I32 },
|
||||
{"mtc1", "t,S", 0x44800000, 0xffe007ff, COD|RD_t|WR_S|FP_S, I1 },
|
||||
|
@ -600,17 +600,17 @@ const struct mips_opcode mips_builtin_opcodes[] =
|
|||
{"mul.d", "D,V,T", 0x46200002, 0xffe0003f, WR_D|RD_S|RD_T|FP_D, I1 },
|
||||
{"mul.s", "D,V,T", 0x46000002, 0xffe0003f, WR_D|RD_S|RD_T|FP_S, I1 },
|
||||
{"mul.ps", "D,V,T", 0x46c00002, 0xffe0003f, WR_D|RD_S|RD_T|FP_D, I5 },
|
||||
{"mul", "d,v,t", 0x70000002, 0xfc0007ff, WR_d|RD_s|RD_t|WR_HI|WR_LO, I32|P3 },
|
||||
{"mul", "d,v,t", 0x70000002, 0xfc0007ff, WR_d|RD_s|RD_t|WR_HILO, I32|P3 },
|
||||
{"mul", "d,v,t", 0, (int) M_MUL, INSN_MACRO, I1 },
|
||||
{"mul", "d,v,I", 0, (int) M_MUL_I, INSN_MACRO, I1 },
|
||||
{"mulo", "d,v,t", 0, (int) M_MULO, INSN_MACRO, I1 },
|
||||
{"mulo", "d,v,I", 0, (int) M_MULO_I, INSN_MACRO, I1 },
|
||||
{"mulou", "d,v,t", 0, (int) M_MULOU, INSN_MACRO, I1 },
|
||||
{"mulou", "d,v,I", 0, (int) M_MULOU_I, INSN_MACRO, I1 },
|
||||
{"mult", "s,t", 0x00000018, 0xfc00ffff, RD_s|RD_t|WR_HI|WR_LO|IS_M, I1},
|
||||
{"mult", "d,s,t", 0x00000018, 0xfc0007ff, RD_s|RD_t|WR_HI|WR_LO|WR_d|IS_M, G1},
|
||||
{"multu", "s,t", 0x00000019, 0xfc00ffff, RD_s|RD_t|WR_HI|WR_LO|IS_M, I1},
|
||||
{"multu", "d,s,t", 0x00000019, 0xfc0007ff, RD_s|RD_t|WR_HI|WR_LO|WR_d|IS_M, G1},
|
||||
{"mult", "s,t", 0x00000018, 0xfc00ffff, RD_s|RD_t|WR_HILO|IS_M, I1 },
|
||||
{"mult", "d,s,t", 0x00000018, 0xfc0007ff, RD_s|RD_t|WR_HILO|WR_d|IS_M, G1 },
|
||||
{"multu", "s,t", 0x00000019, 0xfc00ffff, RD_s|RD_t|WR_HILO|IS_M, I1 },
|
||||
{"multu", "d,s,t", 0x00000019, 0xfc0007ff, RD_s|RD_t|WR_HILO|WR_d|IS_M, G1 },
|
||||
{"neg", "d,w", 0x00000022, 0xffe007ff, WR_d|RD_t, I1 }, /* sub 0 */
|
||||
{"negu", "d,w", 0x00000023, 0xffe007ff, WR_d|RD_t, I1 }, /* subu 0 */
|
||||
{"neg.d", "D,V", 0x46200007, 0xffff003f, WR_D|RD_S|FP_D, I1 },
|
||||
|
@ -623,227 +623,227 @@ const struct mips_opcode mips_builtin_opcodes[] =
|
|||
{"nmsub.s", "D,R,S,T", 0x4c000038, 0xfc00003f, RD_R|RD_S|RD_T|WR_D|FP_S, I4 },
|
||||
{"nmsub.ps","D,R,S,T", 0x4c00003e, 0xfc00003f, RD_R|RD_S|RD_T|WR_D|FP_D, I5 },
|
||||
/* nop is at the start of the table. */
|
||||
{"nor", "d,v,t", 0x00000027, 0xfc0007ff, WR_d|RD_s|RD_t, I1 },
|
||||
{"nor", "t,r,I", 0, (int) M_NOR_I, INSN_MACRO, I1 },
|
||||
{"not", "d,v", 0x00000027, 0xfc1f07ff, WR_d|RD_s|RD_t, I1 },/*nor d,s,0*/
|
||||
{"or", "d,v,t", 0x00000025, 0xfc0007ff, WR_d|RD_s|RD_t, I1 },
|
||||
{"or", "t,r,I", 0, (int) M_OR_I, INSN_MACRO, I1 },
|
||||
{"ori", "t,r,i", 0x34000000, 0xfc000000, WR_t|RD_s, I1 },
|
||||
{"nor", "d,v,t", 0x00000027, 0xfc0007ff, WR_d|RD_s|RD_t, I1 },
|
||||
{"nor", "t,r,I", 0, (int) M_NOR_I, INSN_MACRO, I1 },
|
||||
{"not", "d,v", 0x00000027, 0xfc1f07ff, WR_d|RD_s|RD_t, I1 },/*nor d,s,0*/
|
||||
{"or", "d,v,t", 0x00000025, 0xfc0007ff, WR_d|RD_s|RD_t, I1 },
|
||||
{"or", "t,r,I", 0, (int) M_OR_I, INSN_MACRO, I1 },
|
||||
{"ori", "t,r,i", 0x34000000, 0xfc000000, WR_t|RD_s, I1 },
|
||||
|
||||
{"pll.ps", "D,V,T", 0x46c0002c, 0xffe0003f, WR_D|RD_S|RD_T|FP_D, I5 },
|
||||
{"plu.ps", "D,V,T", 0x46c0002d, 0xffe0003f, WR_D|RD_S|RD_T|FP_D, I5 },
|
||||
|
||||
/* pref is at the start of the table. */
|
||||
{"prefx", "h,t(b)", 0x4c00000f, 0xfc0007ff, RD_b|RD_t, I4 },
|
||||
{"prefx", "h,t(b)", 0x4c00000f, 0xfc0007ff, RD_b|RD_t, I4 },
|
||||
|
||||
{"pul.ps", "D,V,T", 0x46c0002e, 0xffe0003f, WR_D|RD_S|RD_T|FP_D, I5 },
|
||||
{"puu.ps", "D,V,T", 0x46c0002f, 0xffe0003f, WR_D|RD_S|RD_T|FP_D, I5 },
|
||||
|
||||
{"recip.d", "D,S", 0x46200015, 0xffff003f, WR_D|RD_S|FP_D, I4 },
|
||||
{"recip.s", "D,S", 0x46000015, 0xffff003f, WR_D|RD_S|FP_S, I4 },
|
||||
{"rem", "z,s,t", 0x0000001a, 0xfc00ffff, RD_s|RD_t|WR_HI|WR_LO, I1 },
|
||||
{"rem", "d,v,t", 0, (int) M_REM_3, INSN_MACRO, I1 },
|
||||
{"rem", "d,v,I", 0, (int) M_REM_3I, INSN_MACRO, I1 },
|
||||
{"remu", "z,s,t", 0x0000001b, 0xfc00ffff, RD_s|RD_t|WR_HI|WR_LO, I1 },
|
||||
{"remu", "d,v,t", 0, (int) M_REMU_3, INSN_MACRO, I1 },
|
||||
{"remu", "d,v,I", 0, (int) M_REMU_3I, INSN_MACRO, I1 },
|
||||
{"rfe", "", 0x42000010, 0xffffffff, 0, I1|T3 },
|
||||
{"rol", "d,v,t", 0, (int) M_ROL, INSN_MACRO, I1 },
|
||||
{"rol", "d,v,I", 0, (int) M_ROL_I, INSN_MACRO, I1 },
|
||||
{"ror", "d,v,t", 0, (int) M_ROR, INSN_MACRO, I1 },
|
||||
{"ror", "d,v,I", 0, (int) M_ROR_I, INSN_MACRO, I1 },
|
||||
{"round.l.d", "D,S", 0x46200008, 0xffff003f, WR_D|RD_S|FP_D, I3 },
|
||||
{"round.l.s", "D,S", 0x46000008, 0xffff003f, WR_D|RD_S|FP_S, I3 },
|
||||
{"round.w.d", "D,S", 0x4620000c, 0xffff003f, WR_D|RD_S|FP_D, I2 },
|
||||
{"round.w.s", "D,S", 0x4600000c, 0xffff003f, WR_D|RD_S|FP_S, I2 },
|
||||
{"rsqrt.d", "D,S", 0x46200016, 0xffff003f, WR_D|RD_S|FP_D, I4 },
|
||||
{"rsqrt.s", "D,S", 0x46000016, 0xffff003f, WR_D|RD_S|FP_S, I4 },
|
||||
{"sb", "t,o(b)", 0xa0000000, 0xfc000000, SM|RD_t|RD_b, I1 },
|
||||
{"sb", "t,A(b)", 0, (int) M_SB_AB, INSN_MACRO, I1 },
|
||||
{"recip.d", "D,S", 0x46200015, 0xffff003f, WR_D|RD_S|FP_D, I4 },
|
||||
{"recip.s", "D,S", 0x46000015, 0xffff003f, WR_D|RD_S|FP_S, I4 },
|
||||
{"rem", "z,s,t", 0x0000001a, 0xfc00ffff, RD_s|RD_t|WR_HILO, I1 },
|
||||
{"rem", "d,v,t", 0, (int) M_REM_3, INSN_MACRO, I1 },
|
||||
{"rem", "d,v,I", 0, (int) M_REM_3I, INSN_MACRO, I1 },
|
||||
{"remu", "z,s,t", 0x0000001b, 0xfc00ffff, RD_s|RD_t|WR_HILO, I1 },
|
||||
{"remu", "d,v,t", 0, (int) M_REMU_3, INSN_MACRO, I1 },
|
||||
{"remu", "d,v,I", 0, (int) M_REMU_3I, INSN_MACRO, I1 },
|
||||
{"rfe", "", 0x42000010, 0xffffffff, 0, I1|T3 },
|
||||
{"rol", "d,v,t", 0, (int) M_ROL, INSN_MACRO, I1 },
|
||||
{"rol", "d,v,I", 0, (int) M_ROL_I, INSN_MACRO, I1 },
|
||||
{"ror", "d,v,t", 0, (int) M_ROR, INSN_MACRO, I1 },
|
||||
{"ror", "d,v,I", 0, (int) M_ROR_I, INSN_MACRO, I1 },
|
||||
{"round.l.d", "D,S", 0x46200008, 0xffff003f, WR_D|RD_S|FP_D, I3 },
|
||||
{"round.l.s", "D,S", 0x46000008, 0xffff003f, WR_D|RD_S|FP_S, I3 },
|
||||
{"round.w.d", "D,S", 0x4620000c, 0xffff003f, WR_D|RD_S|FP_D, I2 },
|
||||
{"round.w.s", "D,S", 0x4600000c, 0xffff003f, WR_D|RD_S|FP_S, I2 },
|
||||
{"rsqrt.d", "D,S", 0x46200016, 0xffff003f, WR_D|RD_S|FP_D, I4 },
|
||||
{"rsqrt.s", "D,S", 0x46000016, 0xffff003f, WR_D|RD_S|FP_S, I4 },
|
||||
{"sb", "t,o(b)", 0xa0000000, 0xfc000000, SM|RD_t|RD_b, I1 },
|
||||
{"sb", "t,A(b)", 0, (int) M_SB_AB, INSN_MACRO, I1 },
|
||||
{"sc", "t,o(b)", 0xe0000000, 0xfc000000, SM|RD_t|WR_t|RD_b, I2 },
|
||||
{"sc", "t,A(b)", 0, (int) M_SC_AB, INSN_MACRO, I2 },
|
||||
{"sc", "t,A(b)", 0, (int) M_SC_AB, INSN_MACRO, I2 },
|
||||
{"scd", "t,o(b)", 0xf0000000, 0xfc000000, SM|RD_t|WR_t|RD_b, I3 },
|
||||
{"scd", "t,A(b)", 0, (int) M_SCD_AB, INSN_MACRO, I3 },
|
||||
{"sd", "t,o(b)", 0xfc000000, 0xfc000000, SM|RD_t|RD_b, I3 },
|
||||
{"sd", "t,o(b)", 0, (int) M_SD_OB, INSN_MACRO, I1 },
|
||||
{"sd", "t,A(b)", 0, (int) M_SD_AB, INSN_MACRO, I1 },
|
||||
{"sdbbp", "", 0x0000000e, 0xffffffff, TRAP, G2|M1 },
|
||||
{"sdbbp", "c", 0x0000000e, 0xfc00ffff, TRAP, G2|M1 },
|
||||
{"sdbbp", "c,q", 0x0000000e, 0xfc00003f, TRAP, G2|M1 },
|
||||
{"sdbbp", "", 0x7000003f, 0xffffffff, TRAP, I32 },
|
||||
{"sdbbp", "B", 0x7000003f, 0xfc00003f, TRAP, I32 },
|
||||
{"scd", "t,A(b)", 0, (int) M_SCD_AB, INSN_MACRO, I3 },
|
||||
{"sd", "t,o(b)", 0xfc000000, 0xfc000000, SM|RD_t|RD_b, I3 },
|
||||
{"sd", "t,o(b)", 0, (int) M_SD_OB, INSN_MACRO, I1 },
|
||||
{"sd", "t,A(b)", 0, (int) M_SD_AB, INSN_MACRO, I1 },
|
||||
{"sdbbp", "", 0x0000000e, 0xffffffff, TRAP, G2|M1 },
|
||||
{"sdbbp", "c", 0x0000000e, 0xfc00ffff, TRAP, G2|M1 },
|
||||
{"sdbbp", "c,q", 0x0000000e, 0xfc00003f, TRAP, G2|M1 },
|
||||
{"sdbbp", "", 0x7000003f, 0xffffffff, TRAP, I32 },
|
||||
{"sdbbp", "B", 0x7000003f, 0xfc00003f, TRAP, I32 },
|
||||
{"sdc1", "T,o(b)", 0xf4000000, 0xfc000000, SM|RD_T|RD_b|FP_D, I2 },
|
||||
{"sdc1", "E,o(b)", 0xf4000000, 0xfc000000, SM|RD_T|RD_b|FP_D, I2 },
|
||||
{"sdc1", "T,A(b)", 0, (int) M_SDC1_AB, INSN_MACRO, I2 },
|
||||
{"sdc1", "E,A(b)", 0, (int) M_SDC1_AB, INSN_MACRO, I2 },
|
||||
{"sdc2", "E,o(b)", 0xf8000000, 0xfc000000, SM|RD_C2|RD_b, I2 },
|
||||
{"sdc2", "E,A(b)", 0, (int) M_SDC2_AB, INSN_MACRO, I2 },
|
||||
{"sdc3", "E,o(b)", 0xfc000000, 0xfc000000, SM|RD_C3|RD_b, I2 },
|
||||
{"sdc3", "E,A(b)", 0, (int) M_SDC3_AB, INSN_MACRO, I2 },
|
||||
{"sdc1", "T,A(b)", 0, (int) M_SDC1_AB, INSN_MACRO, I2 },
|
||||
{"sdc1", "E,A(b)", 0, (int) M_SDC1_AB, INSN_MACRO, I2 },
|
||||
{"sdc2", "E,o(b)", 0xf8000000, 0xfc000000, SM|RD_C2|RD_b, I2 },
|
||||
{"sdc2", "E,A(b)", 0, (int) M_SDC2_AB, INSN_MACRO, I2 },
|
||||
{"sdc3", "E,o(b)", 0xfc000000, 0xfc000000, SM|RD_C3|RD_b, I2 },
|
||||
{"sdc3", "E,A(b)", 0, (int) M_SDC3_AB, INSN_MACRO, I2 },
|
||||
{"s.d", "T,o(b)", 0xf4000000, 0xfc000000, SM|RD_T|RD_b|FP_D, I2 },
|
||||
{"s.d", "T,o(b)", 0, (int) M_S_DOB, INSN_MACRO, I1 },
|
||||
{"s.d", "T,A(b)", 0, (int) M_S_DAB, INSN_MACRO, I1 },
|
||||
{"sdl", "t,o(b)", 0xb0000000, 0xfc000000, SM|RD_t|RD_b, I3 },
|
||||
{"sdl", "t,A(b)", 0, (int) M_SDL_AB, INSN_MACRO, I3 },
|
||||
{"sdr", "t,o(b)", 0xb4000000, 0xfc000000, SM|RD_t|RD_b, I3 },
|
||||
{"sdr", "t,A(b)", 0, (int) M_SDR_AB, INSN_MACRO, I3 },
|
||||
{"s.d", "T,o(b)", 0, (int) M_S_DOB, INSN_MACRO, I1 },
|
||||
{"s.d", "T,A(b)", 0, (int) M_S_DAB, INSN_MACRO, I1 },
|
||||
{"sdl", "t,o(b)", 0xb0000000, 0xfc000000, SM|RD_t|RD_b, I3 },
|
||||
{"sdl", "t,A(b)", 0, (int) M_SDL_AB, INSN_MACRO, I3 },
|
||||
{"sdr", "t,o(b)", 0xb4000000, 0xfc000000, SM|RD_t|RD_b, I3 },
|
||||
{"sdr", "t,A(b)", 0, (int) M_SDR_AB, INSN_MACRO, I3 },
|
||||
{"sdxc1", "S,t(b)", 0x4c000009, 0xfc0007ff, SM|RD_S|RD_t|RD_b, I4 },
|
||||
{"selsl", "d,v,t", 0x00000005, 0xfc0007ff, WR_d|RD_s|RD_t,L1 },
|
||||
{"selsr", "d,v,t", 0x00000001, 0xfc0007ff, WR_d|RD_s|RD_t,L1 },
|
||||
{"seq", "d,v,t", 0, (int) M_SEQ, INSN_MACRO, I1 },
|
||||
{"seq", "d,v,I", 0, (int) M_SEQ_I, INSN_MACRO, I1 },
|
||||
{"sge", "d,v,t", 0, (int) M_SGE, INSN_MACRO, I1 },
|
||||
{"sge", "d,v,I", 0, (int) M_SGE_I, INSN_MACRO, I1 },
|
||||
{"sgeu", "d,v,t", 0, (int) M_SGEU, INSN_MACRO, I1 },
|
||||
{"sgeu", "d,v,I", 0, (int) M_SGEU_I, INSN_MACRO, I1 },
|
||||
{"sgt", "d,v,t", 0, (int) M_SGT, INSN_MACRO, I1 },
|
||||
{"sgt", "d,v,I", 0, (int) M_SGT_I, INSN_MACRO, I1 },
|
||||
{"sgtu", "d,v,t", 0, (int) M_SGTU, INSN_MACRO, I1 },
|
||||
{"sgtu", "d,v,I", 0, (int) M_SGTU_I, INSN_MACRO, I1 },
|
||||
{"sh", "t,o(b)", 0xa4000000, 0xfc000000, SM|RD_t|RD_b, I1 },
|
||||
{"sh", "t,A(b)", 0, (int) M_SH_AB, INSN_MACRO, I1 },
|
||||
{"sle", "d,v,t", 0, (int) M_SLE, INSN_MACRO, I1 },
|
||||
{"sle", "d,v,I", 0, (int) M_SLE_I, INSN_MACRO, I1 },
|
||||
{"sleu", "d,v,t", 0, (int) M_SLEU, INSN_MACRO, I1 },
|
||||
{"sleu", "d,v,I", 0, (int) M_SLEU_I, INSN_MACRO, I1 },
|
||||
{"sllv", "d,t,s", 0x00000004, 0xfc0007ff, WR_d|RD_t|RD_s, I1 },
|
||||
{"sll", "d,w,s", 0x00000004, 0xfc0007ff, WR_d|RD_t|RD_s, I1 }, /* sllv */
|
||||
{"sll", "d,w,<", 0x00000000, 0xffe0003f, WR_d|RD_t, I1 },
|
||||
{"slt", "d,v,t", 0x0000002a, 0xfc0007ff, WR_d|RD_s|RD_t, I1 },
|
||||
{"slt", "d,v,I", 0, (int) M_SLT_I, INSN_MACRO, I1 },
|
||||
{"slti", "t,r,j", 0x28000000, 0xfc000000, WR_t|RD_s, I1 },
|
||||
{"sltiu", "t,r,j", 0x2c000000, 0xfc000000, WR_t|RD_s, I1 },
|
||||
{"sltu", "d,v,t", 0x0000002b, 0xfc0007ff, WR_d|RD_s|RD_t, I1 },
|
||||
{"sltu", "d,v,I", 0, (int) M_SLTU_I, INSN_MACRO, I1 },
|
||||
{"sne", "d,v,t", 0, (int) M_SNE, INSN_MACRO, I1 },
|
||||
{"sne", "d,v,I", 0, (int) M_SNE_I, INSN_MACRO, I1 },
|
||||
{"sqrt.d", "D,S", 0x46200004, 0xffff003f, WR_D|RD_S|FP_D, I2 },
|
||||
{"sqrt.s", "D,S", 0x46000004, 0xffff003f, WR_D|RD_S|FP_S, I2 },
|
||||
{"srav", "d,t,s", 0x00000007, 0xfc0007ff, WR_d|RD_t|RD_s, I1 },
|
||||
{"sra", "d,w,s", 0x00000007, 0xfc0007ff, WR_d|RD_t|RD_s, I1 }, /* srav */
|
||||
{"sra", "d,w,<", 0x00000003, 0xffe0003f, WR_d|RD_t, I1 },
|
||||
{"srlv", "d,t,s", 0x00000006, 0xfc0007ff, WR_d|RD_t|RD_s, I1 },
|
||||
{"srl", "d,w,s", 0x00000006, 0xfc0007ff, WR_d|RD_t|RD_s, I1 }, /* srlv */
|
||||
{"srl", "d,w,<", 0x00000002, 0xffe0003f, WR_d|RD_t, I1 },
|
||||
{"selsl", "d,v,t", 0x00000005, 0xfc0007ff, WR_d|RD_s|RD_t, L1 },
|
||||
{"selsr", "d,v,t", 0x00000001, 0xfc0007ff, WR_d|RD_s|RD_t, L1 },
|
||||
{"seq", "d,v,t", 0, (int) M_SEQ, INSN_MACRO, I1 },
|
||||
{"seq", "d,v,I", 0, (int) M_SEQ_I, INSN_MACRO, I1 },
|
||||
{"sge", "d,v,t", 0, (int) M_SGE, INSN_MACRO, I1 },
|
||||
{"sge", "d,v,I", 0, (int) M_SGE_I, INSN_MACRO, I1 },
|
||||
{"sgeu", "d,v,t", 0, (int) M_SGEU, INSN_MACRO, I1 },
|
||||
{"sgeu", "d,v,I", 0, (int) M_SGEU_I, INSN_MACRO, I1 },
|
||||
{"sgt", "d,v,t", 0, (int) M_SGT, INSN_MACRO, I1 },
|
||||
{"sgt", "d,v,I", 0, (int) M_SGT_I, INSN_MACRO, I1 },
|
||||
{"sgtu", "d,v,t", 0, (int) M_SGTU, INSN_MACRO, I1 },
|
||||
{"sgtu", "d,v,I", 0, (int) M_SGTU_I, INSN_MACRO, I1 },
|
||||
{"sh", "t,o(b)", 0xa4000000, 0xfc000000, SM|RD_t|RD_b, I1 },
|
||||
{"sh", "t,A(b)", 0, (int) M_SH_AB, INSN_MACRO, I1 },
|
||||
{"sle", "d,v,t", 0, (int) M_SLE, INSN_MACRO, I1 },
|
||||
{"sle", "d,v,I", 0, (int) M_SLE_I, INSN_MACRO, I1 },
|
||||
{"sleu", "d,v,t", 0, (int) M_SLEU, INSN_MACRO, I1 },
|
||||
{"sleu", "d,v,I", 0, (int) M_SLEU_I, INSN_MACRO, I1 },
|
||||
{"sllv", "d,t,s", 0x00000004, 0xfc0007ff, WR_d|RD_t|RD_s, I1 },
|
||||
{"sll", "d,w,s", 0x00000004, 0xfc0007ff, WR_d|RD_t|RD_s, I1 }, /* sllv */
|
||||
{"sll", "d,w,<", 0x00000000, 0xffe0003f, WR_d|RD_t, I1 },
|
||||
{"slt", "d,v,t", 0x0000002a, 0xfc0007ff, WR_d|RD_s|RD_t, I1 },
|
||||
{"slt", "d,v,I", 0, (int) M_SLT_I, INSN_MACRO, I1 },
|
||||
{"slti", "t,r,j", 0x28000000, 0xfc000000, WR_t|RD_s, I1 },
|
||||
{"sltiu", "t,r,j", 0x2c000000, 0xfc000000, WR_t|RD_s, I1 },
|
||||
{"sltu", "d,v,t", 0x0000002b, 0xfc0007ff, WR_d|RD_s|RD_t, I1 },
|
||||
{"sltu", "d,v,I", 0, (int) M_SLTU_I, INSN_MACRO, I1 },
|
||||
{"sne", "d,v,t", 0, (int) M_SNE, INSN_MACRO, I1 },
|
||||
{"sne", "d,v,I", 0, (int) M_SNE_I, INSN_MACRO, I1 },
|
||||
{"sqrt.d", "D,S", 0x46200004, 0xffff003f, WR_D|RD_S|FP_D, I2 },
|
||||
{"sqrt.s", "D,S", 0x46000004, 0xffff003f, WR_D|RD_S|FP_S, I2 },
|
||||
{"srav", "d,t,s", 0x00000007, 0xfc0007ff, WR_d|RD_t|RD_s, I1 },
|
||||
{"sra", "d,w,s", 0x00000007, 0xfc0007ff, WR_d|RD_t|RD_s, I1 }, /* srav */
|
||||
{"sra", "d,w,<", 0x00000003, 0xffe0003f, WR_d|RD_t, I1 },
|
||||
{"srlv", "d,t,s", 0x00000006, 0xfc0007ff, WR_d|RD_t|RD_s, I1 },
|
||||
{"srl", "d,w,s", 0x00000006, 0xfc0007ff, WR_d|RD_t|RD_s, I1 }, /* srlv */
|
||||
{"srl", "d,w,<", 0x00000002, 0xffe0003f, WR_d|RD_t, I1 },
|
||||
/* ssnop is at the start of the table. */
|
||||
{"standby", "", 0x42000021, 0xffffffff, 0, V1 },
|
||||
{"sub", "d,v,t", 0x00000022, 0xfc0007ff, WR_d|RD_s|RD_t, I1 },
|
||||
{"sub", "d,v,I", 0, (int) M_SUB_I, INSN_MACRO, I1 },
|
||||
{"standby", "", 0x42000021, 0xffffffff, 0, V1 },
|
||||
{"sub", "d,v,t", 0x00000022, 0xfc0007ff, WR_d|RD_s|RD_t, I1 },
|
||||
{"sub", "d,v,I", 0, (int) M_SUB_I, INSN_MACRO, I1 },
|
||||
{"sub.d", "D,V,T", 0x46200001, 0xffe0003f, WR_D|RD_S|RD_T|FP_D, I1 },
|
||||
{"sub.s", "D,V,T", 0x46000001, 0xffe0003f, WR_D|RD_S|RD_T|FP_S, I1 },
|
||||
{"sub.ps", "D,V,T", 0x46c00001, 0xffe0003f, WR_D|RD_S|RD_T|FP_D, I5 },
|
||||
{"subu", "d,v,t", 0x00000023, 0xfc0007ff, WR_d|RD_s|RD_t, I1 },
|
||||
{"subu", "d,v,I", 0, (int) M_SUBU_I, INSN_MACRO, I1 },
|
||||
{"suspend", "", 0x42000022, 0xffffffff, 0, V1 },
|
||||
{"subu", "d,v,t", 0x00000023, 0xfc0007ff, WR_d|RD_s|RD_t, I1 },
|
||||
{"subu", "d,v,I", 0, (int) M_SUBU_I, INSN_MACRO, I1 },
|
||||
{"suspend", "", 0x42000022, 0xffffffff, 0, V1 },
|
||||
{"suxc1", "S,t(b)", 0x4c00000d, 0xfc0007ff, SM|RD_S|RD_t|RD_b, I5 },
|
||||
{"sw", "t,o(b)", 0xac000000, 0xfc000000, SM|RD_t|RD_b, I1 },
|
||||
{"sw", "t,A(b)", 0, (int) M_SW_AB, INSN_MACRO, I1 },
|
||||
{"swc0", "E,o(b)", 0xe0000000, 0xfc000000, SM|RD_C0|RD_b, I1 },
|
||||
{"swc0", "E,A(b)", 0, (int) M_SWC0_AB, INSN_MACRO, I1 },
|
||||
{"sw", "t,o(b)", 0xac000000, 0xfc000000, SM|RD_t|RD_b, I1 },
|
||||
{"sw", "t,A(b)", 0, (int) M_SW_AB, INSN_MACRO, I1 },
|
||||
{"swc0", "E,o(b)", 0xe0000000, 0xfc000000, SM|RD_C0|RD_b, I1 },
|
||||
{"swc0", "E,A(b)", 0, (int) M_SWC0_AB, INSN_MACRO, I1 },
|
||||
{"swc1", "T,o(b)", 0xe4000000, 0xfc000000, SM|RD_T|RD_b|FP_S, I1 },
|
||||
{"swc1", "E,o(b)", 0xe4000000, 0xfc000000, SM|RD_T|RD_b|FP_S, I1 },
|
||||
{"swc1", "T,A(b)", 0, (int) M_SWC1_AB, INSN_MACRO, I1 },
|
||||
{"swc1", "E,A(b)", 0, (int) M_SWC1_AB, INSN_MACRO, I1 },
|
||||
{"swc1", "T,A(b)", 0, (int) M_SWC1_AB, INSN_MACRO, I1 },
|
||||
{"swc1", "E,A(b)", 0, (int) M_SWC1_AB, INSN_MACRO, I1 },
|
||||
{"s.s", "T,o(b)", 0xe4000000, 0xfc000000, SM|RD_T|RD_b|FP_S, I1 }, /* swc1 */
|
||||
{"s.s", "T,A(b)", 0, (int) M_SWC1_AB, INSN_MACRO, I1 },
|
||||
{"swc2", "E,o(b)", 0xe8000000, 0xfc000000, SM|RD_C2|RD_b, I1 },
|
||||
{"swc2", "E,A(b)", 0, (int) M_SWC2_AB, INSN_MACRO, I1 },
|
||||
{"swc3", "E,o(b)", 0xec000000, 0xfc000000, SM|RD_C3|RD_b, I1 },
|
||||
{"swc3", "E,A(b)", 0, (int) M_SWC3_AB, INSN_MACRO, I1 },
|
||||
{"swl", "t,o(b)", 0xa8000000, 0xfc000000, SM|RD_t|RD_b, I1 },
|
||||
{"swl", "t,A(b)", 0, (int) M_SWL_AB, INSN_MACRO, I1 },
|
||||
{"scache", "t,o(b)", 0xa8000000, 0xfc000000, RD_t|RD_b, I2 }, /* same */
|
||||
{"scache", "t,A(b)", 0, (int) M_SWL_AB, INSN_MACRO, I2 }, /* as swl */
|
||||
{"swr", "t,o(b)", 0xb8000000, 0xfc000000, SM|RD_t|RD_b, I1 },
|
||||
{"swr", "t,A(b)", 0, (int) M_SWR_AB, INSN_MACRO, I1 },
|
||||
{"invalidate", "t,o(b)",0xb8000000, 0xfc000000, RD_t|RD_b, I2 }, /* same */
|
||||
{"invalidate", "t,A(b)",0, (int) M_SWR_AB, INSN_MACRO, I2 }, /* as swr */
|
||||
{"s.s", "T,A(b)", 0, (int) M_SWC1_AB, INSN_MACRO, I1 },
|
||||
{"swc2", "E,o(b)", 0xe8000000, 0xfc000000, SM|RD_C2|RD_b, I1 },
|
||||
{"swc2", "E,A(b)", 0, (int) M_SWC2_AB, INSN_MACRO, I1 },
|
||||
{"swc3", "E,o(b)", 0xec000000, 0xfc000000, SM|RD_C3|RD_b, I1 },
|
||||
{"swc3", "E,A(b)", 0, (int) M_SWC3_AB, INSN_MACRO, I1 },
|
||||
{"swl", "t,o(b)", 0xa8000000, 0xfc000000, SM|RD_t|RD_b, I1 },
|
||||
{"swl", "t,A(b)", 0, (int) M_SWL_AB, INSN_MACRO, I1 },
|
||||
{"scache", "t,o(b)", 0xa8000000, 0xfc000000, RD_t|RD_b, I2 }, /* same */
|
||||
{"scache", "t,A(b)", 0, (int) M_SWL_AB, INSN_MACRO, I2 }, /* as swl */
|
||||
{"swr", "t,o(b)", 0xb8000000, 0xfc000000, SM|RD_t|RD_b, I1 },
|
||||
{"swr", "t,A(b)", 0, (int) M_SWR_AB, INSN_MACRO, I1 },
|
||||
{"invalidate", "t,o(b)",0xb8000000, 0xfc000000, RD_t|RD_b, I2 }, /* same */
|
||||
{"invalidate", "t,A(b)",0, (int) M_SWR_AB, INSN_MACRO, I2 }, /* as swr */
|
||||
{"swxc1", "S,t(b)", 0x4c000008, 0xfc0007ff, SM|RD_S|RD_t|RD_b, I4 },
|
||||
{"sync", "", 0x0000000f, 0xffffffff, INSN_SYNC, I2|G1 },
|
||||
{"sync.p", "", 0x0000040f, 0xffffffff, INSN_SYNC, I2 },
|
||||
{"sync.l", "", 0x0000000f, 0xffffffff, INSN_SYNC, I2 },
|
||||
{"syscall", "", 0x0000000c, 0xffffffff, TRAP, I1 },
|
||||
{"syscall", "B", 0x0000000c, 0xfc00003f, TRAP, I1 },
|
||||
{"teqi", "s,j", 0x040c0000, 0xfc1f0000, RD_s|TRAP, I2 },
|
||||
{"teq", "s,t", 0x00000034, 0xfc00ffff, RD_s|RD_t|TRAP, I2 },
|
||||
{"teq", "s,t,q", 0x00000034, 0xfc00003f, RD_s|RD_t|TRAP, I2 },
|
||||
{"teq", "s,j", 0x040c0000, 0xfc1f0000, RD_s|TRAP, I2 }, /* teqi */
|
||||
{"teq", "s,I", 0, (int) M_TEQ_I, INSN_MACRO, I2 },
|
||||
{"tgei", "s,j", 0x04080000, 0xfc1f0000, RD_s|TRAP, I2 },
|
||||
{"tge", "s,t", 0x00000030, 0xfc00ffff, RD_s|RD_t|TRAP, I2 },
|
||||
{"tge", "s,t,q", 0x00000030, 0xfc00003f, RD_s|RD_t|TRAP, I2 },
|
||||
{"tge", "s,j", 0x04080000, 0xfc1f0000, RD_s|TRAP, I2 }, /* tgei */
|
||||
{"tge", "s,I", 0, (int) M_TGE_I, INSN_MACRO, I2 },
|
||||
{"tgeiu", "s,j", 0x04090000, 0xfc1f0000, RD_s|TRAP, I2 },
|
||||
{"tgeu", "s,t", 0x00000031, 0xfc00ffff, RD_s|RD_t|TRAP, I2 },
|
||||
{"tgeu", "s,t,q", 0x00000031, 0xfc00003f, RD_s|RD_t|TRAP, I2 },
|
||||
{"tgeu", "s,j", 0x04090000, 0xfc1f0000, RD_s|TRAP, I2 }, /* tgeiu */
|
||||
{"tgeu", "s,I", 0, (int) M_TGEU_I, INSN_MACRO, I2 },
|
||||
{"tlbp", "", 0x42000008, 0xffffffff, INSN_TLB, I1|M1 },
|
||||
{"tlbr", "", 0x42000001, 0xffffffff, INSN_TLB, I1|M1 },
|
||||
{"tlbwi", "", 0x42000002, 0xffffffff, INSN_TLB, I1|M1 },
|
||||
{"tlbwr", "", 0x42000006, 0xffffffff, INSN_TLB, I1|M1 },
|
||||
{"tlti", "s,j", 0x040a0000, 0xfc1f0000, RD_s|TRAP, I2 },
|
||||
{"tlt", "s,t", 0x00000032, 0xfc00ffff, RD_s|RD_t|TRAP, I2 },
|
||||
{"tlt", "s,t,q", 0x00000032, 0xfc00003f, RD_s|RD_t|TRAP, I2 },
|
||||
{"tlt", "s,j", 0x040a0000, 0xfc1f0000, RD_s|TRAP, I2 }, /* tlti */
|
||||
{"tlt", "s,I", 0, (int) M_TLT_I, INSN_MACRO, I2 },
|
||||
{"tltiu", "s,j", 0x040b0000, 0xfc1f0000, RD_s|TRAP, I2 },
|
||||
{"tltu", "s,t", 0x00000033, 0xfc00ffff, RD_s|RD_t|TRAP, I2 },
|
||||
{"tltu", "s,t,q", 0x00000033, 0xfc00003f, RD_s|RD_t|TRAP, I2 },
|
||||
{"tltu", "s,j", 0x040b0000, 0xfc1f0000, RD_s|TRAP, I2 }, /* tltiu */
|
||||
{"tltu", "s,I", 0, (int) M_TLTU_I, INSN_MACRO, I2 },
|
||||
{"tnei", "s,j", 0x040e0000, 0xfc1f0000, RD_s|TRAP, I2 },
|
||||
{"tne", "s,t", 0x00000036, 0xfc00ffff, RD_s|RD_t|TRAP, I2 },
|
||||
{"tne", "s,t,q", 0x00000036, 0xfc00003f, RD_s|RD_t|TRAP, I2 },
|
||||
{"tne", "s,j", 0x040e0000, 0xfc1f0000, RD_s|TRAP, I2 }, /* tnei */
|
||||
{"tne", "s,I", 0, (int) M_TNE_I, INSN_MACRO, I2 },
|
||||
{"trunc.l.d", "D,S", 0x46200009, 0xffff003f, WR_D|RD_S|FP_D, I3 },
|
||||
{"trunc.l.s", "D,S", 0x46000009, 0xffff003f, WR_D|RD_S|FP_S, I3 },
|
||||
{"trunc.w.d", "D,S", 0x4620000d, 0xffff003f, WR_D|RD_S|FP_D, I2 },
|
||||
{"trunc.w.d", "D,S,x", 0x4620000d, 0xffff003f, WR_D|RD_S|FP_D, I2 },
|
||||
{"trunc.w.d", "D,S,t", 0, (int) M_TRUNCWD, INSN_MACRO, I1 },
|
||||
{"trunc.w.s", "D,S", 0x4600000d, 0xffff003f, WR_D|RD_S|FP_S, I2 },
|
||||
{"trunc.w.s", "D,S,x", 0x4600000d, 0xffff003f, WR_D|RD_S|FP_S, I2 },
|
||||
{"trunc.w.s", "D,S,t", 0, (int) M_TRUNCWS, INSN_MACRO, I1 },
|
||||
{"uld", "t,o(b)", 0, (int) M_ULD, INSN_MACRO, I3 },
|
||||
{"uld", "t,A(b)", 0, (int) M_ULD_A, INSN_MACRO, I3 },
|
||||
{"ulh", "t,o(b)", 0, (int) M_ULH, INSN_MACRO, I1 },
|
||||
{"ulh", "t,A(b)", 0, (int) M_ULH_A, INSN_MACRO, I1 },
|
||||
{"ulhu", "t,o(b)", 0, (int) M_ULHU, INSN_MACRO, I1 },
|
||||
{"ulhu", "t,A(b)", 0, (int) M_ULHU_A, INSN_MACRO, I1 },
|
||||
{"ulw", "t,o(b)", 0, (int) M_ULW, INSN_MACRO, I1 },
|
||||
{"ulw", "t,A(b)", 0, (int) M_ULW_A, INSN_MACRO, I1 },
|
||||
{"usd", "t,o(b)", 0, (int) M_USD, INSN_MACRO, I3 },
|
||||
{"usd", "t,A(b)", 0, (int) M_USD_A, INSN_MACRO, I3 },
|
||||
{"ush", "t,o(b)", 0, (int) M_USH, INSN_MACRO, I1 },
|
||||
{"ush", "t,A(b)", 0, (int) M_USH_A, INSN_MACRO, I1 },
|
||||
{"usw", "t,o(b)", 0, (int) M_USW, INSN_MACRO, I1 },
|
||||
{"usw", "t,A(b)", 0, (int) M_USW_A, INSN_MACRO, I1 },
|
||||
{"xor", "d,v,t", 0x00000026, 0xfc0007ff, WR_d|RD_s|RD_t, I1 },
|
||||
{"xor", "t,r,I", 0, (int) M_XOR_I, INSN_MACRO, I1 },
|
||||
{"xori", "t,r,i", 0x38000000, 0xfc000000, WR_t|RD_s, I1 },
|
||||
{"wait", "", 0x42000020, 0xffffffff, TRAP, I3|I32|M1},
|
||||
{"wait", "J", 0x42000020, 0xfe00003f, TRAP, I32 },
|
||||
{"waiti", "", 0x42000020, 0xffffffff, TRAP, L1 },
|
||||
{"wb", "o(b)", 0xbc040000, 0xfc1f0000, SM|RD_b, L1 },
|
||||
{"sync", "", 0x0000000f, 0xffffffff, INSN_SYNC, I2|G1 },
|
||||
{"sync.p", "", 0x0000040f, 0xffffffff, INSN_SYNC, I2 },
|
||||
{"sync.l", "", 0x0000000f, 0xffffffff, INSN_SYNC, I2 },
|
||||
{"syscall", "", 0x0000000c, 0xffffffff, TRAP, I1 },
|
||||
{"syscall", "B", 0x0000000c, 0xfc00003f, TRAP, I1 },
|
||||
{"teqi", "s,j", 0x040c0000, 0xfc1f0000, RD_s|TRAP, I2 },
|
||||
{"teq", "s,t", 0x00000034, 0xfc00ffff, RD_s|RD_t|TRAP, I2 },
|
||||
{"teq", "s,t,q", 0x00000034, 0xfc00003f, RD_s|RD_t|TRAP, I2 },
|
||||
{"teq", "s,j", 0x040c0000, 0xfc1f0000, RD_s|TRAP, I2 }, /* teqi */
|
||||
{"teq", "s,I", 0, (int) M_TEQ_I, INSN_MACRO, I2 },
|
||||
{"tgei", "s,j", 0x04080000, 0xfc1f0000, RD_s|TRAP, I2 },
|
||||
{"tge", "s,t", 0x00000030, 0xfc00ffff, RD_s|RD_t|TRAP, I2 },
|
||||
{"tge", "s,t,q", 0x00000030, 0xfc00003f, RD_s|RD_t|TRAP, I2 },
|
||||
{"tge", "s,j", 0x04080000, 0xfc1f0000, RD_s|TRAP, I2 }, /* tgei */
|
||||
{"tge", "s,I", 0, (int) M_TGE_I, INSN_MACRO, I2 },
|
||||
{"tgeiu", "s,j", 0x04090000, 0xfc1f0000, RD_s|TRAP, I2 },
|
||||
{"tgeu", "s,t", 0x00000031, 0xfc00ffff, RD_s|RD_t|TRAP, I2 },
|
||||
{"tgeu", "s,t,q", 0x00000031, 0xfc00003f, RD_s|RD_t|TRAP, I2 },
|
||||
{"tgeu", "s,j", 0x04090000, 0xfc1f0000, RD_s|TRAP, I2 }, /* tgeiu */
|
||||
{"tgeu", "s,I", 0, (int) M_TGEU_I, INSN_MACRO, I2 },
|
||||
{"tlbp", "", 0x42000008, 0xffffffff, INSN_TLB, I1|M1 },
|
||||
{"tlbr", "", 0x42000001, 0xffffffff, INSN_TLB, I1|M1 },
|
||||
{"tlbwi", "", 0x42000002, 0xffffffff, INSN_TLB, I1|M1 },
|
||||
{"tlbwr", "", 0x42000006, 0xffffffff, INSN_TLB, I1|M1 },
|
||||
{"tlti", "s,j", 0x040a0000, 0xfc1f0000, RD_s|TRAP, I2 },
|
||||
{"tlt", "s,t", 0x00000032, 0xfc00ffff, RD_s|RD_t|TRAP, I2 },
|
||||
{"tlt", "s,t,q", 0x00000032, 0xfc00003f, RD_s|RD_t|TRAP, I2 },
|
||||
{"tlt", "s,j", 0x040a0000, 0xfc1f0000, RD_s|TRAP, I2 }, /* tlti */
|
||||
{"tlt", "s,I", 0, (int) M_TLT_I, INSN_MACRO, I2 },
|
||||
{"tltiu", "s,j", 0x040b0000, 0xfc1f0000, RD_s|TRAP, I2 },
|
||||
{"tltu", "s,t", 0x00000033, 0xfc00ffff, RD_s|RD_t|TRAP, I2 },
|
||||
{"tltu", "s,t,q", 0x00000033, 0xfc00003f, RD_s|RD_t|TRAP, I2 },
|
||||
{"tltu", "s,j", 0x040b0000, 0xfc1f0000, RD_s|TRAP, I2 }, /* tltiu */
|
||||
{"tltu", "s,I", 0, (int) M_TLTU_I, INSN_MACRO, I2 },
|
||||
{"tnei", "s,j", 0x040e0000, 0xfc1f0000, RD_s|TRAP, I2 },
|
||||
{"tne", "s,t", 0x00000036, 0xfc00ffff, RD_s|RD_t|TRAP, I2 },
|
||||
{"tne", "s,t,q", 0x00000036, 0xfc00003f, RD_s|RD_t|TRAP, I2 },
|
||||
{"tne", "s,j", 0x040e0000, 0xfc1f0000, RD_s|TRAP, I2 }, /* tnei */
|
||||
{"tne", "s,I", 0, (int) M_TNE_I, INSN_MACRO, I2 },
|
||||
{"trunc.l.d", "D,S", 0x46200009, 0xffff003f, WR_D|RD_S|FP_D, I3 },
|
||||
{"trunc.l.s", "D,S", 0x46000009, 0xffff003f, WR_D|RD_S|FP_S, I3 },
|
||||
{"trunc.w.d", "D,S", 0x4620000d, 0xffff003f, WR_D|RD_S|FP_D, I2 },
|
||||
{"trunc.w.d", "D,S,x", 0x4620000d, 0xffff003f, WR_D|RD_S|FP_D, I2 },
|
||||
{"trunc.w.d", "D,S,t", 0, (int) M_TRUNCWD, INSN_MACRO, I1 },
|
||||
{"trunc.w.s", "D,S", 0x4600000d, 0xffff003f, WR_D|RD_S|FP_S, I2 },
|
||||
{"trunc.w.s", "D,S,x", 0x4600000d, 0xffff003f, WR_D|RD_S|FP_S, I2 },
|
||||
{"trunc.w.s", "D,S,t", 0, (int) M_TRUNCWS, INSN_MACRO, I1 },
|
||||
{"uld", "t,o(b)", 0, (int) M_ULD, INSN_MACRO, I3 },
|
||||
{"uld", "t,A(b)", 0, (int) M_ULD_A, INSN_MACRO, I3 },
|
||||
{"ulh", "t,o(b)", 0, (int) M_ULH, INSN_MACRO, I1 },
|
||||
{"ulh", "t,A(b)", 0, (int) M_ULH_A, INSN_MACRO, I1 },
|
||||
{"ulhu", "t,o(b)", 0, (int) M_ULHU, INSN_MACRO, I1 },
|
||||
{"ulhu", "t,A(b)", 0, (int) M_ULHU_A, INSN_MACRO, I1 },
|
||||
{"ulw", "t,o(b)", 0, (int) M_ULW, INSN_MACRO, I1 },
|
||||
{"ulw", "t,A(b)", 0, (int) M_ULW_A, INSN_MACRO, I1 },
|
||||
{"usd", "t,o(b)", 0, (int) M_USD, INSN_MACRO, I3 },
|
||||
{"usd", "t,A(b)", 0, (int) M_USD_A, INSN_MACRO, I3 },
|
||||
{"ush", "t,o(b)", 0, (int) M_USH, INSN_MACRO, I1 },
|
||||
{"ush", "t,A(b)", 0, (int) M_USH_A, INSN_MACRO, I1 },
|
||||
{"usw", "t,o(b)", 0, (int) M_USW, INSN_MACRO, I1 },
|
||||
{"usw", "t,A(b)", 0, (int) M_USW_A, INSN_MACRO, I1 },
|
||||
{"xor", "d,v,t", 0x00000026, 0xfc0007ff, WR_d|RD_s|RD_t, I1 },
|
||||
{"xor", "t,r,I", 0, (int) M_XOR_I, INSN_MACRO, I1 },
|
||||
{"xori", "t,r,i", 0x38000000, 0xfc000000, WR_t|RD_s, I1 },
|
||||
{"wait", "", 0x42000020, 0xffffffff, TRAP, I3|I32|M1},
|
||||
{"wait", "J", 0x42000020, 0xfe00003f, TRAP, I32 },
|
||||
{"waiti", "", 0x42000020, 0xffffffff, TRAP, L1 },
|
||||
{"wb", "o(b)", 0xbc040000, 0xfc1f0000, SM|RD_b, L1 },
|
||||
/* No hazard protection on coprocessor instructions--they shouldn't
|
||||
change the state of the processor and if they do it's up to the
|
||||
user to put in nops as necessary. These are at the end so that the
|
||||
disasembler recognizes more specific versions first. */
|
||||
{"c0", "C", 0x42000000, 0xfe000000, 0, I1 },
|
||||
{"c1", "C", 0x46000000, 0xfe000000, 0, I1 },
|
||||
{"c2", "C", 0x4a000000, 0xfe000000, 0, I1 },
|
||||
{"c3", "C", 0x4e000000, 0xfe000000, 0, I1 },
|
||||
{"cop0", "C", 0, (int) M_COP0, INSN_MACRO, I1 },
|
||||
{"cop1", "C", 0, (int) M_COP1, INSN_MACRO, I1 },
|
||||
{"cop2", "C", 0, (int) M_COP2, INSN_MACRO, I1 },
|
||||
{"cop3", "C", 0, (int) M_COP3, INSN_MACRO, I1 },
|
||||
{"c0", "C", 0x42000000, 0xfe000000, 0, I1 },
|
||||
{"c1", "C", 0x46000000, 0xfe000000, 0, I1 },
|
||||
{"c2", "C", 0x4a000000, 0xfe000000, 0, I1 },
|
||||
{"c3", "C", 0x4e000000, 0xfe000000, 0, I1 },
|
||||
{"cop0", "C", 0, (int) M_COP0, INSN_MACRO, I1 },
|
||||
{"cop1", "C", 0, (int) M_COP1, INSN_MACRO, I1 },
|
||||
{"cop2", "C", 0, (int) M_COP2, INSN_MACRO, I1 },
|
||||
{"cop3", "C", 0, (int) M_COP3, INSN_MACRO, I1 },
|
||||
|
||||
/* Conflicts with the 4650's "mul" instruction. Nobody's using the
|
||||
4010 any more, so move this insn out of the way. If the object
|
||||
format gave us more info, we could do this right. */
|
||||
{"addciu", "t,r,j", 0x70000000, 0xfc000000, WR_t|RD_s, L1 },
|
||||
{"addciu", "t,r,j", 0x70000000, 0xfc000000, WR_t|RD_s, L1 },
|
||||
};
|
||||
|
||||
#define MIPS_NUM_OPCODES \
|
||||
|
|
Loading…
Reference in New Issue