[PATCH 26/57][Arm][GAS] Add support for MVE instructions: vpnot and vpsel
gas/ChangeLog: 2019-05-16 Andre Vieira <andre.simoesdiasvieira@arm.com> * config/tc-arm.c (do_mve_vpsel): New encoding function. (do_mve_vpnot): Likewise. (insns): Add entries for MVE mnemonics. * testsuite/gas/arm/mve-vpnot-bad.d: New test. * testsuite/gas/arm/mve-vpnot-bad.l: New test. * testsuite/gas/arm/mve-vpnot-bad.s: New test. * testsuite/gas/arm/mve-vpsel-bad.d: New test. * testsuite/gas/arm/mve-vpsel-bad.l: New test. * testsuite/gas/arm/mve-vpsel-bad.s: New test.
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2019-05-16 Andre Vieira <andre.simoesdiasvieira@arm.com>
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* config/tc-arm.c (do_mve_vpsel): New encoding function.
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(do_mve_vpnot): Likewise.
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(insns): Add entries for MVE mnemonics.
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* testsuite/gas/arm/mve-vpnot-bad.d: New test.
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* testsuite/gas/arm/mve-vpnot-bad.l: New test.
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* testsuite/gas/arm/mve-vpnot-bad.s: New test.
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* testsuite/gas/arm/mve-vpsel-bad.d: New test.
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* testsuite/gas/arm/mve-vpsel-bad.l: New test.
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* testsuite/gas/arm/mve-vpsel-bad.s: New test.
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2019-05-16 Andre Vieira <andre.simoesdiasvieira@arm.com>
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* config/tc-arm.c (do_neon_mvn): Change to accept MVE variants.
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@ -15731,6 +15731,34 @@ do_mve_vmlas (void)
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inst.is_neon = 1;
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}
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static void
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do_mve_vpsel (void)
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{
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neon_select_shape (NS_QQQ, NS_NULL);
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if (inst.cond > COND_ALWAYS)
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inst.pred_insn_type = INSIDE_VPT_INSN;
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else
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inst.pred_insn_type = MVE_OUTSIDE_PRED_INSN;
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inst.instruction |= HI1 (inst.operands[0].reg) << 22;
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inst.instruction |= LOW4 (inst.operands[1].reg) << 16;
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inst.instruction |= LOW4 (inst.operands[0].reg) << 12;
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inst.instruction |= HI1 (inst.operands[1].reg) << 7;
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inst.instruction |= HI1 (inst.operands[2].reg) << 5;
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inst.instruction |= LOW4 (inst.operands[2].reg);
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inst.is_neon = 1;
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}
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static void
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do_mve_vpnot (void)
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{
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if (inst.cond > COND_ALWAYS)
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inst.pred_insn_type = INSIDE_VPT_INSN;
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else
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inst.pred_insn_type = MVE_OUTSIDE_PRED_INSN;
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}
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static void
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do_mve_vmaxnma_vminnma (void)
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{
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@ -24712,6 +24740,8 @@ static const struct asm_opcode insns[] =
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mToC("vmlas", ee011e40, 3, (RMQ, RMQ, RR), mve_vmlas),
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mToC("vmulh", ee010e01, 3, (RMQ, RMQ, RMQ), mve_vmulh),
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mToC("vrmulh", ee011e01, 3, (RMQ, RMQ, RMQ), mve_vmulh),
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mToC("vpnot", fe310f4d, 0, (), mve_vpnot),
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mToC("vpsel", fe310f01, 3, (RMQ, RMQ, RMQ), mve_vpsel),
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#undef THUMB_VARIANT
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#define THUMB_VARIANT & mve_fp_ext
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#name: bad MVE VPNOT instructions
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#as: -march=armv8.1-m.main+mve.fp
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#error_output: mve-vpnot-bad.l
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.*: +file format .*arm.*
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@ -0,0 +1,12 @@
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[^:]*: Assembler messages:
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[^:]*:10: Warning: instruction is UNPREDICTABLE in an IT block
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[^:]*:10: Warning: instruction is UNPREDICTABLE in an IT block
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[^:]*:10: Warning: instruction is UNPREDICTABLE in an IT block
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[^:]*:10: Warning: instruction is UNPREDICTABLE in an IT block
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[^:]*:10: Warning: instruction is UNPREDICTABLE in an IT block
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[^:]*:10: Warning: instruction is UNPREDICTABLE in an IT block
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[^:]*:12: Error: syntax error -- `vpnoteq'
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[^:]*:13: Error: syntax error -- `vpnoteq'
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[^:]*:15: Error: syntax error -- `vpnoteq'
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[^:]*:16: Error: vector predicated instruction should be in VPT/VPST block -- `vpnott'
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[^:]*:18: Error: instruction missing MVE vector predication code -- `vpnot'
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@ -0,0 +1,18 @@
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.macro cond
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.irp cond, eq, ne, gt, ge, lt, le
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it \cond
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vpnot
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.endr
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.endm
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.syntax unified
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.thumb
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cond
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it eq
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vpnoteq
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vpnoteq
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vpst
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vpnoteq
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vpnott
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vpst
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vpnot
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#name: bad MVE VPSEL instructions
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#as: -march=armv8.1-m.main+mve.fp
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#error_output: mve-vpsel-bad.l
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.*: +file format .*arm.*
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@ -0,0 +1,12 @@
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[^:]*: Assembler messages:
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[^:]*:10: Warning: instruction is UNPREDICTABLE in an IT block
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[^:]*:10: Warning: instruction is UNPREDICTABLE in an IT block
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[^:]*:10: Warning: instruction is UNPREDICTABLE in an IT block
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[^:]*:10: Warning: instruction is UNPREDICTABLE in an IT block
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[^:]*:10: Warning: instruction is UNPREDICTABLE in an IT block
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[^:]*:10: Warning: instruction is UNPREDICTABLE in an IT block
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[^:]*:12: Error: syntax error -- `vpseleq.i16 q0,q1,q2'
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[^:]*:13: Error: syntax error -- `vpseleq.i16 q0,q1,q2'
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[^:]*:15: Error: syntax error -- `vpseleq.i16 q0,q1,q2'
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[^:]*:16: Error: vector predicated instruction should be in VPT/VPST block -- `vpselt.i16 q0,q1,q2'
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[^:]*:18: Error: instruction missing MVE vector predication code -- `vpsel.i16 q0,q1,q2'
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@ -0,0 +1,19 @@
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.macro cond
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.irp cond, eq, ne, gt, ge, lt, le
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it \cond
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vpsel.i16 q0, q1, q2
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.endr
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.endm
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.syntax unified
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.thumb
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cond
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it eq
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vpseleq.i16 q0, q1, q2
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vpseleq.i16 q0, q1, q2
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vpst
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vpseleq.i16 q0, q1, q2
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vpselt.i16 q0, q1, q2
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vpst
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vpsel.i16 q0, q1, q2
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