x86: correctly handle KMOVD with VEX.W set outside of 64-bit mode
For the flavors having a GPR operand VEX.W is ignored outside of 64-bit mode. The mnemonic should therefore not be KMOVQ.
This commit is contained in:
Jan Beulich
Jan Beulich
parent
b50c9f3166
commit
58a211d260
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@ -1,3 +1,8 @@
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2018-11-06 Jan Beulich <jbeulich@suse.com>
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* testsuite/gas/i386/avx-wig.s: Add kmovd cases.
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* testsuite/gas/i386/avx-wig.d: Adjust expectations.
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2018-11-06 Jan Beulich <jbeulich@suse.com>
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* testsuite/gas/i386/avx-wig.s,
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@ -22,6 +22,8 @@ Disassembly of section .text:
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+[a-f0-9]+: c4 e2 f8 f3 10 blsmsk \(%eax\),%eax
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+[a-f0-9]+: c4 e2 f8 f3 08 blsr \(%eax\),%eax
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+[a-f0-9]+: c4 e2 f8 f5 00 bzhi %eax,\(%eax\),%eax
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+[a-f0-9]+: c4 e1 fb 92 c0 kmovd %eax,%k0
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+[a-f0-9]+: c4 e1 fb 93 c0 kmovd %k0,%eax
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+[a-f0-9]+: 8f e9 f8 12 c0 llwpcb %eax
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+[a-f0-9]+: 8f ea f8 12 00 00 00 00 00 lwpins \$0x0,\(%eax\),%eax
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+[a-f0-9]+: 8f ea f8 12 08 00 00 00 00 lwpval \$0x0,\(%eax\),%eax
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@ -17,6 +17,8 @@ _start:
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blsmsk (%eax), %eax
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blsr (%eax), %eax
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bzhi %eax, (%eax), %eax
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kmovd %eax, %k0
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kmovd %k0, %eax
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llwpcb %eax
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lwpins $0, (%eax), %eax
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lwpval $0, (%eax), %eax
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@ -1,3 +1,12 @@
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2018-11-06 Jan Beulich <jbeulich@suse.com>
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* i386-dis.c (MOD_VEX_W_0_0F92_P_3_LEN_0,
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MOD_VEX_W_1_0F92_P_3_LEN_0): Fold into MOD_VEX_0F92_P_3_LEN_0.
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(MOD_VEX_W_0_0F93_P_3_LEN_0, MOD_VEX_W_1_0F93_P_3_LEN_0): Fold
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into MOD_VEX_0F93_P_3_LEN_0.
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(vex_len_table, vex_w_table, mod_table): Move kmov[dq} with GPR
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operand cases up one level in the hierarchy.
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2018-11-06 Jan Beulich <jbeulich@suse.com>
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* i386-dis.c (VEX_W_0FC4_P_2, VEX_W_0FC5_P_2, VEX_W_0F3A14_P_2,
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@ -903,12 +903,10 @@ enum
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MOD_VEX_W_1_0F91_P_2_LEN_0,
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MOD_VEX_W_0_0F92_P_0_LEN_0,
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MOD_VEX_W_0_0F92_P_2_LEN_0,
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MOD_VEX_W_0_0F92_P_3_LEN_0,
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MOD_VEX_W_1_0F92_P_3_LEN_0,
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MOD_VEX_0F92_P_3_LEN_0,
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MOD_VEX_W_0_0F93_P_0_LEN_0,
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MOD_VEX_W_0_0F93_P_2_LEN_0,
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MOD_VEX_W_0_0F93_P_3_LEN_0,
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MOD_VEX_W_1_0F93_P_3_LEN_0,
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MOD_VEX_0F93_P_3_LEN_0,
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MOD_VEX_W_0_0F98_P_0_LEN_0,
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MOD_VEX_W_1_0F98_P_0_LEN_0,
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MOD_VEX_W_0_0F98_P_2_LEN_0,
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@ -1963,10 +1961,8 @@ enum
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VEX_W_0F91_P_2_LEN_0,
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VEX_W_0F92_P_0_LEN_0,
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VEX_W_0F92_P_2_LEN_0,
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VEX_W_0F92_P_3_LEN_0,
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VEX_W_0F93_P_0_LEN_0,
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VEX_W_0F93_P_2_LEN_0,
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VEX_W_0F93_P_3_LEN_0,
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VEX_W_0F98_P_0_LEN_0,
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VEX_W_0F98_P_2_LEN_0,
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VEX_W_0F99_P_0_LEN_0,
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@ -9486,7 +9482,7 @@ static const struct dis386 vex_len_table[][2] = {
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/* VEX_LEN_0F92_P_3 */
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{
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{ VEX_W_TABLE (VEX_W_0F92_P_3_LEN_0) },
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{ MOD_TABLE (MOD_VEX_0F92_P_3_LEN_0) },
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},
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/* VEX_LEN_0F93_P_0 */
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@ -9501,7 +9497,7 @@ static const struct dis386 vex_len_table[][2] = {
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/* VEX_LEN_0F93_P_3 */
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{
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{ VEX_W_TABLE (VEX_W_0F93_P_3_LEN_0) },
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{ MOD_TABLE (MOD_VEX_0F93_P_3_LEN_0) },
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},
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/* VEX_LEN_0F98_P_0 */
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@ -9999,11 +9995,6 @@ static const struct dis386 vex_w_table[][2] = {
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/* VEX_W_0F92_P_2_LEN_0 */
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{ MOD_TABLE (MOD_VEX_W_0_0F92_P_2_LEN_0) },
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},
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{
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/* VEX_W_0F92_P_3_LEN_0 */
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{ MOD_TABLE (MOD_VEX_W_0_0F92_P_3_LEN_0) },
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{ MOD_TABLE (MOD_VEX_W_1_0F92_P_3_LEN_0) },
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},
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{
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/* VEX_W_0F93_P_0_LEN_0 */
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{ MOD_TABLE (MOD_VEX_W_0_0F93_P_0_LEN_0) },
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@ -10012,11 +10003,6 @@ static const struct dis386 vex_w_table[][2] = {
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/* VEX_W_0F93_P_2_LEN_0 */
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{ MOD_TABLE (MOD_VEX_W_0_0F93_P_2_LEN_0) },
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},
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{
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/* VEX_W_0F93_P_3_LEN_0 */
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{ MOD_TABLE (MOD_VEX_W_0_0F93_P_3_LEN_0) },
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{ MOD_TABLE (MOD_VEX_W_1_0F93_P_3_LEN_0) },
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},
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{
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/* VEX_W_0F98_P_0_LEN_0 */
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{ MOD_TABLE (MOD_VEX_W_0_0F98_P_0_LEN_0) },
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@ -10818,14 +10804,9 @@ static const struct dis386 mod_table[][2] = {
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{ "kmovb", { MaskG, Rdq }, 0 },
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},
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{
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/* MOD_VEX_W_0_0F92_P_3_LEN_0 */
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/* MOD_VEX_0F92_P_3_LEN_0 */
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{ Bad_Opcode },
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{ "kmovd", { MaskG, Rdq }, 0 },
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},
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{
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/* MOD_VEX_W_1_0F92_P_3_LEN_0 */
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{ Bad_Opcode },
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{ "kmovq", { MaskG, Rdq }, 0 },
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{ "kmovK", { MaskG, Rdq }, 0 },
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},
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{
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/* MOD_VEX_W_0_0F93_P_0_LEN_0 */
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@ -10838,14 +10819,9 @@ static const struct dis386 mod_table[][2] = {
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{ "kmovb", { Gdq, MaskR }, 0 },
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},
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{
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/* MOD_VEX_W_0_0F93_P_3_LEN_0 */
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/* MOD_VEX_0F93_P_3_LEN_0 */
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{ Bad_Opcode },
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{ "kmovd", { Gdq, MaskR }, 0 },
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},
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{
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/* MOD_VEX_W_1_0F93_P_3_LEN_0 */
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{ Bad_Opcode },
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{ "kmovq", { Gdq, MaskR }, 0 },
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{ "kmovK", { Gdq, MaskR }, 0 },
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},
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{
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/* MOD_VEX_W_0_0F98_P_0_LEN_0 */
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