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Update documentation for Arvm8.4-A changes to AArch64. 

gas/

2017-11-16  Tamar Christina  <tamar.christina@arm.com>

	* doc/c-aarch64.texi (armv8.4-a, sha2, sha3, sm4): New.
	(dotprod): Update default note.
This commit is contained in:
Tamar Christina 2017-11-16 16:13:01 +00:00
parent e9dbdd80cb
commit 68ffd9368a
2 changed files with 16 additions and 3 deletions
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gas/ChangeLog
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@ -1,3 +1,8 @@
2017-11-16 Tamar Christina <tamar.christina@arm.com>
* doc/c-aarch64.texi (armv8.4-a, sha2, sha3, sm4): New.
(dotprod): Update default note.
2017-11-16 Tamar Christina <tamar.christina@arm.com>
* testsuite/gas/aarch64/armv8_4-a-illegal.d: New.

14
gas/doc/c-aarch64.texi
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@ -90,7 +90,7 @@ This option specifies the target architecture. The assembler will
issue an error message if an attempt is made to assemble an
instruction which will not execute on the target architecture. The
following architecture names are recognized: @code{armv8-a},
@code{armv8.1-a}, @code{armv8.2-a} and @code{armv8.3-a}.
@code{armv8.1-a}, @code{armv8.2-a}, @code{armv8.3-a} and @code{armv8.4-a}.
If both @option{-mcpu} and @option{-march} are specified, the
assembler will use the setting for @option{-mcpu}. If neither are
@ -140,7 +140,15 @@ automatically cause those extensions to be disabled.
@item @code{crc} @tab ARMv8-A @tab ARMv8.1-A or later
@tab Enable CRC instructions.
@item @code{crypto} @tab ARMv8-A @tab No
@tab Enable cryptographic extensions. This implies @code{fp} and @code{simd}.
@tab Enable cryptographic extensions. This implies @code{fp}, @code{simd}, @code{aes} and @code{sha2}.
@item @code{aes} @tab ARMv8-A @tab No
@tab Enable the AES cryptographic extensions. This implies @code{fp} and @code{simd}.
@item @code{sha2} @tab ARMv8-A @tab No
@tab Enable the SHA2 cryptographic extensions. This implies @code{fp} and @code{simd}.
@item @code{sha3} @tab ARMv8.2-A @tab No
@tab Enable the ARMv8.2-A SHA2 and SHA3 cryptographic extensions. This implies @code{fp}, @code{simd} and @code{sha2}.
@item @code{sm4} @tab ARMv8.2-A @tab No
@tab Enable the ARMv8.2-A SM3 and SM4 cryptographic extensions. This implies @code{fp} and @code{simd}.
@item @code{fp} @tab ARMv8-A @tab ARMv8-A or later
@tab Enable floating-point extensions.
@item @code{fp16} @tab ARMv8.2-A @tab ARMv8.2-A or later
@ -166,7 +174,7 @@ automatically cause those extensions to be disabled.
@item @code{sve} @tab ARMv8.2-A @tab No
@tab Enable the Scalable Vector Extensions. This implies @code{fp16},
@code{simd} and @code{compnum}.
@item @code{dotprod} @tab ARMv8.2-A @tab No
@item @code{dotprod} @tab ARMv8.2-A @tab ARMv8.4-A or later
@tab Enable the Dot Product extension. This implies @code{simd}.
@end multitable