2002-06-04 Chris Demetriou <cgd@broadcom.com>
Ed Satterthwaite <ehs@broadcom.com>
* cp1.c (Infinity): Remove.
* sim-main.h (Infinity): Likewise.
* cp1.c (fp_unary, fp_binary): New functions.
(fp_abs, fp_neg, fp_add, fp_sub, fp_mul, fp_div, fp_recip)
(fp_sqrt): New functions, implemented in terms of the above.
(AbsoluteValue, Negate, Add, Sub, Multiply, Divide)
(Recip, SquareRoot): Remove (replaced by functions above).
* sim-main.h (fp_abs, fp_neg, fp_add, fp_sub, fp_mul, fp_div)
(fp_recip, fp_sqrt): New prototypes.
(AbsoluteValue, Negate, Add, Sub, Multiply, Divide)
(Recip, SquareRoot): Replace prototypes with #defines which
invoke the functions above.
This commit is contained in:
Chris Demetriou
parent
ae2ab2ce36
commit
ba46ddd0cf
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@ -1,3 +1,20 @@
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2002-06-04 Chris Demetriou <cgd@broadcom.com>
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Ed Satterthwaite <ehs@broadcom.com>
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* cp1.c (Infinity): Remove.
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* sim-main.h (Infinity): Likewise.
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* cp1.c (fp_unary, fp_binary): New functions.
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(fp_abs, fp_neg, fp_add, fp_sub, fp_mul, fp_div, fp_recip)
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(fp_sqrt): New functions, implemented in terms of the above.
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(AbsoluteValue, Negate, Add, Sub, Multiply, Divide)
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(Recip, SquareRoot): Remove (replaced by functions above).
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* sim-main.h (fp_abs, fp_neg, fp_add, fp_sub, fp_mul, fp_div)
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(fp_recip, fp_sqrt): New prototypes.
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(AbsoluteValue, Negate, Add, Sub, Multiply, Divide)
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(Recip, SquareRoot): Replace prototypes with #defines which
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invoke the functions above.
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2002-06-03 Chris Demetriou <cgd@broadcom.com>
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* sim-main.h (Nan, Infinity, Less, Equal, AbsoluteValue, Negate)
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505
sim/mips/cp1.c
505
sim/mips/cp1.c
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@ -327,48 +327,6 @@ NaN (op, fmt)
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return (boolean);
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}
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int
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Infinity (op, fmt)
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uword64 op;
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FP_formats fmt;
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{
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int boolean = 0;
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#ifdef DEBUG
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printf ("DBG: Infinity: format %s 0x%s\n",
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fpu_format_name (fmt), pr_addr (op));
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#endif /* DEBUG */
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switch (fmt)
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{
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case fmt_single:
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{
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sim_fpu wop;
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sim_fpu_32to (&wop, op);
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boolean = sim_fpu_is_infinity (&wop);
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break;
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}
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case fmt_double:
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{
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sim_fpu wop;
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sim_fpu_64to (&wop, op);
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boolean = sim_fpu_is_infinity (&wop);
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break;
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}
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default:
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printf ("DBG: TODO: unrecognised format (%s) for Infinity check\n",
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fpu_format_name (fmt));
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break;
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}
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#ifdef DEBUG
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printf ("DBG: Infinity: returning %d for 0x%s (format = %s)\n",
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boolean, pr_addr (op), fpu_format_name (fmt));
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#endif /* DEBUG */
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return (boolean);
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}
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int
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Less (op1, op2, fmt)
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uword64 op1;
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@ -467,430 +425,171 @@ Equal (op1, op2, fmt)
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return (boolean);
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}
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uword64
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AbsoluteValue (op, fmt)
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uword64 op;
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FP_formats fmt;
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/* Basic arithmetic operations. */
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static unsigned64
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fp_unary(sim_cpu *cpu,
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address_word cia,
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int (*sim_fpu_op)(sim_fpu *, const sim_fpu *),
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unsigned64 op,
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FP_formats fmt)
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{
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uword64 result = 0;
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sim_fpu wop;
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sim_fpu ans;
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unsigned64 result = 0;
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#ifdef DEBUG
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printf ("DBG: AbsoluteValue: %s: op = 0x%s\n",
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fpu_format_name (fmt), pr_addr (op));
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#endif /* DEBUG */
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/* The format type should already have been checked: */
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/* The format type has already been checked: */
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switch (fmt)
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{
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case fmt_single:
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{
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sim_fpu wop;
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unsigned32 ans;
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unsigned32 res;
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sim_fpu_32to (&wop, op);
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sim_fpu_abs (&wop, &wop);
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sim_fpu_to32 (&ans, &wop);
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result = ans;
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(*sim_fpu_op) (&ans, &wop);
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sim_fpu_to32 (&res, &ans);
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result = res;
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break;
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}
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case fmt_double:
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{
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sim_fpu wop;
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unsigned64 ans;
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unsigned64 res;
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sim_fpu_64to (&wop, op);
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sim_fpu_abs (&wop, &wop);
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sim_fpu_to64 (&ans, &wop);
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result = ans;
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(*sim_fpu_op) (&ans, &wop);
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sim_fpu_to64 (&res, &ans);
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result = res;
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break;
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}
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default:
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fprintf (stderr, "Bad switch\n");
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sim_io_eprintf (SD, "Bad switch\n");
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abort ();
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}
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return (result);
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return result;
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}
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uword64
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Negate (op, fmt)
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uword64 op;
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FP_formats fmt;
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static unsigned64
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fp_binary(sim_cpu *cpu,
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address_word cia,
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int (*sim_fpu_op)(sim_fpu *, const sim_fpu *, const sim_fpu *),
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unsigned64 op1,
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unsigned64 op2,
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FP_formats fmt)
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{
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uword64 result = 0;
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sim_fpu wop1;
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sim_fpu wop2;
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sim_fpu ans;
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unsigned64 result = 0;
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#ifdef DEBUG
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printf ("DBG: Negate: %s: op = 0x%s\n",
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fpu_format_name (fmt), pr_addr (op));
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#endif /* DEBUG */
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/* The format type should already have been checked: */
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/* The format type has already been checked: */
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switch (fmt)
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{
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case fmt_single:
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{
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sim_fpu wop;
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unsigned32 ans;
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sim_fpu_32to (&wop, op);
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sim_fpu_neg (&wop, &wop);
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sim_fpu_to32 (&ans, &wop);
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result = ans;
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break;
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}
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case fmt_double:
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{
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sim_fpu wop;
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unsigned64 ans;
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sim_fpu_64to (&wop, op);
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sim_fpu_neg (&wop, &wop);
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sim_fpu_to64 (&ans, &wop);
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result = ans;
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break;
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}
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default:
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fprintf (stderr, "Bad switch\n");
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abort ();
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}
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return (result);
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}
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uword64
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Add (op1, op2, fmt)
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uword64 op1;
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uword64 op2;
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FP_formats fmt;
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{
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uword64 result = 0;
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#ifdef DEBUG
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printf ("DBG: Add: %s: op1 = 0x%s : op2 = 0x%s\n",
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fpu_format_name (fmt), pr_addr (op1), pr_addr (op2));
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#endif /* DEBUG */
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/* The registers must specify FPRs valid for operands of type
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"fmt". If they are not valid, the result is undefined. */
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/* The format type should already have been checked: */
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switch (fmt)
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{
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case fmt_single:
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{
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sim_fpu wop1;
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sim_fpu wop2;
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sim_fpu ans;
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unsigned32 res;
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sim_fpu_32to (&wop1, op1);
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sim_fpu_32to (&wop2, op2);
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sim_fpu_add (&ans, &wop1, &wop2);
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(*sim_fpu_op) (&ans, &wop1, &wop2);
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sim_fpu_to32 (&res, &ans);
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result = res;
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break;
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}
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case fmt_double:
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{
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sim_fpu wop1;
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sim_fpu wop2;
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sim_fpu ans;
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unsigned64 res;
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sim_fpu_64to (&wop1, op1);
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sim_fpu_64to (&wop2, op2);
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sim_fpu_add (&ans, &wop1, &wop2);
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(*sim_fpu_op) (&ans, &wop1, &wop2);
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sim_fpu_to64 (&res, &ans);
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result = res;
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break;
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}
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default:
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fprintf (stderr, "Bad switch\n");
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sim_io_eprintf (SD, "Bad switch\n");
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abort ();
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}
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#ifdef DEBUG
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printf ("DBG: Add: returning 0x%s (format = %s)\n",
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pr_addr (result), fpu_format_name (fmt));
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#endif /* DEBUG */
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return (result);
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return result;
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}
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uword64
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Sub (op1, op2, fmt)
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uword64 op1;
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uword64 op2;
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FP_formats fmt;
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unsigned64
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fp_abs(sim_cpu *cpu,
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address_word cia,
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unsigned64 op,
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FP_formats fmt)
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{
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uword64 result = 0;
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#ifdef DEBUG
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printf ("DBG: Sub: %s: op1 = 0x%s : op2 = 0x%s\n",
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fpu_format_name (fmt), pr_addr (op1), pr_addr (op2));
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#endif /* DEBUG */
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/* The registers must specify FPRs valid for operands of type
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"fmt". If they are not valid, the result is undefined. */
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/* The format type should already have been checked: */
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switch (fmt)
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{
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case fmt_single:
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{
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sim_fpu wop1;
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sim_fpu wop2;
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sim_fpu ans;
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unsigned32 res;
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sim_fpu_32to (&wop1, op1);
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sim_fpu_32to (&wop2, op2);
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sim_fpu_sub (&ans, &wop1, &wop2);
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sim_fpu_to32 (&res, &ans);
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result = res;
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}
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break;
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case fmt_double:
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{
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sim_fpu wop1;
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sim_fpu wop2;
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sim_fpu ans;
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unsigned64 res;
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sim_fpu_64to (&wop1, op1);
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sim_fpu_64to (&wop2, op2);
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sim_fpu_sub (&ans, &wop1, &wop2);
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sim_fpu_to64 (&res, &ans);
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result = res;
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}
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break;
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default:
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fprintf (stderr, "Bad switch\n");
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abort ();
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}
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#ifdef DEBUG
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printf ("DBG: Sub: returning 0x%s (format = %s)\n",
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pr_addr (result), fpu_format_name (fmt));
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#endif /* DEBUG */
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return (result);
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return fp_unary(cpu, cia, &sim_fpu_abs, op, fmt);
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}
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uword64
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Multiply (op1, op2, fmt)
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uword64 op1;
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uword64 op2;
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FP_formats fmt;
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unsigned64
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fp_neg(sim_cpu *cpu,
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address_word cia,
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unsigned64 op,
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FP_formats fmt)
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{
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uword64 result = 0;
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#ifdef DEBUG
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printf ("DBG: Multiply: %s: op1 = 0x%s : op2 = 0x%s\n",
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fpu_format_name (fmt), pr_addr (op1), pr_addr (op2));
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#endif /* DEBUG */
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/* The registers must specify FPRs valid for operands of type
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"fmt". If they are not valid, the result is undefined. */
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/* The format type should already have been checked: */
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switch (fmt)
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{
|
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case fmt_single:
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||||
{
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sim_fpu wop1;
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sim_fpu wop2;
|
||||
sim_fpu ans;
|
||||
unsigned32 res;
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sim_fpu_32to (&wop1, op1);
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sim_fpu_32to (&wop2, op2);
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sim_fpu_mul (&ans, &wop1, &wop2);
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sim_fpu_to32 (&res, &ans);
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result = res;
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||||
break;
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||||
}
|
||||
case fmt_double:
|
||||
{
|
||||
sim_fpu wop1;
|
||||
sim_fpu wop2;
|
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sim_fpu ans;
|
||||
unsigned64 res;
|
||||
sim_fpu_64to (&wop1, op1);
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sim_fpu_64to (&wop2, op2);
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sim_fpu_mul (&ans, &wop1, &wop2);
|
||||
sim_fpu_to64 (&res, &ans);
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||||
result = res;
|
||||
break;
|
||||
}
|
||||
default:
|
||||
fprintf (stderr, "Bad switch\n");
|
||||
abort ();
|
||||
}
|
||||
|
||||
#ifdef DEBUG
|
||||
printf ("DBG: Multiply: returning 0x%s (format = %s)\n",
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pr_addr (result), fpu_format_name (fmt));
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||||
#endif /* DEBUG */
|
||||
|
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return (result);
|
||||
return fp_unary(cpu, cia, &sim_fpu_neg, op, fmt);
|
||||
}
|
||||
|
||||
uword64
|
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Divide (op1, op2, fmt)
|
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uword64 op1;
|
||||
uword64 op2;
|
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FP_formats fmt;
|
||||
unsigned64
|
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fp_add(sim_cpu *cpu,
|
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address_word cia,
|
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unsigned64 op1,
|
||||
unsigned64 op2,
|
||||
FP_formats fmt)
|
||||
{
|
||||
uword64 result = 0;
|
||||
|
||||
#ifdef DEBUG
|
||||
printf ("DBG: Divide: %s: op1 = 0x%s : op2 = 0x%s\n",
|
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fpu_format_name (fmt), pr_addr (op1), pr_addr (op2));
|
||||
#endif /* DEBUG */
|
||||
|
||||
/* The registers must specify FPRs valid for operands of type
|
||||
"fmt". If they are not valid, the result is undefined. */
|
||||
|
||||
/* The format type should already have been checked: */
|
||||
switch (fmt)
|
||||
{
|
||||
case fmt_single:
|
||||
{
|
||||
sim_fpu wop1;
|
||||
sim_fpu wop2;
|
||||
sim_fpu ans;
|
||||
unsigned32 res;
|
||||
sim_fpu_32to (&wop1, op1);
|
||||
sim_fpu_32to (&wop2, op2);
|
||||
sim_fpu_div (&ans, &wop1, &wop2);
|
||||
sim_fpu_to32 (&res, &ans);
|
||||
result = res;
|
||||
break;
|
||||
}
|
||||
case fmt_double:
|
||||
{
|
||||
sim_fpu wop1;
|
||||
sim_fpu wop2;
|
||||
sim_fpu ans;
|
||||
unsigned64 res;
|
||||
sim_fpu_64to (&wop1, op1);
|
||||
sim_fpu_64to (&wop2, op2);
|
||||
sim_fpu_div (&ans, &wop1, &wop2);
|
||||
sim_fpu_to64 (&res, &ans);
|
||||
result = res;
|
||||
break;
|
||||
}
|
||||
default:
|
||||
fprintf (stderr, "Bad switch\n");
|
||||
abort ();
|
||||
}
|
||||
|
||||
#ifdef DEBUG
|
||||
printf ("DBG: Divide: returning 0x%s (format = %s)\n",
|
||||
pr_addr (result), fpu_format_name (fmt));
|
||||
#endif /* DEBUG */
|
||||
|
||||
return (result);
|
||||
return fp_binary(cpu, cia, &sim_fpu_add, op1, op2, fmt);
|
||||
}
|
||||
|
||||
uword64 UNUSED
|
||||
Recip (op, fmt)
|
||||
uword64 op;
|
||||
FP_formats fmt;
|
||||
unsigned64
|
||||
fp_sub(sim_cpu *cpu,
|
||||
address_word cia,
|
||||
unsigned64 op1,
|
||||
unsigned64 op2,
|
||||
FP_formats fmt)
|
||||
{
|
||||
uword64 result = 0;
|
||||
|
||||
#ifdef DEBUG
|
||||
printf ("DBG: Recip: %s: op = 0x%s\n",
|
||||
fpu_format_name (fmt), pr_addr (op));
|
||||
#endif /* DEBUG */
|
||||
|
||||
/* The registers must specify FPRs valid for operands of type
|
||||
"fmt". If they are not valid, the result is undefined. */
|
||||
|
||||
/* The format type should already have been checked: */
|
||||
switch (fmt)
|
||||
{
|
||||
case fmt_single:
|
||||
{
|
||||
sim_fpu wop;
|
||||
sim_fpu ans;
|
||||
unsigned32 res;
|
||||
sim_fpu_32to (&wop, op);
|
||||
sim_fpu_inv (&ans, &wop);
|
||||
sim_fpu_to32 (&res, &ans);
|
||||
result = res;
|
||||
break;
|
||||
}
|
||||
case fmt_double:
|
||||
{
|
||||
sim_fpu wop;
|
||||
sim_fpu ans;
|
||||
unsigned64 res;
|
||||
sim_fpu_64to (&wop, op);
|
||||
sim_fpu_inv (&ans, &wop);
|
||||
sim_fpu_to64 (&res, &ans);
|
||||
result = res;
|
||||
break;
|
||||
}
|
||||
default:
|
||||
fprintf (stderr, "Bad switch\n");
|
||||
abort ();
|
||||
}
|
||||
|
||||
#ifdef DEBUG
|
||||
printf ("DBG: Recip: returning 0x%s (format = %s)\n",
|
||||
pr_addr (result), fpu_format_name (fmt));
|
||||
#endif /* DEBUG */
|
||||
|
||||
return (result);
|
||||
return fp_binary(cpu, cia, &sim_fpu_sub, op1, op2, fmt);
|
||||
}
|
||||
|
||||
uword64
|
||||
SquareRoot (op, fmt)
|
||||
uword64 op;
|
||||
FP_formats fmt;
|
||||
unsigned64
|
||||
fp_mul(sim_cpu *cpu,
|
||||
address_word cia,
|
||||
unsigned64 op1,
|
||||
unsigned64 op2,
|
||||
FP_formats fmt)
|
||||
{
|
||||
uword64 result = 0;
|
||||
|
||||
#ifdef DEBUG
|
||||
printf ("DBG: SquareRoot: %s: op = 0x%s\n",
|
||||
fpu_format_name (fmt), pr_addr (op));
|
||||
#endif /* DEBUG */
|
||||
|
||||
/* The registers must specify FPRs valid for operands of type
|
||||
"fmt". If they are not valid, the result is undefined. */
|
||||
|
||||
/* The format type should already have been checked: */
|
||||
switch (fmt)
|
||||
{
|
||||
case fmt_single:
|
||||
{
|
||||
sim_fpu wop;
|
||||
sim_fpu ans;
|
||||
unsigned32 res;
|
||||
sim_fpu_32to (&wop, op);
|
||||
sim_fpu_sqrt (&ans, &wop);
|
||||
sim_fpu_to32 (&res, &ans);
|
||||
result = res;
|
||||
break;
|
||||
}
|
||||
case fmt_double:
|
||||
{
|
||||
sim_fpu wop;
|
||||
sim_fpu ans;
|
||||
unsigned64 res;
|
||||
sim_fpu_64to (&wop, op);
|
||||
sim_fpu_sqrt (&ans, &wop);
|
||||
sim_fpu_to64 (&res, &ans);
|
||||
result = res;
|
||||
break;
|
||||
}
|
||||
default:
|
||||
fprintf (stderr, "Bad switch\n");
|
||||
abort ();
|
||||
}
|
||||
|
||||
#ifdef DEBUG
|
||||
printf ("DBG: SquareRoot: returning 0x%s (format = %s)\n",
|
||||
pr_addr (result), fpu_format_name (fmt));
|
||||
#endif /* DEBUG */
|
||||
|
||||
return (result);
|
||||
return fp_binary(cpu, cia, &sim_fpu_mul, op1, op2, fmt);
|
||||
}
|
||||
|
||||
unsigned64
|
||||
fp_div(sim_cpu *cpu,
|
||||
address_word cia,
|
||||
unsigned64 op1,
|
||||
unsigned64 op2,
|
||||
FP_formats fmt)
|
||||
{
|
||||
return fp_binary(cpu, cia, &sim_fpu_div, op1, op2, fmt);
|
||||
}
|
||||
|
||||
unsigned64
|
||||
fp_recip(sim_cpu *cpu,
|
||||
address_word cia,
|
||||
unsigned64 op,
|
||||
FP_formats fmt)
|
||||
{
|
||||
return fp_unary(cpu, cia, &sim_fpu_inv, op, fmt);
|
||||
}
|
||||
|
||||
unsigned64
|
||||
fp_sqrt(sim_cpu *cpu,
|
||||
address_word cia,
|
||||
unsigned64 op,
|
||||
FP_formats fmt)
|
||||
{
|
||||
return fp_unary(cpu, cia, &sim_fpu_sqrt, op, fmt);
|
||||
}
|
||||
|
||||
|
||||
uword64
|
||||
convert (sim_cpu *cpu,
|
||||
address_word cia,
|
||||
|
|
|
|||
|
|
@ -716,17 +716,24 @@ void store_fpr (SIM_STATE, int fpr, FP_formats fmt, unsigned64 value);
|
|||
|
||||
/* FPU operations. */
|
||||
int NaN (unsigned64 op, FP_formats fmt);
|
||||
int Infinity (unsigned64 op, FP_formats fmt);
|
||||
int Less (unsigned64 op1, unsigned64 op2, FP_formats fmt);
|
||||
int Equal (unsigned64 op1, unsigned64 op2, FP_formats fmt);
|
||||
unsigned64 AbsoluteValue (unsigned64 op, FP_formats fmt);
|
||||
unsigned64 Negate (unsigned64 op, FP_formats fmt);
|
||||
unsigned64 Add (unsigned64 op1, unsigned64 op2, FP_formats fmt);
|
||||
unsigned64 Sub (unsigned64 op1, unsigned64 op2, FP_formats fmt);
|
||||
unsigned64 Multiply (unsigned64 op1, unsigned64 op2, FP_formats fmt);
|
||||
unsigned64 Divide (unsigned64 op1, unsigned64 op2, FP_formats fmt);
|
||||
unsigned64 Recip (unsigned64 op, FP_formats fmt);
|
||||
unsigned64 SquareRoot (unsigned64 op, FP_formats fmt);
|
||||
unsigned64 fp_abs (SIM_STATE, unsigned64 op, FP_formats fmt);
|
||||
#define AbsoluteValue(op,fmt) fp_abs(SIM_ARGS, op, fmt)
|
||||
unsigned64 fp_neg (SIM_STATE, unsigned64 op, FP_formats fmt);
|
||||
#define Negate(op,fmt) fp_neg(SIM_ARGS, op, fmt)
|
||||
unsigned64 fp_add (SIM_STATE, unsigned64 op1, unsigned64 op2, FP_formats fmt);
|
||||
#define Add(op1,op2,fmt) fp_add(SIM_ARGS, op1, op2, fmt)
|
||||
unsigned64 fp_sub (SIM_STATE, unsigned64 op1, unsigned64 op2, FP_formats fmt);
|
||||
#define Sub(op1,op2,fmt) fp_sub(SIM_ARGS, op1, op2, fmt)
|
||||
unsigned64 fp_mul (SIM_STATE, unsigned64 op1, unsigned64 op2, FP_formats fmt);
|
||||
#define Multiply(op1,op2,fmt) fp_mul(SIM_ARGS, op1, op2, fmt)
|
||||
unsigned64 fp_div (SIM_STATE, unsigned64 op1, unsigned64 op2, FP_formats fmt);
|
||||
#define Divide(op1,op2,fmt) fp_div(SIM_ARGS, op1, op2, fmt)
|
||||
unsigned64 fp_recip (SIM_STATE, unsigned64 op, FP_formats fmt);
|
||||
#define Recip(op,fmt) fp_recip(SIM_ARGS, op, fmt)
|
||||
unsigned64 fp_sqrt (SIM_STATE, unsigned64 op, FP_formats fmt);
|
||||
#define SquareRoot(op,fmt) fp_sqrt(SIM_ARGS, op, fmt)
|
||||
unsigned64 convert (SIM_STATE, int rm, unsigned64 op, FP_formats from, FP_formats to);
|
||||
#define Convert(rm,op,from,to) convert (SIM_ARGS, rm, op, from, to)
|
||||
|
||||
|
|
|
|||
Loading…
Reference in New Issue