include/opcode/ChangeLog:
2003-08-16 Jason Eckhardt <jle@rice.edu> * i860.h (fmov.ds): Expand as famov.ds. (fmov.sd): Expand as famov.sd. (pfmov.ds): Expand as pfamov.ds. gas/testsuite/ChangeLog: 2003-08-16 Jason Eckhardt <jle@rice.edu> * gas/i860/pseudo-ops01.{s,d}: New files. * gas/i860/i860.exp: Execute the new test above. * gas/i860/README.i860: Mention that pseudo-ops need more testing and remove the align fill defect from the list.
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2003-08-16 Jason Eckhardt <jle@rice.edu>
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* gas/i860/pseudo-ops01.{s,d}: New files.
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* gas/i860/i860.exp: Execute the new test above.
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* gas/i860/README.i860: Remove align defect from list.
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2003-08-14 Nick Clifton <nickc@redhat.com>
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2003-08-14 Nick Clifton <nickc@redhat.com>
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* gas/arm/pic.d: Update regexp for destination address of
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* gas/arm/pic.d: Update regexp for destination address of
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@ -19,15 +19,13 @@ way GAS/i860 is tested against a known good assembler.
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TODO:
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TODO:
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- Relocation testing is basically non-existent.
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- Relocation testing is basically non-existent.
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- pst.d (pixel store) is the only instruction with no testcase.
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- pst.d (pixel store) is the only instruction with no testcase.
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- Some pseudo instructions need testcases (mov, all pfmov, etc.).
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- More tests for dual instruction mode: check that dual mode has a
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- More tests for dual instruction mode: check that dual mode has a
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proper pair (FLOP/core) of instructions, and other error conditions.
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proper pair (FLOP/core) of instructions, and other error conditions.
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- Most current testcases use the default AT&T/SVR4 syntax; a few simple
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- Most current testcases use the default AT&T/SVR4 syntax; a few simple
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tests of the Intel syntax should be added to prevent bitrot (including
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tests of the Intel syntax should be added to prevent bitrot (including
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relocatable expression syntax, etc). Test file dual03.s uses Intel
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relocatable expression syntax, etc). Test file dual03.s uses Intel
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syntax lightly (i.e., register names without '%' prefix).
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syntax lightly (i.e., register names without '%' prefix).
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- Currently, .align in a .text section fills with 0x00000000. This is
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a defect and it needs to fill with nop (0xa0000000). Write a testcase
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for it.
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Contact me (Jason Eckhardt, jle@rice.edu) if you'd like to help.
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Contact me (Jason Eckhardt, jle@rice.edu) if you'd like to help.
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@ -48,6 +48,7 @@ if [istarget i860-*-*] {
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run_dump_test "pfmam"
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run_dump_test "pfmam"
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run_dump_test "pfmsm"
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run_dump_test "pfmsm"
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run_dump_test "pfsm"
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run_dump_test "pfsm"
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run_dump_test "pseudo-ops01"
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run_dump_test "regress01"
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run_dump_test "regress01"
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run_dump_test "shift"
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run_dump_test "shift"
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run_dump_test "simd"
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run_dump_test "simd"
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#as:
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#objdump: -d
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#name: i860 pseudo-ops01
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.*: +file format .*
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Disassembly of section \.text:
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00000000 <\.text>:
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0: 49 28 06 48 fiadd\.ss %f5,%f0,%f6
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4: c9 41 0a 48 fiadd\.dd %f8,%f0,%f10
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8: b3 18 14 48 famov\.sd %f3,%f20
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c: 33 c1 09 48 famov\.ds %f24,%f9
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10: 33 e5 03 48 pfamov\.ds %f28,%f3
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# Test some assembler pseudo-operations:
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# Floating point moves.
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.text
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fmov.ss %f5,%f6
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fmov.dd %f8,%f10
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fmov.sd %f3,%f20
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fmov.ds %f24,%f9
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pfmov.ds %f28,%f3
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2003-08-16 Jason Eckhardt <jle@rice.edu>
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* i860.h (fmov.ds): Expand as famov.ds.
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(fmov.sd): Expand as famov.sd.
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(pfmov.ds): Expand as pfamov.ds.
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2003-08-07 Michael Meissner <gnu@the-meissners.org>
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2003-08-07 Michael Meissner <gnu@the-meissners.org>
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* cgen.h: Remove PARAM macro usage in all prototypes.
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* cgen.h: Remove PARAM macro usage in all prototypes.
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@ -494,9 +494,9 @@ static const struct i860_opcode i860_opcodes[] =
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/* Floating point pseudo-instructions. */
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/* Floating point pseudo-instructions. */
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{ "fmov.ss", 0x48000049, 0xb7e005b6, "e,g", 0 }, /* fiadd.ss fsrc1,f0,fdest */
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{ "fmov.ss", 0x48000049, 0xb7e005b6, "e,g", 0 }, /* fiadd.ss fsrc1,f0,fdest */
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{ "fmov.dd", 0x480001c9, 0xb7e00436, "e,g", 0 }, /* fiadd.dd fsrc1,f0,fdest */
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{ "fmov.dd", 0x480001c9, 0xb7e00436, "e,g", 0 }, /* fiadd.dd fsrc1,f0,fdest */
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{ "fmov.sd", 0x480000b0, 0xb7e0054f, "e,g", 0 }, /* fadd.sd fsrc1,f0,fdest */
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{ "fmov.sd", 0x480000b3, 0xb400054c, "e,g", 0 }, /* famov.sd fsrc1,fdest */
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{ "fmov.ds", 0x48000130, 0xb7e004cf, "e,g", 0 }, /* fadd.ds fsrc1,f0,fdest */
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{ "fmov.ds", 0x48000133, 0xb40004cc, "e,g", 0 }, /* famov.ds fsrc1,fdest */
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{ "pfmov.ds", 0x48000530, 0xb73000cf, "e,g", 0 }, /* pfadd.ds fsrc1,f0,fdest */
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{ "pfmov.ds", 0x48000533, 0xb40000cc, "e,g", 0 }, /* pfamov.ds fsrc1,fdest */
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{ "pfmov.dd", 0x480005c9, 0xb7e00036, "e,g", 0 }, /* pfiadd.dd fsrc1,f0,fdest */
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{ "pfmov.dd", 0x480005c9, 0xb7e00036, "e,g", 0 }, /* pfiadd.dd fsrc1,f0,fdest */
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{ 0, 0, 0, 0, 0 },
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{ 0, 0, 0, 0, 0 },
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