S/390: Fix instruction type of troo, trot, trto, and trtt.

opcodes/ChangeLog:

2015-10-14  Andreas Krebbel  <krebbel@linux.vnet.ibm.com>

	* s390-opc.c: Fix comment.
	* s390-opc.txt: Change instruction type for troo, trot, trto, and
	trtt to RRF_U0RER since the second parameter does not need to be a
	register pair.

gas/testsuite/ChangeLog:

2015-10-14  Andreas Krebbel  <krebbel@linux.vnet.ibm.com>

	* gas/s390/esa-g5.d: Use odd GPR for the second operand.
	* gas/s390/esa-g5.s: Likewise.
	* gas/s390/esa-z9-109.d: Likewise.
	* gas/s390/esa-z9-109.s: Likewise.
This commit is contained in:
Andreas Krebbel 2015-10-14 10:58:41 +02:00
parent efb068d302
commit c46eb7b88a
6 changed files with 29 additions and 29 deletions

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@ -464,11 +464,11 @@ Disassembly of section .text:
.*: 01 ff [ ]*trap2 .*: 01 ff [ ]*trap2
.*: b2 ff 5f ff [ ]*trap4 4095\(%r5\) .*: b2 ff 5f ff [ ]*trap4 4095\(%r5\)
.*: b2 a5 00 69 [ ]*tre %r6,%r9 .*: b2 a5 00 69 [ ]*tre %r6,%r9
.*: b9 93 00 68 [ ]*troo %r6,%r8 .*: b9 93 00 69 [ ]*troo %r6,%r9
.*: b9 92 00 68 [ ]*trot %r6,%r8 .*: b9 92 00 69 [ ]*trot %r6,%r9
.*: dd ff 5f ff af ff [ ]*trt 4095\(256,%r5\),4095\(%r10\) .*: dd ff 5f ff af ff [ ]*trt 4095\(256,%r5\),4095\(%r10\)
.*: b9 91 00 68 [ ]*trto %r6,%r8 .*: b9 91 00 69 [ ]*trto %r6,%r9
.*: b9 90 00 68 [ ]*trtt %r6,%r8 .*: b9 90 00 69 [ ]*trtt %r6,%r9
.*: 93 00 5f ff [ ]*ts 4095\(%r5\) .*: 93 00 5f ff [ ]*ts 4095\(%r5\)
.*: b2 35 5f ff [ ]*tsch 4095\(%r5\) .*: b2 35 5f ff [ ]*tsch 4095\(%r5\)
.*: f3 58 5f ff af ff [ ]*unpk 4095\(6,%r5\),4095\(9,%r10\) .*: f3 58 5f ff af ff [ ]*unpk 4095\(6,%r5\),4095\(9,%r10\)

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@ -458,11 +458,11 @@ foo:
trap2 trap2
trap4 4095(%r5) trap4 4095(%r5)
tre %r6,%r9 tre %r6,%r9
troo %r6,%r8 troo %r6,%r9
trot %r6,%r8 trot %r6,%r9
trt 4095(256,%r5),4095(%r10) trt 4095(256,%r5),4095(%r10)
trto %r6,%r8 trto %r6,%r9
trtt %r6,%r8 trtt %r6,%r9
ts 4095(%r5) ts 4095(%r5)
tsch 4095(%r5) tsch 4095(%r5)
unpk 4095(6,%r5),4095(9,%r10) unpk 4095(6,%r5),4095(9,%r10)

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@ -6,12 +6,12 @@
Disassembly of section .text: Disassembly of section .text:
.* <foo>: .* <foo>:
.*: b9 93 f0 68 [ ]*troo %r6,%r8,15 .*: b9 93 f0 69 [ ]*troo %r6,%r9,15
.*: b9 93 00 68 [ ]*troo %r6,%r8 .*: b9 93 00 69 [ ]*troo %r6,%r9
.*: b9 92 f0 68 [ ]*trot %r6,%r8,15 .*: b9 92 f0 69 [ ]*trot %r6,%r9,15
.*: b9 92 00 68 [ ]*trot %r6,%r8 .*: b9 92 00 69 [ ]*trot %r6,%r9
.*: b9 91 f0 68 [ ]*trto %r6,%r8,15 .*: b9 91 f0 69 [ ]*trto %r6,%r9,15
.*: b9 91 00 68 [ ]*trto %r6,%r8 .*: b9 91 00 69 [ ]*trto %r6,%r9
.*: b9 90 f0 68 [ ]*trtt %r6,%r8,15 .*: b9 90 f0 69 [ ]*trtt %r6,%r9,15
.*: b9 90 00 68 [ ]*trtt %r6,%r8 .*: b9 90 00 69 [ ]*trtt %r6,%r9
.*: b2 2b 00 69 [ ]*sske %r6,%r9 .*: b2 2b 00 69 [ ]*sske %r6,%r9

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@ -1,13 +1,13 @@
.text .text
foo: foo:
troo %r6,%r8,15 troo %r6,%r9,15
troo %r6,%r8 troo %r6,%r9
trot %r6,%r8,15 trot %r6,%r9,15
trot %r6,%r8 trot %r6,%r9
trto %r6,%r8,15 trto %r6,%r9,15
trto %r6,%r8 trto %r6,%r9
trtt %r6,%r8,15 trtt %r6,%r9,15
trtt %r6,%r8 trtt %r6,%r9
# z9-109 z/Architecture mode extended sske with an additional parameter # z9-109 z/Architecture mode extended sske with an additional parameter
# make sure the old version still works for esa # make sure the old version still works for esa
sske %r6,%r9 sske %r6,%r9

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@ -370,7 +370,7 @@ const struct s390_operand s390_operands[] =
#define INSTR_RRF_FEFERU 4, { FE_24,FE_16,R_28,U4_20,0,0 } /* e.g. rrxtr */ #define INSTR_RRF_FEFERU 4, { FE_24,FE_16,R_28,U4_20,0,0 } /* e.g. rrxtr */
#define INSTR_RRF_U0RR 4, { R_24,R_28,U4_16,0,0,0 } /* e.g. sske */ #define INSTR_RRF_U0RR 4, { R_24,R_28,U4_16,0,0,0 } /* e.g. sske */
#define INSTR_RRF_U0RER 4, { RE_24,R_28,U4_16,0,0,0 } /* e.g. trte */ #define INSTR_RRF_U0RER 4, { RE_24,R_28,U4_16,0,0,0 } /* e.g. trte */
#define INSTR_RRF_U0RERE 4, { RE_24,RE_28,U4_16,0,0,0 } /* e.g. troo */ #define INSTR_RRF_U0RERE 4, { RE_24,RE_28,U4_16,0,0,0 } /* e.g. cu24 */
#define INSTR_RRF_00RR 4, { R_24,R_28,0,0,0,0 } /* e.g. clrtne */ #define INSTR_RRF_00RR 4, { R_24,R_28,0,0,0,0 } /* e.g. clrtne */
#define INSTR_RRF_UUFR 4, { F_24,U4_16,R_28,U4_20,0,0 } /* e.g. cdgtra */ #define INSTR_RRF_UUFR 4, { F_24,U4_16,R_28,U4_20,0,0 } /* e.g. cdgtra */
#define INSTR_RRF_UUFER 4, { FE_24,U4_16,R_28,U4_20,0,0 } /* e.g. cxfbra */ #define INSTR_RRF_UUFER 4, { FE_24,U4_16,R_28,U4_20,0,0 } /* e.g. cxfbra */

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@ -767,10 +767,10 @@ b9aa lptea RRF_RURR2 "load page-table-entry address" z9-109 zarch
# z9-109 conditional sske facility, sske instruction entered twice # z9-109 conditional sske facility, sske instruction entered twice
b22b sske RRF_U0RR "set storage key extended" z9-109 zarch optparm b22b sske RRF_U0RR "set storage key extended" z9-109 zarch optparm
# z9-109 etf2-enhancement facility, instructions entered twice # z9-109 etf2-enhancement facility, instructions entered twice
b993 troo RRF_U0RERE "translate one to one" z9-109 esa,zarch optparm b993 troo RRF_U0RER "translate one to one" z9-109 esa,zarch optparm
b992 trot RRF_U0RERE "translate one to two" z9-109 esa,zarch optparm b992 trot RRF_U0RER "translate one to two" z9-109 esa,zarch optparm
b991 trto RRF_U0RERE "translate two to one" z9-109 esa,zarch optparm b991 trto RRF_U0RER "translate two to one" z9-109 esa,zarch optparm
b990 trtt RRF_U0RERE "translate two to two" z9-109 esa,zarch optparm b990 trtt RRF_U0RER "translate two to two" z9-109 esa,zarch optparm
# z9-109 etf3-enhancement facility, some instructions entered twice # z9-109 etf3-enhancement facility, some instructions entered twice
b9b1 cu24 RRF_U0RERE "convert utf-16 to utf-32" z9-109 zarch optparm b9b1 cu24 RRF_U0RERE "convert utf-16 to utf-32" z9-109 zarch optparm
b2a6 cu21 RRF_U0RERE "convert utf-16 to utf-8" z9-109 zarch optparm b2a6 cu21 RRF_U0RERE "convert utf-16 to utf-8" z9-109 zarch optparm