Fix "pushw imm16" for x86-64 disassembler.
gas/testsuite/
2010-08-31 H.J. Lu <hongjiu.lu@intel.com>
PR binutils/11960
* gas/i386/opcode-intel.d: Updated.
* gas/i386/x86-64-opcode.d: Likewise.
* gas/i386/x86-64-opcode.s: Add a "pushw imm16" test.
opcodes/
2010-08-31 H.J. Lu <hongjiu.lu@intel.com>
PR binutils/11960
* i386-dis.c (sIv): New.
(dis386): Replace Iq with sIv on "pushT".
(reg_table): Replace T with {T|} on callT, JcallT, jmpT and JjmpT.
(x86_64_table): Replace {T|}/{P|} with P.
(putop): Add 'w' to 'T'/'P' if needed for Intel syntax.
(OP_sI): Update v_mode. Remove w_mode.
This commit is contained in:
H.J. Lu
parent
710e1a31c4
commit
d9e3625e37
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@ -1,3 +1,11 @@
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2010-08-31 H.J. Lu <hongjiu.lu@intel.com>
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PR binutils/11960
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* gas/i386/opcode-intel.d: Updated.
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* gas/i386/x86-64-opcode.d: Likewise.
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* gas/i386/x86-64-opcode.s: Add a "pushw imm16" test.
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2010-08-25 Jie Zhang <jie@codesourcery.com>
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* gas/arm/ldst-pc.d: New test.
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@ -406,29 +406,22 @@ Disassembly of section .text:
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*[0-9a-f]+: 66 01 90 90 90 90 90[ ]+add[ ]+(WORD PTR )?\[eax-0x6f6f6f70\],dx
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*[0-9a-f]+: 66 03 90 90 90 90 90[ ]+add[ ]+dx,(WORD PTR )?\[eax-0x6f6f6f70\]
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*[0-9a-f]+: 66 05 90 90[ ]+add[ ]+ax,0x9090
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*[0-9a-f]+: 66[ ]+data16
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*[0-9a-f]+: 06[ ]+push[ ]+es
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*[0-9a-f]+: 66[ ]+data16
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*[0-9a-f]+: 07[ ]+pop[ ]+es
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*[0-9a-f]+: 66 06[ ]+pushw[ ]+es
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*[0-9a-f]+: 66 07[ ]+popw[ ]+es
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*[0-9a-f]+: 66 09 90 90 90 90 90[ ]+or[ ]+(WORD PTR )?\[eax-0x6f6f6f70\],dx
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*[0-9a-f]+: 66 0b 90 90 90 90 90[ ]+or[ ]+dx,(WORD PTR )?\[eax-0x6f6f6f70\]
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*[0-9a-f]+: 66 0d 90 90[ ]+or[ ]+ax,0x9090
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*[0-9a-f]+: 66[ ]+data16
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*[0-9a-f]+: 0e[ ]+push[ ]+cs
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*[0-9a-f]+: 66 0e[ ]+pushw[ ]+cs
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*[0-9a-f]+: 66 11 90 90 90 90 90[ ]+adc[ ]+(WORD PTR )?\[eax-0x6f6f6f70\],dx
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*[0-9a-f]+: 66 13 90 90 90 90 90[ ]+adc[ ]+dx,(WORD PTR )?\[eax-0x6f6f6f70\]
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*[0-9a-f]+: 66 15 90 90[ ]+adc[ ]+ax,0x9090
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*[0-9a-f]+: 66[ ]+data16
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*[0-9a-f]+: 16[ ]+push[ ]+ss
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*[0-9a-f]+: 66[ ]+data16
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*[0-9a-f]+: 17[ ]+pop[ ]+ss
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*[0-9a-f]+: 66 16[ ]+pushw[ ]+ss
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*[0-9a-f]+: 66 17[ ]+popw[ ]+ss
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*[0-9a-f]+: 66 19 90 90 90 90 90[ ]+sbb[ ]+(WORD PTR )?\[eax-0x6f6f6f70\],dx
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*[0-9a-f]+: 66 1b 90 90 90 90 90[ ]+sbb[ ]+dx,(WORD PTR )?\[eax-0x6f6f6f70\]
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*[0-9a-f]+: 66 1d 90 90[ ]+sbb[ ]+ax,0x9090
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*[0-9a-f]+: 66[ ]+data16
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*[0-9a-f]+: 1e[ ]+push[ ]+ds
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*[0-9a-f]+: 66[ ]+data16
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*[0-9a-f]+: 1f[ ]+pop[ ]+ds
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*[0-9a-f]+: 66 1e[ ]+pushw[ ]+ds
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*[0-9a-f]+: 66 1f[ ]+popw[ ]+ds
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*[0-9a-f]+: 66 21 90 90 90 90 90[ ]+and[ ]+(WORD PTR )?\[eax-0x6f6f6f70\],dx
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*[0-9a-f]+: 66 23 90 90 90 90 90[ ]+and[ ]+dx,(WORD PTR )?\[eax-0x6f6f6f70\]
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*[0-9a-f]+: 66 25 90 90[ ]+and[ ]+ax,0x9090
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@ -473,15 +466,12 @@ Disassembly of section .text:
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*[0-9a-f]+: 66 5d[ ]+pop[ ]+bp
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*[0-9a-f]+: 66 5e[ ]+pop[ ]+si
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*[0-9a-f]+: 66 5f[ ]+pop[ ]+di
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*[0-9a-f]+: 66[ ]+data16
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*[0-9a-f]+: 60[ ]+pusha[ ]*
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*[0-9a-f]+: 66[ ]+data16
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*[0-9a-f]+: 61[ ]+popa[ ]*
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*[0-9a-f]+: 66 60[ ]+pushaw[ ]*
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*[0-9a-f]+: 66 61[ ]+popaw[ ]*
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*[0-9a-f]+: 66 62 90 90 90 90 90[ ]+bound[ ]+dx,(DWORD PTR )?\[eax-0x6f6f6f70\]
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*[0-9a-f]+: 66 68 90 90[ ]+push[ ]+0x9090
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*[0-9a-f]+: 66 68 90 90[ ]+pushw[ ]+0x9090
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*[0-9a-f]+: 66 69 90 90 90 90 90 90 90[ ]+imul[ ]+dx,(WORD PTR )?\[eax-0x6f6f6f70\],0x9090
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*[0-9a-f]+: 66[ ]+data16
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*[0-9a-f]+: 6a 90[ ]+push[ ]+0xffffff90
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*[0-9a-f]+: 66 6a 90[ ]+pushw[ ]+0xffffff90
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*[0-9a-f]+: 66 6b 90 90 90 90 90 90[ ]+imul[ ]+dx,(WORD PTR )?\[eax-0x6f6f6f70\],0xffffff90
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*[0-9a-f]+: 66 6d[ ]+ins[ ]+WORD PTR es:\[edi\],dx
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*[0-9a-f]+: 66 6f[ ]+outs[ ]+dx,WORD PTR ds:\[esi\]
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@ -504,10 +494,8 @@ Disassembly of section .text:
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*[0-9a-f]+: 66 98[ ]+cbw[ ]*
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*[0-9a-f]+: 66 99[ ]+cwd[ ]*
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*[0-9a-f]+: 66 9a 90 90 90 90[ ]+call[ ]+0x9090:0x9090
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*[0-9a-f]+: 66[ ]+data16
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*[0-9a-f]+: 9c[ ]+pushf[ ]*
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*[0-9a-f]+: 66[ ]+data16
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*[0-9a-f]+: 9d[ ]+popf[ ]*
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*[0-9a-f]+: 66 9c[ ]+pushfw[ ]*
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*[0-9a-f]+: 66 9d[ ]+popfw[ ]*
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*[0-9a-f]+: 66 a1 90 90 90 90[ ]+mov[ ]+ax,ds:0x90909090
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*[0-9a-f]+: 66 a3 90 90 90 90[ ]+mov[ ]+ds:0x90909090,ax
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*[0-9a-f]+: 66 a5[ ]+movs[ ]+WORD PTR es:\[edi\],(WORD PTR )?ds:\[esi\]
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@ -525,28 +513,21 @@ Disassembly of section .text:
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*[0-9a-f]+: 66 be 90 90[ ]+mov[ ]+si,0x9090
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*[0-9a-f]+: 66 bf 90 90[ ]+mov[ ]+di,0x9090
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*[0-9a-f]+: 66 c1 90 90 90 90 90 90[ ]+rcl[ ]+WORD PTR \[eax-0x6f6f6f70\],0x90
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*[0-9a-f]+: 66[ ]+data16
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*[0-9a-f]+: c2 90 90[ ]+ret[ ]+0x9090
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*[0-9a-f]+: 66[ ]+data16
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*[0-9a-f]+: c3[ ]+ret[ ]*
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*[0-9a-f]+: 66 c2 90 90[ ]+retw[ ]+0x9090
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*[0-9a-f]+: 66 c3[ ]+retw[ ]*
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*[0-9a-f]+: 66 c4 90 90 90 90 90[ ]+les[ ]+dx,(DWORD PTR )?\[eax-0x6f6f6f70\]
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*[0-9a-f]+: 66 c5 90 90 90 90 90[ ]+lds[ ]+dx,(DWORD PTR )?\[eax-0x6f6f6f70\]
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*[0-9a-f]+: 66 c7 80 90 90 90 90 90 90[ ]+mov[ ]+WORD PTR \[eax-0x6f6f6f70\],0x9090
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*[0-9a-f]+: 66[ ]+data16
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*[0-9a-f]+: c8 90 90 90[ ]+enter[ ]+0x9090,0x90
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*[0-9a-f]+: 66[ ]+data16
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*[0-9a-f]+: c9[ ]+leave[ ]*
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*[0-9a-f]+: 66[ ]+data16
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*[0-9a-f]+: ca 90 90[ ]+retf[ ]+0x9090
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*[0-9a-f]+: 66[ ]+data16
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*[0-9a-f]+: cb[ ]+retf[ ]*
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*[0-9a-f]+: 66[ ]+data16
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*[0-9a-f]+: cf[ ]+iret[ ]*
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*[0-9a-f]+: 66 c8 90 90 90[ ]+enterw[ ]+0x9090,0x90
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*[0-9a-f]+: 66 c9[ ]+leavew[ ]*
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*[0-9a-f]+: 66 ca 90 90[ ]+retfw[ ]+0x9090
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*[0-9a-f]+: 66 cb[ ]+retfw[ ]*
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*[0-9a-f]+: 66 cf[ ]+iretw[ ]*
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*[0-9a-f]+: 66 d1 90 90 90 90 90[ ]+rcl[ ]+WORD PTR \[eax-0x6f6f6f70\],1
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*[0-9a-f]+: 66 d3 90 90 90 90 90[ ]+rcl[ ]+WORD PTR \[eax-0x6f6f6f70\],cl
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*[0-9a-f]+: 66 e5 90[ ]+in[ ]+ax,0x90
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*[0-9a-f]+: 66 e7 90[ ]+out[ ]+0x90,ax
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*[0-9a-f]+: 66 e8 8f 90[ ]+call[ ]+(0x)?9918.*
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*[0-9a-f]+: 66 e8 8f 90[ ]+callw[ ]+(0x)?9918.*
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*[0-9a-f]+: 66 ea 90 90 90 90[ ]+jmp[ ]+0x9090:0x9090
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*[0-9a-f]+: 66 ed[ ]+in[ ]+ax,dx
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*[0-9a-f]+: 66 ef[ ]+out[ ]+dx,ax
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@ -570,17 +551,13 @@ Disassembly of section .text:
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*[0-9a-f]+: 66 0f 4d 90 90 90 90 90[ ]+cmovge[ ]+dx,(WORD PTR )?\[eax-0x6f6f6f70\]
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*[0-9a-f]+: 66 0f 4e 90 90 90 90 90[ ]+cmovle[ ]+dx,(WORD PTR )?\[eax-0x6f6f6f70\]
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*[0-9a-f]+: 66 0f 4f 90 90 90 90 90[ ]+cmovg[ ]+dx,(WORD PTR )?\[eax-0x6f6f6f70\]
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*[0-9a-f]+: 66[ ]+data16
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*[0-9a-f]+: 0f a0[ ]+push[ ]+fs
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*[0-9a-f]+: 66[ ]+data16
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*[0-9a-f]+: 0f a1[ ]+pop[ ]+fs
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*[0-9a-f]+: 66 0f a0[ ]+pushw[ ]+fs
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*[0-9a-f]+: 66 0f a1[ ]+popw[ ]+fs
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*[0-9a-f]+: 66 0f a3 90 90 90 90 90[ ]+bt[ ]+(WORD PTR )?\[eax-0x6f6f6f70\],dx
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*[0-9a-f]+: 66 0f a4 90 90 90 90 90 90[ ]+shld[ ]+(WORD PTR )?\[eax-0x6f6f6f70\],dx,0x90
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*[0-9a-f]+: 66 0f a5 90 90 90 90 90[ ]+shld[ ]+(WORD PTR )?\[eax-0x6f6f6f70\],dx,cl
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*[0-9a-f]+: 66[ ]+data16
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*[0-9a-f]+: 0f a8[ ]+push[ ]+gs
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*[0-9a-f]+: 66[ ]+data16
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*[0-9a-f]+: 0f a9[ ]+pop[ ]+gs
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*[0-9a-f]+: 66 0f a8[ ]+pushw[ ]+gs
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*[0-9a-f]+: 66 0f a9[ ]+popw[ ]+gs
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*[0-9a-f]+: 66 0f ab 90 90 90 90 90[ ]+bts[ ]+(WORD PTR )?\[eax-0x6f6f6f70\],dx
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*[0-9a-f]+: 66 0f ac 90 90 90 90 90 90[ ]+shrd[ ]+(WORD PTR )?\[eax-0x6f6f6f70\],dx,0x90
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*[0-9a-f]+: 66 0f ad 90 90 90 90 90[ ]+shrd[ ]+(WORD PTR )?\[eax-0x6f6f6f70\],dx,cl
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@ -295,5 +295,5 @@ Disassembly of section .text:
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[ ]*[a-f0-9]+: 0f 05 syscall
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[ ]*[a-f0-9]+: 0f 07 sysret
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[ ]*[a-f0-9]+: 0f 01 f8 swapgs
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...
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[ ]*[a-f0-9]+: 66 68 22 22 pushw \$0x2222
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#pass
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@ -423,4 +423,4 @@
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swapgs # -- -- -- -- 0F 01 f8
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.p2align 4,0
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pushw $0x2222
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@ -1,3 +1,13 @@
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2010-08-31 H.J. Lu <hongjiu.lu@intel.com>
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PR binutils/11960
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* i386-dis.c (sIv): New.
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(dis386): Replace Iq with sIv on "pushT".
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(reg_table): Replace T with {T|} on callT, JcallT, jmpT and JjmpT.
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(x86_64_table): Replace {T|}/{P|} with P.
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(putop): Add 'w' to 'T'/'P' if needed for Intel syntax.
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(OP_sI): Update v_mode. Remove w_mode.
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2010-08-27 Nathan Froyd <froydnj@codesourcery.com>
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* ppc-opc.c (powerpc_opcodes) [lswx,lswi,stswx,stswi]: Deprecate
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@ -253,6 +253,7 @@ fetch_data (struct disassemble_info *info, bfd_byte *addr)
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#define Ib { OP_I, b_mode }
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#define sIb { OP_sI, b_mode } /* sign extened byte */
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#define Iv { OP_I, v_mode }
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#define sIv { OP_sI, v_mode }
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#define Iq { OP_I, q_mode }
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#define Iv64 { OP_I64, v_mode }
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#define Iw { OP_I, w_mode }
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@ -1773,7 +1774,7 @@ static const struct dis386 dis386[] = {
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{ Bad_Opcode }, /* op size prefix */
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{ Bad_Opcode }, /* adr size prefix */
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/* 68 */
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{ "pushT", { Iq } },
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{ "pushT", { sIv } },
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{ "imulS", { Gv, Ev, Iv } },
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{ "pushT", { sIb } },
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{ "imulS", { Gv, Ev, sIb } },
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@ -2591,10 +2592,10 @@ static const struct dis386 reg_table[][8] = {
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{
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{ "incQ", { Ev } },
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{ "decQ", { Ev } },
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{ "callT", { indirEv } },
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{ "JcallT", { indirEp } },
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{ "jmpT", { indirEv } },
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{ "JjmpT", { indirEp } },
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{ "call{T|}", { indirEv } },
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{ "Jcall{T|}", { indirEp } },
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{ "jmp{T|}", { indirEv } },
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{ "Jjmp{T|}", { indirEp } },
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{ "pushU", { stackEv } },
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{ Bad_Opcode },
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},
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@ -5359,37 +5360,37 @@ static const struct dis386 prefix_table[][4] = {
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static const struct dis386 x86_64_table[][2] = {
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/* X86_64_06 */
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{
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{ "push{T|}", { es } },
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{ "pushP", { es } },
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},
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/* X86_64_07 */
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{
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{ "pop{T|}", { es } },
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{ "popP", { es } },
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},
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/* X86_64_0D */
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{
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{ "push{T|}", { cs } },
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{ "pushP", { cs } },
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},
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/* X86_64_16 */
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{
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{ "push{T|}", { ss } },
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{ "pushP", { ss } },
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},
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/* X86_64_17 */
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{
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{ "pop{T|}", { ss } },
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{ "popP", { ss } },
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},
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/* X86_64_1E */
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{
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{ "push{T|}", { ds } },
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{ "pushP", { ds } },
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},
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/* X86_64_1F */
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{
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{ "pop{T|}", { ds } },
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{ "popP", { ds } },
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},
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/* X86_64_27 */
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@ -5414,12 +5415,12 @@ static const struct dis386 x86_64_table[][2] = {
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/* X86_64_60 */
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{
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{ "pusha{P|}", { XX } },
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{ "pushaP", { XX } },
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},
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/* X86_64_61 */
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{
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{ "popa{P|}", { XX } },
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{ "popaP", { XX } },
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},
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/* X86_64_62 */
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@ -12335,9 +12336,9 @@ case_L:
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used_prefixes |= (prefixes & PREFIX_DATA);
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break;
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case 'T':
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if (intel_syntax)
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break;
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if (address_mode == mode_64bit && (sizeflag & DFLAG))
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if (!intel_syntax
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&& address_mode == mode_64bit
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&& (sizeflag & DFLAG))
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{
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*obufp++ = 'q';
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break;
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@ -12345,7 +12346,16 @@ case_L:
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/* Fall through. */
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case 'P':
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if (intel_syntax)
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break;
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{
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if ((rex & REX_W) == 0
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&& (prefixes & PREFIX_DATA))
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{
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if ((sizeflag & DFLAG) == 0)
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*obufp++ = 'w';
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used_prefixes |= (prefixes & PREFIX_DATA);
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}
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break;
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}
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if ((prefixes & PREFIX_DATA)
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|| (rex & REX_W)
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|| (sizeflag & SUFFIX_ALWAYS))
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@ -13623,28 +13633,10 @@ OP_sI (int bytemode, int sizeflag)
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op -= 0x100;
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break;
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case v_mode:
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USED_REX (REX_W);
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if (rex & REX_W)
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if (sizeflag & DFLAG)
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op = get32s ();
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else
|
||||
{
|
||||
if (sizeflag & DFLAG)
|
||||
{
|
||||
op = get32s ();
|
||||
}
|
||||
else
|
||||
{
|
||||
op = get16 ();
|
||||
if ((op & 0x8000) != 0)
|
||||
op -= 0x10000;
|
||||
}
|
||||
used_prefixes |= (prefixes & PREFIX_DATA);
|
||||
}
|
||||
break;
|
||||
case w_mode:
|
||||
op = get16 ();
|
||||
if ((op & 0x8000) != 0)
|
||||
op -= 0x10000;
|
||||
op = get16 ();
|
||||
break;
|
||||
default:
|
||||
oappend (INTERNAL_DISASSEMBLER_ERROR);
|
||||
|
|
|
|||
Loading…
Reference in New Issue