* config/tc-mips.c (mips_after_parse_args): New function.
(md_begin): Move processing of defaults to mips_after_parse_args. config/tc-mips.h (md_after_parse_args): Define.
This commit is contained in:
parent
ba46ddd0cf
commit
e96706776b
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@ -1,3 +1,9 @@
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2002-06-04 Maciej W. Rozycki <macro@ds2.pg.gda.pl>
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* config/tc-mips.c (mips_after_parse_args): New function.
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(md_begin): Move processing of defaults to mips_after_parse_args.
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config/tc-mips.h (md_after_parse_args): Define.
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2002-06-04 Jason Thorpe <thorpej@wasabisystems.com>
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2002-06-04 Jason Thorpe <thorpej@wasabisystems.com>
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* configure.in (sh5*): Set cpu_type to sh64 and endian to big.
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* configure.in (sh5*): Set cpu_type to sh64 and endian to big.
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@ -1036,241 +1036,11 @@ md_begin ()
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{
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{
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register const char *retval = NULL;
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register const char *retval = NULL;
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int i = 0;
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int i = 0;
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const char *cpu;
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char *a = NULL;
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int broken = 0;
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int broken = 0;
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int mips_isa_from_cpu;
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int target_cpu_had_mips16 = 0;
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const struct mips_cpu_info *ci;
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/* GP relative stuff not working for PE */
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if (strncmp (TARGET_OS, "pe", 2) == 0
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&& g_switch_value != 0)
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{
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if (g_switch_seen)
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as_bad (_("-G not supported in this configuration."));
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g_switch_value = 0;
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}
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cpu = TARGET_CPU;
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if (strcmp (cpu + (sizeof TARGET_CPU) - 3, "el") == 0)
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{
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a = xmalloc (sizeof TARGET_CPU);
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strcpy (a, TARGET_CPU);
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a[(sizeof TARGET_CPU) - 3] = '\0';
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cpu = a;
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}
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if (strncmp (cpu, "mips16", sizeof "mips16" - 1) == 0)
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{
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target_cpu_had_mips16 = 1;
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cpu += sizeof "mips16" - 1;
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}
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if (mips_opts.mips16 < 0)
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mips_opts.mips16 = target_cpu_had_mips16;
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/* Backward compatibility for historic -mcpu= option. Check for
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incompatible options, warn if -mcpu is used. */
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if (mips_cpu != CPU_UNKNOWN
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&& mips_arch != CPU_UNKNOWN
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&& mips_cpu != mips_arch)
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{
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as_fatal (_("The -mcpu option can't be used together with -march. "
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"Use -mtune instead of -mcpu."));
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}
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if (mips_cpu != CPU_UNKNOWN
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&& mips_tune != CPU_UNKNOWN
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&& mips_cpu != mips_tune)
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{
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as_fatal (_("The -mcpu option can't be used together with -mtune. "
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"Use -march instead of -mcpu."));
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}
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#if 1
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/* For backward compatibility, let -mipsN set various defaults. */
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/* This code should go away, to be replaced with something rather more
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draconian. Until GCC 3.1 has been released for some reasonable
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amount of time, however, we need to support this. */
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if (mips_opts.isa != ISA_UNKNOWN)
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{
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/* Translate -mipsN to the appropriate settings of file_mips_gp32
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and file_mips_fp32. Tag binaries as using the mipsN ISA. */
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if (file_mips_gp32 < 0)
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{
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if (ISA_HAS_64BIT_REGS (mips_opts.isa))
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file_mips_gp32 = 0;
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else
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file_mips_gp32 = 1;
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}
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if (file_mips_fp32 < 0)
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{
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if (ISA_HAS_64BIT_REGS (mips_opts.isa))
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file_mips_fp32 = 0;
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else
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file_mips_fp32 = 1;
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}
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ci = mips_cpu_info_from_isa (mips_opts.isa);
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assert (ci != NULL);
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/* -mipsN has higher priority than -mcpu but lower than -march. */
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if (mips_arch == CPU_UNKNOWN)
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mips_arch = ci->cpu;
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/* Default mips_abi. */
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if (mips_opts.abi == NO_ABI)
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{
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if (mips_opts.isa == ISA_MIPS1 || mips_opts.isa == ISA_MIPS2)
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mips_opts.abi = O32_ABI;
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else if (mips_opts.isa == ISA_MIPS3 || mips_opts.isa == ISA_MIPS4)
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mips_opts.abi = O64_ABI;
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}
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}
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if (mips_arch == CPU_UNKNOWN && mips_cpu != CPU_UNKNOWN)
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{
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ci = mips_cpu_info_from_cpu (mips_cpu);
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assert (ci != NULL);
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mips_arch = ci->cpu;
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as_warn (_("The -mcpu option is deprecated. Please use -march and "
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"-mtune instead."));
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}
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/* Set tune from -mcpu, not from -mipsN. */
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if (mips_tune == CPU_UNKNOWN && mips_cpu != CPU_UNKNOWN)
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{
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ci = mips_cpu_info_from_cpu (mips_cpu);
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assert (ci != NULL);
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mips_tune = ci->cpu;
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}
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/* At this point, mips_arch will either be CPU_UNKNOWN if no ARCH was
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specified on the command line, or some other value if one was.
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Similarly, mips_opts.isa will be ISA_UNKNOWN if not specified on
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the command line, or will be set otherwise if one was. */
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if (mips_arch != CPU_UNKNOWN && mips_opts.isa != ISA_UNKNOWN)
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/* Handled above. */;
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#else
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if (mips_arch == CPU_UNKNOWN && mips_cpu != CPU_UNKNOWN)
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{
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ci = mips_cpu_info_from_cpu (mips_cpu);
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assert (ci != NULL);
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mips_arch = ci->cpu;
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as_warn (_("The -mcpu option is deprecated. Please use -march and "
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"-mtune instead."));
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}
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/* At this point, mips_arch will either be CPU_UNKNOWN if no ARCH was
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specified on the command line, or some other value if one was.
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Similarly, mips_opts.isa will be ISA_UNKNOWN if not specified on
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the command line, or will be set otherwise if one was. */
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if (mips_arch != CPU_UNKNOWN && mips_opts.isa != ISA_UNKNOWN)
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{
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/* We have to check if the isa is the default isa of arch. Otherwise
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we'll get invalid object file headers. */
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ci = mips_cpu_info_from_cpu (mips_arch);
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assert (ci != NULL);
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if (mips_opts.isa != ci->isa)
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{
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/* This really should be an error instead of a warning, but old
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compilers only have -mcpu which sets both arch and tune. For
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now, we discard arch and preserve tune. */
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as_warn (_("The -march option is incompatible to -mipsN and "
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"therefore ignored."));
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if (mips_tune == CPU_UNKNOWN)
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mips_tune = mips_arch;
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ci = mips_cpu_info_from_isa (mips_opts.isa);
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assert (ci != NULL);
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mips_arch = ci->cpu;
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}
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}
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#endif
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else if (mips_arch != CPU_UNKNOWN && mips_opts.isa == ISA_UNKNOWN)
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{
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/* We have ARCH, we need ISA. */
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ci = mips_cpu_info_from_cpu (mips_arch);
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assert (ci != NULL);
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mips_opts.isa = ci->isa;
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}
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else if (mips_arch == CPU_UNKNOWN && mips_opts.isa != ISA_UNKNOWN)
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{
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/* We have ISA, we need default ARCH. */
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ci = mips_cpu_info_from_isa (mips_opts.isa);
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assert (ci != NULL);
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mips_arch = ci->cpu;
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}
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else
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{
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/* We need to set both ISA and ARCH from target cpu. */
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ci = mips_cpu_info_from_name (cpu);
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if (ci == NULL)
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ci = mips_cpu_info_from_cpu (CPU_R3000);
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assert (ci != NULL);
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mips_opts.isa = ci->isa;
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mips_arch = ci->cpu;
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}
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if (mips_tune == CPU_UNKNOWN)
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mips_tune = mips_arch;
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ci = mips_cpu_info_from_cpu (mips_arch);
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assert (ci != NULL);
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mips_isa_from_cpu = ci->isa;
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/* End of TARGET_CPU processing, get rid of malloced memory
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if necessary. */
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cpu = NULL;
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if (a != NULL)
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{
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free (a);
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a = NULL;
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}
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if (mips_opts.isa == ISA_MIPS1 && mips_trap)
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as_bad (_("trap exception not supported at ISA 1"));
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/* Set the EABI kind based on the ISA before the user gets
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to change the ISA with directives. This isn't really
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the best, but then neither is basing the abi on the isa. */
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if (ISA_HAS_64BIT_REGS (mips_opts.isa)
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&& mips_opts.abi == EABI_ABI)
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mips_eabi64 = 1;
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/* If they asked for mips1 or mips2 and a cpu that is
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mips3 or greater, then mark the object file 32BITMODE. */
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if (mips_isa_from_cpu != ISA_UNKNOWN
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&& ! ISA_HAS_64BIT_REGS (mips_opts.isa)
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&& ISA_HAS_64BIT_REGS (mips_isa_from_cpu))
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mips_32bitmode = 1;
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/* If the selected architecture includes support for ASEs, enable
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generation of code for them. */
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if (mips_opts.ase_mips3d == -1 && CPU_HAS_MIPS3D (mips_arch))
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mips_opts.ase_mips3d = 1;
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if (mips_opts.ase_mdmx == -1 && CPU_HAS_MDMX (mips_arch))
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mips_opts.ase_mdmx = 1;
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if (! bfd_set_arch_mach (stdoutput, bfd_arch_mips, mips_arch))
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if (! bfd_set_arch_mach (stdoutput, bfd_arch_mips, mips_arch))
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as_warn (_("Could not set architecture and machine"));
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as_warn (_("Could not set architecture and machine"));
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if (file_mips_gp32 < 0)
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file_mips_gp32 = 0;
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if (file_mips_fp32 < 0)
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file_mips_fp32 = 0;
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file_mips_isa = mips_opts.isa;
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file_mips_abi = mips_opts.abi;
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file_ase_mips3d = mips_opts.ase_mips3d;
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file_ase_mdmx = mips_opts.ase_mdmx;
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mips_opts.gp32 = file_mips_gp32;
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mips_opts.fp32 = file_mips_fp32;
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if (HAVE_NEWABI)
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mips_big_got = 1;
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op_hash = hash_new ();
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op_hash = hash_new ();
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for (i = 0; i < NUMOPCODES;)
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for (i = 0; i < NUMOPCODES;)
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@ -10631,6 +10401,241 @@ MIPS options:\n\
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}
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}
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void
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void
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mips_after_parse_args ()
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{
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const char *cpu;
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char *a = NULL;
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int mips_isa_from_cpu;
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int target_cpu_had_mips16 = 0;
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const struct mips_cpu_info *ci;
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/* GP relative stuff not working for PE */
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if (strncmp (TARGET_OS, "pe", 2) == 0
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|
&& g_switch_value != 0)
|
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{
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if (g_switch_seen)
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as_bad (_("-G not supported in this configuration."));
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g_switch_value = 0;
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|
}
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cpu = TARGET_CPU;
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if (strcmp (cpu + (sizeof TARGET_CPU) - 3, "el") == 0)
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|
{
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|
a = xmalloc (sizeof TARGET_CPU);
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|
strcpy (a, TARGET_CPU);
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a[(sizeof TARGET_CPU) - 3] = '\0';
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cpu = a;
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|
}
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if (strncmp (cpu, "mips16", sizeof "mips16" - 1) == 0)
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|
{
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|
target_cpu_had_mips16 = 1;
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cpu += sizeof "mips16" - 1;
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|
}
|
||||||
|
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|
if (mips_opts.mips16 < 0)
|
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|
mips_opts.mips16 = target_cpu_had_mips16;
|
||||||
|
|
||||||
|
/* Backward compatibility for historic -mcpu= option. Check for
|
||||||
|
incompatible options, warn if -mcpu is used. */
|
||||||
|
if (mips_cpu != CPU_UNKNOWN
|
||||||
|
&& mips_arch != CPU_UNKNOWN
|
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|
&& mips_cpu != mips_arch)
|
||||||
|
{
|
||||||
|
as_fatal (_("The -mcpu option can't be used together with -march. "
|
||||||
|
"Use -mtune instead of -mcpu."));
|
||||||
|
}
|
||||||
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||||||
|
if (mips_cpu != CPU_UNKNOWN
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|
&& mips_tune != CPU_UNKNOWN
|
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|
&& mips_cpu != mips_tune)
|
||||||
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{
|
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|
as_fatal (_("The -mcpu option can't be used together with -mtune. "
|
||||||
|
"Use -march instead of -mcpu."));
|
||||||
|
}
|
||||||
|
|
||||||
|
#if 1
|
||||||
|
/* For backward compatibility, let -mipsN set various defaults. */
|
||||||
|
/* This code should go away, to be replaced with something rather more
|
||||||
|
draconian. Until GCC 3.1 has been released for some reasonable
|
||||||
|
amount of time, however, we need to support this. */
|
||||||
|
if (mips_opts.isa != ISA_UNKNOWN)
|
||||||
|
{
|
||||||
|
/* Translate -mipsN to the appropriate settings of file_mips_gp32
|
||||||
|
and file_mips_fp32. Tag binaries as using the mipsN ISA. */
|
||||||
|
if (file_mips_gp32 < 0)
|
||||||
|
{
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||||||
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if (ISA_HAS_64BIT_REGS (mips_opts.isa))
|
||||||
|
file_mips_gp32 = 0;
|
||||||
|
else
|
||||||
|
file_mips_gp32 = 1;
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||||||
|
}
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||||||
|
if (file_mips_fp32 < 0)
|
||||||
|
{
|
||||||
|
if (ISA_HAS_64BIT_REGS (mips_opts.isa))
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file_mips_fp32 = 0;
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else
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|
file_mips_fp32 = 1;
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||||||
|
}
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|
ci = mips_cpu_info_from_isa (mips_opts.isa);
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|
assert (ci != NULL);
|
||||||
|
/* -mipsN has higher priority than -mcpu but lower than -march. */
|
||||||
|
if (mips_arch == CPU_UNKNOWN)
|
||||||
|
mips_arch = ci->cpu;
|
||||||
|
|
||||||
|
/* Default mips_abi. */
|
||||||
|
if (mips_opts.abi == NO_ABI)
|
||||||
|
{
|
||||||
|
if (mips_opts.isa == ISA_MIPS1 || mips_opts.isa == ISA_MIPS2)
|
||||||
|
mips_opts.abi = O32_ABI;
|
||||||
|
else if (mips_opts.isa == ISA_MIPS3 || mips_opts.isa == ISA_MIPS4)
|
||||||
|
mips_opts.abi = O64_ABI;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
if (mips_arch == CPU_UNKNOWN && mips_cpu != CPU_UNKNOWN)
|
||||||
|
{
|
||||||
|
ci = mips_cpu_info_from_cpu (mips_cpu);
|
||||||
|
assert (ci != NULL);
|
||||||
|
mips_arch = ci->cpu;
|
||||||
|
as_warn (_("The -mcpu option is deprecated. Please use -march and "
|
||||||
|
"-mtune instead."));
|
||||||
|
}
|
||||||
|
|
||||||
|
/* Set tune from -mcpu, not from -mipsN. */
|
||||||
|
if (mips_tune == CPU_UNKNOWN && mips_cpu != CPU_UNKNOWN)
|
||||||
|
{
|
||||||
|
ci = mips_cpu_info_from_cpu (mips_cpu);
|
||||||
|
assert (ci != NULL);
|
||||||
|
mips_tune = ci->cpu;
|
||||||
|
}
|
||||||
|
|
||||||
|
/* At this point, mips_arch will either be CPU_UNKNOWN if no ARCH was
|
||||||
|
specified on the command line, or some other value if one was.
|
||||||
|
Similarly, mips_opts.isa will be ISA_UNKNOWN if not specified on
|
||||||
|
the command line, or will be set otherwise if one was. */
|
||||||
|
|
||||||
|
if (mips_arch != CPU_UNKNOWN && mips_opts.isa != ISA_UNKNOWN)
|
||||||
|
/* Handled above. */;
|
||||||
|
#else
|
||||||
|
if (mips_arch == CPU_UNKNOWN && mips_cpu != CPU_UNKNOWN)
|
||||||
|
{
|
||||||
|
ci = mips_cpu_info_from_cpu (mips_cpu);
|
||||||
|
assert (ci != NULL);
|
||||||
|
mips_arch = ci->cpu;
|
||||||
|
as_warn (_("The -mcpu option is deprecated. Please use -march and "
|
||||||
|
"-mtune instead."));
|
||||||
|
}
|
||||||
|
|
||||||
|
/* At this point, mips_arch will either be CPU_UNKNOWN if no ARCH was
|
||||||
|
specified on the command line, or some other value if one was.
|
||||||
|
Similarly, mips_opts.isa will be ISA_UNKNOWN if not specified on
|
||||||
|
the command line, or will be set otherwise if one was. */
|
||||||
|
|
||||||
|
if (mips_arch != CPU_UNKNOWN && mips_opts.isa != ISA_UNKNOWN)
|
||||||
|
{
|
||||||
|
/* We have to check if the isa is the default isa of arch. Otherwise
|
||||||
|
we'll get invalid object file headers. */
|
||||||
|
ci = mips_cpu_info_from_cpu (mips_arch);
|
||||||
|
assert (ci != NULL);
|
||||||
|
if (mips_opts.isa != ci->isa)
|
||||||
|
{
|
||||||
|
/* This really should be an error instead of a warning, but old
|
||||||
|
compilers only have -mcpu which sets both arch and tune. For
|
||||||
|
now, we discard arch and preserve tune. */
|
||||||
|
as_warn (_("The -march option is incompatible to -mipsN and "
|
||||||
|
"therefore ignored."));
|
||||||
|
if (mips_tune == CPU_UNKNOWN)
|
||||||
|
mips_tune = mips_arch;
|
||||||
|
ci = mips_cpu_info_from_isa (mips_opts.isa);
|
||||||
|
assert (ci != NULL);
|
||||||
|
mips_arch = ci->cpu;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
else if (mips_arch != CPU_UNKNOWN && mips_opts.isa == ISA_UNKNOWN)
|
||||||
|
{
|
||||||
|
/* We have ARCH, we need ISA. */
|
||||||
|
ci = mips_cpu_info_from_cpu (mips_arch);
|
||||||
|
assert (ci != NULL);
|
||||||
|
mips_opts.isa = ci->isa;
|
||||||
|
}
|
||||||
|
else if (mips_arch == CPU_UNKNOWN && mips_opts.isa != ISA_UNKNOWN)
|
||||||
|
{
|
||||||
|
/* We have ISA, we need default ARCH. */
|
||||||
|
ci = mips_cpu_info_from_isa (mips_opts.isa);
|
||||||
|
assert (ci != NULL);
|
||||||
|
mips_arch = ci->cpu;
|
||||||
|
}
|
||||||
|
else
|
||||||
|
{
|
||||||
|
/* We need to set both ISA and ARCH from target cpu. */
|
||||||
|
ci = mips_cpu_info_from_name (cpu);
|
||||||
|
if (ci == NULL)
|
||||||
|
ci = mips_cpu_info_from_cpu (CPU_R3000);
|
||||||
|
assert (ci != NULL);
|
||||||
|
mips_opts.isa = ci->isa;
|
||||||
|
mips_arch = ci->cpu;
|
||||||
|
}
|
||||||
|
|
||||||
|
if (mips_tune == CPU_UNKNOWN)
|
||||||
|
mips_tune = mips_arch;
|
||||||
|
|
||||||
|
ci = mips_cpu_info_from_cpu (mips_arch);
|
||||||
|
assert (ci != NULL);
|
||||||
|
mips_isa_from_cpu = ci->isa;
|
||||||
|
|
||||||
|
/* End of TARGET_CPU processing, get rid of malloced memory
|
||||||
|
if necessary. */
|
||||||
|
cpu = NULL;
|
||||||
|
if (a != NULL)
|
||||||
|
{
|
||||||
|
free (a);
|
||||||
|
a = NULL;
|
||||||
|
}
|
||||||
|
|
||||||
|
if (mips_opts.isa == ISA_MIPS1 && mips_trap)
|
||||||
|
as_bad (_("trap exception not supported at ISA 1"));
|
||||||
|
|
||||||
|
/* Set the EABI kind based on the ISA before the user gets
|
||||||
|
to change the ISA with directives. This isn't really
|
||||||
|
the best, but then neither is basing the abi on the isa. */
|
||||||
|
if (ISA_HAS_64BIT_REGS (mips_opts.isa)
|
||||||
|
&& mips_opts.abi == EABI_ABI)
|
||||||
|
mips_eabi64 = 1;
|
||||||
|
|
||||||
|
/* If they asked for mips1 or mips2 and a cpu that is
|
||||||
|
mips3 or greater, then mark the object file 32BITMODE. */
|
||||||
|
if (mips_isa_from_cpu != ISA_UNKNOWN
|
||||||
|
&& ! ISA_HAS_64BIT_REGS (mips_opts.isa)
|
||||||
|
&& ISA_HAS_64BIT_REGS (mips_isa_from_cpu))
|
||||||
|
mips_32bitmode = 1;
|
||||||
|
|
||||||
|
/* If the selected architecture includes support for ASEs, enable
|
||||||
|
generation of code for them. */
|
||||||
|
if (mips_opts.ase_mips3d == -1 && CPU_HAS_MIPS3D (mips_arch))
|
||||||
|
mips_opts.ase_mips3d = 1;
|
||||||
|
if (mips_opts.ase_mdmx == -1 && CPU_HAS_MDMX (mips_arch))
|
||||||
|
mips_opts.ase_mdmx = 1;
|
||||||
|
|
||||||
|
if (file_mips_gp32 < 0)
|
||||||
|
file_mips_gp32 = 0;
|
||||||
|
if (file_mips_fp32 < 0)
|
||||||
|
file_mips_fp32 = 0;
|
||||||
|
|
||||||
|
file_mips_isa = mips_opts.isa;
|
||||||
|
file_mips_abi = mips_opts.abi;
|
||||||
|
file_ase_mips3d = mips_opts.ase_mips3d;
|
||||||
|
file_ase_mdmx = mips_opts.ase_mdmx;
|
||||||
|
mips_opts.gp32 = file_mips_gp32;
|
||||||
|
mips_opts.fp32 = file_mips_fp32;
|
||||||
|
|
||||||
|
if (HAVE_NEWABI)
|
||||||
|
mips_big_got = 1;
|
||||||
|
}
|
||||||
|
|
||||||
|
void
|
||||||
mips_init_after_args ()
|
mips_init_after_args ()
|
||||||
{
|
{
|
||||||
/* initialize opcodes */
|
/* initialize opcodes */
|
||||||
|
|
|
@ -83,6 +83,9 @@ struct mips_cl_insn
|
||||||
|
|
||||||
extern int tc_get_register PARAMS ((int frame));
|
extern int tc_get_register PARAMS ((int frame));
|
||||||
|
|
||||||
|
#define md_after_parse_args() mips_after_parse_args()
|
||||||
|
extern void mips_after_parse_args PARAMS ((void));
|
||||||
|
|
||||||
#define tc_init_after_args() mips_init_after_args()
|
#define tc_init_after_args() mips_init_after_args()
|
||||||
extern void mips_init_after_args PARAMS ((void));
|
extern void mips_init_after_args PARAMS ((void));
|
||||||
|
|
||||||
|
|
Loading…
Reference in New Issue