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[arm] fix testsuite breakage on pe-coff 

The PE target can insert NOP's for padding to 4 byte alignment.
This was causing a testcase failure, this commit fixes the testcase.

This commit also escapes some full-stops in the testcase regexp.

2018-11-06  Matthew Malcomson  <matthew.malcomson@arm.com>

	* testsuite/gas/arm/neon-cond-bad_t2.d: Fix testcase for PE
	target.
This commit is contained in:
Matthew Malcomson 2018-11-06 17:09:34 +00:00 committed by Richard Earnshaw
parent bc52d49c1d
commit f86e17aacf
2 changed files with 8 additions and 2 deletions
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4
gas/ChangeLog
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@ -1,3 +1,7 @@
2018-11-06 Matthew Malcomson <matthew.malcomson@arm.com>
* testsuite/gas/arm/neon-cond-bad_t2.d: Fix testcase for PE target.
2018-11-06 Matthew Malcomson <matthew.malcomson@arm.com>
* config/tc-arm.c (do_neon_cvt_1): Add check for neon and condition

6
gas/testsuite/gas/arm/neon-cond-bad_t2.d
View File

@ -31,8 +31,8 @@ Disassembly of section \.text:
0[0-9a-f]+ <[^>]+> ef21 0d02 vsubeq\.f32 d0, d1, d2
0[0-9a-f]+ <[^>]+> ef22 0d44 vsubeq\.f32 q0, q1, q2
0[0-9a-f]+ <[^>]+> bf04 itt eq
0[0-9a-f]+ <[^>]+> ffb6 1602 vcvteq.f16.f32 d1, q1
0[0-9a-f]+ <[^>]+> ffb6 2701 vcvteq.f32.f16 q1, d1
0[0-9a-f]+ <[^>]+> ffb6 1602 vcvteq\.f16\.f32 d1, q1
0[0-9a-f]+ <[^>]+> ffb6 2701 vcvteq\.f32\.f16 q1, d1
0[0-9a-f]+ <[^>]+> bf04 itt eq
0[0-9a-f]+ <[^>]+> ffb9 0701 vabseq\.f32 d0, d1
0[0-9a-f]+ <[^>]+> ffb9 0742 vabseq\.f32 q0, q1
@ -56,3 +56,5 @@ Disassembly of section \.text:
0[0-9a-f]+ <[^>]+> eea0 1b10 vdupeq\.32 q0, r1
0[0-9a-f]+ <[^>]+> ffb4 0c01 vdupeq\.32 d0, d1\[0\]
0[0-9a-f]+ <[^>]+> ffbc 0c41 vdupeq\.32 q0, d1\[1\]
# PE targets can insert an extra NOP for padding -- avoid that breaking tests.
#pass