2015-02-04 Peter Collingbourne <pcc@google.com>
* plugin.cc (Pluginobj::get_symbol_resolution_info): Resolve
forwarding symbols when computing symbol resolution info for plugins.
When an LTO linker plugin claims an external member of a thin archive, gold
does not properly unlock the file and make its file descriptor available for
reuse. This patch fixes the problem by modifying Archive::include_member to
unlock the object file via an RAII class instance, ensuring that it will be
unlocked no matter what path is taken through the function.
gold/
PR gold/15660
* archive.cc (Thin_archive_object_unlocker): New class.
(Archive::include_member): Unlock external members of thin archives.
* testsuite/Makefile.am (plugin_test_1): Rename .syms files.
(plugin_test_2): Likewise.
(plugin_test_3): Likewise.
(plugin_test_4): Likewise.
(plugin_test_5): Likewise.
(plugin_test_6): Likewise.
(plugin_test_7): Likewise.
(plugin_test_8): Likewise.
(plugin_test_9): Likewise.
(plugin_test_10): Likewise.
(plugin_test_11): New test case.
* testsuite/Makefile.in: Regenerate.
* testsuite/plugin_test.c (claim_file_hook): Check for parallel .syms
file to decide whether to claim file.
(all_symbols_read_hook): Likewise.
* testsuite/plugin_test_1.sh: Adjust expected output.
* testsuite/plugin_test_2.sh: Likewise.
* testsuite/plugin_test_3.sh: Likewise.
* testsuite/plugin_test_6.sh: Likewise.
* testsuite/plugin_test_tls.sh: Likewise.
* testsuite/plugin_test_11.sh: New testcase.
We need to check that the output is executable before assuming that we
can replace the reference with zero.
2015-02-02 Cary Coutant <ccoutant@google.com>
gold/
* x86_64.cc (Target_x86_64::Relocate::relocate_tls): Check for
executable output file.
This is a feature required in chromeos arm development work.
Tested:
1) Built passed all-gold on x86_64 machine
2) Tested with basic gold aarch64 ifunc unittests -
a) global ifunc, statically/non-statically linked
b) local ifunc, statically/non-statically linked
c) global/local, other shared library routine mixed,
statically/non-statically linked
d) arm/thumb mode ifunc
e) linking chrome browser passed
When --warn-unresolved-symbols is used, gold tries to create a dynamic relocation
for it, and gives an internal error if the TLS segment has not already been
created. This patch allows the IE-to-LE optimization for an undefined symbol
when building an executable, which suppresses the dynamic relocation, and
relaxes the requirement to have a TLS segment when applying a relocation for
an undefined symbol.
2015-01-28 Cary Coutant <ccoutant@google.com>
gold/
* x86_64.cc (Target_x86_64::Scan::global): Allow IE-to-LE optimization
for undef TLS symbols.
(Target_x86_64::Relocate::relocate_tls): Likewise.
(Target_x86_64::Relocate::tls_ie_to_le): Likewise.
Found when attempting to build an ELFv2 Linux kernel. We don't
generally need a plt entry for ELFv2 got relocs, only on ifunc, just
like ppc32.
* powerpc.cc (Target_powerpc::Scan::local <got relocs>): Correct
condition for need of ifunc plt entry.
(Target_powerpc::Scan::global <got relocs>): Likewise.
This fixes an issue where a page-aligned data section, combined with -z relro,
could lead to a gap between text and data segments larger than a page, and
we would fail to overlap the segments in the file.
gold/
* layout.cc (Layout::set_segment_offsets): Don't align start of segment
unless alignment is larger than page size.
Missing from 5c294fee
elfcpp/
* arm.h: Add enums for Tag_ABI_FP_number_model and Tag_ABI_VFP_args.
gold/
* arm.cc (Target_arm::do_adjust_elf_header): Provide namespace on
new enums.
(Target_arm::merge_object_attributes, ): Likewise.
*** bfd/ChangeLog ***
2014-12-25 Thomas Preud'homme <thomas.preudhomme@arm.com>
* elf32-arm.c (elf32_arm_merge_eabi_attributes): Handle new
Tag_ABI_VFP_args value and replace hardcoded values by enum
values.
(elf32_arm_post_process_headers): Set e_flags in ELF header
as hard float only when Tag_ABI_VFP_args is 1, using new enum
value AEABI_VFP_args_vfp to check that.
*** binutils/ChangeLog ***
2014-12-25 Thomas Preud'homme <thomas.preudhomme@arm.com>
* readelf.c (arm_attr_tag_ABI_VFP_args): Add "compatible".
*** gdb/ChangeLog ***
2014-12-25 Thomas Preud'homme <thomas.preudhomme@arm.com>
* arm-tdep.c (arm_gdbarch_init): Explicitely handle value 3 of
Tag_ABI_VFP_args. Also replace hardcoded values by enum values
in the switch handling the different values of Tag_ABI_VFP_args.
*** gold/ChangeLog ***
2014-12-25 Thomas Preud'homme <thomas.preudhomme@arm.com>
* arm.cc (Target_arm::do_adjust_elf_header): Set e_flags in ELF
header as hard float only when Tag_ABI_VFP_args is 1, using new
enum value AEABI_VFP_args_vfp to check that.
(Target_arm::merge_object_attributes): Handle new Tag_ABI_VFP_args
value and replace hardcoded values by enum values.
*** include/elf/ChangeLog ***
2014-12-25 Thomas Preud'homme <thomas.preudhomme@arm.com>
* arm.h: New AEABI_FP_number_model_* and AEABI_VFP_args_* enum
values.
*** ld/testsuite/ChangeLog ***
2014-12-25 Thomas Preud'homme <thomas.preudhomme@arm.com>
* ld-arm/attr-merge-2a.s: Add Tag_ABI_VFP_args.
* ld-arm/attr-merge-2b.s: Likewise.
* ld-arm/attr-merge-2.attr: Likewise.
* ld-arm/attr-merge-4a.s: Add Tag_ABI_FP_number_model and
Tag_ABI_VFP_args.
* ld-arm/attr-merge-4b.s: Likewise.
* ld-arm/attr-merge-4.attr: Likewise.
* ld-arm/attr-merge-6a.s: Likewise.
* ld-arm/attr-merge-6b.s: Likewise.
* ld-arm/attr-merge-6.attr: Add Tag_ABI_FP_number_model.
The debug_msg test has 2 implementations of SometimesInlineFunction:
int SometimesInlineFunction(int i) { return i; }
int SometimesInlineFunction(int i) { return i * i; }
and One Definition Rule (ODR) violation detection expects they will be
compiled into functions of different sizes. Hower, on x86, GCC 4.7 and
newer compile them into functions of the same size and ODR violation
detection test fails. This patch changes
int SometimesInlineFunction(int i) { return i; }
to
int SometimesInlineFunction(int i) { return i * i * 3; }
so that it will be compiled into a function of larger size.
PR gold/14608
* testsuite/debug_msg.cc (SometimesInlineFunction): Changed
to "return i * i * 3;".
together.
gold/
* mapfile.cc (Mapfile::print_input_section): Print uncompressed sizes.
(Mapfile::print_output_data): Use current_data_size() to avoid
assert for sections requiring postprocessing; if address is not valid,
print 0.
(Mapfile::print_output_section): Use current_data_size(); print note
that addresses and sizes are before compression.
This patch gives current stub-group-size in error message when stub
is too far away.
* aarch64.cc (Target_aarch64): Add new variable: stub_group_size_.
(AArch64_relocate_functions::maybe_apply_stub): Add new parameter.
Update error message.
(Target_aarch64::do_relax): Use absolute value of option
stub_group_size. Replace local variable with class member
stub_group_size_.
Mixing 64-bit and 32-bit types led to the wrong promotions. Keep
calculation in same type. Also fix a case where PLTREL25 reloc addend
should be ignored.
* Powerpc.cc (Target_powerpc::Branch_info::make_stub): Ignore
addend of PLTREL24 reloc when not generating a plt stub. Make
max_branch_offset an "Address".
(Stub_table::can_read_stub): Make max_branch_offset an "Address".
(Target_powerpc::Relocate::relocate): Likewise.
pr17670 is about an assert triggering on a branch to an undefined
weak symbol, the symbol being undefined due to dropping its comdat
group section. (Well sort of. The symbol is actually defined in
an .opd section which isn't part of the group, but the code section
the opd entry points at is dropped.) So don't assert.
Also, don't make long branch stubs to such symbols, and arrange to
have target-reloc.h code warn when applying relocs that use the sym.
PR 17670
* symtab.cc (Symbol::set_undefined): Remove assertion.
* powerpc.cc (Target_powerpc::symval_for_branch): Don't assert
on symbols defined in discarded sections, instead return false.
Rearrange params, update all callers.
(Target_powerpc::Branch_info::make_stub): Don't make stubs for
branches to syms in discarded sections.
(Global_symbol_visitor_opd::operator()): Set discarded opd syms
undefined and flag as discarded.
(Target_powerpc::Relocate::relocate): Localize variable.
Code stolen from arm.cc.
PR 17566
* powerpc.cc (Target_powerpc::Scan::local): Use add_local_section
when adding dynamic relocations against section symbols.
gold/
* layout.cc (Layout::finish_dynamic_section): When '-z global'
is specified set DF_1_GLOBAL in DT_FLAGS_1 flags.
* options.h (General_options): New -z option (global).
PR gold/17578 notes that gold will print a warning about an executable stack
when the -z execstack option is given, even when there is no --warn_execstack
option. The warning is completely useless and unexpected, since the user
explicitly requested an executable stack, and did not even ask for warnings.
This patch fixes that, and adds an extra warning when --warn_execstack
and -z noexecstack are both given and an input file requires an executable
stack.
gold/
PR gold/17578
* layout.cc (Layout::layout_gnu_stack): Don't warn when -z execstack
is given.
(Layout::create_executable_stack_info): Warn when -z noexecstack is
given but some inputs require executable stack.
Add .debug_gdb_scripts, .debug_gnu_pubnames, .debug_gnu_pubtypes,
and .debug_str_offsets to lists of sections to strip or keep
when stripping debug info.
gold/
* layout.cc (gdb_sections): Keep .debug_gdb_scripts and
.debug_str_offsets; strip .debug_gnu_pubnames and
.debug_gnu_pubtypes.
(lines_only_debug_sections): Strip all four new sections.
(Also included in this patch is a minor typo fix in gold/ChangeLog.)
When linking the following tlsdesc access sequence into an executable with -pie,
adrp x0, :tlsdesc:tls_gd
ldr x1, [x0, #:tlsdesc_lo12:tls_gd]
add x0, x0, :tlsdesc_lo12:tls_gd
.tlsdesccall tls_gd
blr x1
mrs x1, tpidr_el0
add x0, x1, x0
ldr w0, [x0]
current gold-aarch64 backend does tls-desc-gd-to-ie relaxation, into
adrp x0, 1000 <__FRAME_END__+0x720>
ldr x1, [x0,#4064] ;; <=== the target register should be x0
nop
nop
mrs x1, tpidr_el0
add x0, x1, x0
ldr w0, [x0]
This code is wrong. The fix changes ldr target register into x0.
An unusually large number of stubs can result in the default section
group size being too large; sections plus stubs exceed the range of a
branch. Restarting the relaxation pass with a smaller group size can
sometimes help.
* powerpc.cc (struct Stub_table_owner): New.
(Powerpc_relobj): Rename stub_table_ to stub_table_index_, an
unsigned int vector. Update all references.
(powerpc_relobj::set_stub_table): Take an unsigned int param
rather than a Stub_table. Update callers.
(Powerpc_relobj::clear_stub_table): New function.
(Target_powerpc): Add relax_failed_, relax_fail_count_ and
stub_group_size_ vars.
(Target_powerpc::new_stub_table): Delete.
(max_branch_delta): New function, extracted from..
(Target_powerpc::Relocate::relocate): ..here..
(Target_powerpc::Branch_info::make_stub): ..and here. Return
status on whether stub created successfully.
(Stub_control::Stub_control): Add "no_size_errors" param. Move
default sizing to..
(Target_powerpc::do_relax): ..here. Init stub_group_size_ and
reduce on relax failure.
(Target_powerpc::group_sections): Add "no_size_errors" param.
Use stub_group_size_. Set up group info in a temp vector,
before building Stub_table vector. Account for input sections
possibly already converted to relaxed sections.
(Stub_table::init): Delete. Merge into..
(Stub_table::Stub_table): ..here.
(Stub_table::can_reach_stub): New function.
(Stub_table::add_plt_call_entry): Add "from" parameter and
return true iff stub could be reached.
(Stub_table::add_long_branch_entry): Similarly. Add "r_type"
param too.
(Stub_table::clear_stubs): Add "all" param.
It's possible for the section grouping code to decide that the last
section looked at (the first section by address) doesn't fit into a
group. In one case that section is already a group owner and that is
handled correctly. In other cases the section should be put into its
own group. Like this:
* powerpc.cc (Stub_control::set_output_and_owner): New function.
(Target_powerpc::group_sections): Use it.
When --gc-sections is turned on during an LTO link, the .eh_frame sections
from deferred files are processed before those from the replacement files.
As a result, the section end-cap from crtendS.o is placed ahead of
the .eh_frame data from the replacement files. This patch fixes the bug
by skipping the layout of the deferred sections during GC pass 2.
gold/
PR gold/17639
* object.cc (Sized_relobj_file): Initialize is_deferred_layout_.
(Sized_relobj_file::do_layout): Handle deferred sections properly
during GC pass 1. Don't add reloc sections to deferred list twice.
* object.h (Sized_relobj_file::is_deferred_layout): New function.
(Sized_relobj_file::is_deferred_layout_): New data member.
Corrects overflow test for rel14, addr14, rel24, addr24 branch relocs,
and prints an information message to give a hint as to how a branch
that can't reach a stub might be cured.
bfd/
* elf64-ppc.c (group_sections): Init stub14_group_size from
--stub-group-size parameter divided by 1024.
gold/
* powerpc.cc (Stub_control::Stub_control): Init stub14_group_size_
from --stub-group-size parameter divided by 1024.
(Powerpc_relocate_functions::rela, rela_ua): Add fieldsize
template parameter. Update all uses.
(Target_powerpc::Relocate::relocate): Rename has_plt_value to
has_stub_value. Set for long branches. Don't report overflow for
branch to undefined weak symbols. Print info message on
overflowing branch to stub.
Go is multi-threaded, so use thread-safe plt stubs. __go_go doesn't
actually start threads, but is a convenient libgo function with a
reasonably unique name that is called by all Go executables. (Threads
are started by a static function of libgo, runtime_newosproc, called
by a whole lot of global functions, including runtime_starttheworld
and runtime_main.)
bfd/
* elf64-ppc.c (ppc64_elf_size_stubs): Add __go_go to thread_starters.
gold/
* powerpc.cc (Target_powerpc::do_relax): Add __go_go to thread_starters.
* x86_64.cc (Target_x86_64<size>::Scan::global): Don't make PLT
entry for R_X86_64_GOTPLT64.
(Target_x86_64<size>::Relocate::relocate): Update comments for
R_X86_64_GOTPLT64.
The patch does the following things:
-- Add support for ifunc.
-- Enable safe icf
-- Add support for TLSLD relocations
R_AARCH64_TLSLD_ADR_PAGE21,
R_AARCH64_TLSLD_ADD_LO12_NC,
R_AARCH64_TLSLD_MOVW_DTPREL_G1,
R_AARCH64_TLSLD_MOVW_DTPREL_G0_NC.
(R_AARCH64_TLSLD_MOVW_* are used by LLVM.)
-- Add support for TLSLD->TLSLE relaxation.
-- Add support for R_AARCH64_LD_PREL_LO19, R_AARCH64_ADR_PREL_LO21.
-- Fix 2 encoding bugs in AArch64_relocate_functions::update_movnz.
-- Correct TLS relocation properties in gold/aarch64-reloc.def.
-- Update testsuite/icf_safe_so_test.cc, testsuite/icf_safe_test.sh.
gold/
2014-10-29 Han Shen <shenhan@google.com>
Jing Yu <jingyu@google.com>
* aarch64-reloc.def: Add LD_PREL_LO12, ADR_PREL_LO21,
TLSLD_ADR_PAGE21, TLSLD_ADD_LO12_NC, TLSLD_MOVW_DTPREL_G1,
TLSLD_MOVW_DTPREL_G0_NC. Change property of TLS relocations to
Symbol::TLS_REF.
* aarch64.cc (Target_aarch64::do_can_check_for_function_pointers): New
method.
(Target_aarch64::reloc_needs_plt_for_ifunc): New method.
(Target_aarch64::tls_ld_to_le): New method.
(Target_aarch64::aarch64_info): Enable can_icf_inline_merge_sections
for 64bit targets.
(Output_data_plt_aarch64::irelative_rel_): New data member.
(Output_data_plt_aarch64::add_entry): Add irelative entries to plt.
(Output_data_plt_aarch64::add_local_ifunc_entry): New method.
(Output_data_plt_aarch64::add_relocation): New method.
(Output_data_plt_aarch64::do_write): Add gold_assert on got_irelative
offset. Add got_irelative size to got size.
(AArch64_relocate_functions): Typedef AArch64_valtype. Replace long
type string with the new typename.
(AArch64_relocate_functions::update_adr): Replace parameter x with
immed.
(AArch64_relocate_functions::update_movnz): Correct wrong val mask.
(AArch64_relocate_functions::reloc_common): New method.
(AArch64_relocate_funcsions::rela_general): Extract common part out
into reloc_common method.
(AArch64_relocate_functions::rela_general): Likewise.
(AArch64_relocate_functions::pcrela_general): Likewise.
(AArch64_relocate_functions::adr): New method.
(AArch64_relocate_functions::adrp): Calculate immed before calling
update_adr.
(AArch64_relocate_functions::adrp): Likewise.
(AArch64_relocate_functions::movnz): Cast x to SignedW type when
comparing x to 0. Calculate immed from ~x when x < 0.
(Target_aarch64::optimize_tls_reloc): Add new cases for
TLSLD_ADR_PAGE21, TLSLD_ADD_LO12_NC, TLSLD_MOVW_DTPREL_G1,
TLSLD_MOVW_DTPREL_G0_NC.
(Target_aarch64::possible_function_pointer_reloc): Implement this
method.
(Target_aarch64::Scan::local_reloc_may_be_function_pointer): Update
comment.
(Target_aarch64::Scan::local): Add codes to handle STT_GNU_IFUNC
symbol. Add cases for TLSLD_ADR_PAGE21, TLSLD_ADD_LO12_NC,
TLSLD_MOVW_DTPREL_G1, TLSLD_MOVW_DTPREL_G0_NC.
(Target_aarch64::Scan::global): Add codes to handle STT_GNU_IFUNC
symbol. Add cases for TLSLD_ADR_PAGE21, TLSLD_ADD_LO12_NC,
TLSLD_MOVW_DTPREL_G1, TLSLD_MOVW_DTPREL_G0_NC.
(Target_aarch64::make_plt_entry): Call add_entry with two more
parameters.
(Target_aarch64::make_local_ifunc_plt_entry): New method.
(Target_aarch64::Relocate::relocate): Add cases for LD_PREL_LO19,
ADR_PREL_LO21, TLSLD_ADR_PAGE21, TLSLD_ADD_LO12_NC,
TLSLD_MOVW_DTPREL_G1, TLSLD_MOVW_DTPREL_G0_NC.
(Target_aarch64::Relocate::relocate_tls): Add cases for
TLSLD_ADR_PAGE21, TLSLD_ADD_LO12_NC, TLSLD_MOVW_DTPREL_G1,
TLSLD_MOVW_DTPREL_G0_NC.
* testsuite/icf_safe_so_test.cc: Correct test comment.
* testsuite/icf_safe_test.sh: Add AArch64 arch.
In short relaxation is the linker's generation of stubs that fixes the
out-of-range jumps/branches in the original object file.
With this implementation, we are able to link a 456MB aarch64 application.
Tested:
1) Build natively on x86_64 and aarch64 machines.
2) Pass unit tests regarding relaxation.
When --hash-style-both is used, gold currently builds the sysv hash
table first, then the gnu hash table. Building the gnu hash table
renumbers the dynamic symbol table, invalidating the sysv hash
table. This patch reverses the order in which the hash tables are
build so that both hash tables are correct.
gold/
PR gold/13597
* layout.cc (Layout::create_dynamic_symtab): Build gnu-style
hash table before sysv-style hash table.
Gold doesn't handle relocations against the section symbol for a TLS
section correctly. Instead of using the offset of the section relative
to the TLS segment, it uses the address of the actual section. This
patch checks for section symbols for TLS sections, and treats them
the same as TLS symbols.
gold/
PR gold/16773
* object.cc (Sized_relobj_file): Compute value of section symbols
for TLS sections the same as TLS symbols.
The plugin API doesn't provide a way for the claimed file handler to
identify a TLS symbol, so when adding a common TLS symbol, gold
mistakenly places the symbol in the non-TLS commons list, and does
not override it when we see the replacement symbol that is marked
as TLS. Consequently, we allocate the TLS common symbol as a regular
common, and, if it's the only TLS in the program, we'll give an
internal error because we haven't allocated a TLS segment.
This patch fixes the problem by removing an exclusion where common
symbols would not override the placeholder symbols, but checking to
see if the size needs adjusting (the original reason for the exclusion).
Furthermore, we need to avoid putting placeholder symbols in the common
list, and wait until we see a real common symbol with a type we can
trust.
gold/
PR gold/17432
* resolve.cc (Symbol_table::resolve): Override common placeholder
symbols, but adjust sizes.
* symtab.cc (Symbol_table::add_from_object): Don't add placeholder
symbols to common lists.
2014-09-18 Rafael Ávila de Espíndola <rafael.espindola@gmail.com>
* testsuite/Makefile.am (plugin_test_10): New test.
* testsuite/Makefile.in: Regenerate
* testsuite/plugin_common_test_2.c (c1): Align to 8.
* testsuite/plugin_test_10.sh: New file.
gold/ChangeLog:
2014-09-17 Rafael Ávila de Espíndola <rafael.espindola@gmail.com>
* plugin.cc (Sized_pluginobj::do_add_symbols): Ignore isym->size.
* resolve.cc (Symbol_table::resolve): Don't override common symbols
during the replacement phase.
elfcpp/ChangeLog:
2014-09-17 Han Shen <shenhan@google.com>
* aarch64.h (R_AARCH64_TLS_DTPREL64): Switch enum value with ...
(R_AARCH64_TLS_DTPMOD64): ... enum value.
gold/ChangeLog:
2014-09-17 Han Shen <shenhan@google.com>
Jing Yu <jingyu@google.com>
* aarch64-reloc.def: Add TLSGD_ADR_PAGE21, TLSGD_ADD_LO12_NC,
TLSDESC_ADR_PAGE21, TLSDESC_LD64_LO12, TLSDESC_ADD_LO12, TLSDESC_CALL.
* aarch64.cc (Target_aarch64): Add data members
got_irelative_, got_tlsdesc_, rela_irelative_, got_mod_index_offset_,
tlsdesc_reloc_info_, tls_base_symbol_defined_. Initialize them in
constructor.
(Target_aarch64::do_reloc_symbol_index): New method.
(Target_aarch64::do_reloc_addend): New method.
(Target_aarch64::add_tlsdesc_info): New method.
(Target_aarch64::do_dynsym_value): New method.
(Target_aarch64::do_make_data_plt): Add new parameters: got,
got_irelative. Pass them to Output_data_plt_aarch64_standard.
(Target_aarch64::make_data_plt): Add new parameters: got,
got_irelative. Pass them to do_make_data_plt.
(Target_aarch64::Relocate): Add skip_call_tls_get_addr_ variable.
(Target_aarch64::Relocate:tls_gd_to_le): New method.
(Target_aarch64::Relocate:tls_ie_to_le): New method.
(Target_aarch64::Relocate:tls_desc_gd_to_le): New method.
(Target_aarch64::Relocate:tls_desc_gd_to_ie): New method.
(Target_aarch64::got_tlsdesc_section): New method.
(Target_aarch64::make_local_ifunc_plt_entry): New method.
(Target_aarch64::define_tls_base_symbol): New method.
(Target_aarch64::reserve_tlsdesc_entries): New method.
(Target_aarch64::got_mod_index_entry): New method.
(Target_aarch64::rela_tlsdesc_section): New method.
(Target_aarch64::rela_irelative_section): New method.
(Target_aarch64::Tlsdesc_info): New struct.
(Target_aarch64::got_section): Create .got.plt space for IRELATIVE
relocations and tlsdesc relocations.
(Target_aarch64::optimize_tls_reloc): Implement method.
(Output_data_plt_aarch64): Add member variables: tlsdesc_rel_, got_,
got_irelative_, irelative_count_, tlsdesc_got_offset_. Initialize them
in constructor.
(Output_data_plt_aarch64::reserve_tlsdesc_entry): New method.
(Output_data_plt_aarch64::has_tlsdesc_entry): New method.
(Output_data_plt_aarch64::get_tlsdesc_got_offset): New method.
(Output_data_plt_aarch64::get_tlsdesc_plt_offset): New method.
(Output_data_plt_aarch64::rela_tlsdesc): New method.
(Output_data_plt_aarch64::rela_irelative): New method.
(Output_data_plt_aarch64::entry_count): Count IRELATIVE relocations.
(Output_data_plt_aarch64::first_plt_entry_offset): Add const attribute.
(Output_data_plt_aarch64::get_plt_tlsdesc_entry_size): New method.
(Output_data_plt_aarch64::fill_tlsdesc_entry): New method.
(Output_data_plt_aarch64::do_get_plt_tlsdesc_entry_size): New method.
(Output_data_plt_aarch64::do_fill_tlsdesc_entry): New method.
(Output_data_plt_aarch64_standard): New member variables:
plt_tlsdesc_entry_size, tlsdesc_plt_entry.
(Output_data_plt_aarch64_standard::Output_data_plt_aarch64_standard):
New parameter: got, got_irelative.
(Output_data_plt_aarch64_standard::do_get_plt_entry_size): New method.
(Output_data_plt_aarch64_standard::do_fill_tlsdesc_entry): New method.
(Output_data_plt_aarch64::do_write): Replace got_address with
gotplt_address. Add irelative_count_ to count. Write tlsdesc entry.
(AArch64_relocate_functions::update_movnz): New method.
(AArch64_relocate_functions): Correct format.
(AArch64_relocate_functions::movnz): New method.
(Target_aarch64::Scan::local): Correct format. Move r_sym, got to
before the switch. Add new cases to switch.
Check ie_to_le relaxation on tlsie relocations. Add code handling
tlsgd tlsdesc cases.
(Target_aarch64::Scan::global): Move arp to front. Do copy_reloc when
needed. Add new cases to switch. Insert dynamic RELATIVE relocation
when needed. Add code handling tlsgd, tlsie, tlsdesc cases.
Call reloc_name_in_error_message to print unsupported reloc.
(Target_aarch64::make_plt_section): Pass got_ and got_irelative_ to
make_data_plt.
(Target_aarch64::do_finalize_sections): Emit relocs to save COPY
relocs. Fill in some more dynamic tags.
(Target_aarch64::Relocate::relocate): Handle tlsgd, tlsdesc relocs.
Skip call tls_get_addr when tlsgd is relaxed.
(Target_aarch64::Relocate::relocate_tls): Correct format. Add code
handling tlsgd, tlsdesc relocs, and tls gd->le, ie->le, tlsdesc->le,
tlsdesc->ie relaxation.
Target_selector_mips_nacl.
gold/
* mips.cc (Target_mips_nacl): New class.
(Target_selector_mips_nacl): New class.
(target_selector_mips32): Rename from target_selector_mips32be and use
Target_selector_mips_nacl instead of Target_selector_mips.
(target_selector_mips32el): Rename from target_selector_mips32 and use
Target_selector_mips_nacl instead of Target_selector_mips.
(target_selector_mips64): Rename from target_selector_mips64be and use
Target_selector_mips_nacl instead of Target_selector_mips.
(target_selector_mips64el): Rename from target_selector_mips64 and use
Target_selector_mips_nacl instead of Target_selector_mips.
(Target_mips::mips_info): Add const attribute.
When --sort-section=name is used, gold will sort the linker-generated contents
of .eh_frame (after optimization) after the endcap provided by crtendS.o.
This causes two problems: the .eh_frame_hdr section is generated assuming that
the optimized .eh_frame contents will be placed at the very beginning of the
section, and the endcap no longer appears at the end of the section.
This patch fixes the first problem by adjusting FDE offsets to take into account
the actual starting offset within the output section, and fixes the second
problem by sorting linker-generated (Output_section_data) sections based on the
name of the output section.
gold/
PR gold/17005
* ehframe.cc (Fde::write): Add output_offset parameter.
(Cie::write): Likewise.
(Eh_frame::set_final_data_size): Account for offset within output
section.
(Eh_frame::do_sized_write): Likewise.
* ehframe.h (Fde::write): Add output_offset parameter.
(Cie::write): Likewise.
* output.cc (Output_section::Input_section_sort_entry): Remove
section_has_name_; add output_section_name parameter. Use
output section name for non-input sections.
(Output_section::Input_section_sort_entry::section_has_name): Remove.
(Output_section::Input_section_sort_entry::section_has_name_): Remove.
(Output_section::Input_section_sort_compare): Remove logic for
sections without names.
(Output_section::Input_section_sort_init_fini_compare): Likewise.
(Output_section::Input_section_sort_section_prefix_special_ordering_compare):
Likewise.
(Output_section::Input_section_sort_section_name_compare): Likewise.
This enables -
1. static linking hello world
2. limited support for TLSIE and TLSLE
3. limited support for linking shared library, linking executable against shared
library.
gold/ChangeLog
2014-08-29 Han Shen <shenhan@google.com>
Jing Yu <jingyu@google.com>
* aarch64-reloc-property.cc
(AArch64_reloc_property_table::reloc_name_in_error_message): Fix bug in
reference reloc property in the table.
* aarch64-reloc.def: Add TLSLE reloc types and fix some errors in
3 other entries.
* aarch64.cc: (Output_data_got_aarch64::add_static_reloc):
2 new overloaded methods.
(Output_data_got_aarch64::do_write): Add code to write out
static relocs.
(class Output_data_got_aarch64::Static_reloc): New class to wrap
static relocs.
(Output_data_got_aarch64::static_relocs): New vector to
hold static relocs.
(Target_aarch64::TCB_SIZE): New const static memeber.
(Target_aarch64::tcb_size): New method.
(Target_aarch64::Relocate::relocate): Add code handling new reloc types.
(Target_aarch64::Relocate::relocate_tls): New method.
(Target_aarch64::Scan::local): Add code handling new reloc types.
(Target_aarch64::Scan::global): Add code handling new reloc types.
elfcpp/ChangeLog:
2014-08-08 Han Shen <shenhan@google.com>
* aarch64.h (withdrawn): Replaced with R_AARCH64_withdrawn.
2014-08-08 Jing Yu <jingyu@google.com>
Han Shen <shenhan@google.com>
* Makefile.am (HFILES): Add aarch64-reloc-property.h.
(DEFFILES): add aarch64-reloc.def.
(TARGETSOURCES): Add aarch64-reloc-property.cc.
(ALL_TARGETOBJS): Add aarch64-reloc-property.$(OBJEXT).
* Makefile.in: Regenerate.
* aarch64-reloc-property.cc: New file.
* aarch64-reloc-property.h: New file.
* aarch64-reloc.def: New file.
* aarch64.cc: Include aarch64-reloc-property.h. Replace spaces
with tab to make the format consistent.
(Output_data_got_aarch64::symbol_table_): New method.
(Target_aarch64::do_plt_address_for_global): New method.
(Target_aarch64::do_plt_address_for_local): New method.
(Target_aarch64::do_select_as_default_target): New method.
(Target_aarch64::do_make_data_plt): New method.
(Target_aarch64::make_data_plt): New method.
(Output_data_plt_aarch64::has_irelative_section): New method.
(Output_data_plt_aarch64::address_for_global): New method.
(Output_data_plt_aarch64::address_for_local): New method.
(Output_data_plt_aarch64::irelative_rel_): New parameter.
(Output_data_plt_aarch64::add_entry): Implement contents.
(Output_data_plt_aarch64::set_final_data_size): Fix typo.
(Output_data_plt_aarch64::do_write): Remove useless got_base. Set
the got_pov entry to plt0.
(Output_data_plt_aarch64_standard::do_fill_first_plt_entry):
Implement contents.
(Output_data_plt_aarch64_standard::do_fill_plt_entry): Implement.
(AArch64_howto): New struct.
(aarch64_howto[]): New static const array.
(AArch64_relocate_functions): New class.
(Target_aarch64::Scan::get_reference_flags): Remove method.
(Target_aarch64::Scan::local): Implement to support a few relocations.
(Target_aarch64::Scan::global): Implement to support a few relocations.
(Target_aarch64::make_plt_section): Implement contents.
(Target_aarch64::make_plt_entry): Implement contents.
(Target_aarch64::do_finalize_sections): Implement contents.
(Target_aarch64::Relocate::relocate): Implement a few relocations.
(Target_aarch64::relocate_section): Implement contents.
2014-07-21 Sriraman Tallam <tmsriram@google.com>
* object.cc (Relobj::is_section_name_included): Add
".rodata.nptl_version" to not garbage collect this section.
Alan Modra committed a patch to Gnu ld to fix a problem encountered on
PPC where the --defsym option wasn't copying the st_other bits to the
newly-defined symbol.
https://sourceware.org/ml/binutils/2014-07/msg00094.html
Gold has the same problem, and additionally wasn't copying the symbol type.
This patch fixes both problems, by copying the symbol type, visibility, and
the remaining st_other bits to the new symbol for --defsym=sym1=sym2
assignments.
gold/
* expression.cc (struct Expression::Expression_eval_info): Add
new fields type_pointer, vis_pointer, and nonvis_pointer.
(Expression::eval_maybe_dot): Add type_pointer, vis_pointer, and
nonvis_pointer parameters. Adjust all calls.
(Symbol_expression::value): Update type, visibility, and nonvis bits
in caller.
* script.cc (Symbol_assignment::sized_finalize): Update type,
visibility, and remaining st_other bits for new symbol.
* script.h: (Expression::eval_maybe_dot): Add type_pointer,
vis_pointer, and nonvis_pointer parameters.
* symtab.h (Symbol::set_type): New method.
* testsuite/Makefile.am (defsym_test): New test.
* testsuite/Makefile.in: Regenerate.
* testsuite/defsym_test.c: New file.
* testsuite/defsym_test.sh: New file.
Initial patch to enable gold aarch64 backend.
This patch is just a skeleton which almost does nothing.
It does not support ILP32 now.
gold/ChangeLog:
* aarch64.cc: New file
* Makefile.am (TARGETSOURCES): Add aarch64.cc
(ALL_TARGETOBJS): Add aarch64.$(OBJEXT)
* Makefile.in: Regenerate.
* configure.tgt: Add entries for aarch64*.
* configure.ac: Likewise.
* configure: Likewise.
elfcpp/ChangeLog:
* aarch64.h: New file. New enums for aarch64-elf64 relocations.
* elfcpp.h (EM_AARCH64, SHT_AARCH64_ATTRIBUTES, PT_AARCH64_ARCHEXT,
PT_AARCH64_UNWIND): New enum constant.
There are legitimate reasons to allow a signed value in a cmpli insn
field, for example to test for a "stw r1,lock@sdarel(r13)" instruction
in user code, a kernel might use
subis r3,r3,STW_R1_0R13@ha # subtract off high part
cmplwi r3,lock@sdarel # is low part accessing lock?
Since the lock@sdarel may take a range of -32768 to 32767,
the allowed range of cmpli immediate must be at least [-32768,65535].
bfd/
* elf32-ppc.c (ppc_elf_relocate_section): Treat field of cmpli
insn as a bitfield; Use complain_overflow_bitfield.
* elf64-ppc.c (ppc64_elf_relocate_section): Likewise.
opcodes/
* ppc-opc.c (UISIGNOPT): Define and use with cmpli.
gas/
* config/tc-ppc.c (ppc_insert_operand): Handle PPC_OPERAND_SIGNOPT
on unsigned fields. Comment on PPC_OPERAND_SIGNOPT signed fields
in 64-bit mode.
gold/
* powerpc.cc (relocate): Treat field of cmpli insn as a bitfield.
When not stripping those sections, there was a bug where gold was incorrectly
adjusting section-relative offsets by the offset of the input section within
the output section. That adjustment was both unnecessary and wrong, causing
gold to miss a number of debug entries that should have been added to
.gdb_index. (With stripping, the adjustment was always 0, so the bug in
dwarf_reader.cc would have been hidden by the change to layout.cc.)
gold/
* dwarf_reader.h (Dwarf_pubnames_table): Remove output_section_offset_.
* dwarf_reader.cc (Dwarf_pubnames_table::read_section): Likewise.
(Dwarf_pubnames_table::read_header): Likewise.
* layout.cc (gdb_fast_lookup_sections): Add .debug_gnu_pubnames and
.debug_gnu_pubtypes.
The goal of this patch is to provide an easy way to make
--disable-werror the default when building binutils, or the parts
of binutils that need to get built when building GDB. In development
mode, we want to continue making -Werror the default with GCC.
But, when making releases, I think we want to make it as easy as
possible for regular users to successfully build from sources.
GDB already has this kind of feature to turn -Werror as well as
the use of the libmcheck library. As GDB Release Manager, I take
advantage of it to turn those off after having cut the branch.
I'd like to be able to do the same for the binutils bits. And
perhaps Tristan will want to do the same for his releases too
(not sure, binutils builders might be a little savvier than GDB
builders).
This patch introduces a new file, called development.sh, which
just sets a variable called $development. In our development branches
(Eg. "master"), it's set to true. But setting it to false would allow
us to change the default behavior of various development-related
features to be turned off; in this case, it turns off the use of
-Werror by default (use --enable-werror to turn it back on).
bfd/ChangeLog:
* development.sh: New file.
* warning.m4 (AM_BINUTILS_WARNINGS): Source bfd/development.sh.
Make -Werror the default with GCC only if DEVELOPMENT is true.
* Makefile.am (CONFIG_STATUS_DEPENDENCIES): Add
$(srcdir)/development.sh.
* Makefile.in, configure: Regenerate.
binutils/ChangeLog:
* Makefile.am (CONFIG_STATUS_DEPENDENCIES): Add dependency on
bfd's development.sh.
* Makefile.in, configure: Regenerate.
gas/ChangeLog:
* Makefile.am (CONFIG_STATUS_DEPENDENCIES): Add dependency on
bfd's development.sh.
* Makefile.in, configure: Regenerate.
gold/ChangeLog:
* Makefile.am (CONFIG_STATUS_DEPENDENCIES): New.
* Makefile.in, configure: Regenerate.
gprof/ChangeLog:
* Makefile.am (CONFIG_STATUS_DEPENDENCIES): Add dependency on
bfd's development.sh.
* Makefile.in, configure: Regenerate.
ld/ChangeLog:
* Makefile.am (CONFIG_STATUS_DEPENDENCIES): Add dependency on
bfd's development.sh.
* Makefile.in, configure: Regenerate.
opcodes/ChangeLog:
* Makefile.am (CONFIG_STATUS_DEPENDENCIES): Add dependency on
bfd's development.sh.
* Makefile.in, configure: Regenerate.
gdb/ChangeLog:
* development.sh: Delete.
* Makefile.in (config.status): Adjust dependency on development.sh.
* configure.ac: Adjust development.sh source call.
* configure: Regenerate.
gdb/gdbserver/ChangeLog:
* configure.ac: Adjust development.sh source call.
* Makefile.in (config.status): Adjust dependency on development.sh.
* configure: Regenerate.
Tested on x86_64-linux by building two ways: One with DEVELOPMENT
set to true, and one with DEVELOPMENT set to false. In the first
case, I could see the use of -Werror, while it disappeared in
the second case.
Power8 fuses addis,addi and addis,ld sequences when the target of the
addis is the same as the addi/ld. Thus
addis r12,r2,xxx@ha
addi r12,r12,xxx@l / ld r12,xxx@l(r12)
is faster than
addis r11,r2,xxx@ha
addi r12,r11,xxx@l / ld r12,xxx@l(r11)
So use the form that allows fusion in plt call and branch stubs.
bfd/
* elf64-ppc.c (ADDIS_R12_R2): Define.
(build_plt_stub): Support fusion on ELFv2 stub.
(ppc_build_one_stub): Likewise for plt branch stubs.
gold/
* powerpc.cc (addis_12_2): Define.
(Stub_table::do_write): Support fusion on ELFv2 stubs.
ld/testsuite/
* ld-powerpc/elfv2exe.d: Update for changed plt call stubs.
gdb/
* ppc64-tdep.c (ppc64_standard_linkage8): New.
(ppc64_skip_trampoline_code): Recognise ELFv2 stub supporting fusion.
readelf output for ELFv2 includes st_other bits specifying a
function's local entry offset.
* testsuite/plugin_test.c (parse_readelf_line): Skip non-visibility
st_other output.
ELFv2 doesn't use .opd, so folding function code can't be allowed
in safe mode if a function's address might be taken.
* powerpc.cc (Target_powerpc::local_reloc_may_be_function_pointer):
Only ignore relocs on ELFv1.
(Target_powerpc::global_reloc_may_be_function_pointer): Likewise.
check script to look for the right binding.
gold/
* testsuite/Makefile.am (ehdr_start_test_4): Fix typo in -B option.
* testsuite/Makefile.in: Regenerate.
* testsuite/ehdr_start_test_4.sh: Look for "U" instead of "w".
This patch fixes 2 issues:
1. Since the GOT offset is always negative, we need to use signed int
to support 64-bit GOT relocations.
2. R_X86_64_PLTOFF64 uses the address of GLOBAL_OFFSET_TABLE, which is
the address of the .got.plt section, not the .got section.
When linking statically, it's possible to hit this warning with IFUNC
or very large executables, due to .glink being unused.
* powerpc.cc (do_plt_fde_location): Handle zero length .glink.
Compare FDE contents with DW_CFA_nop rather than 0.
to access a global as it expects a GOTPCREL relocation. This is really not
necessary as the linker could use a copy relocation to get around it. This
patch enables copy relocations with pie.
Context:
This is useful because currently the GCC compiler with option -fpie makes
every extern global access go through the GOT. That is because the compiler
cannot tell if a global will end up being defined in the executable or not
and is conservative. This ends up hurting performance when the binary is linked
as mostly static where most of the globals do end up being defined in the
executable. By allowing copy relocs with fPIE, the compiler need not generate
a GOTPCREL(GOT access) for any global access. It can safely assume that all
globals will be defined in the executable and generate a PC-relative access
instead. Gold can then create a copy reloc for only the undefined globals.
gold/
* symtab.h (may_need_copy_reloc): Remove check for position independent
code.
* x86_64.cc (Target_x86_64<size>::Scan::global): Add check for no
position independence before pc absolute may_need_copy_reloc call.
Add check for executable output befor pc relative may_need_copy_reloc
call.
* i386.cc: Ditto.
* arm.cc: Ditto.
* sparc.cc: Ditto.
* tilegx.cc: Ditto.
* powerpc.cc: Add check for no position independence before
may_need_copy_reloc calls.
* testsuite/pie_copyrelocs_test.cc: New file.
* testsuite/pie_copyrelocs_shared_test.cc: New file.
* Makefile.am (pie_copyrelocs_test): New test.
* Makefile.in: Regenerate.
With -pie and x86, the linker complains if it sees a PC-relative relocation
to access a global as it expects a GOTPCREL relocation. This is really not
necessary as the linker could use a copy relocation to get around it. This
patch enables copy relocations with pie.
Context:
This is useful because currently the GCC compiler with option -fpie makes
every extern global access go through the GOT. That is because the compiler
cannot tell if a global will end up being defined in the executable or not
and is conservative. This ends up hurting performance when the binary is linked
as mostly static where most of the globals do end up being defined in the
executable. By allowing copy relocs with fPIE, the compiler need not generate
a GOTPCREL(GOT access) for any global access. It can safely assume that all
globals will be defined in the executable and generate a PC-relative access
instead. Gold can then create a copy reloc for only the undefined globals.
is no PLT.
gold/
PR gold/16900
* i386.cc (Output_data_got_plt_i386): New class.
(Output_data_plt_i386::Output_data_plt_i386): Change type of got_plt
parameter. Change all callers.
(Output_data_plt_i386::layout_): Remove.
(Output_data_plt_i386::got_plt_): Change type.
(Target_i386::got_plt_): Change type. Change all references.
(Target_i386::got_section): Create instance of new class.
(Output_data_got_plt_i386::do_write): New function.
* x86_64.cc (Output_data_got_plt_x86_64): New class.
(Output_data_plt_x86_64::Output_data_plt_x86_64): Change type of got_plt
parameter. Change all callers.
(Output_data_plt_x86_64::layout_): Remove.
(Output_data_plt_x86_64::got_plt_): Change type.
(Target_x86_64::got_plt_): Change type. Change all references.
(Target_x86_64::got_section): Create instance of new class.
(Output_data_got_plt_x86_64::do_write): New function.
(Output_data_plt_x86_64::do_write): Don't write reserved words in GOT.
(Target_x86_64<size>::init_got_plt_for_update): Create instance of new
class.
2014-04-15 Sasa Stankovic <Sasa.Stankovic@imgtec.com>
gold/
* layout.cc (Layout::include_section): Allow a target to decide
whether to include a section.
* target.h (Target::should_include_section): New function.
(Target::do_should_include_section): New function.
2014-04-15 Sasa Stankovic <Sasa.Stankovic@imgtec.com>
gold/
* copy-relocs.cc (Copy_relocs::Copy_reloc_entry::emit): Remove and
inline into ...
(Copy_relocs::emit): ... here.
* copy-relocs.h (Copy_reloc_entry): Change from class to struct.
(Copy_reloc_entry::make_copy_reloc): Change from private to protected.
(Copy_reloc_entry::entries_): Change from private to protected.
Rafael Ávila de Espíndola
Cary Coutant
Peter Collingbourne
Han Shen
Alan Modra
H.J. Lu
Terry Guo
Jing Yu
Dmitriy Ivanov
Evgeniy Dushistov
Andreas Schwab
Han Shen
Kito Cheng
Sriraman Tallam
Sasa Stankovic
Joel Brobecker
Martin Liška