Commit Graph

32 Commits

Author SHA1 Message Date
Mike Frysinger 9c082ca86e sim: rename common/aclocal.m4 to common/acinclude.m4
Automake likes to dump macros automatically used into the aclocal.m4
file, but the common/aclocal.m4 naming prevents that.  So rename it
to the more normal "acinclude.m4" so the aclocal tool can work.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-10-18 00:31:00 +00:00
Mike Frysinger 6ffe910a7e sim: move from common.m4 to SIM_AC_COMMON
Now that the sourceware tree generally requires autoconf-2.64, update
the sim tree to require that too.

This allows us to drop the long standing SIM_AC_COMMON/common.m4
workaround as autoconf 2.64+ seems to work for me.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-10-18 00:17:24 +00:00
Mike Frysinger 89ab8a15e5 sim: m32c/rx: rename configure.in to match rest of the tree
The sim dir has 30 configure.ac files and 2 configure.in files.
So rename the minority to be consistent.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-07-11 19:00:17 +00:00
Mike Frysinger 31a27ee801 sim: m32c/rx: fix typo in copyright updating 2011-07-11 18:45:45 +00:00
Mike Frysinger af9f7da78b sim: add sim_complete_command stubs for non-common-using ports
For the ports that don't use the common/ subdir, we need to add stub funcs
to them to avoid build failures with gdb and command completion.  These do
not implement the actual completion functionality ... any port that wants
that can either convert to the common/ subdir, or fill out the function on
their own time.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-04-16 18:16:36 +00:00
Andrew Burgess dae477fed8 http://sourceware.org/ml/gdb-patches/2010-11/msg00112.html
gdb/ChangeLog
	* remote-sim.c (gdbsim_store_register): Update API to
	sim_store_register to check more error conditions.
include/gdb/ChangeLog
	* remote-sim.h (sim_store_register): Update the API
	documentation for this function.
sim/erc32/ChangeLog
sim/h8300/ChangeLog
sim/m32c/ChangeLog
sim/mn10300/ChangeLog
sim/ppc/ChangeLog
sim/rx/ChangeLog
sim/v850/ChangeLog
	* ???.c (sim_store_register): Update return value to
	match new API.
2011-01-11 14:19:34 +00:00
Joel Brobecker 7b6bb8daac run copyright.sh for 2011. 2011-01-01 15:34:07 +00:00
DJ Delorie 45eb4d476d (decode_opcode): RXO_branchrel is relative to the opcode's PC, not
the address following the opcode.
2010-12-14 23:39:03 +00:00
DJ Delorie 29cfc22f89 * rx.c (decode_opcode): For "MVFC PC,", use the address of the
opcode, not the address following the opcode.
2010-12-14 23:12:20 +00:00
DJ Delorie 5cbc4f2ea1 * rx.c (lsb_count): New.
(divu_cycles): New.
(div_cycles): New.
(decode_opcode): Fix cycle count math for div, divu, suntil, and
swhile.
2010-11-12 01:01:12 +00:00
Kevin Buettner e4dcb66415 * mem.c (rx_mem_ptr): When invalidating the decode cache, account
for the fact that the instruction decoder never uses swapped
	addresses.
2010-09-30 00:03:23 +00:00
Nick Clifton 5f79eb72c2 * rx.c (decode_opcode: RXO_int): Only break out of the emulation
loop if rx_syscall() does not return a RX_STEPPED result.
2010-09-29 15:47:45 +00:00
Kevin Buettner e537977262 * rx.c (decode_opcode): Add cycle information for RXO_smovu. 2010-09-24 05:18:23 +00:00
Kevin Buettner 3c7be86bc0 Fix typo in ChangeLog entry. 2010-09-24 04:45:08 +00:00
Kevin Buettner be380a3ea0 * cpu.h (reset_decoder): Declare.
* load.c (rx_load): Call `reset_decoder'.
	* rx.c (reset_decoder): New function.
2010-09-23 23:42:53 +00:00
Kevin Buettner 6607c80d6b * rx.c (decode_opcode): Declare `rx' as unsigned. 2010-09-23 23:26:42 +00:00
Kevin Buettner 8d794149aa * fpu.c, gdb-if.c, load.c, misc.c, syscalls.c (config.h): Include. 2010-09-23 23:05:28 +00:00
DJ Delorie f9c7014e9c [include/opcode]
* rx.h (RX_Operand_Type): Add TwoReg.
(RX_Opcode_ID): Remove ediv and ediv2.

[opcodes]

* rx-decode.opc (SRR): New.
(rx_decode_opcode): Use it for movbi and movbir.  Decode NOP2 (mov
r0,r0) and NOP3 (max r0,r0) special cases.
* rx-decode.c: Regenerate.

[sim/rx]

* rx.c (decode_cache_base): New.
(id_names): Remove ediv and edivu.
(optype_names): Add TwoReg.
(maybe_get_mem_page): New.
(rx_get_byte): Call it.
(get_op): Add TwoReg support.
(put_op): Likewise.
(PD, PS, PS2, GD, GS, GS2, DSZ, SSZ, S2SZ, US1, US2, OM): "opcode"
is a pointer now.
(DO_RETURN): New.  We use longjmp to return an exception result.
(decode_opcode): Make opcode a pointer to the decode cache.  Save
decoded opcode information and re-use.  Call DO_RETURN instead of
return throughout.  Remove ediv and edivu.
* mem.c (ptdc): New.  Adds decode cache.
(rx_mem_ptr): Support it.
(rx_mem_decode_cache): New.
* mem.h (enum mem_ptr_action): add MPA_DECODE_CACHE.
(rx_mem_decode_cache): Declare.
* gdb-if.c (sim_resume): Add decode_opcode's setjmp logic here...
* main.c (main): ...and here.  Use a fast loop if neither trace
nor disassemble is given.
* cpu.h (RX_MAKE_STEPPED, RX_MAKE_HIT_BREAK, RX_MAKE_EXITED,
RX_MAKE_STOPPED, RX_EXITED, RX_STOPPED): Adjust so that 0 is not a
valid code for anything.
2010-07-29 18:41:28 +00:00
DJ Delorie 933786524e [sim/rx]
* README.txt: New.
* config.h (CYCLE_ACCURATE, CYCLE_STATS): New.
* configure.in (--enable-cycle-accurate, --enable-cycle-stats):
New.  Default to enabled.
* configure: Regenerate.

* cpu.h (regs_type): Add cycle tracking info.
(reset_pipeline_stats): Declare.
(halt_pipeline_stats): Declare.
(pipeline_stats): Declare.
* main.c (done): Call pipeline_stats().
* mem.h (rx_mem_ptr): Moved to here ...
* mem.c (mem_ptr): ... from here.  Rename throughout.
(mem_put_byte): Move LEDs to Port A.  Add Port B to control cycle
statistics.  Move UART to SCI4.
(mem_put_hi): Add TPU 1-2.  TPU 1 and 2 count CPU cycles.
* reg.c (init_regs): Set Rt reg to -1 (no reg).
* rx.c: Add cycle counting and statistics throughout.
(rx_get_byte): Optimize for speed.
(decode_opcode): Likewise.
(reset_pipeline_stats): New.
(halt_pipeline_stats): New.
(pipeline_stats): New.
* trace.c (sim_disasm_one): Print cycle count.

[include/opcode]
* rx.h (RX_Opcode_ID): Add nop2 and nop3 for statistics.
2010-07-28 21:58:22 +00:00
Kevin Buettner a1669f9a28 * gdb-if.c (sim_store_register): Add case for sim_rx_acc_regnum. 2010-07-07 23:22:43 +00:00
Kevin Buettner fd60dc691f Add "acc" register. Revise register order and names. 2010-06-24 20:38:05 +00:00
Nick Clifton 092b7bb81c oops - omitted from previous delta 2010-06-08 10:15:48 +00:00
Nick Clifton 32b269aeb2 * reg.c (set_oszc): Use unsigned int for the mask.
(set_szc, set_osz, set_sz): Likewise.
2010-06-08 09:15:17 +00:00
Kevin Buettner c91e8ecef5 Revert accidentally committed changes that aren't ready yet. 2010-05-28 17:21:40 +00:00
Kevin Buettner 12cb73884e * gdb-if.c (sim_do_command): Add a "sim verbose noisy" command. 2010-05-28 17:10:32 +00:00
Mike Frysinger 5558e7e691 sim: constify sim_write source buffer (part 2)
As pointed out by Sandra Loosemore, a bunch of targets define sim_write
themselves instead of using the common/ code.  So constify them too.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-04-14 07:38:06 +00:00
Masaki Muranaka 2388a1526b * configure.in: Check if the host has getopt.h.
* configure: Regenerate.
        * config.in: Regenerate.
        * main.c: Include config.h.
        Use HAVE_STDLIB_H, HAVE_UNISTD_H, HAVE_GETOPT_H.
        Include getopt.h in case HAVE_GETOPT_H is defined.
2010-02-14 07:37:11 +00:00
Ralf Wildenhues 3725885a65 Sync Libtool from GCC.
/:
	* libtool.m4: Sync from git Libtool.
	* ltmain.sh: Likewise.
	* ltoptions.m4: Likewise.
	* ltversion.m4: Likewise.
	* lt~obsolete.m4: Likewise.

sim/iq2000/:
	* configure: Regenerate.

sim/d10v/:
	* configure: Regenerate.

sim/m32r/:
	* configure: Regenerate.

sim/frv/:
	* configure: Regenerate.

sim/:
	* avr/configure: Regenerate.
	* cris/configure: Regenerate.
	* microblaze/configure: Regenerate.

sim/h8300/:
	* configure: Regenerate.

sim/mn10300/:
	* configure: Regenerate.

sim/erc32/:
	* configure: Regenerate.

sim/arm/:
	* configure: Regenerate.

sim/m68hc11/:
	* configure: Regenerate.

sim/lm32/:
	* configure: Regenerate.

sim/sh64/:
	* configure: Regenerate.

sim/v850/:
	* configure: Regenerate.

sim/cr16/:
	* configure: Regenerate.

sim/moxie/:
	* configure: Regenerate.

sim/m32c/:
	* configure: Regenerate.

sim/mips/:
	* configure: Regenerate.

sim/mcore/:
	* configure: Regenerate.

sim/sh/:
	* configure: Regenerate.

gprof/:
	* Makefile.in: Regenerate.
	* configure: Regenerate.

opcodes/:
	* Makefile.in: Regenerate.
	* configure: Regenerate.

gas/:
	* Makefile.in: Regenerate.
	* configure: Regenerate.
	* doc/Makefile.in: Regenerate.

ld/:
	* configure: Regenerate.

gdb/testsuite/:
	* gdb.cell/configure: Regenerate.

binutils/:
	* Makefile.in: Regenerate.
	* configure: Regenerate.
	* doc/Makefile.in: Regenerate.

bfd/:
	* Makefile.in: Regenerate.
	* configure: Regenerate.

bfd/doc/:
	* Makefile.in: Regenerate.
2010-01-09 21:11:44 +00:00
Joel Brobecker dc3cf14f35 Update copyright notices to add year 2010. 2010-01-01 10:03:36 +00:00
DJ Delorie feafbb2e30 * rx/rx.c (decode_opcode): btst bit address mask fix. 2009-12-23 03:51:47 +00:00
DJ Delorie 117f2c0dc4 * rx/rx.c (decode_opcode): fix SWHILE logic. 2009-11-30 23:37:39 +00:00
DJ Delorie 4f8d4a3861 [sim]
* rx: New directory.
	* configure.ac: Add entry for Renesas RX.
	* configure: Regenerate.

[include/gdb]
	* sim-rx.h: New.
2009-11-24 19:22:45 +00:00