VLE is an encoding, not a particular processor architecture, so it
isn't really proper to select insns based on PPC_OPCODE_VLE. For
example
{"evaddw", VX (4, 512), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {RS, RA, RB}},
{"vaddubs", VX (4, 512), VX_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VA, VB}},
shows two insns that have the same encoding, both available with VLE.
Enabling both with VLE means we can't disassemble the second variant
even if -Maltivec is given rather than -Mspe. Also, we don't check
user assembly against the processor type as well as we could.
Another problem is that when using the VLE encoding, insns from the
main ppc opcode table are not available, except those using opcode 4
and 31. Correcting this revealed two errors in the ld testsuite,
use of "nop" and "rfmci" when -mvle.
This patch fixes those problems in the opcode table, and removes
PPCNONE. I find a plain 0 distracts less from other values.
In addition, I've implemented code to recognize some machine values
from the apuinfo note present in ppc32 objects. It's not a complete
disambiguation since we're lacking info to detect newer chips, but
what we have should help with disassembly.
include/
* elf/ppc.h (APUINFO_SECTION_NAME, APUINFO_LABEL, PPC_APUINFO_ISEL,
PPC_APUINFO_PMR, PPC_APUINFO_RFMCI, PPC_APUINFO_CACHELCK,
PPC_APUINFO_SPE, PPC_APUINFO_EFS, PPC_APUINFO_BRLOCK,
PPC_APUINFO_VLE: Define.
opcodes/
* ppc-dis.c (ppc_opts): Delete extraneous parentheses. Default
cpu for "vle" to e500.
* ppc-opc.c (ALLOW8_SPRG): Remove PPC_OPCODE_VLE.
(NO371, PPCSPE, PPCISEL, PPCEFS, MULHW, DCBT_EO): Likewise.
(PPCNONE): Delete, substitute throughout.
(powerpc_opcodes): Remove PPCVLE from "flags". Add to "deprecated"
except for major opcode 4 and 31.
(vle_opcodes <se_rfmci>): Add PPCRFMCI to flags.
bfd/
* cpu-powerpc.c (powerpc_compatible): Allow bfd_mach_ppc_vle entry
to match other 32-bit archs.
* elf32-ppc.c (_bfd_elf_ppc_set_arch): New function.
(ppc_elf_object_p): Call it.
(ppc_elf_special_sections): Use APUINFO_SECTION_NAME. Fix
overlong line.
(APUINFO_SECTION_NAME, APUINFO_LABEL): Don't define here.
* elf64-ppc.c (ppc64_elf_object_p): Call _bfd_elf_ppc_set_arch.
* bfd-in.h (_bfd_elf_ppc_at_tls_transform,
_bfd_elf_ppc_at_tprel_transform): Move to..
* elf-bfd.h: ..here.
(_bfd_elf_ppc_set_arch): Declare.
* bfd-in2.h: Regenerate.
gas/
* config/tc-ppc.c (PPC_APUINFO_ISEL, PPC_APUINFO_PMR,
PPC_APUINFO_RFMCI, PPC_APUINFO_CACHELCK, PPC_APUINFO_SPE,
PPC_APUINFO_EFS, PPC_APUINFO_BRLOCK, PPC_APUINFO_VLE): Don't define.
(ppc_setup_opcodes): Check vle disables powerpc_opcodes overridden
by vle_opcodes, and that vle flag doesn't enable opcodes. Don't
add vle_opcodes twice.
(ppc_cleanup): Use APUINFO_SECTION_NAME and APUINFO_LABEL.
ld/
* testsuite/ld-powerpc/apuinfo1.s: Delete nop.
* testsuite/ld-powerpc/apuinfo-vle2.s: New.
* testsuite/ld-powerpc/powerpc.exp: Use apuinfo-vle2.s.
Since it will sometime have more than just prpsinfo. Also,
elf32-ppc.c needlessly includes this header.
* elf-linux-core.h: Rename from elf-linux-psinfo.h.
* elf.c: Adjust #include.
* elf32-ppc.c: Don't #include elf-linux-psinfo.h
* Makefile.am (SOURCE_HFILES): Update.
* Makefile.in: Regenerate.
* po/SRC-PORFILES.in: Regenerate.
This fixes some cases where the linker would incorrectly error on plt
relocs to local ifunc symbols. I've also tidied plt and ifunc
handling for ppc64, where check_relocs was allowing for the
possibility of plt calls via addr14/addr24 relocs but relocate_section
was not.
* elf32-ppc.c (ppc_elf_check_relocs): Don't error on local ifunc
plt call. Wrap long lines.
(ppc_elf_relocate_section): Wrap long lines.
* elf64-ppc.c (ppc64_elf_check_relocs): Don't error on local ifunc
plt calls. Move __tls_get_addr checks later. Don't create plt
for addr14/addr24 relocs.
(ppc64_elf_gc_sweep_hook): Adjust to suit check_relocs changes.
(ppc64_elf_relocate_section): Correct local ifunc handling for
PLT64, PLT32 and PLT16 relocs.
The idea here is that instead of using memmove to shuffle the relocs
array every time one is deleted, to add a "wrel" pointer and copy from
rel[0] to wrel[0] as we go.
* elf64-ppc.c (ppc64_elf_relocate_section): Use read and write
pointers to reloc array, rather than memmove when deleting a
reloc. Don't use RELOC_AGAINST_DISCARDED_SECTION. Adjust
reloc counts at end of loop.
* elf32-ppc.c (ppc_elf_relocate_section): Likewise.
Since the backend elf_add_symbol_hook isn't called on local symbols,
the EI_OSABI field isn't to ELFOSABI_GNU where are local IFUNC symbols.
This patch changes the x86 backends to set has_gnu_symbols if there are
relocations against IFUNC symbols. Other backends with IFUNC support
may need a similar change.
This patch also changes the type of has_gnu_symbols from bfd_boolean to
enum elf_gnu_symbols.
bfd/
PR ld/18815
* elf-bfd.h (elf_gnu_symbols): New enum.
(elf_obj_tdata): Use elf_gnu_symbols on has_gnu_symbols.
* elf-s390-common.c (elf_s390_add_symbol_hook): Set
has_gnu_symbols to elf_gnu_symbol_any.
* elf32-arm.c (elf32_arm_add_symbol_hook): Likewise.
* elf32-m68k.c (elf_m68k_add_symbol_hook): Likewise.
* elf32-ppc.c (ppc_elf_add_symbol_hook): Likewise.
* elf32-sparc.c (elf32_sparc_add_symbol_hook): Likewise.
* elf64-ppc.c (ppc64_elf_add_symbol_hook): Likewise.
* elf64-sparc.c (elf64_sparc_add_symbol_hook): Likewise.
* lfxx-aarch64.c (_bfd_aarch64_elf_add_symbol_hook): Likewise.
* elf32-i386.c (elf_i386_check_relocs): Update has_gnu_symbols
if there are relocations against IFUNC symbols.
(elf_i386_add_symbol_hook): Don't check STT_GNU_IFUNC here.
* elf64-x86-64. (elf_x86_64_check_relocs): Update has_gnu_symbols
if there are relocations against IFUNC symbols.
(elf_x86_64_add_symbol_hook): Don't check STT_GNU_IFUNC here.
ld/testsuite/
PR ld/18815
* ld-i386/i386.exp: Run pr18815.
* ld-x86-64/x86-64.exp: Likewise.
* ld-i386/pr18815.d: New file.
* ld-i386/pr18815.s: Likewise.
* ld-x86-64/pr18815.d: Likewise.
* ld-x86-64/pr18815.s: Likewise.
When building a shared lib from non-PIC objects, we'll get dynamic
text relocations. These need to move with any insns we move.
Otherwise the dynamic reloc will modify the branch, resulting in
crashes and other unpleasant behaviour.
Also, ld -r --ppc476-workaround used with sufficiently aligned PIC
objects needs a fix for emitted REL16 relocs.
bfd/
* elf64-ppc.c (ppc_elf_relocate_section): Move dynamic text
relocs with insns moved by --ppc476-workaround. Correct
output of REL16 relocs.
ld/testsuite/
* ld-powerpc/ppc476-shared.s,
* ld-powerpc/ppc476-shared.lnk,
* ld-powerpc/ppc476-shared.d,
* ld-powerpc/ppc476-shared2.d: New tests.
* ld-powerpc/powerpc.exp: Run them.
This is a linker-only solution to the incompatibility between shared
library protected visibility variables and using .dynbss and copy
relocs for non-PIC access to shared library variables.
bfd/
* elf32-ppc.c (struct ppc_elf_link_hash_entry): Add has_addr16_ha
and has_addr16_lo. Make has_sda_refs a bitfield.
(ppc_elf_check_relocs): Set new flags.
(ppc_elf_link_hash_table_create): Update default_params.
(ppc_elf_adjust_dynamic_symbol): Clear protected_def in cases
where we won't be making .dynbss entries or editing code. Set
params->pic_fixup when we'll edit code for protected var access.
(allocate_dynrelocs): Allocate got entry for edited code and
discard dyn_relocs.
(struct ppc_elf_relax_info): Add picfixup_size.
(ppc_elf_relax_section): Rename struct one_fixup to struct
one_branch_fixup. Rename fixups to branch_fixups. Size space for
pic fixups.
(ppc_elf_relocate_section): Edit non-PIC accessing protected
visibility variables to PIC. Don't emit dyn_relocs for code
we've edited.
* elf32-ppc.h (struct ppc_elf_params): Add pic_fixup.
ld/
* emultempl/ppc32elf.em: Handle --no-pic-fixup.
(params): Init new field.
(ppc_before_allocation): Enable relaxation for pic_fixup.
* elf64-ppc.c (ppc64_elf_relocate_section): Report overflow to
stubs, even those for undefined weak symbols. Otherwise, don't
report relocation overflow on branches to undefined strong
symbols. Fix memory leak.
* elf32-ppc.c (ppc_elf_relocate_section): Don't report relocation
overflow on branches to undefined strong symbols.
This patch is cosmetic. It prevents references to __tls_get_addr_opt
(an alias for __tls_get_addr) when the optimisation isn't possible.
* elf32-ppc.c (ppc_elf_tls_setup): Set no_tls_get_addr_opt if
not PLT_NEW.
Rather than reporting a link error on attempting to use dynbss for
protected vars, use dynamic text relocs.
* elf32-ppc.c (ppc_elf_adjust_dynamic_symbol): Heed -z nocopyreloc.
Use text relocs rather than giving an error on trying to use
.dynbss for protected shared lib vars.
* elf64-ppc.c (ppc64_elf_adjust_dynamic_symbol): Likewise.
I was having a little closer look at what is going on here and noticed
that HJ unconditionally emits a NULL STT_FILE symbol before emitting
forced local symbols. That means we really don't need a second pass
over forced local symbols. The only reason for two passes is when
some forced local symbol can be emitted before the NULL STT_FILE. So
I set about removing the second pass, updating the testsuite all over
again. It's also unnecessary to emit the NULL STT_FILE when no
previous file symbol has been emitted.
bfd/
PR ld/17975
* elflink.c (struct elf_outext_info): Remove need_second_pass
and second_pass.
(elf_link_output_extsym): Delete code handling second forced
local pass. Move code emitting NULL STT_FILE symbol later, so
that it can be omitted if forced local is stripped. Don't
emit the NULL STT_FILE if no file symbols have been output.
(bfd_elf_final_link): Remove second forced local pass.
* elf32-ppc.c (add_stub_sym): Set linker_def on linker syms.
(ppc_elf_size_dynamic_sections): Likewise.
* elf64-ppc.c (ppc_build_one_stub): Likewise.
(build_global_entry_stubs): Likewise.
(ppc64_elf_build_stubs): Likewise.
ld/testsuite/
PR ld/17975
* ld-aarch64/gc-tls-relocs.d, * ld-alpha/tlspic.rd,
* ld-cris/libdso-2.d, * ld-i386/tlsdesc-nacl.rd, * ld-i386/tlsdesc.rd,
* ld-i386/tlsnopic-nacl.rd, * ld-i386/tlsnopic.rd,
* ld-i386/tlspic-nacl.rd, * ld-i386/tlspic.rd, * ld-ia64/tlspic.rd,
* ld-powerpc/tlsexe.r, * ld-powerpc/tlsexetoc.r,
* ld-powerpc/tlsso.r, * ld-powerpc/tlstocso.r,
* ld-s390/tlspic.rd, * ld-s390/tlspic_64.rd,
* ld-sparc/tlssunnopic32.rd, * ld-sparc/tlssunnopic64.rd,
* ld-sparc/tlssunpic32.rd, * ld-sparc/tlssunpic64.rd,
* ld-tic6x/shlib-1.rd, * ld-tic6x/shlib-1b.rd, * ld-tic6x/shlib-1r.rd,
* ld-tic6x/shlib-1rb.rd, * ld-tic6x/shlib-noindex.rd,
* ld-x86-64/tlsdesc-nacl.rd, * ld-x86-64/tlsdesc.rd,
* ld-x86-64/tlspic-nacl.rd, * ld-x86-64/tlspic.rd: Update.
Real code won't hit these, but it's possible to contrive a testcase..
* elf32-ppc.c (ppc_elf_relocate_section): Don't segfault on NULL
tls_sec.
* elf64-ppc.c (ppc64_elf_relocate_section): Likewise.
* elflink.c (elf_link_output_extsym): Don't assert on NULL tls_sec.
The linker hardcoded r3 into a local-dynamic to local-exec TLS
optimization sequence. This is normally the case since r3 is required
as a parameter to (the optimized out) __tls_get_addr call. However,
it is possible for a compiler, LLVM in this case, to set up the
parameter value in another register then copy it to r3 before the
call.
When fixing this problem, I noticed that ppc32 had another bug when
optimizing away one of the TLS insns to a nop.
The patch also tidies a mask used by global-dynamic to initial-exec
TLS optimization, to just select the fields needed. Leaving the
offset in the instruction wasn't a bug since it will be overwritten
anyway.
bfd/
* elf64-ppc.c (ppc64_elf_relocate_section): Correct GOT_TLSLD
optimization. Tidy mask for GOT_TLSGD optimization.
* elf32-ppc.c (ppc_elf_relocate_section): Likewise. Correct
location of nop zapping high insn too.
ld/testsuite/
* ld-powerpc/tlsld.d, * ld-powerpc/tlsld.s: New test.
* ld-powerpc/tlsld32.d, * ld-powerpc/tlsld32.s: New test.
* ld-powerpc/powerpc.exp: Run them. Move tocvar and tocnovar.
Copy relocs are used in a scheme to avoid dynamic text relocations in
non-PIC executables that refer to variables defined in shared
libraries. The idea is to have the linker define any such variable in
the executable, with a copy reloc copying the initial value, then have
both the executable and shared library refer to the executable copy.
If the shared library defines the variable as protected then we have
two copies of the variable being used.
PR 15228
* elflink.c (_bfd_elf_adjust_dynamic_copy): Add "info" param.
Error on copy relocs against protected symbols.
(elf_merge_st_other): Set h->protected_def.
* elf-bfd.h (struct elf_link_hash_entry): Add "protected_def".
(_bfd_elf_adjust_dynamic_copy): Update prototype.
* elf-m10300.c (_bfd_mn10300_elf_adjust_dynamic_symbol): Update
_bfd_elf_adjust_dynamic_copy call.
* elf32-arm.c (elf32_arm_adjust_dynamic_symbol): Likewise.
* elf32-cr16.c (_bfd_cr16_elf_adjust_dynamic_symbol): Likewise.
* elf32-cris.c (elf_cris_adjust_dynamic_symbol): Likewise.
* elf32-hppa.c (elf32_hppa_adjust_dynamic_symbol): Likewise.
* elf32-i370.c (i370_elf_adjust_dynamic_symbol): Likewise.
* elf32-i386.c (elf_i386_adjust_dynamic_symbol): Likewise.
* elf32-lm32.c (lm32_elf_adjust_dynamic_symbol): Likewise.
* elf32-m32r.c (m32r_elf_adjust_dynamic_symbol): Likewise.
* elf32-m68k.c (elf_m68k_adjust_dynamic_symbol): Likewise.
* elf32-metag.c (elf_metag_adjust_dynamic_symbol): Likewise.
* elf32-or1k.c (or1k_elf_adjust_dynamic_symbol): Likewise.
* elf32-ppc.c (ppc_elf_adjust_dynamic_symbol): Likewise.
* elf32-s390.c (elf_s390_adjust_dynamic_symbol): Likewise.
* elf32-sh.c (sh_elf_adjust_dynamic_symbol): Likewise.
* elf32-tic6x.c (elf32_tic6x_adjust_dynamic_symbol): Likewise.
* elf32-tilepro.c (tilepro_elf_adjust_dynamic_symbol): Likewise.
* elf32-vax.c (elf_vax_adjust_dynamic_symbol): Likewise.
* elf64-ppc.c (ppc64_elf_adjust_dynamic_symbol): Likewise.
* elf64-s390.c (elf_s390_adjust_dynamic_symbol): Likewise.
* elf64-sh64.c (sh64_elf64_adjust_dynamic_symbol): Likewise.
* elf64-x86-64.c (elf_x86_64_adjust_dynamic_symbol): Likewise.
* elfnn-aarch64.c (elfNN_aarch64_adjust_dynamic_symbol): Likewise.
* elfxx-mips.c (_bfd_mips_elf_adjust_dynamic_symbol): Likewise.
* elfxx-sparc.c (_bfd_sparc_elf_adjust_dynamic_symbol): Likewise.
* elfxx-tilegx.c (tilegx_elf_adjust_dynamic_symbol): Likewise.
ppc476 sections that end exactly on a page boundary need the
workaround applied when a function ends in "bctr", or when pasting
together code from multiple sections. The space allocated for the
patch area didn't allow for this case, while the code in
relocate_section performing the patches did, leading to an assertion
failure.
* elf32-ppc.c (ppc_elf_relax_section): Fix off by one error.
This probably could be fixed by making changes in relocate_section for
ifunc, but it's simpler to disable the optimisation for ifunc.
* elf64-ppc.c (ppc64_elf_adjust_dynamic_symbol): Don't attempt to
use dynrelocs for ifunc.
* elf32-ppc.c (ppc_elf_adjust_dynamic_symbol): Similarly.
doesn't always mean you need to define a function symbol on plt code.
If all references are in read-write sections, then using dynamic relocs
is OK.
bfd/
* elf32-ppc.c (ppc_elf_adjust_dynamic_symbol): Clear
pointer_equality_needed when !readonly_dynrelocs.
* elf64-ppc.c (ppc64_elf_adjust_dynamic_symbol): Likewise.
ld/testsuite/
* ld-powerpc/ambiguousv1.d: Match symbol table too.
* ld-powerpc/ambiguousv2.d: Likewise.
* ld-powerpc/ambiguousv1b.d: New.
* ld-powerpc/ambiguousv2b.d: New.
* ld-powerpc/powerpc.exp: Run new tests.
If we can dlopen an object then DF_STATIC_TLS is relevant.
* elf32-ppc.c (ppc_elf_check_relocs): Set DF_STATIC_TLS for PIEs too.
* elf64-ppc.c (ppc64_elf_check_relocs): Likewise.
Prior to 93d1b056 _SDA_BASE_ used to be defined in a linker script
output section. Now _SDA_BASE_ is defined in an input section that is
subject to being stripped. If the section is stripped we don't output
the symbol, which results in --emit-relocs trying to emit relocs with
dangling references to _SDA_BASE_.
* elf32-ppc.c (ppc_elf_size_dynamic_sections): Arrange to keep
.sdata/.sdata2 when _SDA_BASE_/_SDA2_BASE_ should be output
for --emit-relocs.
There are legitimate reasons to allow a signed value in a cmpli insn
field, for example to test for a "stw r1,lock@sdarel(r13)" instruction
in user code, a kernel might use
subis r3,r3,STW_R1_0R13@ha # subtract off high part
cmplwi r3,lock@sdarel # is low part accessing lock?
Since the lock@sdarel may take a range of -32768 to 32767,
the allowed range of cmpli immediate must be at least [-32768,65535].
bfd/
* elf32-ppc.c (ppc_elf_relocate_section): Treat field of cmpli
insn as a bitfield; Use complain_overflow_bitfield.
* elf64-ppc.c (ppc64_elf_relocate_section): Likewise.
opcodes/
* ppc-opc.c (UISIGNOPT): Define and use with cmpli.
gas/
* config/tc-ppc.c (ppc_insert_operand): Handle PPC_OPERAND_SIGNOPT
on unsigned fields. Comment on PPC_OPERAND_SIGNOPT signed fields
in 64-bit mode.
gold/
* powerpc.cc (relocate): Treat field of cmpli insn as a bitfield.
1) _SDA_BASE_ and _SDA2_BASE_ and defined automatically, in a similar
manner to the way _GLOBAL_OFFSET_TABLE_ is handled. It's a little
more complicated to remove the symbols because _SDA_BASE_ needs to
be there if either .sdata or .sbss is present, and similarly for
_SDA2_BASE.
2) The linker created .sdata and .sdata2 sections used for
R_PPC_EMB_SDAI16 and R_PPC_EMB_SDA2I16 pointers are created early.
Nowadays we strip unneeded sections from the output, so it isn't
necessary to delay creating the sections.
3) The output section for targets of various SDA relocs is now checked
as per the ABI(s). We previously allowed .sdata.foo and similar,
most likely because at some stage we were checking input sections.
Also, the patch fixes a long-standing bug in size_input_sections
that affects the values of symbols defined in stripped input
sections.
PR 16952
bfd/
* elf32-ppc.c (ppc_elf_create_linker_section): Move earlier.
Remove redundant setting of htab->elf.dynobj. Don't align.
Define .sdata symbols using _bfd_elf_define_linkage_sym.
(ppc_elf_create_glink): Call ppc_elf_create_linker_section.
(create_sdata_sym): Delete.
(elf_allocate_pointer_linker_section): Rename from
elf_create_pointer_linker_section. Align section.
(ppc_elf_check_relocs): Don't call ppc_elf_creat_linker_section
directly here, or create_sdata_sym. Set ref_regular on _SDA_BASE_
and _SDA2_BASE_.
(ppc_elf_size_dynamic_sections): Remove ATTRIBUTE_UNUSED on param.
Remove unnecessary tests on _SDA_BASE_ sym.
(maybe_strip_sdasym, ppc_elf_maybe_strip_sdata_syms): New functions.
(ppc_elf_relocate_section): Tighten SDA reloc symbol section checks.
* elf32-ppc.h (ppc_elf_set_sdata_syms): Delete.
(ppc_elf_maybe_strip_sdata_syms): Declare.
ld/
* emulparams/elf32ppccommon.sh (_SDA_BASE_, _SDA2_BASE_): Delete.
* emultempl/ppc32elf.em (ppc_before_allocation): Call
ppc_elf_maybe_strip_sdata_syms.
* ldlang.c (size_input_section): Correct output_offset value
for excluded input sections.
Fuss over bctr in call stubs.
* elf32-ppc.c (BA): Define
(ppc_elf_link_hash_table_create): Correct default_params.
(write_glink_stub): Pad small plt call stub with "ba 0" rather
than "nop" for ppc476_workaround.
(ppc_elf_finish_dynamic_sections): Likewise for branch table
and __glink_PLTresolve. Ensure plt call stub at end of page
doesn't allow fall-thru prefetch.
I got the ppc476 workaround wrong. bctr (and bctrl) as the last
instruction in a page can hit the icache bug if the preceding mtctr
insn is close by, and the destination is in the first few instructions
on the next page. This scenario can occur with code generated by gcc
to implement switch statements, or in code generated to call by
function pointer.
To prevent the bctr problem it is also necessary to remove other
instructions that otherwise would be safe.
bfd/
* elf32-ppc.c (ppc_elf_relocate_section): Remove bctr from list
of safe ppc476 insns at end of page. Also remove non-branch insns.
Expand comments.
ld/
* emultempl/ppc32elf.em (no_zero_padding, ppc_finish): New functions.
(LDEMUL_FINISH): Define.
Similar to the powerpc64 patch, this improves overflow checking in
elf32-ppc.c. Many reloc "howto" entries needed fixes, some just
cosmetic.
The patch also fixes the R_PPC_VLE_SDA21 reloc application code, which
was horribly broken. In fact, it may still be broken since Power ISA
2.07 says e_li behaves as
RT <- EXTS(li20 1:4 || li20 5:8 || li20 0 || li20 9:19)
where li20 is a field taken from bits 17..20, 11..15, 21..31 of the
instruction. Freescale VLEPEM says differently, and I assume
correctly, that
RT <- EXTS(li20 0:3 || li20 4:8 || li20 9:19)
The VLE_SDA21 relocation description matches this too.
Now the VLE_SDA21 relocation specifies in the case where e_addi16 is
converted to e_li for symbols in .PPC.EMB.sdata0 or .PPC.EMB.sbss0
(no base register), that the field is restricted to 16 bits, with the
sign bit being propagated to the top 4 bits. I don't see the sense in
restricting the value like this, so have allowed the full 20 bit
signed value. This of course is compatible with the reloc description
in that values in the 16 bit signed range will result in exactly the
same insn field as when the reloc description is followed to the
letter.
* elf32-ppc.c (ppc_elf_howto_raw): Correct overflow check for
many relocations. Correct bitsize and rightshift too for a number
of VLE relocs. Describe R_PPC_VLE_SDA21 and R_PPC_VLE_SDA21_LO.
Correct dst_mask on R_PPC_VLE_SDA21_LO.
(ppc_elf_vle_split16): Tidy, delete unnecessary prototype.
(ppc_elf_relocate_section): Modify overflow test for 16-bit
fields in instructions to signed/unsigned according to whether
the field takes a signed or unsigned value. Tidy vle split16 code.
Correct R_PPC_VLE_SDA21 and R_PPC_VLE_SDA21_LO handling.
5446cbdf82 broke powerpc-lynxos,
powerpc-netware, powerpc-windiss and powerpc-vxworks.
bfd/
* elf32-ppc.c (ppc_elf_link_hash_table_create): Provide default
params for targets that don't use ppc32elf.em.
ld/
* emulparams/elf32ppcvxworks.sh: Source plt_unwind.sh and
use ppc32elf.em.
* emultempl/ppc32elf.em (ppc_after_open): Don't compile for
vxworks.
(LDEMUL_AFTER_OPEN): Don't set for vxworks.
(PARSE_AND_LIST_LONGOPTS, PARSE_AND_LIST_OPTIONS): Exclude
-secure-plt, -bss-plt and -sdata-got when vxworks.
This fixes the glaring error that the ppc476 workaround wasn't
actually enabled for ld -r, and adjusts relocations to match moved
code.
bfd/
* elf32-ppc.c (ppc_elf_relocate_section): Move relocs on insns
patched for ppc476 workaround. Reapply branch taken/not taken
relocs.
ld/
* emultempl/ppc32elf.em (ppc_after_open_output): Really enable
ppc476 workaround for ld -r.
Adding long-branch stubs for __tls_get_addr calls that are optimised
away is silly. It also causes assertion failures on newer object files
that use R_PPC_TLSGD and R_PPC_TLSLD marker relocs, and half-optimised
(ie. broken) code for older object files.
PR 16546
* elf32-ppc.c (ppc_elf_relax_section): Don't build long-branch
stubs for calls to __tls_get_addr that we know will later be
optimised away.