Nowadays, GDB can't set watchpoint on tagged address on AArch64,
(gdb) p p2
$1 = (int *) 0xf000fffffffff474
(gdb) watch *((int *) 0xf000fffffffff474)
Hardware watchpoint 2: *((int *) 0xf000fffffffff474)
(gdb) c
Continuing.
main () at
binutils-gdb/gdb/testsuite/gdb.arch/aarch64-tagged-pointer.c:45
45 void (*func_ptr) (void) = foo;
Unexpected error setting hardware debug registers
This patch is about setting watchpoint on a tagged address. Unlike
breakpoint, watchpoint record the expression rather than the address, and
when a watchpoint is fired, GDB checks the expression value changed
instead of matching address, so we can mask the watchpoint address by
getting rid of non-significant bits of address.
gdb:
2017-12-08 Yao Qi <yao.qi@linaro.org>
* breakpoint.c (update_watchpoint): Call
address_significant.
gdb/testsuite:
2017-12-08 Yao Qi <yao.qi@linaro.org>
* gdb.arch/aarch64-tagged-pointer.c (main): Update.
* gdb.arch/aarch64-tagged-pointer.exp: Add tests for watchpoint.
Tag in tagged address on AArch64 is treated as a non-significant bits of
address, which can be got by gdbarch method significant_addr_bit, and gdb
can clear these bits.
With this patch, when user sets a breakpoint on tagged address on AArch64,
GDB will drop the top byte of address, and put breakpoint at the new place,
as shown below,
(gdb) hbreak *func_ptr
warning: Breakpoint address adjusted from 0xf000000000400690 to 0x00400690.
Hardware assisted breakpoint 2 at 0x400690
(gdb) break *func_ptr
warning: Breakpoint address adjusted from 0xf000000000400690 to 0x00400690.
Breakpoint 3 at 0x400690
When program hits a breakpoint, the stopped pc reported by Linux kernel is
the address *without* tag, so it is better the address recorded in
breakpoint location is the one without tag too, so we can still match
breakpoint location address and stopped pc reported by Linux kernel, by
simple compare.
gdb:
2017-12-08 Yao Qi <yao.qi@linaro.org>
* breakpoint.c (adjust_breakpoint_address): Call
address_significant.
gdb/testsuite:
2017-12-08 Yao Qi <yao.qi@linaro.org>
* gdb.arch/aarch64-tagged-pointer.c (main): Update.
* gdb.arch/aarch64-tagged-pointer.exp: Add test for breakpoint.
ARMv8 supports tagged address, that is, the top one byte in address
is ignored. It is always enabled on aarch64-linux. See
https://www.kernel.org/doc/Documentation/arm64/tagged-pointers.txt
The tag in the tagged address is modeled as non-significant bits in
address, so this patch adds a new gdbarch method significant_addr_bit and
clear the non-significant bits (the top byte in ARMv8) of the virtual
address at the point before passing address to target cache layer. IOW,
the address used in the target cache layer is already cleared.
Before this patch,
(gdb) x/x 0x0000000000411030
0x411030 <global>: 0x00000000
(gdb) x/x 0xf000000000411030
0xf000000000411030: Cannot access memory at address 0xf000000000411030
After this patch,
(gdb) x/x 0x0000000000411030
0x411030 <global>: 0x00000000
(gdb) x/x 0xf000000000411030
0xf000000000411030: 0x00000000
Note that I used address_significant in paddress, but it causes a
regression gdb.base/long_long.exp, because gdb clears the non-significant
bits in address, but test still expects them.
p/a val.oct^M
$24 = 0x2ee53977053977^M
(gdb) FAIL: gdb.base/long_long.exp: p/a val.oct
so I defer the change there.
gdb:
2017-12-08 Yao Qi <yao.qi@linaro.org>
* aarch64-tdep.c (aarch64_gdbarch_init): Install gdbarch
significant_addr_bit.
* gdbarch.sh (significant_addr_bit): New.
* gdbarch.c, gdbarch.h: Re-generated.
* target.c (memory_xfer_partial): Call address_significant.
* utils.c (address_significant): New function.
* utils.h (address_significant): Declare.
2017-12-08 Yao Qi <yao.qi@linaro.org>
gdb/testsuite:
* gdb.arch/aarch64-tagged-pointer.c: New file.
* gdb.arch/aarch64-tagged-pointer.exp: New file.
Since:
commit 7022349d5c
Author: Pedro Alves <palves@redhat.com>
Date: Mon Sep 4 20:21:13 2017 +0100
Stop assuming no-debug-info functions return int
We now have to explicitly tell GDB the type of the non-debug-info
function we want to print (by casting). This commit adjusts the
"print" statement on gdb.arch/i386-sse-stack-align.exp to do the
proper cast, fixing a failure that started to happen after the
mentioned commit.
gdb/testsuite/ChangeLog:
2017-12-08 Sergio Durigan Junior <sergiodj@redhat.com>
* gdb.arch/i386-sse-stack-align.exp: Cast "print" function call
"int".
I've noticed that "set remote target-features-packet off" before
connecting has no effect -- GDB still fetches a target description
anyway.
The problem is that while most "set remote foo-packet" commands were
fixed by:
From 4082afcc3d Mon Sep 17 00:00:00 2001
From: Pedro Alves <palves@redhat.com>
Date: Fri, 25 Apr 2014 18:07:02 +0100
Subject: [PATCH] Fix several "set remote foo-packet on/off" commands.
<https://sourceware.org/ml/gdb-patches/2014-04/msg00006.html>
the "qXfer" packets where missed. This commit fixes that.
I've changed remote_search_memory too for consistency (seems like
those are the last direct references to packet->support), though the
difference is not observable because the qSearch:memory packet is auto
probed. Note gdb.base/find-unmapped.exp already exercises explicit
"set remote search-memory-packet off".
gdb/ChangeLog:
2017-12-06 Pedro Alves <palves@redhat.com>
* remote.c (remote_query_supported): Don't send "xmlRegisters=" if
"qXfer:features:read"" is disabled.
(remote_write_qxfer, remote_read_qxfer, remote_search_memory):
Check packet_config_support instead of packet->support directly.
gdb/testsuite/ChangeLog:
2017-12-06 Pedro Alves <palves@redhat.com>
* gdb.arch/i386-avx.exp: If testing with a RSP target, check
force-disabling XML descriptions.
--
gdb/remote.c | 16 +++++++++-------
gdb/testsuite/gdb.arch/i386-avx.exp | 25 +++++++++++++++++++++++++
2 files changed, 34 insertions(+), 7 deletions(-)
PR gdb/22499 is about a latent bug exposed by the switch to "maint set
target-non-stop on" by default on x86-64 GNU/Linux, a while ago. With
that on, GDB is also preferring to use displaced-stepping by default.
The testcase in the bug is failing because GDB ends up incorrectly
displaced-stepping over a RIP-relative VEX-encoded instruction, like
this:
0x00000000004007f5 <+15>: c5 fb 10 05 8b 01 00 00 vmovsd 0x18b(%rip),%xmm0 # 0x400988
While RIP-relative instructions need adjustment when relocated to the
scratch pad, GDB ends up just copying VEX-encoded instructions to the
scratch pad unmodified, with the end result that the inferior ends up
executing an instruction that fetches/writes memory from the wrong
address...
This patch teaches GDB about the VEX-encoding prefixes, fixing the
problem, and adds a testcase that fails without the GDB fix.
I think we may need a similar treatment for EVEX-encoded instructions,
but I didn't address that simply because I couldn't find any
EVEX-encoded RIP-relative instruction in the gas testsuite. In any
case, this commit is forward progress as-is already.
gdb/ChangeLog:
2017-12-04 Pedro Alves <palves@redhat.com>
PR gdb/22499
* amd64-tdep.c (amd64_insn::rex_offset): Rename to...
(amd64_insn::enc_prefix_offset): ... this, and tweak comment.
(vex2_prefix_p, vex3_prefix_p): New functions.
(amd64_get_insn_details): Adjust to rename. Also skip VEX2 and
VEX3 prefixes.
(fixup_riprel): Set VEX3.!B.
gdb/testsuite/ChangeLog:
2017-12-04 Pedro Alves <palves@redhat.com>
PR gdb/22499
* gdb.arch/amd64-disp-step-avx.S: New file.
* gdb.arch/amd64-disp-step-avx.exp: New file.
The copyright header in most of GDB files were changed from mail address
to the URL in the conversion to GPLv3 in Aug 2007. However, some files
still use mail address instead of the URL. This patch fixes them.
gdb/testsuite:
2017-12-01 Yao Qi <yao.qi@linaro.org>
* gdb.arch/aarch64-atomic-inst.exp: Replace mail address with
the URL in copyright header.
* gdb.arch/aarch64-fp.exp: Likewise.
* gdb.arch/ppc64-atomic-inst.exp: Likewise.
* gdb.arch/ppc64-isa207-atomic-inst.exp: Likewise.
* gdb.base/expand-psymtabs.exp: Likewise.
* gdb.cp/expand-psymtabs-cxx.exp: Likewise.
* gdb.fortran/common-block.exp: Likewise.
* gdb.fortran/common-block.f90: Likewise.
* gdb.fortran/logical.exp: Likewise.
* gdb.fortran/vla-datatypes.f90: Likewise.
* gdb.fortran/vla-sub.f90: Likewise.
The SPU-specific test cases were not modified to use standard_output_file
and therefore all were no longer being executed. Fixing this exposed a
few other bugs in spu-info noticed by using a more recent compiler, which
are also fixed here.
gdb/testsuite/ChangeLog:
2017-11-26 Ulrich Weigand <uweigand@de.ibm.com>
* gdb.arch/spu-info.c: Include <unistd.h>.
(do_signal_test): Fix broken calls to write.
* gdb.arch/spu-info.exp: Use prepare_for_testing.
Fix checks for empty mailboxes. Update signal tests for corrected
do_signal_test routine. Allow nonzero event status.
Prepare for using MPFR to implement floating-point arithmetic by
refactoring the way host floating-point arithmetic is currently used.
In particular, fix the following two problems that cause different
(and incorrect) results due to using host arithmetic:
- Current processing always uses host "long double", and then converts
back to the actual target format. This may introduce rounding errors.
- Conversion of FP values to LONGEST simply does a host C++ type cast.
However the result of such a cast is undefined if the source value
is outside the representable range. MPFR always has defined behavior
here (returns the minimum or maximum representable value).
To fix the first issue, I've now created not just one set of routines
using host FP arithmetic (on long double), but instead three different
sets of routines, one each for host float, double, and long double.
Operations can then be performed in the desired type directly, avoiding
the extra rounding step. Using C++ templates, the three sets can all
share the same source code without duplication.
To fix the second issue, I'm simply enforcing the same conversion rule
(which makes sense anyway) when converting out-of-range values from
FP to LONGEST.
To contain the code complexity with the variety of options now possible,
I've created a new class "target_float_ops". There are a total of five
separate implementations of this:
host_float_ops<float> Implemented via host FP in given type
host_float_ops<double>
host_float_ops<long double>
mpfr_float_ops Implemented via MPFR if available
decimal_float_ops Implemented via libdecnumber
Note instead of using the DOUBLEST define, this always just uses the
"long double" data type. But since we now require C++11 anyway, this
type must in any case be avaialble unconditionally.
Most target floating-point operations simply dispatch to a (virtual)
member routine of this class. Which implementation to choose is
determined from the target types involved, and whether they match
some host type or not. E.g. any operation on a single type that
matches a host type is performed in that type. Operations involving
two types that both match host types are performed in the larger one
(according to C/C++ implicit conversion rules). Operations that
involve any type that does not match a host type are performed using
MPFR. (And of course operations involving decimal FP are performed
using libdecnumber.)
This first patch implements the refactoring of target-float.c as
described above, introduing the host_float_ops and decimal_float_ops
classes, and using them. Use of MPFR is introduced in the second patch.
A bit of special-case handling code is moved around to as to avoid
code duplication between host_float_ops and mpfr_float_ops.
Note that due to the changes mentioned above, I've had to update (fix)
the floating-point register values tested in the gdb.arch/vsx-regs.exp
test case. (The new values now work both with host arithmetic and MPFR.)
gdb/ChangeLog:
2017-11-22 Ulrich Weigand <uweigand@de.ibm.com>
* target-float.c: Do not include <math.h>.
Include <cmath> and <limits>.
(DOUBLEST): Do not define.
(class target_float_ops): New type.
(class host_float_ops): New templated type.
(class decimal_float_ops): New type.
(floatformat_to_doublest): Rename to ...
(host_float_ops<T>::from_target): ... this. Use template type T
instead of DOUBLEST. Use C++ math routines. Update recursive calls.
(host_float_ops<T>::from_target): New overload using a type argument.
(floatformat_from_doublest): Rename to ...
(host_float_ops<T>::to_target): ... this. Use template type T
instead of DOUBLEST. Use C++ math routines. Update recursive calls.
(host_float_ops<T>::to_target): New overload using a type argument.
(floatformat_printf_format): New function.
(struct printf_length_modifier): New templated type.
(floatformat_to_string): Rename to ...
(host_float_ops<T>::to_string): ... this. Use type instead of
floatformat argument. Use floatformat_printf_format and
printf_length_modifier. Remove special handling of invalid numbers,
infinities and NaN (moved to target_float_to_string).
(struct scanf_length_modifier): New templated type.
(floatformat_from_string): Rename to ...
(host_float_ops<T>::from_string): ... this. Use type instead of
floatformat argument. Use scanf_length_modifier.
(floatformat_to_longest): Rename to ...
(host_float_ops<T>::to_longest): ... this. Use type instead of
floatformat argument. Handle out-of-range values deterministically.
(floatformat_from_longest): Rename to ...
(host_float_ops<T>::from_longest): ... this. Use type instead of
floatformat argument.
(floatformat_from_ulongest): Rename to ...
(host_float_ops<T>::from_ulongest): ... this. Use type instead of
floatformat argument.
(floatformat_to_host_double): Rename to ...
(host_float_ops<T>::to_host_double): ... this. Use type instead of
floatformat argument.
(floatformat_from_host_double): Rename to ...
(host_float_ops<T>::from_host_double): ... this. Use type instead of
floatformat argument.
(floatformat_convert): Rename to ...
(host_float_ops<T>::convert): ... this. Use type instead of
floatformat arguments. Remove handling of no-op conversions.
(floatformat_binop): Rename to ...
(host_float_ops<T>::binop): ... this. Use type instead of
floatformat arguments.
(floatformat_compare): Rename to ...
(host_float_ops<T>::compare): ... this. Use type instead of
floatformat arguments.
(match_endianness): Use type instead of length/byte_order arguments.
(set_decnumber_context): Likewise.
(decimal_from_number): Likewise. Update calls.
(decimal_to_number): Likewise.
(decimal_is_zero): Likewise. Update calls. Move to earlier in file.
(decimal_float_ops::to_host_double): New dummy function.
(decimal_float_ops::from_host_double): Likewise.
(decimal_to_string): Rename to ...
(decimal_float_ops::to_string): ... this. Use type instead of
length/byte_order arguments. Update calls.
(decimal_from_string): Rename to ...
(decimal_float_ops::from_string): ... this. Use type instead of
length/byte_order arguments. Update calls.
(decimal_from_longest): Rename to ...
(decimal_float_ops::from_longest): ... this. Use type instead of
length/byte_order arguments. Update calls.
(decimal_from_ulongest): Rename to ...
(decimal_float_ops::from_ulongest): ... this. Use type instead of
length/byte_order arguments. Update calls.
(decimal_to_longest): Rename to ...
(decimal_float_ops::to_longest): ... this. Use type instead of
length/byte_order arguments. Update calls.
(decimal_binop): Rename to ...
(decimal_float_ops::binop): ... this. Use type instead of
length/byte_order arguments. Update calls.
(decimal_compare): Rename to ...
(decimal_float_ops::compare): ... this. Use type instead of
length/byte_order arguments. Update calls.
(decimal_convert): Rename to ...
(decimal_float_ops::convert): ... this. Use type instead of
length/byte_order arguments. Update calls.
(target_float_same_category_p): New function.
(target_float_same_format_p): Likewise.
(target_float_format_length): Likewise.
(enum target_float_ops_kind): New type.
(get_target_float_ops_kind): New function.
(get_target_float_ops): Three new overloaded functions.
(target_float_is_zero): Update call.
(target_float_to_string): Add special handling of invalid numbers,
infinities and NaN (moved from floatformat_to_string). Use
target_float_ops callback.
(target_float_from_string): Use target_float_ops callback.
(target_float_to_longest): Likewise.
(target_float_from_longest): Likewise.
(target_float_from_ulongest): Likewise.
(target_float_to_host_double): Likewise.
(target_float_from_host_double): Likewise.
(target_float_convert): Add special case for no-op conversions.
Use target_float_ops callback.
(target_float_binop): Use target_float_ops callback.
(target_float_compare): Likewise.
gdb/testsuite/ChangeLog:
2017-11-22 Ulrich Weigand <uweigand@de.ibm.com>
* gdb.arch/vsx-regs.exp: Update register content checks.
Current versions of GCC support switching the format used for "long double"
to either IBM double double or IEEE-128. The resulting binary is marked
via different setting of the Tag_GNU_Power_ABI_FP GNU attribute.
This patch checks this attribute to detect the format of the default
"long double" type and sets GDB's notion of the format accordingly.
The patch also adds support for the "__ibm128" type, which always uses
IBM double double format independent of the format used for "long double".
A new test case verifies that all three types, "long double", "__float128",
and "__ibm128" are correctly detected in all three compiler settings,
the default setting, -mabi=ieeelongdouble, and -mabi=ibmlongdouble.
gdb/ChangeLog:
2017-11-21 Ulrich Weigand <uweigand@de.ibm.com>
* ppc-tdep.h (enum powerpc_long_double_abi): New data type.
(struct gdbarch_tdep): New member long_double_abi.
* rs6000-tdep.c (rs6000_gdbarch_init): Initialize long_double_abi
member of tdep struct based on Tag_GNU_Power_ABI_FP attribute.
* ppc-linux-tdep.c (ppc_linux_init_abi): Install long double data
format depending on long_double_abi tdep member.
(ppc_floatformat_for_type): Handle __ibm128 type.
gdb/testsuite/ChangeLog:
2017-11-21 Ulrich Weigand <uweigand@de.ibm.com>
* gdb.arch/ppc-longdouble.exp: New file.
* gdb.arch/ppc-longdouble.c: Likewise.
LR is a caller-save register, so, if inline asm does BL (which touches
LR), we should mark LR clobbered.
gdb/testsuite:
2017-10-27 Yao Qi <yao.qi@linaro.org>
* gdb.arch/insn-reloc.c (can_relocate_bl): Mark "x30" clobbered.
Currently if you diff testsuite/gdb.sum of two builds built from
different source trees you see this spurious hunk:
-PASS: gdb.arch/arc-tdesc-cpu.exp: set tdesc filename /home/pedro/gdb1/src/gdb/testsuite/gdb.arch/arc-tdesc-cpu.xml
+PASS: gdb.arch/arc-tdesc-cpu.exp: set tdesc filename /home/pedro/gdb2/src/gdb/testsuite/gdb.arch/arc-tdesc-cpu.xml
After this commit we'll show this instead in gdb.sum:
PASS: gdb.arch/arc-tdesc-cpu.exp: set tdesc filename $srcdir/gdb.arch/arc-tdesc-cpu.xml
gdb/testsuite/ChangeLog:
2017-10-24 Pedro Alves <palves@redhat.com>
* gdb.arch/arc-tdesc-cpu.exp ('set tdesc filename'): Use gdb_test
with explicit test name.
There was a problem with generation of the disassembler options for ARC in GDB,
because a BFD architecture name was used as a CPU name, but they have different
meaning even if some architectures have same name as respective CPUs. Target
description specifies a BFD architecture, which is different from ARC CPU, as
accepted by the disassembler (and most other ARC tools), because CPU values are
much more fine grained - there can be multiple CPU values per single BFD
architecture. As a result this code should translate architecture to some CPU
value. Since there is no info on exact CPU configuration, it is best to use
the most feature-rich CPU, so that the disassembler will recognize all
instructions available to the specified architecture.
gdb/ChangeLog
yyyy-mm-dd Anton Kolesov <Anton.Kolesov@synopsys.com>
* arc-tdep.c (arc_gdbarch_init): Pass proper cpu value to disassembler.
* arc-tdep.h (arc_arch_is_em): New function.
(arc_arch_is_hs): Likewise.
gdb/testsuite/ChangeLog
yyyy-mm-dd Anton Kolesov <Anton.Kolesov@synopsys.com>
* gdb.arch/arc-tdesc-cpu.exp: New file.
* gdb.arch/arc-tdesc-cpu.xml: Likewise.
Test was running on a fault during code execution. Analysis have shown
that the wrong instruction had been used. An instruction that takes
not alligned memory is more appropriated for the task.
ChangeLog:
2017-09-20 Walfred Tedeschi <walfred.tedeschi@intel.com>
gdb/testesuite/ChangeLog:
* gdb.arch/i386-avx512.c (move_zmm_data_to_reg): Use
vmovups instead vmovaps.
(move_zmm_data_to_memory): Use vmovups instead vmovaps.
Change-Id: I4a95560861ef1792ed6ce86578fdd726162863f1
Tests in gdb.arch/thumb2-it.exp call functions defined in assembly
without type debugging information. Since
7022349d5c ("Stop assuming no-debug-info
functions return int") this triggers an error which leads to many tests
to FAIL. This patch cast the call to indicate the return type of the
functions when calling them.
2017-09-06 Thomas Preud'homme <thomas.preudhomme@arm.com>
gdb/testsuite/
* gdb.arch/thumb2-it.exp: Cast call to assembly defined function.
The M7 processor supports an Application Data Integrity (ADI) feature
that detects invalid data accesses. When software allocates data, it
chooses a 4-bit version number, sets the version in the upper 4 bits
of the 64-bit pointer to that data, and stores the 4-bit version in
every cacheline of the object. Hardware saves the latter in spare
bits in the cache and memory hierarchy. On each load and store, the
processor compares the upper 4 VA (virtual address) bits to the
cacheline's version. If there is a mismatch, the processor generates a
version mismatch trap which can be either precise or disrupting. The
trap is an error condition which the kernel delivers to the process as
a SIGSEGV signal.
The upper 4 bits of the VA represent a version and are not part of the
true address. The processor clears these bits and sign extends bit 59
to generate the true address.
Note that 32-bit applications cannot use ADI.
This patch adds ADI support in gdb which allows the user to examine
current version tags and assign new version tags in the program. It
also catches and reports precise or disrupting memory corruption
traps.
gdb/ChangeLog:
2017-08-07 Weimin Pan <weimin.pan@oracle.com>
* sparc64-tdep.h: (adi_normalize_address): New export.
* sparc-nat.h: (open_adi_tag_fd): New export.
* sparc64-linux-nat.c: (open_adi_tag_fd): New function.
* sparc64-linux-tdep.c:
(SEGV_ACCADI, SEGV_ADIDERR, SEGV_ADIPERR) New defines.
(sparc64_linux_handle_segmentation_fault): New function.
(sparc64_linux_init_abi): Register
sparc64_linux_handle_segmentation_fault
* sparc64-tdep.c: Include cli-utils.h,gdbcmd.h,auxv.h.
(sparc64_addr_bits_remove): New function.
(sparc64_init_abi): Register sparc64_addr_bits_remove.
(MAX_PROC_NAME_SIZE): New macro.
(AT_ADI_BLKSZ, AT_ADI_NBITS, AT_ADI_UEONADI) New defines.
(sparc64adilist): New variable.
(adi_proc_list): New variable.
(find_adi_info): New function.
(add_adi_info): New function.
(get_adi_info_proc): New function.
(get_adi_info): New function.
(info_adi_command): New function.
(read_maps_entry): New function.
(adi_available): New function.
(adi_normalize_address): New function.
(adi_align_address): New function.
(adi_convert_byte_count): New function.
(adi_tag_fd): New function.
(adi_is_addr_mapped): New function.
(adi_read_versions): New function.
(adi_write_versions): New function.
(adi_print_versions): New function.
(do_examine): New function.
(do_assign): New function.
(adi_examine_command): New function.
(adi_assign_command): New function.
(_initialize_sparc64_adi_tdep): New function.
gdb/doc/ChangeLog:
2017-08-07 Weimin Pan <weimin.pan@oracle.com>
* gdb.texinfo (Architectures): Add new Sparc64 section to document
ADI support.
* NEWS: Add "adi examine" and "adi assign" commands.
gdb/testsuite/ChangeLog:
2017-08-07 Weimin Pan <weimin.pan@oracle.com>
* gdb.arch/sparc64-adi.exp: New file.
* gdb.arch/sparc64-adi.c: New file.
s390-vregs.exp yields a Tcl error:
ERROR: can't read "i": no such variable
while executing
"expr $a_high * ($i + 1) * $a_high "
(procedure "hex128" line 2)
invoked from within
"hex128 $a_high $a_low $b_high $b_low"
...
This is a regression, caused by commit 30a254669b -- "Don't always
zero pad in print_*_chars". That patch introduced a new procedure
"hex128" for formatting a 128-bit value as hex, but it accidentally moved
the calculation of the 128-bit value into that new procedure as well
instead of leaving it in the original context. This is fixed.
gdb/testsuite/ChangeLog:
* gdb.arch/s390-vregs.exp: Calculate parameters to hex128 in the
calling context.
(hex128): Drop erroneous calculation of parameters.
When I added the new lnia extended mnemonic for addpcis, I updated the
assembler/disassembler test cases, but overlooked the GDB test cases.
This patch fixes that oversight and associated test case failure.
* gdb.arch/powerpc-power9.exp: Update test case for new lnia
extended mnemonic.
* gdb.arch/powerpc-power9.s: Likewise.
The test suite contains multiple instances of determining the target's
endianness with GDB's "show endian" command. This patch replaces these by
an invocation of a new convenience proc 'get_endianness'.
gdb/testsuite/ChangeLog:
* lib/gdb.exp (get_endianness): New proc.
* gdb.arch/aarch64-fp.exp: Use it.
* gdb.arch/altivec-regs.exp: Likewise.
* gdb.arch/e500-regs.exp: Likewise.
* gdb.arch/vsx-regs.exp: Likewise.
* gdb.base/dump.exp: Likewise.
* gdb.base/funcargs.exp: Likewise.
* gdb.base/gnu_vector.exp: Likewise.
* gdb.dwarf2/formdata16.exp: Likewise.
* gdb.dwarf2/implptrpiece.exp: Likewise.
* gdb.dwarf2/nonvar-access.exp: Likewise.
* gdb.python/py-inferior.exp: Likewise.
* gdb.trace/unavailable-dwarf-piece.exp: Likewise.
This unifies the two switches in print_scalar_formatted, removing some
now-redundant code. Now scalar types are never converted to LONGEST,
instead printing is done using print_*_chars, operating on the byte
representation.
ChangeLog
2017-06-12 Tom Tromey <tom@tromey.com>
* printcmd.c (print_scalar_formatted): Unify the two switches.
Don't convert scalars to LONGEST.
2017-06-12 Tom Tromey <tom@tromey.com>
* gdb.arch/altivec-regs.exp: Expect decimal results for uint128.
Add a prologue analysis that recognizes all instructions that may happen in
compiler-generated prologue, including various stores, core register moves,
subtraction and ENTER_S instruction that does a lot of prologue actions through
microcode.
Testcases cover various prologue scenarios, including instructions that are
spread across multiple 16-bit encodings (for example there are 7 encodings of
store instruction).
gdb/ChangeLog:
yyyy-mm-dd Anton Kolesov <anton.kolesov@synopsys.com>
* arc-tdep.c (arc_frame_cache): Add support for prologue analysis.
(arc_skip_prologue): Likewise.
(arc_make_frame_cache): Likewise.
(arc_pv_get_operand): New function.
(arc_is_in_prologue): Likewise.
(arc_analyze_prologue): Likewise.
(arc_print_frame_cache): Likewise.
(MAX_PROLOGUE_LENGTH): New constant.
gdb/doc/ChangeLog:
yyyy-mm-dd Anton Kolesov <anton.kolesov@synopsys.com>
* gdb.texinfo (Synopsys ARC): Document "set debug arc 2".
gdb/testsuite/ChangeLog:
yyyy-mm-dd Anton Kolesov <anton.kolesov@synopsys.com>
* gdb.arch/arc-analyze-prologue.S: New file.
* gdb.arch/arc-analyze-prologue.exp: Likewise.
Add disassembler helper for GDB, that uses opcodes structure arc_instruction
and adds convenience functions to handle instruction operands. This interface
solves at least those problems with arc_instruction:
* Some instructions, like "push_s", have implicit operands which are not
directly present in arc_instruction.
* Operands of particular meaning, like branch/jump targets, have various
locations and meaning depending on type of branch/target.
* Access to operand value is abstracted into a separate function, so callee
code shouldn't bother if operand value is an immediate value or in a
register.
Testcases included in this commit are fairly limited - they test exclusively
branch instructions, something that will be used in software single stepping.
Most of the other parts of this disassembler helper are tested during prologue
analysis testing.
gdb/ChangeLog:
yyyy-mm-dd Anton Kolesov <anton.kolesov@synopsys.com>
* configure.tgt: Add arc-insn.o.
* arc-tdep.c (arc_delayed_print_insn): Make non-static.
(dump_arc_instruction_command): New function.
(arc_fprintf_disasm): Likewise.
(arc_disassemble_info): Likewise.
(arc_insn_get_operand_value): Likewise.
(arc_insn_get_operand_value_signed): Likewise.
(arc_insn_get_memory_base_reg): Likewise.
(arc_insn_get_memory_offset): Likewise.
(arc_insn_get_branch_target): Likewise.
(arc_insn_dump): Likewise.
(arc_insn_get_linear_next_pc): Likewise.
* arc-tdep.h (arc_delayed_print_insn): Add function declaration.
(arc_disassemble_info): Likewise.
(arc_insn_get_branch_target): Likewise.
(arc_insn_get_linear_next_pc): Likewise.
* NEWS: Mention new "maint print arc arc-instruction".
gdb/doc/ChangeLog:
yyyy-mm-dd Anton Kolesov <anton.kolesov@synopsys.com>
* gdb.texinfo (Synopsys ARC): Add "maint print arc arc-instruction".
gdb/testsuite/ChangeLog:
yyyy-mm-dd Anton Kolesov <anton.kolesov@synopsys.com>
* gdb.arch/arc-decode-insn.S: New file.
* gdb.arch/arc-decode-insn.exp: Likewise.
While at it, decode also properly one-bit flags for %fsr (accrued and
current exception flags were mixed up).
ChangeLog entry:
2017-03-21 Ivo Raisr <ivo.raisr@oracle.com>
PR tdep/20928
* gdb/sparc-tdep.h (gdbarch_tdep) <sparc64_ccr_type>: New field.
* gdb/sparc64-tdep.c (sparc64_ccr_type): New function.
(sparc64_fsr_type): Fix %fsr decoding.
ChangeLog entry for testsuite:
2017-03-21 Ivo Raisr <ivo.raisr@oracle.com>
PR tdep/20928
* gdb.arch/sparc64-regs.exp: New file.
* gdb.arch/sparc64-regs.S: Likewise.
gdb/testsuite/ChangeLog:
2017-03-08 Pedro Alves <palves@redhat.com>
* gdb.arch/amd64-entry-value-param-dwarf5.exp: Use with_test_prefix.
* gdb.arch/amd64-entry-value-param.exp: Use with_test_prefix.
Currently I get:
(gdb) print have_pkru()
$1 = 0
(gdb) FAIL: gdb.arch/i386-pkru.exp: probe PKRU support
UNSUPPORTED: gdb.arch/i386-pkru.exp: processor does not support protection key feature.
Probing suceeded, so that should be a PASS -> UNSUPPORTED.
gdb/testsuite/ChangeLog:
2017-03-08 Pedro Alves <palves@redhat.com>
* gdb.arch/i386-pkru.exp (probe PKRU support): Handle detecting
PKRU as not supported as a PASS.
This patch initializes the BND registers before executing the inferior
call. BND registers can be in arbitrary values at the moment of the
inferior call. In case the function being called uses as part of the
parameters BND register, e.g. when passing a pointer as parameter, the
current value of the register will be used. This can cause boundary
violations that are not due to a real bug or even desired by the user.
In this sense the best to be done is set the BND registers to allow
access to the whole memory, i.e. initialized state, before pushing the
inferior call.
2017-03-07 Walfred Tedeschi <walfred.tedeschi@intel.com>
gdb/ChangeLog:
* i387-tdep.h (i387_reset_bnd_regs): Add function definition.
* i387-tdep.c (i387_reset_bnd_regs): Add function implementation.
* i386-tdep.c (i386_push_dummy_call): Call i387_reset_bnd_regs.
* amd64-tdep (amd64_push_dummy_call): Call i387_reset_bnd_regs.
gdb/testsuite/ChangeLog:
* i386-mpx-call.c: New file.
* i386-mpx-call.exp: New file.
gdb/doc/ChangeLog:
* Memory Protection Extensions: Add information about inferior
calls.
This commit adds support to GDB so that it can modify the disassembler-options
value that is passed to the disassembler, similar to objdump's -M option.
Currently, the only supported targets are ARM, PowerPC and S/390, but
adding support for a new target(s) is not difficult.
include/
* dis-asm.h (disasm_options_t): New typedef.
(parse_arm_disassembler_option): Remove prototype.
(set_arm_regname_option): Likewise.
(get_arm_regnames): Likewise.
(get_arm_regname_num_options): Likewise.
(disassemble_init_s390): New prototype.
(disassembler_options_powerpc): Likewise.
(disassembler_options_arm): Likewise.
(disassembler_options_s390): Likewise.
(remove_whitespace_and_extra_commas): Likewise.
(disassembler_options_cmp): Likewise.
(next_disassembler_option): New inline function.
(FOR_EACH_DISASSEMBLER_OPTION): New macro.
opcodes/
* disassemble.c Include "safe-ctype.h".
(disassemble_init_for_target): Handle s390 init.
(remove_whitespace_and_extra_commas): New function.
(disassembler_options_cmp): Likewise.
* arm-dis.c: Include "libiberty.h".
(NUM_ELEM): Delete.
(regnames): Use long disassembler style names.
Add force-thumb and no-force-thumb options.
(NUM_ARM_REGNAMES): Rename from this...
(NUM_ARM_OPTIONS): ...to this. Use ARRAY_SIZE.
(get_arm_regname_num_options): Delete.
(set_arm_regname_option): Likewise.
(get_arm_regnames): Likewise.
(parse_disassembler_options): Likewise.
(parse_arm_disassembler_option): Rename from this...
(parse_arm_disassembler_options): ...to this. Make static.
Use new FOR_EACH_DISASSEMBLER_OPTION macro to scan over options.
(print_insn): Use parse_arm_disassembler_options.
(disassembler_options_arm): New function.
(print_arm_disassembler_options): Handle updated regnames.
* ppc-dis.c: Include "libiberty.h".
(ppc_opts): Add "32" and "64" entries.
(ppc_parse_cpu): Use ARRAY_SIZE and disassembler_options_cmp.
(powerpc_init_dialect): Add break to switch statement.
Use new FOR_EACH_DISASSEMBLER_OPTION macro.
(disassembler_options_powerpc): New function.
(print_ppc_disassembler_options): Use ARRAY_SIZE.
Remove printing of "32" and "64".
* s390-dis.c: Include "libiberty.h".
(init_flag): Remove unneeded variable.
(struct s390_options_t): New structure type.
(options): New structure.
(init_disasm): Rename from this...
(disassemble_init_s390): ...to this. Add initializations for
current_arch_mask and option_use_insn_len_bits_p. Remove init_flag.
(print_insn_s390): Delete call to init_disasm.
(disassembler_options_s390): New function.
(print_s390_disassembler_options): Print using information from
struct 'options'.
* po/opcodes.pot: Regenerate.
binutils/
* objdump.c (main): Use remove_whitespace_and_extra_commas.
gdb/
* NEWS: Mention new set/show disassembler-options commands.
* doc/gdb.texinfo: Document new set/show disassembler-options commands.
* disasm.c: Include "arch-utils.h", "gdbcmd.h" and "safe-ctype.h".
(prospective_options): New static variable.
(gdb_disassembler::gdb_disassembler): Initialize
m_di.disassembler_options.
(gdb_buffered_insn_length_init_dis): Initilize di->disassembler_options.
(get_disassembler_options): New function.
(set_disassembler_options): Likewise.
(set_disassembler_options_sfunc): Likewise.
(show_disassembler_options_sfunc): Likewise.
(disassembler_options_completer): Likewise.
(_initialize_disasm): Likewise.
* disasm.h (get_disassembler_options): New prototype.
(set_disassembler_options): Likewise.
* gdbarch.sh (gdbarch_disassembler_options): New variable.
(gdbarch_verify_disassembler_options): Likewise.
* gdbarch.c: Regenerate.
* gdbarch.h: Likewise.
* arm-tdep.c (num_disassembly_options): Delete.
(set_disassembly_style): Likewise.
(arm_disassembler_options): New static variable.
(set_disassembly_style_sfunc): Convert short style name into long
option name. Call set_disassembler_options.
(show_disassembly_style_sfunc): New function.
(arm_gdbarch_init): Call set_gdbarch_disassembler_options and
set_gdbarch_verify_disassembler_options.
(_initialize_arm_tdep): Delete regnames variable and update callers.
(arm_disassembler_options): Initialize.
(disasm_options): New variable.
(num_disassembly_options): Rename from this...
(num_disassembly_styles): ...to this. Compute by scanning through
disasm_options.
(valid_disassembly_styles): Initialize using disasm_options.
Remove calls to parse_arm_disassembler_option, get_arm_regnames and
set_arm_regname_option.
Pass show_disassembly_style_sfunc to the "disassembler" setshow command.
* rs6000-tdep.c (powerpc_disassembler_options): New static variable.
(rs6000_gdbarch_init): Call set_gdbarch_disassembler_options and
set_gdbarch_verify_disassembler_options.
* s390-tdep.c (s390_disassembler_options): New static variable.
(s390_gdbarch_init):all set_gdbarch_disassembler_options and
set_gdbarch_verify_disassembler_options.
gdb/testsuite/
* gdb.arch/powerpc-power.exp: Delete test.
* gdb.arch/powerpc-power.s: Likewise.
* gdb.disasm/disassembler-options.exp: New test.
* gdb.arch/powerpc-altivec.exp: Likewise.
* gdb.arch/powerpc-altivec.s: Likewise.
* gdb.arch/powerpc-altivec2.exp: Likewise.
* gdb.arch/powerpc-altivec2.s: Likewise.
* gdb.arch/powerpc-altivec3.exp: Likewise.
* gdb.arch/powerpc-altivec3.s: Likewise.
* gdb.arch/powerpc-power7.exp: Likewise.
* gdb.arch/powerpc-power7.s: Likewise.
* gdb.arch/powerpc-power8.exp: Likewise.
* gdb.arch/powerpc-power8.s: Likewise.
* gdb.arch/powerpc-power9.exp: Likewise.
* gdb.arch/powerpc-power9.s: Likewise.
* gdb.arch/powerpc-vsx.exp: Likewise.
* gdb.arch/powerpc-vsx.s: Likewise.
* gdb.arch/powerpc-vsx2.exp: Likewise.
* gdb.arch/powerpc-vsx2.s: Likewise.
* gdb.arch/powerpc-vsx3.exp: Likewise.
* gdb.arch/powerpc-vsx3.s: Likewise.
* gdb.arch/arm-disassembler-options.exp: Likewise.
* gdb.arch/powerpc-disassembler-options.exp: Likewise.
* gdb.arch/s390-disassembler-options.exp: Likewise.
gdb/
2017-02-21 Edjunior Barbosa Machado <emachado@linux.vnet.ibm.com>
* rs6000-tdep.c (LOAD_AND_RESERVE_MASK): Rename from LWARX_MASK.
(STORE_CONDITIONAL_MASK): Rename from STWCX_MASK.
(LBARX_INSTRUCTION, LHARX_INSTRUCTION, LQARX_INSTRUCTION,
STBCX_INSTRUCTION, STHCX_INSTRUCTION, STQCX_INSTRUCTION): New defines.
(IS_LOAD_AND_RESERVE_INSN, IS_STORE_CONDITIONAL_INSN): New macros.
(ppc_displaced_step_copy_insn): Use IS_LOAD_AND_RESERVE_INSN.
(ppc_deal_with_atomic_sequence): Use IS_LOAD_AND_RESERVE_INSN and
IS_STORE_CONDITIONAL_INSN.
gdb/testsuite/
2017-02-21 Edjunior Barbosa Machado <emachado@linux.vnet.ibm.com>
* gdb.arch/ppc64-isa207-atomic-inst.exp: New testcase based on
gdb.arch/ppc64-atomic-inst.exp. Add tests for lbarx/stbcx, lharx/sthcx
and lqarx/stqcx.
* gdb.arch/ppc64-isa207-atomic-inst.S: New file.
* gdb.arch/ppc64-isa207-atomic-inst.c: Likewise.
This test attempts to load a x86 core file no matter what target
architectures the tested GDB supports. If GDB doesn't know how to handle
a i386 target, it is very likely the core file will not be recognized.
In this case we should still attempt to load a core file to make sure GDB
doesn't crash or throws an internal error. But we should not proceed to
try to read memory unconditionally.
This patch makes the test check for proper i386 arch support in GDB and bails
out if i386 is not supported and the core file format is not recognized.
This addresses the spurious aarch64-elf failures i'm seeing for this test.
gdb/testsuite/ChangeLog:
2017-02-13 Luis Machado <lgustavo@codesourcery.com>
* gdb.arch/i386-biarch-core.exp: Check for i386 arch support and
return if core file is not recognized.
This patch allows examination of the registers FS_BASE and GS_BASE
for Linux Systems running on 64bit. Tests for simple read and write
of the new registers is also added with this patch.
2017-01-27 Walfred Tedeschi <walfred.tedeschi@intel.com>
Richard Henderson <rth@redhat.com>
gdb/ChangeLog:
* amd64-linux-nat.c (PTRACE_ARCH_PRCTL): New define.
(amd64_linux_fetch_inferior_registers): Add case to fetch FS_BASE
GS_BASE for older kernels.
(amd64_linux_store_inferior_registers): Add case to store FS_BASE
GS_BASE for older kernels.
* amd64-linux-tdep.c (amd64_linux_gregset_reg_offset): Add FS_BASE
and GS_BASE to the offset table.
(amd64_linux_register_reggroup_p): Add FS_BASE and GS_BASE to the
system register group.
* amd64-nat.c (amd64_native_gregset_reg_offset): Implements case
for older kernels.
* amd64-tdep.c (amd64_init_abi): Add segment registers for the
amd64 ABI.
* amd64-tdep.h (amd64_regnum): Add AMD64_FSBASE_REGNUM and
AMD64_GSBASE_REGNUM.
(AMD64_NUM_REGS): Set to AMD64_GSBASE_REGNUM + 1.
* features/Makefile (amd64-linux.dat, amd64-avx-linux.dat)
(amd64-mpx-linux.dat, amd64-avx512-linux.dat, x32-linux.dat)
(x32-avx-linux.dat, x32-avx512-linux.dat): Add
i386/64bit-segments.xml in those rules.
* features/i386/64bit-segments.xml: New file.
* features/i386/amd64-avx-mpx-linux.xml: Add 64bit-segments.xml.
* features/i386/amd64-avx-linux.xml: Add 64bit-segments.xml.
* features/i386/amd64-avx512-linux.xml: Add 64bit-segments.xml.
* features/i386/amd64-mpx-linux.xml: Add 64bit-segments.xml.
* features/i386/x32-avx512-linux.xml: Add 64bit-segments.xml.
* features/i386/x32-avx-linux.xml: Add 64bit-segments.xml.
* features/i386/amd64-linux.xml: Add 64bit-segments.xml.
* features/i386/amd64-avx-linux.c: Regenerated.
* features/i386/amd64-avx-mpx-linux.c: Regenerated.
* features/i386/amd64-avx-mpx.c: Regenerated.
* features/i386/amd64-avx512-linux.c: Regenerated.
* features/i386/amd64-linux.c: Regenerated.
* features/i386/amd64-mpx-linux.c: Regenerated.
* features/i386/i386-avx-mpx-linux.c: Regenerated.
* features/i386/i386-avx-mpx.c: Regenerated.
* features/i386/x32-avx-linux.c: Regenerated.
* features/i386/x32-avx512-linux.c: Regenerated.
* regformats/i386/amd64-avx-linux.dat: Regenerated.
* regformats/i386/amd64-avx-mpx-linux.dat: Regenerated.
* regformats/i386/amd64-avx512-linux.dat: Regenerated.
* regformats/i386/amd64-linux.dat: Regenerated.
* regformats/i386/amd64-mpx-linux.dat: Regenerated.
* regformats/i386/x32-avx-linux.dat: Regenerated.
* regformats/i386/x32-avx512-linux.dat: Regenerated.
* regformats/i386/x32-linux.dat: Regenerated.
gdb/doc/ChangeLog:
* gdb.texinfo (i386 Features): Add system segment registers
as feature.
gdb/gdbserver/ChangeLog:
* linux-x86-low.c (x86_64_regmap): Add fs_base and gs_base
to the register table.
(x86_fill_gregset): Add support for old kernels for the
fs_base and gs_base system registers.
(x86_store_gregset): Likewise.
* configure.srv (srv_i386_64bit_xmlfiles): Add 64bit-segments.xml.
gdb/testsuite/ChangeLog:
* gdb.arch/amd64-gs_base.c: New file.
* gdb.arch/amd64-gs_base.exp: New file.
Change-Id: I2e0eeb93058a2320d4d3b045082643cfe4aff963
Signed-off-by: Walfred Tedeschi <walfred.tedeschi@intel.com>
This applies the second part of GDB's End of Year Procedure, which
updates the copyright year range in all of GDB's files.
gdb/ChangeLog:
Update copyright year range in all GDB files.
This fixes offender testcases that have test names starting with uppercase
when using gdb_test_multiple in a single-line construct.
gdb/testsuite/ChangeLog
2016-12-01 Luis Machado <lgustavo@codesourcery.com>
Fix test names starting with uppercase throughout the files.
* gdb.arch/i386-bp_permanent.exp
* gdb.arch/i386-gnu-cfi.exp
* gdb.base/disasm-end-cu.exp
* gdb.base/macscp.exp
* gdb.base/pending.exp
* gdb.base/watch_thread_num.exp
* gdb.cp/exception.exp
* gdb.cp/gdb2495.exp
* gdb.cp/local.exp
* gdb.python/py-evsignal.exp
* gdb.python/python.exp
* gdb.trace/tracecmd.exp
gcc-6.2.1
gdb compile failed, gdb/testsuite/gdb.arch/powerpc-prologue.c: In function 'main':
gdb/testsuite/gdb.arch/powerpc-prologue.c:32:3: warning: implicit declaration of function 'optimized_1' [-Wimplicit-function-declaration]
optimized_1 ();
^~~~~~~~~~~
gdb/testsuite/ChangeLog
2016-10-11 Jan Kratochvil <jan.kratochvil@redhat.com>
* gdb.arch/powerpc-prologue.c (optimized_1): New declaration.
Fix a regression from commit f8b73d13b7 ("Target-described register
support for MIPS"),
<https://sourceware.org/ml/gdb-patches/2007-05/msg00340.html>,
<https://sourceware.org/ml/gdb-patches/2007-06/msg00256.html>, which
caused Floating Point Control Registers (FCRs) to be shown as 64-bit
with 64-bit targets.
This came from the legacy register format where all raw registers
matched the width of the architecture regardless of their actual size.
The correct size was then set in `mips_register_type' for cooked
registers presented to the user, which in the case of FCRs meant the
cooked size was always forced to 32 bits, reflecting their actual
hardware size, even though the raw format carried them in 64-bit
quantities on 64-bit targets. The upper 32 bits carried in the raw FCR
format have always been don't-cares, not actually retrieved from
hardware and never written back.
With the introduction of XML register descriptions the layout of
previously defined raw registers has been preserved, so as to keep
existing register handling code unchanged and make it easier for GDB and
`gdbserver' to interact with each other whether neither, either or both
parties talking over RSP support XML register descriptions. For the
XML-described case however `mips_register_type' is not used in raw to
cooked register conversion, so any special cases coded there are not
taken into account.
Instead a new function, `mips_pseudo_register_type', has been introduced
to handle size conversion, however lacking the special case for FCRs for
the Linux and the now defunct IRIX target. The correct size has been
maintained for embedded targets however, due to the bundling of FCRs
with the embedded registers under the `rawnum >= MIPS_EMBED_FP0_REGNUM +
32' condition.
Add the missing case to `mips_pseudo_register_type' then, referring to
the FCR indices explicitly, and observing that between
`MIPS_EMBED_FP0_REGNUM + 32' and `MIPS_FIRST_EMBED_REGNUM' there is an
unused register slot whose contents are ignored so with the removal of
embedded FCRs from under that condition we don't have to care about it
and we can refer to the embedded registers starting from
MIPS_FIRST_EMBED_REGNUM instead.
Add a test case too so that we have means to check automatically that
the correct user-visible size of FCRs is maintained.
gdb/
* mips-tdep.c (mips_pseudo_register_type): Make FCRs always
32-bit.
gdb/testsuite/
* gdb.arch/mips-fcr.exp: New test.
* gdb.arch/mips-fcr.c: Source for the new test.
gcc-6.2.1-2.fc24.x86_64
(gdb) backtrace 10^M
(gdb) FAIL: gdb.arch/i386-signal.exp: backtrace 10
(gdb) disas/s
Dump of assembler code for function main:
.../gdb/testsuite/gdb.arch/i386-signal.c:
30 {
0x000000000040057f <+0>: push %rbp
0x0000000000400580 <+1>: mov %rsp,%rbp
31 setup ();
0x0000000000400583 <+4>: callq 0x400590 <setup>
=> 0x0000000000400588 <+9>: mov $0x0,%eax
32 }
0x000000000040058d <+14>: pop %rbp
0x000000000040058e <+15>: retq
End of assembler dump.
The .exp patch is an obvious typo fix I think. The regex was written to
accept "ADDR in main" and I find it OK as checking .debug_line validity is not
the purpose of this testfile.
gcc-4.8.5-11.el7.x86_64 did not put the 'mov $0x0,%eax' instruction there at
all so there was no problem with .debug_line.
gdb/testsuite/ChangeLog
2016-10-05 Jan Kratochvil <jan.kratochvil@redhat.com>
* gdb.arch/i386-signal.exp (backtrace 10): Fix#2 typo.
Correct a commit 2151ccc56c ("Always organize test artifacts in a
directory hierarchy") regression causing:
Running .../gdb/testsuite/gdb.arch/mips16-thunks.exp ...
gdb compile failed, Assembler messages:
Fatal error: can't create .../gdb/testsuite/gdb.arch/mips16-thunks-inmain.o: No such file or directory
gdb compile failed, Assembler messages:
Fatal error: can't create .../gdb/testsuite/gdb.arch/mips16-thunks-main.o: No such file or directory
gdb compile failed, mips-mti-linux-gnu-gcc: error: .../gdb/testsuite/gdb.arch/mips16-thunks-inmain.o: No such file or directory
mips-mti-linux-gnu-gcc: error: .../gdb/testsuite/gdb.arch/mips16-thunks-main.o: No such file or directory
UNSUPPORTED: gdb.arch/mips16-thunks.exp: No MIPS16 support in the toolchain.
by using `standard_output_file' to construct output file names
throughout.
gdb/testsuite/
* gdb.arch/mips16-thunks.exp: Use `standard_output_file'
throughout.
* gdb.arch/powerpc-power.s: Update Power9 instruction tests
and sync up the test with tests in gas/testsuite/gas/ppc.
* gdb.arch/powerpc-power.exp: Likewise.
We recently found a ARM kernel ptrace bug
http://lists.infradead.org/pipermail/linux-arm-kernel/2016-May/431962.html
Details can be found in the comment in gdb_skip_float_test. We can
skip floating point tests if the kernel bug is detected.
This patch adds more code in gdb_skip_float_test to detect the broken
ptrace on arm-linux. Such detection should be done at the beginning
of the test, because it starts a fresh GDB, so change the test cases
to invoke gdb_skip_float_test at the beginning of test, and use its
return value afterwards.
Since gdb_skip_float_test becomes a gdb_caching_proc, so it can't
have an argument, this patch also removes argument "msg", which isn't
useful.
gdb/testsuite:
2016-09-02 Yao Qi <yao.qi@linaro.org>
* gdb.arch/arm-neon.exp: Skip it if gdb_skip_float_test returns
true.
* gdb.base/call-ar-st.exp: Invoke gdb_skip_float_test.
* gdb.base/call-rt-st.exp: Likewise.
* gdb.base/call-sc.exp: Invoke gdb_skip_float_test and use its
return value instead of gdb,skip_float_test.
* gdb.base/callfuncs.exp: Invoke gdb_skip_float_test.
(do_function_calls): Use its return value instead of
gdb,skip_float_test.
* gdb.base/finish.exp: Likewise.
* gdb.base/funcargs.exp: Likewise.
* gdb.base/return.exp: Likewise.
* gdb.base/return2.exp: Likewise.
* gdb.base/varargs.exp: Likewise.
* lib/gdb.exp (gdb_skip_float_test): Change it to
gdb_caching_proc. Detect the broken ptrace on arm-linux.
This patch fixes an issues with six test suite expect files that do not
run correctly when the test suite is not built in the source directory. The
issue is these tests are not using the current "standard_testfile" call
but rather using the older set command to initialize the "testfile",
"srcfile" and "binprefix" variables or are missing the set for the
"binprefix" variable.
-----------------------------------------------
gdb/testsuite/ChangeLog
2016-08-19 Carl Love <cel@us.ibm.com>
* gdb.arch/altivec-regs.exp: Use standard_testfile instead of
maintaining separate logic for constructing the output path.
* gdb.arch/powerpc-d128-regs.exp: Likewise.
* gdb.arch/ppc-dfp.exp: Likewise.
* gdb.arch/ppc-fp.exp: Likewise.
* gdb.arch/vsx-regs.exp: Likewise.
* gdb.arch/altivec-abi.exp: Likewise, plus added local variable
binprefix for generating the additional binary files.
Yao Qi
Sergio Durigan Junior
Pedro Alves
Ulrich Weigand
Anton Kolesov
Walfred Tedeschi
Thomas Preud'homme
Weimin Pan
Andreas Arnez
Peter Bergner
Tom Tromey
Ivo Raisr
Edjunior Barbosa Machado
Jan Kratochvil
Michael Sturm
Luis Machado
Joel Brobecker
Maciej W. Rozycki
Carl E. Love