The main body of the "all insn" test is executed once per tested insn, and
we test millions of insns here. Any shrinkage we can do in this loop will
speed things up nicely (since it's multiplied per tested insn).
To that end, simplify the end-of-table test into one less insn, and omit
the SSYNC when we build for the sim. When we build to run on the hardware,
this insn matters, but the sim doesn't have write store buffers in the chip
that might get in the way (memory writes are atomic).
* Makefile.am (BFD32_BACKENDS, BFD32_BACKENDS_CFILES): Move MIPS ELF
files to...
(BFD64_BACKENDS, BFD64_BACKENDS_CFILES): ...here.
* Makefile.in: Regenerate.
* config.bfd: Enclose all MIPS ELF targets in #ifdef BFD64.
Set want64 to true for them at the end.
* targets.c (_bfd_target_vector): Protect MIPS ELF targets with
#ifdef BFD64.
gas/
* config/tc-mips.c: Assert that offsetT and valueT are at least
8 bytes in size.
(GPR_SMIN, GPR_SMAX): New macros.
(macro, mips_ip): Remove code for 4-byte valueT and offsetT.
ld/
* Makefile.am (ALL_EMULATION_SOURCES): Move MIPS ELF emulations to...
(ALL_64_EMULATION_SOURCES): ...here.
* Makefile.in: Regenerate.
* gas/mips/mips.exp: Remove "LOSE" comments.
(run_dump_test_arch): Remove format selector support.
(run_dump_test_arches): Remove associated upvars.
(elf, ecoff, aout, no_mips16, no_micromips): Remove variables.
Remove all conditions based on them, on the assumption that $elf
is true and the others are false. Rename "elf-jal" to "jal".
(tmips): Set to "t" for *bsd targets.
* gas/mips/elf-jal.d: Rename to...
* gas/mips/jal.d: ...this, replacing the old file.
* gas/mips/micromips@elf-jal.d: Rename to...
* gas/mips/micromips@jal.d: ...this.
* gas/mips/at-1.d, gas/mips/ld.d, gas/mips/l_d.d, gas/mips/lui.d,
gas/mips/mips1@l_d.d, gas/mips/mips1@ld-forward.d, gas/mips/mips1@ld.d,
gas/mips/mips1@s_d.d, gas/mips/s_d.d, gas/mips/sd.d: Remove ECOFF
relocation names. Do not allow any offset on the symbol.
* config/tc-mips.c: Remove OBJ_ELF, OBJ_MAYBE_ELF and IS_ELF
conditions. Remove any code deselected by them.
(s_mips_frame, s_mips_mask): Handle ECOFF_DEBUGGING case first.
* doc/as.texinfo: Use MIPS rather than @sc{mips} throughout.
Use "CPU" instead of "cpu".
* doc/c-mips.texi: Likewise.
(MIPS Opts): Rename to MIPS Options.
(MIPS option stack): Rename to MIPS Option Stack.
(MIPS ASE instruction generation overrides): Rename to
MIPS ASE Instruction Generation Overrides (for now).
(MIPS floating-point): Rename to MIPS Floating-Point.
This patch is the result of re-running the copyright.py script
in GDB, after we modified it to stop ignoring some files in
gdb/gnulib that should have been updated earlier this year.
gdb/ChangeLog:
* gdb/gnulib/Makefile.in: Update date in copyright header.
* gdb/gnulib/configure.ac: Ditto.
* gdb/gnulib/update-gnulib.sh: Ditto.
The script was excluding all of gdb/gnulib but this is no longer
correct, ever since we moved the imported files to gdb/gnulib/import.
As a result, a number of files (Makefile, etc, including this script
itself) did not have their copyright header updated. This fixes
the problem.
gdb/ChangeLog:
* copyright.py (EXCLUDE_LIST): Replace "gdb/gnulib" by
"gdb/gnulib/import".
Most modern systems have frexpl and gnulib provides an implementation
for those that don't, so use it instead of the generic but inaccurate
ldfrexp.
gdb/ChangeLog:
2013-06-21 Will Newton <will.newton@linaro.org>
* doublest.c (ldfrexp): Remove function.
(convert_doublest_to_floatformat): Call frexpl instead of
ldfrexp.
* dwarf2read.c (try_open_dwop_file): New arg search_cwd.
All callers updated.
(open_dwp_file): If we can't find the dwp file, search the basename
in debug-file-directory.
* config/tc-mips.c (ISA_SUPPORTS_SMARTMIPS, ISA_SUPPORTS_DSP_ASE)
(ISA_SUPPORTS_DSP64_ASE, ISA_SUPPORTS_DSPR2_ASE, ISA_SUPPORTS_EVA_ASE)
(ISA_SUPPORTS_MT_ASE, ISA_SUPPORTS_MCU_ASE, ISA_SUPPORTS_VIRT_ASE)
(ISA_SUPPORTS_VIRT64_ASE): Delete.
(mips_ase): New structure.
(mips_ases): New table.
(FP64_ASES): New macro.
(mips_ase_groups): New array.
(mips_isa_rev, mips_ase_mask, mips_check_isa_supports_ase)
(mips_check_isa_supports_ases, mips_set_ase, mips_lookup_ase): New
functions.
(is_opcode_valid): Use mips_ases to get the 64-bit ASE flags.
(md_parse_option): Use mips_ases and mips_set_ase instead of
separate case statements for each ASE option.
(mips_after_parse_args): Use FP64_ASES. Use
mips_check_isa_supports_ases to check the ASEs against
other options.
(s_mipsset): Use mips_ases and mips_set_ase instead of
separate if statements for each ASE option. Use
mips_check_isa_supports_ases, even when a non-ASE option
is specified.
gas/testsuite/
* gas/mips/ase-errors-1.s, gas/mips/ase-errors-1.l,
gas/mips/ase-errors-2.s, gas/mips/ase-errors-2.l,
gas/mips/ase-errors-3.s, gas/mips/ase-errors-3.l,
gas/mips/ase-errors-4.s, gas/mips/ase-errors-4.l: New tests.
* gas/mips/mips.exp: Run them.
This patch adds an option --skip-unavailable to MI command
-data-list-register-values, so that unavailable registers are not
displayed (on the context of traceframes).
The old -data-list-register-values command behaves like
-data-list-register-values x 0 8
^done,register-values=[{number="0",value="<unavailable>"},{number="8",value="0x80483de"}]
With this patch, an option --skip-unavailable is added,
-data-list-register-values --skip-unavailable x 0 8
^done,register-values=[{number="8",value="0x80483de"}]
gdb:
2013-06-20 Pedro Alves <pedro@codesourcery.com>
Yao Qi <yao@codesourcery.com>
* NEWS: Mention the new option '--skip-unavailable' of command
-data-list-register-values.
* mi/mi-main.c (mi_cmd_data_list_register_values): Accept the
--skip-unavailable option. Adjust to use output_register.
(output_register): Add new 'skip_unavailable' parameter.
Handle it.
gdb/doc:
2013-06-20 Pedro Alves <pedro@codesourcery.com>
* gdb.texinfo (GDB/MI Data Manipulation)
<-data-list-register-values>: Document the --skip-unavailable
option.
gdb/testsuite:
2013-06-20 Yao Qi <yao@codesourcery.com>
* gdb.trace/mi-trace-unavailable.exp: Set tracepoint on 'foo'
and set an action.
(test_trace_unavailable): Test command -data-list-register-values
in the context of traceframe and with option --skip-unavailable.
* gdb.trace/trace-unavailable.c (foo): New.
(main): Call it.
* gdb.mi/gdb2549.exp: Update matching pattern.
We've currently got 3 files doing open coded implementations of cpuid.
Each has its own set of workarounds and varying levels of how well
they're written and are generally hardcoded to specific cpuid functions.
If you try to build the latest gdb as a PIE on an i386 system, the build
will fail because one of them lacks PIC workarounds (wrt ebx).
Specifically, we have:
common/linux-btrace.c:
two copies of cpuid asm w/specific args, one has no workarounds
while the other implicitly does to avoid memcpy
go32-nat.c:
two copies of cpuid asm w/specific args, one has workarounds to
avoid memcpy
gdb/testsuite/gdb.arch/i386-cpuid.h:
one general cpuid asm w/many workarounds copied from older gcc
Fortunately, that last header there is pretty damn good -- it handles
lots of edge cases, the code is nice & tight (uses gcc asm operands
rather than manual movs), and is already almost a general library type
header. It's also the basis of what is now the public cpuid.h that is
shipped with gcc-4.3+.
So what I've done is pull that test header out and into gdb/common/
(not sure if there's a better place), synced to the version found in
gcc-4.8.0, put a wrapper API around it, and then cut over all the
existing call points to this new header.
Since the func already has support for "is cpuid supported on this proc",
it makes it trivial to push the i386/x86_64 ifdefs down into this wrapper
API too. Now it can be safely used for all targets and gcc will elide
the unused code for us.
I've verified the gdb.arch testsuite still passes, and this code compiles
for an armv7a host as well as x86_64. The go32-nat code has been left
ifdef-ed out until someone can test & verify the new stuff works (and if
it doesn't, figure out how to make the new code work).
URL: https://bugs.gentoo.org/467806
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
before using it.
(dw2_expand_symtabs_matching): Fix symbol kind validity check.
Move test of cu_index closer to use. Print complaint if cu_index
is bad.
We wrote a test case that tries every single 32bit opcode on the hardware
and compared it to the sim. There were a bunch of places in the sim where
we weren't strict enough (requiring certain parts of the opcode be set) so
we were treating a lot of invalid opcodes as valid ones. This sprinkles
out a lot additional checks in the dsp32alu class.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
