Commit Graph

92207 Commits

Author SHA1 Message Date
H.J. Lu 4a8f9fc2b2 i386: Don't add elf32_x86_64 to supported emulations
For 32-bit BFD, since elf64-x86-64.o isn't compiled in, "-m elf32_x86_64"
never worked.  Don't add elf32_x86_64 to supported emulations with 32-bit
BFD.

	* configure.tgt (i[3-7]86-*-linux-*): Move elf32_x86_64 from
	targ_extra_libpath to targ64_extra_libpath.
2017-10-23 14:44:04 -07:00
Igor Tsimbalist 2739ef6db8 Add missing ChangeLog entries 2017-10-23 13:10:05 -07:00
Nick Clifton 66cae56016 Make sure that undefined symbols added to the linker command line via the -u option appear in the output executable, if they have not been resolved.
PR 22319
bfd	* elflink.c (elf_link_output_extsym): Keep global undefined
	symbols if they have been marked as needed.

ld	* testsuite/ld-elf/pr22310.s: New test source file.
	* testsuite/ld-elf/pr22310.d: New test driver.
	* testsuite/ld-mmix/undef-3.d: Update expected output from readelf.
2017-10-23 18:16:49 +01:00
Igor Tsimbalist fe4e2a3c92 Fix the master due to bad regenerated files
* i386-init.h: Regenerate
	* i386-tbl.h: Likewise
2017-10-23 19:58:03 +03:00
Maciej W. Rozycki defc8e2b35 MIPS: Preset EF_MIPS_ABI2 with n32 ELF objects
Fix a bug in MIPS n32 ELF object file generation and make such objects
consistent with the n32 BFD requested, by presetting the EF_MIPS_ABI2
flag in the `e_flags' member of the newly created ELF file header, as it
is this flag that tells n32 objects apart from o32 objects.

This flag will then stay set through to output file generation for
writers such as GAS or GDB's `generate-core-file' command.  Readers will
overwrite the whole of `e_flags' along with the rest of the ELF file
header in `elf_swap_ehdr_in' and then verify in `mips_elf_n32_object_p'
that the flag is still set before accepting an input file as an n32
object.

The issue was discovered with GDB's `generate-core-file' command making
o32 core files out of n32 debuggees.

	bfd/
	* elfn32-mips.c (mips_elf_n32_mkobject): New prototype and
	function.
	(bfd_elf32_mkobject): Use `mips_elf_n32_mkobject' rather than
	`_bfd_mips_elf_mkobject'.

	gas/
	* config/tc-mips.c (mips_elf_final_processing): Don't set
	EF_MIPS_ABI2 in `e_flags'.
2017-10-23 15:39:46 +01:00
Igor Tsimbalist ee6872beb1 Enable Intel AVX512_BITALG instructions.
Intel has disclosed a set of new instructions. The spec is
https://software.intel.com/sites/default/files/managed/c5/15/architecture-instruction-set-extensions-programming-reference.pdf

gas/

	* config/tc-i386.c (cpu_arch): Add .avx512_bitalg.
	(cpu_noarch): noavx512_bitalg.
	* doc/c-i386.texi: Document .avx512_bitalg, noavx512_bitalg.
	* testsuite/gas/i386/i386.exp: Add AVX512_BITALG tests.
	* testsuite/gas/i386/avx512f_bitalg-intel.d: New test.
	* testsuite/gas/i386/avx512f_bitalg.d: Likewise.
	* testsuite/gas/i386/avx512f_bitalg.s: Likewise.
	* testsuite/gas/i386/avx512vl_bitalg-intel.d: Likewise.
	* testsuite/gas/i386/avx512vl_bitalg.d: Likewise.
	* testsuite/gas/i386/avx512vl_bitalg.s: Likewise.
	* testsuite/gas/i386/x86-64-avx512f_bitalg-intel.d: Likewise.
	* testsuite/gas/i386/x86-64-avx512f_bitalg.d: Likewise.
	* testsuite/gas/i386/x86-64-avx512f_bitalg.s: Likewise.
	* testsuite/gas/i386/x86-64-avx512vl_bitalg-intel.d: Likewise.
	* testsuite/gas/i386/x86-64-avx512vl_bitalg.d: Likewise.
	* testsuite/gas/i386/x86-64-avx512vl_bitalg.s: Likewise.

opcodes/

	* i386-dis.c (enum): Add PREFIX_EVEX_0F3854, PREFIX_EVEX_0F388F.
	(enum): Add EVEX_W_0F3854_P_2.
	* i386-dis-evex.h (evex_table): Updated.
	* i386-gen.c (cpu_flag_init): Add CPU_AVX512_BITALG,
	CPU_ANY_AVX512_BITALG_FLAGS. Update CPU_ANY_AVX512F_FLAGS.
	(cpu_flags): Add CpuAVX512_BITALG.
	* i386-opc.h (enum): Add CpuAVX512_BITALG.
	(i386_cpu_flags): Add cpuavx512_bitalg..
	* i386-opc.tbl: Add Intel AVX512_BITALG instructions.
	* i386-init.h: Regenerate.
	* i386-tbl.h: Likewise.
2017-10-23 15:58:18 +03:00
Igor Tsimbalist 8cfcb7659c Enable Intel AVX512_VNNI instructions.
Intel has disclosed a set of new instructions. The spec is
https://software.intel.com/sites/default/files/managed/c5/15/architecture-instruction-set-extensions-programming-reference.pdf

gas/

	* config/tc-i386.c (cpu_arch): Add .avx512_vnni.
	(cpu_noarch): Add noavx512_vnni.
	* doc/c-i386.texi: Document .avx512_vnni.
	* testsuite/gas/i386/i386.exp: Add AVX512_VNNI tests.
	* testsuite/gas/i386/avx512vnni-intel.d: New test.
	* testsuite/gas/i386/avx512vnni.d: Likewise.
	* testsuite/gas/i386/avx512vnni.s: Likewise.
	* testsuite/gas/i386/avx512vnni_vl-intel.d: Likewise.
	* testsuite/gas/i386/avx512vnni_vl.d: Likewise.
	* testsuite/gas/i386/avx512vnni_vl.s: Likewise.
	* testsuite/gas/i386/x86-64-avx512vnni-intel.d: Likewise.
	* testsuite/gas/i386/x86-64-avx512vnni.d: Likewise.
	* testsuite/gas/i386/x86-64-avx512vnni.s: Likewise.
	* testsuite/gas/i386/x86-64-avx512vnni_vl-intel.d: Likewise.
	* testsuite/gas/i386/x86-64-avx512vnni_vl.d: Likewise.
	* testsuite/gas/i386/x86-64-avx512vnni_vl.s: Likewise.

opcodes/

	* i386-dis.c (enum): Add PREFIX_EVEX_0F3850, PREFIX_EVEX_0F3851.
	* i386-dis-evex.h (evex_table): Updated.
	* i386-gen.c (cpu_flag_init): Add CPU_AVX512_VNNI,
	CPU_ANY_AVX512_VNNI_FLAGS. Update CPU_ANY_AVX512F_FLAGS.
	(cpu_flags): Add CpuAVX512_VNNI.
	* i386-opc.h (enum): Add CpuAVX512_VNNI.
	(i386_cpu_flags): Add cpuavx512_vnni.
	* i386-opc.tbl Add Intel AVX512_VNNI instructions.
	* i386-init.h: Regenerate.
	* i386-tbl.h: Likewise.
2017-10-23 15:58:18 +03:00
Igor Tsimbalist ff1982d53a Enable Intel VPCLMULQDQ instruction.
Intel has disclosed a set of new instructions. The spec is
https://software.intel.com/sites/default/files/managed/c5/15/architecture-instruction-set-extensions-programming-reference.pdf

gas/

	* config/tc-i386.c (cpu_arch): Add VPCLMULQDQ.
	* doc/c-i386.texi: Document VPCLMULQDQ.
	* testsuite/gas/i386/i386.exp: Run VPCLMULQDQ tests.
	* testsuite/gas/i386/avx512f_vpclmulqdq-intel.d: New test.
	* testsuite/gas/i386/avx512f_vpclmulqdq-wig.s: Ditto.
	* testsuite/gas/i386/avx512f_vpclmulqdq-wig1-intel.d: Ditto.
	* testsuite/gas/i386/avx512f_vpclmulqdq-wig1.d: Ditto.
	* testsuite/gas/i386/avx512f_vpclmulqdq.d: Ditto.
	* testsuite/gas/i386/avx512f_vpclmulqdq.s: Ditto.
	* testsuite/gas/i386/avx512vl_vpclmulqdq-intel.d: Ditto.
	* testsuite/gas/i386/avx512vl_vpclmulqdq-wig.s: Ditto.
	* testsuite/gas/i386/avx512vl_vpclmulqdq-wig1-intel.d: Ditto.
	* testsuite/gas/i386/avx512vl_vpclmulqdq-wig1.d: Ditto.
	* testsuite/gas/i386/avx512vl_vpclmulqdq.d: Ditto.
	* testsuite/gas/i386/avx512vl_vpclmulqdq.s: Ditto.
	* testsuite/gas/i386/vpclmulqdq-intel.d: Ditto.
	* testsuite/gas/i386/vpclmulqdq.d: Ditto.
	* testsuite/gas/i386/vpclmulqdq.s: Ditto.
	* testsuite/gas/i386/x86-64-avx512f_vpclmulqdq-intel.d: Ditto.
	* testsuite/gas/i386/x86-64-avx512f_vpclmulqdq-wig.s: Ditto.
	* testsuite/gas/i386/x86-64-avx512f_vpclmulqdq-wig1-intel.d: Ditto.
	* testsuite/gas/i386/x86-64-avx512f_vpclmulqdq-wig1.d: Ditto.
	* testsuite/gas/i386/x86-64-avx512f_vpclmulqdq.d: Ditto.
	* testsuite/gas/i386/x86-64-avx512f_vpclmulqdq.s: Ditto.
	* testsuite/gas/i386/x86-64-avx512vl_vpclmulqdq-intel.d: Ditto.
	* testsuite/gas/i386/x86-64-avx512vl_vpclmulqdq-wig.s: Ditto.
	* testsuite/gas/i386/x86-64-avx512vl_vpclmulqdq-wig1-intel.d: Ditto.
	* testsuite/gas/i386/x86-64-avx512vl_vpclmulqdq-wig1.d: Ditto.
	* testsuite/gas/i386/x86-64-avx512vl_vpclmulqdq.d: Ditto.
	* testsuite/gas/i386/x86-64-avx512vl_vpclmulqdq.s: Ditto.
	* testsuite/gas/i386/x86-64-vpclmulqdq-intel.d: Ditto.
	* testsuite/gas/i386/x86-64-vpclmulqdq.d: Ditto.
	* testsuite/gas/i386/x86-64-vpclmulqdq.s: Ditto.

opcodes/

	* i386-dis.c (enum): Add PREFIX_EVEX_0F3A44.
	(enum): Remove VEX_LEN_0F3A44_P_2.
	(vex_len_table): Ditto.
	(enum): Remove VEX_W_0F3A44_P_2.
	(vew_w_table): Ditto.
	(prefix_table): Adjust instructions (see prefixes above).
	* i386-dis-evex.h (evex_table):
	Add new instructions (see prefixes above).
	* i386-gen.c (cpu_flag_init): Add VPCLMULQDQ.
	(bitfield_cpu_flags): Ditto.
	* i386-opc.h (enum): Ditto.
	(i386_cpu_flags): Ditto.
	(CpuUnused): Comment out to avoid zero-width field problem.
	* i386-opc.tbl (vpclmulqdq): New instruction.
	* i386-init.h: Regenerate.
	* i386-tbl.h: Ditto.
2017-10-23 15:58:18 +03:00
Igor Tsimbalist 8dcf1fadf2 Enable Intel VAES instructions.
Intel has disclosed a set of new instructions. The spec is
https://software.intel.com/sites/default/files/managed/c5/15/architecture-instruction-set-extensions-programming-reference.pdf

gas/

	* config/tc-i386.c (cpu_arch): Add VAES.
	* doc/c-i386.texi: Document VAES.
	* testsuite/gas/i386/i386.exp: Run VAES tests.
	* testsuite/gas/i386/avx512f_vaes-intel.d: New test.
	* testsuite/gas/i386/avx512f_vaes-wig.s: Ditto.
	* testsuite/gas/i386/avx512f_vaes-wig1-intel.d: Ditto.
	* testsuite/gas/i386/avx512f_vaes-wig1.d: Ditto.
	* testsuite/gas/i386/avx512f_vaes.d: Ditto.
	* testsuite/gas/i386/avx512f_vaes.s: Ditto.
	* testsuite/gas/i386/avx512vl_vaes-intel.d: Ditto.
	* testsuite/gas/i386/avx512vl_vaes-wig.s: Ditto.
	* testsuite/gas/i386/avx512vl_vaes-wig1-intel.d: Ditto.
	* testsuite/gas/i386/avx512vl_vaes-wig1.d: Ditto.
	* testsuite/gas/i386/avx512vl_vaes.d: Ditto.
	* testsuite/gas/i386/avx512vl_vaes.s: Ditto.
	* testsuite/gas/i386/vaes-intel.d: Ditto.
	* testsuite/gas/i386/vaes.d: Ditto.
	* testsuite/gas/i386/vaes.s: Ditto.
	* testsuite/gas/i386/x86-64-avx512f_vaes-intel.d: Ditto.
	* testsuite/gas/i386/x86-64-avx512f_vaes-wig.s: Ditto.
	* testsuite/gas/i386/x86-64-avx512f_vaes-wig1-intel.d: Ditto.
	* testsuite/gas/i386/x86-64-avx512f_vaes-wig1.d: Ditto.
	* testsuite/gas/i386/x86-64-avx512f_vaes.d: Ditto.
	* testsuite/gas/i386/x86-64-avx512f_vaes.s: Ditto.
	* testsuite/gas/i386/x86-64-avx512vl_vaes-intel.d: Ditto.
	* testsuite/gas/i386/x86-64-avx512vl_vaes-wig.s: Ditto.
	* testsuite/gas/i386/x86-64-avx512vl_vaes-wig1-intel.d: Ditto.
	* testsuite/gas/i386/x86-64-avx512vl_vaes-wig1.d: Ditto.
	* testsuite/gas/i386/x86-64-avx512vl_vaes.d: Ditto.
	* testsuite/gas/i386/x86-64-avx512vl_vaes.s: Ditto.
	* testsuite/gas/i386/x86-64-vaes-intel.d: Ditto.
	* testsuite/gas/i386/x86-64-vaes.d: Ditto.
	* testsuite/gas/i386/x86-64-vaes.s: Ditto.

opcodes/

	* i386-dis.c (enum): Add PREFIX_EVEX_0F38DC, PREFIX_EVEX_0F38DD,
	PREFIX_EVEX_0F38DE, PREFIX_EVEX_0F38DF.
	(enum): Remove VEX_LEN_0F38DC_P_2, VEX_LEN_0F38DD_P_2,
	VEX_LEN_0F38DE_P_2, VEX_LEN_0F38DF_P_2.
	(vex_len_table): Ditto.
	(enum): Remove VEX_W_0F38DC_P_2, VEX_W_0F38DD_P_2,
	VEX_W_0F38DE_P_2, VEX_W_0F38DF_P_2.
	(vew_w_table): Ditto.
	(prefix_table): Adjust instructions (see prefixes above).
	* i386-dis-evex.h (evex_table):
	Add new instructions (see prefixes above).
	* i386-gen.c (cpu_flag_init): Add VAES.
	(bitfield_cpu_flags): Ditto.
	* i386-opc.h (enum): Ditto.
	(i386_cpu_flags): Ditto.
	* i386-opc.tbl (vaes{enc,dec}{last,}): New instructions.
	* i386-init.h: Regenerate.
	* i386-tbl.h: Ditto.
2017-10-23 15:58:18 +03:00
Igor Tsimbalist 48521003d5 Enable Intel GFNI instructions.
Intel has disclosed a set of new instructions. The spec is
https://software.intel.com/sites/default/files/managed/c5/15/architecture-instruction-set-extensions-programming-reference.pdf

gas/

	* config/tc-i386.c (cpu_arch): Add .gfni.
	* doc/c-i386.texi: Document .gfni.
	* testsuite/gas/i386/i386.exp: Add GFNI tests.
	* testsuite/gas/i386/avx.s: New GFNI test.
	* testsuite/gas/i386/x86-64-avx.s: Likewise.
	* testsuite/gas/i386/avx.d: Adjust.
	* testsuite/gas/i386/avx-intel.d: Likewise
	* testsuite/gas/i386/ilp32/x86-64-avx-intel.d: Likewise.
	* testsuite/gas/i386/ilp32/x86-64-avx.d: Likewise.
	* testsuite/gas/i386/avx512f_gfni-intel.d: New test.
	* testsuite/gas/i386/avx512f_gfni.d: Likewise.
	* testsuite/gas/i386/avx512f_gfni.s: Likewise.
	* testsuite/gas/i386/avx512vl_gfni-intel.d: Likewise.
	* testsuite/gas/i386/avx512vl_gfni.d: Likewise.
	* testsuite/gas/i386/avx512vl_gfni.s: Likewise.
	* testsuite/gas/i386/gfni-intel.d: Likewise.
	* testsuite/gas/i386/gfni.d: Likewise.
	* testsuite/gas/i386/gfni.s: Likewise.
	* testsuite/gas/i386/x86-64-avx512f_gfni-intel.d: Likewise.
	* testsuite/gas/i386/x86-64-avx512f_gfni.d: Likewise.
	* testsuite/gas/i386/x86-64-avx512f_gfni.s: Likewise.
	* testsuite/gas/i386/x86-64-avx512vl_gfni-intel.d: Likewise.
	* testsuite/gas/i386/x86-64-avx512vl_gfni.d: Likewise.
	* testsuite/gas/i386/x86-64-avx512vl_gfni.s: Likewise.
	* testsuite/gas/i386/x86-64-avx_gfni-intel.d: Likewise.
	* testsuite/gas/i386/x86-64-avx_gfni.d: Likewise.
	* testsuite/gas/i386/x86-64-avx_gfni.s: Likewise.
	* testsuite/gas/i386/x86-64-gfni-intel.d: Likewise.
	* testsuite/gas/i386/x86-64-gfni.d: Likewise.
	* testsuite/gas/i386/x86-64-gfni.s: Likewise.

opcodes/

	* i386-dis.c (enum): Add PREFIX_0F38CF, PREFIX_0F3ACE, PREFIX_0F3ACF,
	PREFIX_VEX_0F38CF, PREFIX_VEX_0F3ACE, PREFIX_VEX_0F3ACF,
	PREFIX_EVEX_0F38CF, PREFIX_EVEX_0F3ACE, PREFIX_EVEX_0F3ACF.
	(enum): Add VEX_W_0F38CF_P_2, VEX_W_0F3ACE_P_2, VEX_W_0F3ACF_P_2,
	EVEX_W_0F3ACE_P_2, EVEX_W_0F3ACF_P_2.
	(prefix_table): Updated (see prefixes above).
	(three_byte_table): Likewise.
	(vex_w_table): Likewise.
	* i386-dis-evex.h: Likewise.
	* i386-gen.c (cpu_flag_init): Add CPU_GFNI_FLAGS, CpuGFNI.
	(cpu_flags): Add CpuGFNI.
	* i386-opc.h (enum): Add CpuGFNI.
	(i386_cpu_flags): Add cpugfni.
	* i386-opc.tbl: Add Intel GFNI instructions.
	* i386-init.h: Regenerate.
	* i386-tbl.h: Likewise.
2017-10-23 15:58:13 +03:00
Igor Tsimbalist 53467f5707 Enable Intel AVX512_VBMI2 instructions.
Intel has disclosed a set of new instructions. The spec is
https://software.intel.com/sites/default/files/managed/c5/15/architecture-instruction-set-extensions-programming-reference.pdf

gas/

	* config/tc-i386.c (cpu_arch): Add .avx512_vbmi2.
	(cpu_noarch): noavx512_vbmi2.
	* doc/c-i386.texi: Document .avx512_vbmi2, noavx512_vbmi2.
	* testsuite/gas/i386/i386.exp: Add AVX512_VBMI2 tests.
	* testsuite/gas/i386/avx512vbmi2-intel.d: New test.
	* testsuite/gas/i386/avx512vbmi2.d: Likewise.
	* testsuite/gas/i386/avx512vbmi2.s: Likewise.
	* testsuite/gas/i386/avx512vbmi2_vl-intel.d: Likewise.
	* testsuite/gas/i386/avx512vbmi2_vl.d: Likewise.
	* testsuite/gas/i386/avx512vbmi2_vl.s: Likewise.
	* testsuite/gas/i386/x86-64-avx512vbmi2-intel.d: Likewise.
	* testsuite/gas/i386/x86-64-avx512vbmi2.d: Likewise.
	* testsuite/gas/i386/x86-64-avx512vbmi2.s: Likewise.
	* testsuite/gas/i386/x86-64-avx512vbmi2_vl-intel.d: Likewise.
	* testsuite/gas/i386/x86-64-avx512vbmi2_vl.d: Likewise.
	* testsuite/gas/i386/x86-64-avx512vbmi2_vl.s: Likewise.

opcodes/

	* i386-dis.c (enum): Add b_scalar_mode, w_scalar_mode.
	Define EXbScalar and EXwScalar for OP_EX.
	(enum): Add PREFIX_EVEX_0F3862, PREFIX_EVEX_0F3863,
	PREFIX_EVEX_0F3870, PREFIX_EVEX_0F3871, PREFIX_EVEX_0F3872,
	PREFIX_EVEX_0F3873, PREFIX_EVEX_0F3A70, PREFIX_EVEX_0F3A71,
	PREFIX_EVEX_0F3A72, PREFIX_EVEX_0F3A73.
	(enum): Add EVEX_W_0F3862_P_2, EVEX_W_0F3863_P_2,
	EVEX_W_0F3870_P_2, EVEX_W_0F3871_P_2, EVEX_W_0F3872_P_2,
	EVEX_W_0F3873_P_2, EVEX_W_0F3A70_P_2, EVEX_W_0F3A71_P_2,
	EVEX_W_0F3A72_P_2, EVEX_W_0F3A73_P_2.
	(intel_operand_size): Handle b_scalar_mode and w_scalar_mode.
	(OP_E_memory): Likewise.
	* i386-dis-evex.h: Updated.
	* i386-gen.c (cpu_flag_init): Add CPU_AVX512_VBMI2,
	CPU_ANY_AVX512_VBMI2_FLAGS. Update CPU_ANY_AVX512F_FLAGS.
	(cpu_flags): Add CpuAVX512_VBMI2.
	* i386-opc.h (enum): Add CpuAVX512_VBMI2.
	(i386_cpu_flags): Add cpuavx512_vbmi2.
	* i386-opc.tbl: Add Intel AVX512_VBMI2 instructions.
	* i386-init.h: Regenerate.
	* i386-tbl.h: Likewise.
2017-10-23 15:58:07 +03:00
GDB Administrator f6af9f3428 Automatic date update in version.in 2017-10-23 00:00:26 +00:00
Hans-Peter Nilsson 67c04379ac Fix spurious left-over quotes from last edit.
With a 32-bit bfd (default on an ILP32 system) the previous markings
on tests *were* correct.  There, the results have been consistent
since they were added.  The tests would appear to "spuriously" xpass
"only" on LP64 hosts, which were not the norm in 2000.  (But, now CRIS
requires a 64-bit BFD.)
2017-10-22 13:32:44 +02:00
Hans-Peter Nilsson 56fbd04185 Fix gas/22304 by forcing a 64-bit bfd for cris*-*.
PR gas/22304
	* config.bfd (cris-*-* | crisv32-*-*): Require a 64-bit BFD.
2017-10-22 13:05:07 +02:00
GDB Administrator a73ca55259 Automatic date update in version.in 2017-10-22 00:00:28 +00:00
Hans-Peter Nilsson 4e15b78be4 PR ld/21233
* testsuite/ld-elf/shared.exp: Remove kfails.

The test-cases started passing with 5c3261b0e8,
"ELF: Call check_relocs after opening all inputs".

The lists could now be re-concatenated (see other run_ld_link_tests
calls in shared.exp), but are for now left separate to simplify future
kfail/xfailing.
2017-10-21 19:46:22 +02:00
Simon Marchi 4d3bb80e5d Add overloads of for_each_thread/find_thread that filter on pid
It happens often that we want to iterate or find threads restricted to a
given pid.  I think it's worth having an overload to help with this.
Right now there is a single user of each of the find_thread and
for_each_thread overload, but as we replace the usages of find_inferior
with for_each_thread/find_thread, more usages will pop up.

gdb/gdbserver/ChangeLog:

	* gdbthread.h (find_thread, for_each_thread): New functions.
	* inferiors.c (thread_of_pid): Remove.
	(find_any_thread_of_pid): Use find_thread.
	* linux-low.c (num_lwps): Use for_each_thread.
2017-10-21 12:20:21 -04:00
Simon Marchi a664f67e50 Get rid of VEC (mem_region)
This patch removes VEC (mem_region).  Doing so requires touching a lot
of little things here and there.

The fields in mem_attrib are now initialized during construction.  The
values match those that were in default_mem_attrib (now removed).
unknown_mem_attrib is also removed, and replaced with a static method
(mem_attrib::unknown) that returns the equivalent.

mem_region is initialized in a way similar to mem_region_init (now
removed) did.

I found the organization of mem_region_list and target_mem_region_list a
bit confusing.  Sometimes mem_region_list points to the same vector as
target_mem_region_list (and therefore does not own it), and sometimes
(when the user manually edits the mem regions) points to another vector,
and in this case owns it.  To avoid this ambiguity, I think it is
simpler to have two vectors, one for target-defined regions and one for
user-defined regions, and have mem_region_list point to one or the
other.  There are now no vector objects dynamically allocated, both are
static.

The make-target-delegates script does not generate valid code when a
target method returns a type with a parameter list.  For this reason, I
created a typedef (mem_region_vector) that's only used in the target_ops
structure.  If you speak perl, you are welcome to improve the script!

Regtested on the buildbot.

gdb/ChangeLog:

	* memattr.h: Don't include vec.h.
	(struct mem_attrib): Initialize fields.
	<unknown>: New static method.
	(struct mem_region): Add constructors, operator<, initialize
	fields.
	* memattr.c: Include algorithm.
	(default_mem_attrib, unknown_mem_attrib): Remove.
	(user_mem_region_list): New global.
	(target_mem_region_list, mem_region_list): Change type to
	std::vector<mem_region>.
	(mem_use_target): Now a function.
	(target_mem_regions_valid): Change type to bool.
	(mem_region_lessthan, mem_region_cmp, mem_region_init): Remove.
	(require_user_regions): Adjust.
	(require_target_regions): Adjust.
	(create_mem_region): Adjust.
	(lookup_mem_region): Adjust.
	(invalidate_target_mem_regions): Adjust.
	(mem_clear): Rename to...
	(user_mem_clear): ... this, and adjust.
	(mem_command): Adjust.
	(info_mem_command): Adjust.
	(mem_enable, enable_mem_command, mem_disable,
	disable_mem_command): Adjust.
	(mem_delete): Adjust.
	(delete_mem_command): Adjust.
	* memory-map.h (parse_memory_map): Return an std::vector.
	* memory-map.c (parse_memory_map): Likewise.
	(struct memory_map_parsing_data): Add constructor.
	<memory_map>: Point to std::vector.
	(memory_map_start_memory): Adjust.
	(memory_map_end_memory): Adjust.
	(memory_map_end_property): Adjust.
	(clear_result): Remove.
	* remote.c (remote_memory_map): Return an std::vector.
	* target-debug.h (target_debug_print_VEC_mem_region_s__p):
	Remove.
	(target_debug_print_mem_region_vector): New.
	* target-delegates.c: Regenerate.
	* target.h (mem_region_vector): New typedef.
	(to_memory_map): Return mem_region_vector.
	(target_memory_map): Return an std::vector.
	* target.c (target_memory_map): Return an std::vector.
	(flash_erase_command): Adjust.
2017-10-21 12:15:42 -04:00
Simon Marchi 6e17c56511 Use std::string in memory_map_parsing_data
Replace the fixed-size array with a string.

gdb/ChangeLog:

	* memory-map.c (struct memory_map_parsing_data) <property_name>:
	Change type to std::string.
	(memory_map_start_property): Adjust.
	(memory_map_end_property): Adjust.
2017-10-21 12:06:22 -04:00
Simon Marchi cfba98720f Create a displaced_step_closure class hierarchy
displaced_step_closure is a type defined in multiple -tdep.c files.
Trying to xfree it from the common code (infrun.c) is a problem when we
try to poison xfree for non-POD types.  Because there can be multiple of
these types in the same build, this patch makes a hierarchy of classes
with a virtual destructor.  When the common code deletes the object
through a displaced_step_closure pointer, it will invoke the right
destructor.

The amd64 used a last-member array with a variable size.  That doesn't
work with new, so I changed it for an std::vector.  Other architectures
which used a simple byte buffer as a closure now use a shared
buf_displaced_step_closure, a closure type that only contains a
gdb::byte_vector.

Reg-tested on the buildbot.

gdb/ChangeLog:

	* infrun.h: Include common/byte-vector.h.
	(struct displaced_step_closure): New struct.
	(struct buf_displaced_step_closure): New struct.
	* infrun.c (displaced_step_closure::~displaced_step_closure):
	Provide default implementation.
	(displaced_step_clear): Deallocate step closure with delete.
	* aarch64-tdep.c (displaced_step_closure): Rename to ...
	(aarch64_displaced_step_closure): ... this, extend
	displaced_step_closure.
	(aarch64_displaced_step_data) <dsc>: Change type to
	aarch64_displaced_step_closure.
	(aarch64_displaced_step_copy_insn): Adjust to type change, use
	unique_ptr.
	(aarch64_displaced_step_fixup): Add cast for displaced step
	closure.
	* amd64-tdep.c (displaced_step_closure): Rename to ...
	(amd64_displaced_step_closure): ... this, extend
	displaced_step_closure.
	<insn_buf>: Change type to std::vector<gdb_byte>.
	<max_len>: Remove.
	(fixup_riprel): Change type of DSC parameter, adjust to type
	change of insn_buf.
	(fixup_displaced_copy): Change type of DSC parameter.
	(amd64_displaced_step_copy_insn): Instantiate
	amd64_displaced_step_closure.
	(amd64_displaced_step_fixup): Add cast for closure type, adjust
	to type change of insn_buf.
	* arm-linux-tdep.c (arm_linux_cleanup_svc): Change type of
	parameter DSC.
	(arm_linux_copy_svc): Likewise.
	(cleanup_kernel_helper_return): Likewise.
	(arm_catch_kernel_helper_return): Likewise.
	(arm_linux_displaced_step_copy_insn): Instantiate
	arm_displaced_step_closure.
	* arm-tdep.c (arm_pc_is_thumb): Add cast for closure.
	(displaced_read_reg): Change type of parameter DSC.
	(branch_write_pc): Likewise.
	(load_write_pc): Likewise.
	(alu_write_pc): Likewise.
	(displaced_write_reg): Likewise.
	(arm_copy_unmodified): Likewise.
	(thumb_copy_unmodified_32bit): Likewise.
	(thumb_copy_unmodified_16bit): Likewise.
	(cleanup_preload): Likewise.
	(install_preload): Likewise.
	(arm_copy_preload): Likewise.
	(thumb2_copy_preload): Likewise.
	(install_preload_reg): Likewise.
	(arm_copy_preload_reg): Likewise.
	(cleanup_copro_load_store): Likewise.
	(install_copro_load_store): Likewise.
	(arm_copy_copro_load_store) Likewise.
	(thumb2_copy_copro_load_store): Likewise.
	(cleanup_branch): Likewise.
	(install_b_bl_blx): Likewise.
	(arm_copy_b_bl_blx): Likewise.
	(thumb2_copy_b_bl_blx): Likewise.
	(thumb_copy_b): Likewise.
	(install_bx_blx_reg): Likewise.
	(arm_copy_bx_blx_reg): Likewise.
	(thumb_copy_bx_blx_reg): Likewise.
	(cleanup_alu_imm): Likewise.
	(arm_copy_alu_imm): Likewise.
	(thumb2_copy_alu_imm): Likewise.
	(cleanup_alu_reg): Likewise.
	(install_alu_reg): Likewise.
	(arm_copy_alu_reg): Likewise.
	(thumb_copy_alu_reg): Likewise.
	(cleanup_alu_shifted_reg): Likewise.
	(install_alu_shifted_reg): Likewise.
	(arm_copy_alu_shifted_reg): Likewise.
	(cleanup_load): Likewise.
	(cleanup_store): Likewise.
	(arm_copy_extra_ld_st): Likewise.
	(install_load_store): Likewise.
	(thumb2_copy_load_literal): Likewise.
	(thumb2_copy_load_reg_imm): Likewise.
	(arm_copy_ldr_str_ldrb_strb): Likewise.
	(cleanup_block_load_all): Likewise.
	(cleanup_block_store_pc): Likewise.
	(cleanup_block_load_pc): Likewise.
	(arm_copy_block_xfer): Likewise.
	(thumb2_copy_block_xfer): Likewise.
	(cleanup_svc): Likewise.
	(install_svc): Likewise.
	(arm_copy_svc): Likewise.
	(thumb_copy_svc): Likewise.
	(arm_copy_undef): Likewise.
	(thumb_32bit_copy_undef): Likewise.
	(arm_copy_unpred): Likewise.
	(arm_decode_misc_memhint_neon): Likewise.
	(arm_decode_unconditional): Likewise.
	(arm_decode_miscellaneous): Likewise.
	(arm_decode_dp_misc): Likewise.
	(arm_decode_ld_st_word_ubyte): Likewise.
	(arm_decode_media): Likewise.
	(arm_decode_b_bl_ldmstm): Likewise.
	(arm_decode_ext_reg_ld_st): Likewise.
	(thumb2_decode_dp_shift_reg): Likewise.
	(thumb2_decode_ext_reg_ld_st): Likewise.
	(arm_decode_svc_copro): Likewise.
	(thumb2_decode_svc_copro): Likewise.
	(install_pc_relative): Likewise.
	(thumb_copy_pc_relative_16bit): Likewise.
	(thumb_decode_pc_relative_16bit): Likewise.
	(thumb_copy_pc_relative_32bit): Likewise.
	(thumb_copy_16bit_ldr_literal): Likewise.
	(thumb_copy_cbnz_cbz): Likewise.
	(thumb2_copy_table_branch): Likewise.
	(cleanup_pop_pc_16bit_all): Likewise.
	(thumb_copy_pop_pc_16bit): Likewise.
	(thumb_process_displaced_16bit_insn): Likewise.
	(decode_thumb_32bit_ld_mem_hints): Likewise.
	(thumb_process_displaced_32bit_insn): Likewise.
	(thumb_process_displaced_insn): Likewise.
	(arm_process_displaced_insn): Likewise.
	(arm_displaced_init_closure): Likewise.
	(arm_displaced_step_fixup): Add cast for closure.
	* arm-tdep.h: Include infrun.h.
	(displaced_step_closure): Rename to ...
	(arm_displaced_step_closure): ... this, extend
	displaced_step_closure.
	<u::svc::copy_svc_os>: Change type of parameter DSC.
	<cleanup>: Likewise.
	(arm_process_displaced_insn): Likewise.
	(arm_displaced_init_closure): Likewise.
	(displaced_read_reg): Likewise.
	(displaced_write_reg): Likewise.
	* i386-linux-tdep.c (i386_linux_displaced_step_copy_insn):
	Adjust.
	* i386-tdep.h: Include infrun.h.
	(i386_displaced_step_closure): New typedef.
	* i386-tdep.c (i386_displaced_step_copy_insn): Use
	i386_displaced_step_closure.
	(i386_displaced_step_fixup): Adjust.
	* rs6000-tdep.c (ppc_displaced_step_closure): New typedef.
	(ppc_displaced_step_copy_insn): Use ppc_displaced_step_closure
	and unique_ptr.
	(ppc_displaced_step_fixup): Adjust.
	* s390-linux-tdep.c (s390_displaced_step_closure): New typedef.
	(s390_displaced_step_copy_insn): Use s390_displaced_step_closure
	and unique_ptr.
	(s390_displaced_step_fixup): Adjust.
2017-10-21 11:27:52 -04:00
Simon Marchi b392b304b9 Remove leftover declarations in interps.h
The corresponding definitions have already been removed.

gdb/ChangeLog:

	* interps.h (interp_resume, interp_suspend, interp_set_temp):
	Remove declarations.
2017-10-21 10:15:48 -04:00
GDB Administrator 881b33774d Automatic date update in version.in 2017-10-21 00:00:31 +00:00
Sriraman Tallam d63613596f Fix ChangeLog entry. 2017-10-20 11:21:45 -07:00
Sriraman Tallam 3b4190ccb3 New gold linker option -z,text-unlikely-segment.
2017-10-04  Sriraman Tallam  <tmsriram@google.com>

	* options.h (-z,text_unlikely_segment): New option.
	* layout.cc (Layout::layout): Create new output section
	for .text.unlikely sections with the new option.
	(Layout::segment_precedes): Check for the new option
	when segment flags match.
	* testsuite/text_unlikely_segment.cc: New test source.
	* testsuite/text_unlikely_segment.sh: New test script.
	* testsuite/Makefile.am (text_unlikely_segment): New test.
	* testsuite/Makefile.in: Regenerate.
2017-10-20 11:00:28 -07:00
H.J. Lu f3012016f0 Add a compile-time test for PR ld/22269
This compile-time test requires a target C compiler to run.  It fails
on many targets where ELF backend linkers fail to check undefined weak
symbol in static PIE via UNDEFWEAK_NO_DYNAMIC_RELOC.

	PR ld/22269
	* testsuite/ld-elf/pr22269-1.rd: New file.
	* testsuite/ld-elf/pr22269-1.c: Likewise.
	* testsuite/ld-elf/shared.exp: Run pr22269-1.
2017-10-20 09:47:08 -07:00
Tom Tromey d5833c62d9 Use std::vector in gdb_bfd_data
This changes gdb_bfd_data to use std::vector rather than VEC.

ChangeLog
2017-10-20  Tom Tromey  <tom@tromey.com>

	* gdb_bfd.c (struct gdb_bfd_data) <included_bfds>: Now a
	std::vector.
	(gdb_bfd_record_inclusion): Update.
	(bfdp): Remove typedef.
2017-10-20 09:01:04 -06:00
Tom Tromey 06d5bbc8e5 Use "new" to allocate gdb_bfd_data
This changes gdb_bfd_data to be allocated with new and destroyed with
delete.

ChangeLog
2017-10-20  Tom Tromey  <tom@tromey.com>

	* gdb_bfd.c (gdb_bfd_ref): Use new.
	(struct gdb_bfd_data): Add constructor, destructor, and member
	initializers.
	(gdb_bfd_unref): Use delete.
2017-10-20 09:01:03 -06:00
Tom Tromey 2712ce2e65 Introduce new_bfd_ref
This introduces a helper function, new_bfd_ref, that calls gdb_bfd_ref
and returns a gdb_bfd_ref_ptr.  Then it updates several places to use
this.

ChangeLog
2017-10-20  Tom Tromey  <tom@tromey.com>

	* exec.c (exec_file_attach): Use new_bfd_ref.
	* symfile-mem.c (symbol_file_add_from_memory): Use new_bfd_ref.
	* gdb_bfd.c (gdb_bfd_open, gdb_bfd_fopen, gdb_bfd_openr)
	(gdb_bfd_openw, gdb_bfd_openr_iovec, gdb_bfd_fdopenr): Use
	new_bfd_ref.
	* gdb_bfd.h (new_bfd_ref): New function.
2017-10-20 09:01:03 -06:00
Pedro Alves 15763a09d4 Fix 'gdb.base/quit.exp hangs forever' if the test fails
The [wait -i $gdb_spawn_id] in the test is dangerous in the sense that
it won't be subject to timeout logic.  So if GDB fails quiting, this
testcase hangs forever, hanging the test run with it.  See:
  https://sourceware.org/ml/gdb-patches/2016-10/msg00728.html

Instead of 'wait'ing directly, use gdb_test_multiple and expect 'eof'.

Tested that the testcase no longer hangs by hacking the test to send
"info threads" instead of "quit".

Tested with
  --target_board={unix, native-gdbserver,native-extended-gdbserver}
and tested with
  --host_board=local-remote-host
as well.

gdb/testsuite/ChangeLog:
2017-10-20  Pedro Alves  <palves@redhat.com>

	* gdb.base/quit.exp: Use gdb_test_multiple and expect 'eof' before
	'wait -i'.  Use gdb_assert and remote_close.
2017-10-20 15:33:57 +01:00
Pedro Alves fcc8fb2f3d Fix gdb.gdb/ selftest tests when testing optimized GDB builds
After commit bf46927112 ("Eliminate catch_errors"), GCC started
inlining captured_command_loop in captured_main.  And setting a
breakpoint on captured_command_loop makes the inferior GDB stop in
captured_main, _after_ captured_command_loop's call to
interp_pre_command_loop, which prints the inferior GDB's prompt, has
already executed, confusing the gdb.gdb/ selftest tests:

  (gdb) FAIL: gdb.gdb/complaints.exp: run until breakpoint at captured_command_loop
  WARNING: Couldn't test self

Debugging GDB with GDB manually, we see:

  (top-gdb) b captured_command_loop
  Breakpoint 1 at 0x71ee60: file src/gdb/main.c, line 324.
  (top-gdb) r
  [....]
  (gdb)                  <<<<<< PROMPT HERE
  Thread 1 "gdb" hit Breakpoint 1, captured_main (data=<optimized out>) at src/gdb/main.c:1147
  1147              captured_command_loop ();
  (top-gdb)

Note the stop at 'captured_main', and the "PROMPT HERE" line.  That
prompt does not show up when debugging a non-optimized build of GDB.

Fix this by preventing inlining of captured_command_loop.

Ref: https://sourceware.org/ml/gdb-patches/2017-10/msg00522.html

gdb/ChangeLog:
2017-10-20  Pedro Alves  <palves@redhat.com>

	* main.c (captured_command_loop): Add attribute noinline.
2017-10-20 14:47:24 +01:00
Nick Clifton 808811a369 Improve handling of REPT pseudo op with a negative count.
PR 22324
	* read.c (s_rept): Use size_t type for count parameter.
	(do_repeat): Change type of count parameter to size_t.
	Issue an error is the count parameter is negative.
	(do_repeat_with_expression): Likewise.
	* read.h: Update prototypes for do_repeat and
	do_repeat_with_expression.
	* doc/as.texinfo (Rept): Document that a zero count is allowed but
	negative counts are not.
	* config/tc-rx.c (rx_rept): Use size_t type for count parameter.
	* config/tc-tic54x.c (tic54x_loop): Cast count parameter to size_t
	type.
	* testsuite/gas/macros/end.s: Add a test using a negative repeat
	count.
	* testsuite/gas/macros/end.l: Add expected error message.
2017-10-20 11:45:19 +01:00
Umesh Kalappa 36862fc052 Implement BE8 support for ARM.
gold/
	* arm.cc (Stub::do_fixed_endian_write):Far call stubs support for arm
	in the be8 mode.
	* testsuite/Makefile.am: New test cases.
	* testsuite/Makefile.in: Regenerate.
	* testsuite/arm_farcall_arm_arm_be8.sh: New script for arm to arm far
	call stubs.
	* testsuite/arm_farcall_thumb_thumb_be8.sh: New script for thumb to
	thumb far call stubs.
2017-10-19 20:53:14 -07:00
Simon Marchi 4c2287b0bd Get rid of VEC(interp_factory_p)
Replace it with an std::vector.

gdb/ChangeLog:

	* interps.c (struct interp_factory): Add constructor.
	(interp_factory_p): Remove typedef.
	(DEF_VEC_P(interp_factory_p)): Remove.
	(interpreter_factories): Change type to std::vector.
	(interp_factory_register): Adjust.
	(interp_lookup): Adjust.
	(interpreter_completer): Adjust.
2017-10-19 22:07:15 -04:00
GDB Administrator b5f6e74092 Automatic date update in version.in 2017-10-20 00:00:28 +00:00
Tom Tromey 3d415c26ba Remove cleanups from break-catch-syscall.c
This removes the remaining cleanups from break-catch-syscall.c by
storing temporary strings in a vector.

ChangeLog
2017-10-19  Tom Tromey  <tom@tromey.com>

	* break-catch-syscall.c (catch_syscall_completer): Use
	std::string, gdb::unique_xmalloc_ptr.
2017-10-19 15:58:43 -06:00
Tom Tromey 395423c418 Remove cleanup from call_function_by_hand_dummy
This changes call_function_by_hand_dummy to use std::string, removing
a cleanup.

ChangeLog
2017-10-19  Tom Tromey  <tom@tromey.com>

	* infcall.c (call_function_by_hand_dummy): Use std::string.
2017-10-19 15:58:12 -06:00
Tom Tromey 54f70bc145 Remove cleanups from prepare_execute_command
This changes prepare_execute_command to return a scoped_value_mark
rather than a cleanup.

ChangeLog
2017-10-19  Tom Tromey  <tom@tromey.com>

	* mi/mi-main.c (mi_cmd_execute): Update.
	* top.h (prepare_execute_command): Return scoped_value_mark.
	* value.h (class scoped_value_mark): Use DISABLE_COPY_AND_ASSIGN.
	Add move constructor.
	* top.c (prepare_execute_command): Return scoped_value_mark.
	(execute_command): Update.
2017-10-19 15:58:11 -06:00
Andrew Burgess 49a4ce2eae gdb: Remove hard-coded line number from test
Removes the use of a hard-coded line number from a test.

gdb/testsuite/ChangeLog:

	* gdb.linespec/ls-errs.exp (do_test): Update comment, use line
	number from variable rather than hard-coded.
2017-10-19 20:50:42 +01:00
Pedro Alves 63929e843d Fix build breakage in gdb/xml-support.c
The buildbots are showing that the previous change to
xml_fetch_content_from_file causes __wur warnings/errors:

  ../../binutils-gdb/gdb/xml-support.c: In function gdb::unique_xmalloc_ptr<char> xml_fetch_content_from_file(const char*, void*):
  ../../binutils-gdb/gdb/xml-support.c:1028:43: error: ignoring return value of size_t fread(void*, size_t, size_t, FILE*), declared with attribute warn_unused_result [-Werror=unused-result]
     fread (text.get (), 1, len, file.get ());
					     ^

This commit fixes it.

gdb/ChangeLog:
2017-10-19  Pedro Alves  <palves@redhat.com>

	* xml-support.c (xml_fetch_content_from_file): Check fread's
	return.
2017-10-19 18:12:03 +01:00
Palmer Dabbelt 9d06997adb RISC-V: Relax RISCV_PCREL_* to RISCV_GPREL_*
In the medany code model the compiler generates PCREL_HI20+PCREL_LO12
relocation pairs against local symbols because HI20+LO12 relocations
can't reach high addresses.  We relax HI20+LO12 pairs to GPREL
relocations when possible, which is an important optimization for
Dhrystone.  Without this commit we are unable to relax
PCREL_HI20+PCREL_LO12 pairs to GPREL when possible, causing a 10%
permormance hit on Dhrystone on Rocket.

Note that we'll now relax

  la gp, __global_pointer$

to

  mv gp, gp

which probably isn't what you want in your entry code.  Users who want
gp-relative symbols to continue to resolve should add ".option norelax"
accordingly.  Due to this, the assembler now pairs PCREL relocations
with RELAX relocations when they're expected to be relaxed just like
every other relaxable relocation.

bfd/ChangeLog

2017-10-19  Palmer Dabbelt  <palmer@dabbelt.com>

        * elfnn-riscv.c (riscv_pcgp_hi_reloc): New structure.
        (riscv_pcgp_lo_reloc): Likewise.
        (riscv_pcgp_relocs): Likewise.
        (riscv_init_pcgp_relocs): New function.
        (riscv_free_pcgp_relocs): Likewise.
        (riscv_record_pcgp_hi_reloc): Likewise.
        (riscv_record_pcgp_lo_reloc): Likewise.
        (riscv_delete_pcgp_hi_reloc): Likewise.
        (riscv_use_pcgp_hi_reloc): Likewise.
        (riscv_record_pcgp_lo_reloc): Likewise.
        (riscv_find_pcgp_lo_reloc): Likewise.
        (riscv_delete_pcgp_lo_reloc): Likewise.
        (_bfd_riscv_relax_pc): Likewise.
        (_bfd_riscv_relax_section): Handle R_RISCV_PCREL_* relocations
        via the new functions above.

gas/ChangeLog

2017-10-19  Palmer Dabbelt  <palmer@dabbelt.com>

        * config/tc-riscv.c (md_apply_fix): Mark
        BFD_RELOC_RISCV_PCREL_HI20 as relaxable when relaxations are
        enabled.
2017-10-19 09:19:46 -07:00
Palmer Dabbelt ff6f4d9b2d RISC-V: Add R_RISCV_DELETE, which marks bytes for deletion
We currently delete bytes by shifting an entire BFD backwards to
overwrite the bytes we no longer need.  The result is that relaxing a
BFD is quadratic time.

This patch adds an additional relocation that specifies a byte range
that will be deleted from the final object file, and adds a relaxation
pass (between the existing passes that delete bytes and the alignment
pass) that actually deletes the bytes.  Note that deletion is still
quadratic time, and nothing uses R_RISCV_DELETE yet.

I've been meaning to go convert all the other relaxations to use
R_RISCV_DELETE and then make it faster, but this patch has been sitting
around for months so it looks like that won't happen for a bit.  The
PCREL->GPREL relaxation that comes next uses this, and since we've been
using these two patches out of tree since I wrote them months ago I
figure it's better to just get them in now.  I (or someone else :)) can
convert all the relocations later...

R_RISCV_DELETE will never be emitted into ELF objects, so therefor isn't
exposed to the rest of binutils.  As such, we're not considering this as
part of the ABI.

bfd/ChangeLog

2017-10-19  Palmer Dabbelt  <palmer@dabbelt.com>

        * elfnn-riscv (R_RISCV_DELETE): New define.
        (_bfd_riscv_relax_delete): New function.
        (perform_relocation): Handle R_RISCV_DELETE.
        (_bfd_riscv_relax_section): Likewise.

ld/ChangeLog

2017-10-19  Palmer Dabbelt  <palmer@dabbelt.com>

        * emultempl/riscvelf.em (riscv_elf_before_allocation): Add a
        third relaxation pass.
2017-10-19 09:19:32 -07:00
Nick Clifton 95e42ad442 Fix the AVR assembler so that it will correctly issue warnings about skipped instructions even if subsections are used.
PR 21621
	* config/tc-avr.h (struct avr_frag_data): Add prev_opcode field.
	(TC_FRAG_INIT): Define.
	(avr_frag_init): Add prototype.
	* config/tc-avr.c (avr_frag_init): New function.
	(avr_operands): Replace static local 'prev' variable with
	prev_opcode field in current frag.
	* testsuite/gas/avr/pr21621.s: New test source file.
	* testsuite/gas/avr/pr21621.d: New test driver file.
	* testsuite/gas/avr/pr21621.s: New test error output file.
2017-10-19 16:21:51 +01:00
Pedro Alves a75868f50b Fix inferior deadlock with "target remote | CMD"
Comparing test results between

  --target_board=native-gdbserver
  --target_board=native-stdio-gdbserver

I noticed that gdb.base/bigcore.exp is failing with native-stdio-gdbserver:

  Running src/gdb/testsuite/gdb.base/bigcore.exp ...
  FAIL: gdb.base/bigcore.exp: continue (timeout)
  ...

The problem is that:

  1. When debugging with "target remote | CMD", the inferior's
     stdout/stderr streams are connected to a pipe.

  2. The bigcore.c program prints a lot to the screen before it
     reaches the breakpoint location that the "continue" shown above
     wants to reach.

  3. GDB is not flushing the inferior's output pipe while the inferior
     is running.

  4. The pipe becomes full.

  5. The inferior thus deadlocks.

The bug is #3 above, which is what this commit fixes.  A new test is
added, that specifically exercises this scenario.  The test fails
before the fix, and passes after, and gdb.base/bigcore.exp also starts
passing.

gdb/ChangeLog:
2017-10-19  Pedro Alves  <palves@redhat.com>

	* ser-base.c (ser_base_read_error_fd): Delete the file handler if
	async.
	(handle_error_fd): New function.
	(ser_base_async): Add/delete an event loop file handler for
	error_fd.

gdb/testsuite/ChangeLog:
2017-10-19  Pedro Alves  <palves@redhat.com>

	* gdb.base/long-inferior-output.c: New file.
	* gdb.base/long-inferior-output.exp: New file.
2017-10-19 16:00:21 +01:00
Pedro Alves 2edf834e29 xml_fetch_content_from_file: Read in whole file in one go
There doesn't seem to be a good reason we're reading the file one
chunk at a time.

gdb/ChangeLog:
2017-10-19  Pedro Alves  <palves@redhat.com>

	* xml-support.c (xml_fetch_content_from_file): Don't read in
	chunks.  Instead use fseek to determine the file's size, and read
	it in one go.
2017-10-19 15:25:59 +01:00
H.J. Lu 280958942b tilegx: Check bfd_link_executable for TLS check
Copied from x86, check bfd_link_executable, instead of bfd_link_pic,
for TLS transition check.  Not sure if it works correctly.  All usages
of bfd_link_pic should be audited.

	PR ld/22263
	* elfxx-tilegx.c (tilegx_elf_tls_transition): Replace
	bfd_link_pic with !bfd_link_executable, !bfd_link_pic with
	bfd_link_executable for TLS check.
	(tilegx_elf_check_relocs): Likewise.
	(allocate_dynrelocs): Likewise.
	(tilegx_elf_relocate_section): Likewise.
2017-10-19 05:22:35 -07:00
H.J. Lu 1ba1f393fa tilepro: Check bfd_link_executable for TLS check
Copied from x86, check bfd_link_executable, instead of bfd_link_pic,
for TLS transition check.  Not sure if it works correctly.  All usages
of bfd_link_pic should be audited.

	PR ld/22263
	* elf32-tilepro.c (tilepro_elf_tls_transition): Replace
	bfd_link_pic with !bfd_link_executable, !bfd_link_pic with
	bfd_link_executable for TLS check.
	(tilepro_elf_check_relocs): Likewise.
	(allocate_dynrelocs): Likewise.
	(tilepro_elf_relocate_section): Likewise.
2017-10-19 05:21:01 -07:00
H.J. Lu 0fb7012e88 sparc: Check bfd_link_executable for TLS check
Copied from x86, check bfd_link_executable, instead of bfd_link_pic,
for TLS transition check.  Not sure if it works correctly.  All usages
of bfd_link_pic should be audited.

	PR ld/22263
	* elfxx-sparc.c (sparc_elf_tls_transition): Replace
	bfd_link_pic with !bfd_link_executable, !bfd_link_pic with
	bfd_link_executable for TLS check.
	(_bfd_sparc_elf_check_relocs): Likewise.
	(allocate_dynrelocs): Likewise.
	(_bfd_sparc_elf_relocate_section): Likewise.
2017-10-19 05:18:22 -07:00
Andreas Krebbel fa57faa0da Fix fill-1 testcase
This fixes various issues with the fill-1 testcase causing fails on a
couple of targets.

gas/ChangeLog:

2017-10-19  Andreas Krebbel  <krebbel@linux.vnet.ibm.com>

	* testsuite/gas/all/fill-1.s: Use normal labels.  Change .text to
	.data. Pick different values.  Use .dc.w instead of .word.
	* testsuite/gas/all/fill-1.d: New objdump output check.
	* testsuite/gas/all/gas.exp: Use run_dump_test to execute fill-1
	testcase.
2017-10-19 09:02:15 +02:00
GDB Administrator d7dd155841 Automatic date update in version.in 2017-10-19 00:00:32 +00:00
H.J. Lu 8e35405853 tile: Mark __tls_get_addr in gc_mark_hook
TLS_GD_CALL relocations implicitly reference __tls_get_addr.  Since
elf_gc_mark_hook is called before check_relocs now, we need to call
_bfd_generic_link_add_one_symbol to mark __tls_get_addr for garbage
collection.

	* elf32-tilepro.c (tilepro_elf_gc_mark_hook): Call
	_bfd_generic_link_add_one_symbol to mark __tls_get_addr.
	* elfxx-tilegx.c (tilegx_elf_gc_mark_hook): Likewise.
2017-10-18 15:47:35 -07:00