Commit Graph

434 Commits

Author SHA1 Message Date
Jeff Law f009978996 * simops.c (OP_500): Mask off low bit in displacement
for sld.w.
        (OP_501): Similarly.
More bugs exposed by tda testing.
1996-10-24 21:19:22 +00:00
Jeff Law 85c09b0518 * simops.c (OP_500): Fix displacement handling for sld.w.
(OP_501): Similarly for sst.w.
More fixes exposed by tda testing.
1996-10-24 20:49:06 +00:00
Jeff Law 0a89af6efd * simops.c (trace_input): Remove all references to SEXT7.
(OP_300, OP_400, OP_500, OP_380, OP_480, OP_501): Displacement
        is zero extended for sst/sld instructions.
        * v850_sim.h (SEX7): Delete.  It's no longer needed (and it
        was incorrect anyway).
So we properly simulate sst/sld instructions.
1996-10-24 18:28:43 +00:00
Stu Grossman 968519095a * Makefile.in: Get rid of srcroot. Set all INSTALL macros via
autoconf.
	* gencode.c (write_opcodes):  Pad operands field to account for
	MSVC braindamage.
	* simops.c:  Include errno.h.  Exclude SYS_chown, since MSVC
	doesn't support it.  (Why is this here in the first place?!?)
	* v850_sim.h:  Get rid of 64 bit defs.  Also, get rid of #elif's.
	Change number of operands in struct simops from 9 to 6.  Define
	SIGTRAP and SIGQUIT for MSVC.
1996-10-24 17:39:30 +00:00
Michael Meissner aeb1f26ba8 Provide better statistics, particularly for doing VLIW work; Fix ldb to correctly sign extend 1996-10-22 19:49:37 +00:00
Martin Hunt eca43eb1f5 Mon Oct 21 16:16:26 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
* interp.c (sim_resume): Change the way single-stepping and exceptions
 	are handled so single-stepping works again.
1996-10-21 23:17:43 +00:00
Michael Meissner c7f6f3993c Add support for fsel 1996-10-18 16:22:35 +00:00
David Edelsohn 6cc77b01e7 * configure.in (--enable-sim-powerpc): Delete.
(--enable-sim): Add.
	* configure: Regenerated.
1996-10-17 20:11:31 +00:00
David Edelsohn d9c0593f2a Add more m32r support. 1996-10-17 18:57:19 +00:00
Michael Meissner 55116079e2 Make simulated loads/stores faster on x86, AIX, and big endian hosts 1996-10-17 16:47:51 +00:00
Jeff Law c929945aad Add missing v850 sanitization stuff. 1996-10-17 04:57:03 +00:00
Michael Meissner d6fe5ca568 Make read/write memory functions inlined 1996-10-16 22:16:21 +00:00
Michael Meissner 5c2556697f Make read/write memory functions inlined 1996-10-16 22:14:23 +00:00
Michael Meissner 11ec4de669 Fix tracing of accumulators 1996-10-16 17:52:31 +00:00
Stu Grossman 254ef34062 * interp.c (MEM_SIZE): It's now bytes, not a power of 2.
* (map):  Add support for external mem in the 1->2 meg range.
	Also, abort() when memory access is way out of bounds.  (Better to
	die than to give wrong result.  (This will be fixed later.))
	* (sim_size):  MEM_SIZE is now bytes, not shift factor.
1996-10-15 23:23:00 +00:00
Michael Meissner 57bc1a721a Better error messages when a program stops due to signal; support d10v getpid/kill 1996-10-15 15:44:10 +00:00
Michael Meissner 8918b3a72b Fix ld2w r2,@r2 so that r3 loads the proper value 1996-10-13 02:25:01 +00:00
Jeff Law aee4f36a89 * configure.in: Only build the V850 simulator if
we are using gcc.
        * configure: Rebuild.
So builds with "cc" don't die in the v850 simulator directory.
1996-10-12 03:14:54 +00:00
Jason Molenda feede9b699 * Makefile.in (mostlyclean): Move config.log to distclean. 1996-10-03 07:16:56 +00:00
Jason Molenda 38e4433bfb * Makefile.in (clean): Remove config.log. 1996-10-02 07:57:18 +00:00
David Edelsohn 81ca9d3b3f m32r [work in progress] 1996-09-30 21:10:54 +00:00
Stu Grossman 88777ce2a6 * gencode.c (write_opcodes): Output hex values for opcode mask
and patterns.
	* interp.c (sim_resume):  Save and restore PC from the appropriate
	register.
	* (sim_fetch_register sim_store_register):  Fix byte-order problem
	with reading and writing registers.
	* simops.c (OP_FFFF):  Implement pseudo-breakpoint insn.
1996-09-28 01:38:45 +00:00
Jeff Law da86a4fa81 * simops.c (trace_input): Fix thinko. 1996-09-27 23:41:12 +00:00
Jackie Smith Cashion 21cea5d45d Thu Sep 26 17:35:00 1996 James G. Smith <jsmith@cygnus.co.uk>
* interp.c (SignalException): Check for explicit terminating
 	breakpoint value.
	* gencode.c: Pass instruction value through SignalException()
 	calls for Trap, Breakpoint and Syscall.
1996-09-26 16:42:57 +00:00
Jackie Smith Cashion 617c07c61d Thu Sep 26 11:35:17 1996 James G. Smith <jsmith@cygnus.co.uk>
* interp.c (SquareRoot): Add HAVE_SQRT check to ensure sqrt() is
 	only used on those hosts that provide it.
	* configure.in: Add sqrt() to list of functions to be checked for.
	* config.in: Re-generated.
	* configure: Re-generated.
1996-09-26 10:39:34 +00:00
Michael Meissner a18cb10038 Fix tracing for st2w 1996-09-25 20:33:21 +00:00
Martin Hunt c58a1ec2aa Fri Sep 20 15:36:45 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
* interp.c (sim_create_inferior): Reinitialize State every time
	sim_create_inferior() is called.
1996-09-20 22:39:45 +00:00
Ian Lance Taylor 149ee67274 * gencode.c (process_instructions): Call build_endian_shift when
expanding STORE RIGHT, to fix swr.
	* support.h (SIGNEXTEND): If the sign bit is not set, explicitly
	clear the high bits.
	* interp.c (Convert): Fix fmt_single to fmt_long to not truncate.
	Fix float to int conversions to produce signed values.
1996-09-20 19:49:49 +00:00
Michael Meissner ed9714ab65 Lose doc directory until we DOS-ize it; Add doc/.Sanitize 1996-09-20 13:11:37 +00:00
Michael Meissner 183632b238 Add documentation files 1996-09-20 12:46:09 +00:00
Michael Meissner fd96c1f320 PSIM 1996/9/19 update 1996-09-20 12:36:54 +00:00
Ian Lance Taylor 458e1f58e6 Fix multiplication, ldxc1, and floating point conversion. See ChangeLog. 1996-09-20 03:07:43 +00:00
Michael Meissner c12f5c678e Make sure cmp{,eq,u}i use correct casts 1996-09-20 01:42:15 +00:00
Ian Lance Taylor c05d17211e * interp.c (CHECKHILO): Don't set HIACCESS, LOACCESS, or HLPC.
It's OK to have a mult follow a mult.  What's not OK is to have a
	mult follow an mfhi.
1996-09-19 22:52:26 +00:00
Ian Lance Taylor 47c6ce6c2d * gencode.c (process_instructions): Correct shift count for 32
bit shift instructions.  Correct sign extension for arithmetic
	shifts to not shift the number of bits in the type.
1996-09-19 21:55:10 +00:00
Ian Lance Taylor cc5201d78c * gencode.c (process_instructions): Correct handling of nor
instruction.
1996-09-19 19:35:09 +00:00
Michael Meissner addb61a5b2 Fix tracing info 1996-09-19 17:23:21 +00:00
Michael Meissner f061ddf67d Make sure there is a trailing space after the instruction 1996-09-19 15:06:37 +00:00
Michael Meissner 891513ee79 Provide macros that can be overriden for the width of the PC & line number fields 1996-09-19 15:02:27 +00:00
Michael Meissner 74473ea10c Add dependencies on lib{bfd,iberity}.a 1996-09-19 14:31:01 +00:00
Michael Meissner 0535fa1aa0 Rename sim_bfd -> exec_bfd for gdb compatibility 1996-09-18 13:56:57 +00:00
Michael Meissner a49a15ade8 Make exit/stop return correct exit value; Add line number tracing. 1996-09-18 13:23:31 +00:00
Jackie Smith Cashion 3733d1095f Tue Sep 17 11:04:50 1996 James G. Smith <jsmith@cygnus.co.uk>
* run.c (main): Explicitly cast malloc() parameter.

This is needed because for certain builds the size field being given
to malloc() is actually 64bits long, and without a cast or malloc
prototype the resulting value used by malloc() depended on the host
endianness, and how long long paramaters are passed into functions.
1996-09-17 10:10:35 +00:00
Jackie Smith Cashion f24b7b69ee Mon Sep 16 11:38:16 1996 James G. Smith <jsmith@cygnus.co.uk>
* interp.c (sim_monitor): Improved monitor printf
 	simulation. Tidied up simulator warnings, and added "--log" option
 	for directing warning message output.
	* gencode.c: Use sim_warning() rather than WARNING macro.
1996-09-16 10:47:20 +00:00
Michael Meissner 215ac9533c Fix brf0{t,f}.s <label> -> instruction not to execute instruction if branch succeeds 1996-09-15 03:46:52 +00:00
Ian Lance Taylor ad0d14e7a2 * Makefile.in (CC_FOR_BUILD): New variable.
(AR, AR_FLAGS, BISON, MAKEINFO): Remove duplicate variables.
	(RANLIB, CC): Likewise.
	(end): Use $(CC_FOR_BUILD), not $(CC).
	* configure.in: Set CC_FOR_BUILD.
	* configure: Rebuild.
1996-09-14 04:05:41 +00:00
Michael Meissner 19d44375ff For unknown traps, print contents of registers and continue execution 1996-09-14 02:36:40 +00:00
Mark Alexander 65c0d7dee9 * simops.c (OP_5F00): Fix problems with system calls. 1996-09-12 19:52:40 +00:00
Michael Meissner a57190924d Correct trap tracing information 1996-09-12 16:20:05 +00:00
Michael Meissner 1d00ce8392 Print line # and function name or filename if they exist for each PC. 1996-09-12 16:06:02 +00:00