Commit Graph

687 Commits

Author SHA1 Message Date
Alan Modra bb2942085c Pass section when available to bfd_octets_per_byte
and other tidies.  I think it's better to default to passing the
section to bfd_octets_per_byte, even in cases where we know it won't
make a difference.

A number of the coff reloc functions used bfd_octets_per_byte wrongly,
not factoring it into the offset into the data buffer.  As it happens,
the targets using those files always had bfd_octets_per_byte equal to
one, so there wasn't any detectable wrong behaviour.  However, it is
wrong in the source and might cause trouble for anyone creating a new
target.  Besides fixing that, the patch also defines OCTETS_PER_BYTE
as one in target files where that is appropriate.

bfd/
	* archures.c (bfd_octets_per_byte): Tail call
	bfd_arch_mach_octets_per_byte.
	* coff-arm.c (OCTETS_PER_BYTE): Define.
	(coff_arm_reloc): Introduce new "octets" temp.  Use OCTETS_PER_BYTE
	with section.  Correct "addr".  Remove ATTRIBUTE_UNUSED.
	* coff-i386.c (coff_i386_reloc): Similarly.
	* coff-mips.c (mips_reflo_reloc): Similarly.
	* coff-x86_64.c (coff_amd64_reloc): Similarly.
	* elf32-msp430.c (OCTETS_PER_BYTE): Define.
	(rl78_sym_diff_handler): Use OCTETS_PER_BYTE, with section.
	* elf32-nds32.c (nds32_elf_get_relocated_section_contents): Similarly.
	* elf32-ppc.c (ppc_elf_addr16_ha_reloc): Similarly.
	* elf32-pru.c (pru_elf32_do_ldi32_relocate): Similarly.
	* elf32-s12z.c (opru18_reloc): Similarly.
	* elf32-sh.c (sh_elf_reloc): Similarly.
	* elf32-spu.c (spu_elf_rel9): Similarly.
	* elf32-xtensa.c (bfd_elf_xtensa_reloc): Similarly.
	* elf64-ppc.c (ppc64_elf_ha_reloc, ppc64_elf_brtaken_reloc),
	(ppc64_elf_toc64_reloc): Similarly.
	* bfd.c (bfd_get_section_limit): Pass section to bfd_octets_per_byte.
	* cofflink.c (_bfd_coff_link_input_bfd),
	(_bfd_coff_reloc_link_order): Likewise.
	* elf.c (_bfd_elf_section_offset): Likewise.
	* elflink.c (resolve_section, bfd_elf_perform_complex_relocation),
	(elf_link_input_bfd, elf_reloc_link_order, elf_fixup_link_order),
	(bfd_elf_final_link): Likewise.
	* elf.c (_bfd_elf_make_section_from_shdr): Don't strncmp twice
	to set SEC_ELF_OCTETS.
	* reloc.c (bfd_perform_relocation): Tidy SEC_ELF_OCTETS special case.
	(bfd_install_relocation): Likewise.
	(_bfd_final_link_relocate): Don't recalculate octets.
	* syms.c (_bfd_stab_section_find_nearest_line): Introduc new
	"octets" temp.
	* bfd-in2.h: Regenerate.
ld/
	* ldexp.c (fold_name): Pass section to bfd_octets_per_byte.
	* ldlang.c (init_opb): Don't call bfd_arch_mach_octets_per_byte
	unnecessarily.
2019-11-25 14:32:19 +10:30
Christian Eggers 618265039f Introduce new section flag: SEC_ELF_OCTETS
All symbols, sizes and relocations in this section are octets instead of
bytes.  Required for DWARF debug sections as DWARF information is
organized in octets, not bytes.

bfd/
	* section.c (struct bfd_section): New flag SEC_ELF_OCTETS.
	* archures.c (bfd_octets_per_byte): New parameter sec.
	If section is not NULL and SEC_ELF_OCTETS is set, one octet es
	returned [ELF targets only].
	* bfd.c (bfd_get_section_limit): Provide section parameter to
	bfd_octets_per_byte.
	* bfd-in2.h: regenerate.
	* binary.c (binary_set_section_contents): Move call to
	bfd_octets_per_byte into section loop. Provide section parameter
	to bfd_octets_per_byte.
	* coff-arm.c (coff_arm_reloc): Provide section parameter
	to bfd_octets_per_byte.
	* coff-i386.c (coff_i386_reloc): likewise.
	* coff-mips.c (mips_reflo_reloc): likewise.
	* coff-x86_64.c (coff_amd64_reloc): likewise.
	* cofflink.c (_bfd_coff_link_input_bfd): likewise.
	(_bfd_coff_reloc_link_order): likewise.
	* elf.c (_bfd_elf_section_offset): likewise.
	(_bfd_elf_make_section_from_shdr): likewise.
	Set SEC_ELF_OCTETS for sections with names .gnu.build.attributes,
	.debug*, .zdebug* and .note.gnu*.
	* elf32-msp430.c (rl78_sym_diff_handler): Provide section parameter
	to bfd_octets_per_byte.
	* elf32-nds.c (nds32_elf_get_relocated_section_contents): likewise.
	* elf32-ppc.c (ppc_elf_addr16_ha_reloc): likewise.
	* elf32-pru.c (pru_elf32_do_ldi32_relocate): likewise.
	* elf32-s12z.c (opru18_reloc): likewise.
	* elf32-sh.c (sh_elf_reloc): likewise.
	* elf32-spu.c (spu_elf_rel9): likewise.
	* elf32-xtensa.c (bfd_elf_xtensa_reloc): likewise
	* elf64-ppc.c (ppc64_elf_brtaken_reloc): likewise.
	(ppc64_elf_addr16_ha_reloc): likewise.
	(ppc64_elf_toc64_reloc): likewise.
	* elflink.c (bfd_elf_final_link): likewise.
	(bfd_elf_perform_complex_relocation): likewise.
	(elf_fixup_link_order): likewise.
	(elf_link_input_bfd): likewise.
	(elf_link_sort_relocs): likewise.
	(elf_reloc_link_order): likewise.
	(resolve_section): likewise.
	* linker.c (_bfd_generic_reloc_link_order): likewise.
	(bfd_generic_define_common_symbol): likewise.
	(default_data_link_order): likewise.
	(default_indirect_link_order): likewise.
	* srec.c (srec_set_section_contents): likewise.
	(srec_write_section): likewise.
	* syms.c (_bfd_stab_section_find_nearest_line): likewise.
	* reloc.c (_bfd_final_link_relocate): likewise.
	(bfd_generic_get_relocated_section_contents): likewise.
	(bfd_install_relocation): likewise.
	For section which have SEC_ELF_OCTETS set, multiply output_base
	and output_offset with bfd_octets_per_byte.
	(bfd_perform_relocation): likewise.
include/
	* coff/ti.h (GET_SCNHDR_SIZE, PUT_SCNHDR_SIZE, GET_SCN_SCNLEN),
	(PUT_SCN_SCNLEN): Adjust bfd_octets_per_byte calls.
binutils/
	* objdump.c (disassemble_data): Provide section parameter to
	bfd_octets_per_byte.
	(dump_section): likewise
	(dump_section_header): likewise. Show SEC_ELF_OCTETS flag if set.
gas/
	* as.h: Define SEC_OCTETS as SEC_ELF_OCTETS if OBJ_ELF.
	* dwarf2dbg.c: (dwarf2_finish): Set section flag SEC_OCTETS for
	.debug_line, .debug_info, .debug_abbrev, .debug_aranges, .debug_str
	and .debug_ranges sections.
	* write.c (maybe_generate_build_notes): Set section flag
	SEC_OCTETS for .gnu.build.attributes section.
	* frags.c (frag_now_fix): Don't divide by OCTETS_PER_BYTE if
	SEC_OCTETS is set.
	* symbols.c (resolve_symbol_value): Likewise.
ld/
	* ldexp.c (fold_name): Provide section parameter to
	bfd_octets_per_byte.
	* ldlang (init_opb): New argument s. Set opb_shift to 0 if
	SEC_ELF_OCTETS for the current section is set.
	(print_input_section): Pass current section to init_opb.
	(print_data_statement,print_reloc_statement,
	print_padding_statement): Likewise.
	(lang_check_section_addresses): Call init_opb for each
	section.
	(lang_size_sections_1,lang_size_sections_1,
	lang_do_assignments_1): Likewise.
	(lang_process): Pass NULL to init_opb.
2019-11-25 14:32:19 +10:30
Alan Modra 779f2ae733 PR25100, Compile fails in elf64-ppc.c because of single equal sign instead of double equal for comparison
PR 25100
	* elf64-ppc.c (sfpr_define): Delete dead code that triggered a warning.
2019-10-15 16:01:05 +10:30
Alan Modra dcea6a95d7 qsort issues
qsort isn't guaranteed to be a stable sort, that is, elements
comparing equal according to the comparison function may be reordered
relative to their original ordering.  Of course sometimes you may not
care, but even in those cases it is good to force some ordering
(ie. not have the comparison function return 0) so that linker output
is reproducible over different libc qsort implementations.

One way to make qsort stable (which the glibc manual incorrectly says
is the only way) is to augment the elements being sorted with a
monotonic counter of some kind, and use that counter as the final
arbiter of ordering in the comparison function.

Another way is to set up an array of pointers into the array of
elements, first pointer to first element, second pointer to second
element and so so, and sort the pointer array rather than the element
array.  Final arbiter in the comparison function then is the pointer
difference.  This works well with, for example, the symbol pointers
returned by _bfd_elf_canonicalize_symtab which point into a symbol
array.

This patch fixes a few places where sorting by symbol pointers is
appropriate, and adds comments where qsort stability is a non-issue.

	* elf-strtab.c (strrevcmp): Comment.
	* merge.c (strrevcmp): Likewise.
	* elf64-ppc.c (compare_symbols): Correct final pointer comparison.
	Comment on why comparing pointers ensures a stable sort.
	* elflink.c (struct elf_symbol): Add void* to union.
	(elf_sort_elf_symbol): Ensure a stable sort with pointer comparison.
	(elf_sym_name_compare): Likewise.
	(bfd_elf_match_symbols_in_sections): Style fix.
	(elf_link_sort_cmp1): Comment.
2019-10-14 16:47:12 +10:30
Alan Modra 93370e8e7b Re: PowerPC PIC vs. DLL TLS issues
A bug crept into commit f749f26eea, which could cause linker
segfaults when creating PIEs.  This patch fixes it.

	* elf64-ppc.c (ppc64_elf_size_dynamic_sections): Do allocate
	space for local got non-tls relocs when PIE.
2019-10-07 23:23:21 +10:30
Alan Modra 7d04a20ae4 PowerPC TLS miscounting PLT for __tls_get_addr
ppc*_elf_tls_optimize decrements the PLT refcount for __tls_get_addr
when a GD or LD sequence can be optimized.  Without tls marker relocs
this must be done when processing the argument setup relocations.
With marker relocs it's better done when processing the marker reloc.
But don't count them both ways.

Seen as "unresolvable R_PPC_REL24 relocation against symbol
`__tls_get_addr_opt'" (and other branch relocs).

	* elf32-ppc.c (ppc_elf_tls_optimize): Don't process R_PPC_TLSLD
	with non-local symbol.  Don't double count __tls_get_addr calls
	with marker relocs.
	* elf64-ppc.c (ppc64_elf_tls_optimize): Likewise.
2019-10-07 13:21:02 +10:30
Alan Modra 9737e8af48 PowerPC section flag tidy
has_tls_get_addr_call is no longer named correctly as the flag is
only set on finding a __tls_get_addr call without tlsld/tlsgd marker
relocations.

	* elf32-ppc.c (nomark_tls_get_addr): Rename from has_tls_get_addr_call
	throughout.
	* elf64-ppc.c (nomark_tls_get_addr): Likewise.
2019-10-07 13:18:32 +10:30
Alan Modra f749f26eea PowerPC PIC vs. DLL TLS issues
1) GOT entries generated for any of the GOT TLS relocations don't need
dynamic relocations for locally defined symbols in PIEs.  In the case
of a tls_index doubleword, the dtpmod entry is known to be 1, and the
dtprel entry is also known at link time and relative.  Similarly,
dtprel and tprel words are known at link time and relative.  (GOT
entries for other than TLS symbols are not relative and thus need
dynamic relocations in PIEs.)
2) Local dynamic TLS code is really only meant for accesses local to
the current binary.  There was a cheapskate test for this before using
the common tlsld_got slot, but the test wasn't exactly correct and
might confuse anyone looking at the code.  The proper test,
SYMBOL_REFERENCES_LOCAL isn't so expensive that it should be avoided.
3) The same cheap test for local syms when optimising TLS sequences
should be SYMBOL_REFERENCES_LOCAL too.

bfd/
	* elf64-ppc.c (ppc64_elf_check_relocs): Move initialisation of vars.
	(ppc64_elf_tls_optimize): Correct is_local condition.
	(allocate_got): Don't reserve dynamic relocations for any of the
	tls got relocs in PIEs when the symbol is local.
	(allocate_dynrelocs): Correct validity test for local sym using
	tlsld_got slot.
	(ppc64_elf_size_dynamic_sections): Don't reserve dynamic relocations
	for any of the tls got relocs in PIEs.
	(ppc64_elf_layout_multitoc): Likewise.
	(ppc64_elf_relocate_section): Correct validity test for local sym
	using tlsld_got slot.  Don't emit dynamic relocations for any of
	the tls got relocs in PIEs when the symbol is local.
	* elf32-ppc.c (ppc_elf_tls_optimize): Correct is_local condition.
	(got_relocs_needed): Delete.
	(allocate_dynrelocs): Correct validity test for local sym using
	tlsld_got slot.  Don't reserve dynamic relocations for any of the
	tls got relocs in PIEs when the symbol is local.
	(ppc_elf_size_dynamic_sections): Don't reserve dynamic relocations
	for any of the tls got relocs in PIEs.
	(ppc_elf_relocate_section): Correct validity test for local sym
	using tlsld_got slot.  Don't emit dynamic relocations for any of
	the tls got relocs in PIEs when the symbol is local.
ld/
	* testsuite/ld-powerpc/tlsso.d: Adjust to suit tlsld_got usage change.
	* testsuite/ld-powerpc/tlsso.g: Likewise.
	* testsuite/ld-powerpc/tlsso.r: Likewise.
	* testsuite/ld-powerpc/tlsso32.d: Likewise.
	* testsuite/ld-powerpc/tlsso32.g: Likewise.
	* testsuite/ld-powerpc/tlsso32.r: Likewise.
2019-10-04 22:53:56 +09:30
Alan Modra ec73ddcd43 PowerPC64 dynamic symbol tweaks
In check_relocs, bfd_link_pic true means ld is producing a shared
library or a position independent executable.  !bfd_link_pic means a
fixed position (ie. static) executable since the relocatable linking
case is excluded.  So it is appropriate to continue using bfd_link_pic
when testing whether non-pcrelative relocations should be dynamic, and
!bfd_link_pic for the special case of ifunc in static executables.
However, -Bsymbolic shouldn't affect PIEs (they are executables so
none of their symbols should be overridden) and PIEs can support copy
relocations, thus bfd_link_executable should be used in those cases
rather than bfd_link_pic.

I've also removed the test of ELIMINATE_COPY_RELOCS in check_relocs.
We can sort out what to do regarding copy relocs later, which allows
the code in check_relocs to be simplified.

	* elf64-ppc.c (ppc64_elf_check_relocs): Use bfd_link_executable
	in choosing between different actions for shared library and
	non-shared library cases.  Delete ELIMINATE_COPY_RELOCS test.
	(dec_dynrel_count): Likewise.  Account for ifunc special case.
	(ppc64_elf_adjust_dynamic_symbol): Copy relocs are for executables,
	not non-pic.
	(allocate_dynrelocs): Comment fixes.  Delete ELIMINATE_COPY_RELOCS
	test.
2019-09-23 23:49:25 +09:30
Alan Modra e59a100122 PowerPC64, error on unsupported dynamic relocation
This patch corrects the set of dynamic relocations recognised by gold
as supported by glibc, and teaches ld.bfd to report an error similar
to the gold error.  Note that ld --noinhibit-exec can be used to
produce an output, supporting older ld with newer glibc if the set of
supported glibc dynamic relocations changes.

bfd/
	* elf64-ppc.c (ppc64_glibc_dynamic_reloc): New function.
	(ppc64_elf_relocate_section): Error if emitting unsupported
	dynamic relocations.
gold/
	* powerpc.cc (Target_powerpc::Scan::check_non_pic): Move REL24
	to 32-bit supported.
2019-09-20 12:51:19 +09:30
Alan Modra fd3619828e bfd_section_* macros
This large patch removes the unnecessary bfd parameter from various
bfd section macros and functions.  The bfd is hardly ever used and if
needed for the bfd_set_section_* or bfd_rename_section functions can
be found via section->owner except for the com, und, abs, and ind
std_section special sections.  Those sections shouldn't be modified
anyway.

The patch also removes various bfd_get_section_<field> macros,
replacing their use with bfd_section_<field>, and adds
bfd_set_section_lma.  I've also fixed a minor bug in gas where
compressed section renaming was done directly rather than calling
bfd_rename_section.  This would have broken bfd_get_section_by_name
and similar functions, but that hardly mattered at such a late stage
in gas processing.

bfd/
	* bfd-in.h (bfd_get_section_name, bfd_get_section_vma),
	(bfd_get_section_lma, bfd_get_section_alignment),
	(bfd_get_section_size, bfd_get_section_flags),
	(bfd_get_section_userdata): Delete.
	(bfd_section_name, bfd_section_size, bfd_section_vma),
	(bfd_section_lma, bfd_section_alignment): Lose bfd parameter.
	(bfd_section_flags, bfd_section_userdata): New.
	(bfd_is_com_section): Rename parameter.
	* section.c (bfd_set_section_userdata, bfd_set_section_vma),
	(bfd_set_section_alignment, bfd_set_section_flags, bfd_rename_section),
	(bfd_set_section_size): Delete bfd parameter, rename section parameter.
	(bfd_set_section_lma): New.
	* bfd-in2.h: Regenerate.
	* mach-o.c (bfd_mach_o_init_section_from_mach_o): Delete bfd param,
	update callers.
	* aoutx.h, * bfd.c, * coff-alpha.c, * coff-arm.c, * coff-mips.c,
	* coff64-rs6000.c, * coffcode.h, * coffgen.c, * cofflink.c,
	* compress.c, * ecoff.c, * elf-eh-frame.c, * elf-hppa.h,
	* elf-ifunc.c, * elf-m10200.c, * elf-m10300.c, * elf-properties.c,
	* elf-s390-common.c, * elf-vxworks.c, * elf.c, * elf32-arc.c,
	* elf32-arm.c, * elf32-avr.c, * elf32-bfin.c, * elf32-cr16.c,
	* elf32-cr16c.c, * elf32-cris.c, * elf32-crx.c, * elf32-csky.c,
	* elf32-d10v.c, * elf32-epiphany.c, * elf32-fr30.c, * elf32-frv.c,
	* elf32-ft32.c, * elf32-h8300.c, * elf32-hppa.c, * elf32-i386.c,
	* elf32-ip2k.c, * elf32-iq2000.c, * elf32-lm32.c, * elf32-m32c.c,
	* elf32-m32r.c, * elf32-m68hc1x.c, * elf32-m68k.c, * elf32-mcore.c,
	* elf32-mep.c, * elf32-metag.c, * elf32-microblaze.c,
	* elf32-moxie.c, * elf32-msp430.c, * elf32-mt.c, * elf32-nds32.c,
	* elf32-nios2.c, * elf32-or1k.c, * elf32-ppc.c, * elf32-pru.c,
	* elf32-rl78.c, * elf32-rx.c, * elf32-s390.c, * elf32-score.c,
	* elf32-score7.c, * elf32-sh.c, * elf32-spu.c, * elf32-tic6x.c,
	* elf32-tilepro.c, * elf32-v850.c, * elf32-vax.c, * elf32-visium.c,
	* elf32-xstormy16.c, * elf32-xtensa.c, * elf64-alpha.c,
	* elf64-bpf.c, * elf64-hppa.c, * elf64-ia64-vms.c, * elf64-mmix.c,
	* elf64-ppc.c, * elf64-s390.c, * elf64-sparc.c, * elf64-x86-64.c,
	* elflink.c, * elfnn-aarch64.c, * elfnn-ia64.c, * elfnn-riscv.c,
	* elfxx-aarch64.c, * elfxx-mips.c, * elfxx-sparc.c,
	* elfxx-tilegx.c, * elfxx-x86.c, * i386msdos.c, * linker.c,
	* mach-o.c, * mmo.c, * opncls.c, * pdp11.c, * pei-x86_64.c,
	* peicode.h, * reloc.c, * section.c, * syms.c, * vms-alpha.c,
	* xcofflink.c: Update throughout for bfd section macro and function
	changes.
binutils/
	* addr2line.c, * bucomm.c, * coffgrok.c, * dlltool.c, * nm.c,
	* objcopy.c, * objdump.c, * od-elf32_avr.c, * od-macho.c,
	* od-xcoff.c, * prdbg.c, * rdcoff.c, * rddbg.c, * rescoff.c,
	* resres.c, * size.c, * srconv.c, * strings.c, * windmc.c: Update
	throughout for bfd section macro and function changes.
gas/
	* as.c, * as.h, * dw2gencfi.c, * dwarf2dbg.c, * ecoff.c,
	* read.c, * stabs.c, * subsegs.c, * subsegs.h, * write.c,
	* config/obj-coff-seh.c, * config/obj-coff.c, * config/obj-ecoff.c,
	* config/obj-elf.c, * config/obj-macho.c, * config/obj-som.c,
	* config/tc-aarch64.c, * config/tc-alpha.c, * config/tc-arc.c,
	* config/tc-arm.c, * config/tc-avr.c, * config/tc-bfin.c,
	* config/tc-bpf.c, * config/tc-d10v.c, * config/tc-d30v.c,
	* config/tc-epiphany.c, * config/tc-fr30.c, * config/tc-frv.c,
	* config/tc-h8300.c, * config/tc-hppa.c, * config/tc-i386.c,
	* config/tc-ia64.c, * config/tc-ip2k.c, * config/tc-iq2000.c,
	* config/tc-lm32.c, * config/tc-m32c.c, * config/tc-m32r.c,
	* config/tc-m68hc11.c, * config/tc-mep.c, * config/tc-microblaze.c,
	* config/tc-mips.c, * config/tc-mmix.c, * config/tc-mn10200.c,
	* config/tc-mn10300.c, * config/tc-msp430.c, * config/tc-mt.c,
	* config/tc-nds32.c, * config/tc-or1k.c, * config/tc-ppc.c,
	* config/tc-pru.c, * config/tc-rl78.c, * config/tc-rx.c,
	* config/tc-s12z.c, * config/tc-s390.c, * config/tc-score.c,
	* config/tc-score7.c, * config/tc-sh.c, * config/tc-sparc.c,
	* config/tc-spu.c, * config/tc-tic4x.c, * config/tc-tic54x.c,
	* config/tc-tic6x.c, * config/tc-tilegx.c, * config/tc-tilepro.c,
	* config/tc-v850.c, * config/tc-visium.c, * config/tc-wasm32.c,
	* config/tc-xc16x.c, * config/tc-xgate.c, * config/tc-xstormy16.c,
	* config/tc-xtensa.c, * config/tc-z8k.c: Update throughout for
	bfd section macro and function changes.
	* write.c (compress_debug): Use bfd_rename_section.
gdb/
	* aarch64-linux-tdep.c, * arm-tdep.c, * auto-load.c,
	* coff-pe-read.c, * coffread.c, * corelow.c, * dbxread.c,
	* dicos-tdep.c, * dwarf2-frame.c, * dwarf2read.c, * elfread.c,
	* exec.c, * fbsd-tdep.c, * gcore.c, * gdb_bfd.c, * gdb_bfd.h,
	* hppa-tdep.c, * i386-cygwin-tdep.c, * i386-fbsd-tdep.c,
	* i386-linux-tdep.c, * jit.c, * linux-tdep.c, * machoread.c,
	* maint.c, * mdebugread.c, * minidebug.c, * mips-linux-tdep.c,
	* mips-sde-tdep.c, * mips-tdep.c, * mipsread.c, * nto-tdep.c,
	* objfiles.c, * objfiles.h, * osabi.c, * ppc-linux-tdep.c,
	* ppc64-tdep.c, * record-btrace.c, * record-full.c, * remote.c,
	* rs6000-aix-tdep.c, * rs6000-tdep.c, * s390-linux-tdep.c,
	* s390-tdep.c, * solib-aix.c, * solib-dsbt.c, * solib-frv.c,
	* solib-spu.c, * solib-svr4.c, * solib-target.c,
	* spu-linux-nat.c, * spu-tdep.c, * symfile-mem.c, * symfile.c,
	* symmisc.c, * symtab.c, * target.c, * windows-nat.c,
	* xcoffread.c, * cli/cli-dump.c, * compile/compile-object-load.c,
	* mi/mi-interp.c: Update throughout for bfd section macro and
	function changes.
	* gcore (gcore_create_callback): Use bfd_set_section_lma.
	* spu-tdep.c (spu_overlay_new_objfile): Likewise.
gprof/
	* corefile.c, * symtab.c: Update throughout for bfd section
	macro and function changes.
ld/
	* ldcref.c, * ldctor.c, * ldelf.c, * ldlang.c, * pe-dll.c,
	* emultempl/aarch64elf.em, * emultempl/aix.em,
	* emultempl/armcoff.em, * emultempl/armelf.em,
	* emultempl/cr16elf.em, * emultempl/cskyelf.em,
	* emultempl/m68hc1xelf.em, * emultempl/m68kelf.em,
	* emultempl/mipself.em, * emultempl/mmix-elfnmmo.em,
	* emultempl/mmo.em, * emultempl/msp430.em,
	* emultempl/nios2elf.em, * emultempl/pe.em, * emultempl/pep.em,
	* emultempl/ppc64elf.em, * emultempl/xtensaelf.em: Update
	throughout for bfd section macro and function changes.
libctf/
	* ctf-open-bfd.c: Update throughout for bfd section macro changes.
opcodes/
	* arc-ext.c: Update throughout for bfd section macro changes.
sim/
	* common/sim-load.c, * common/sim-utils.c, * cris/sim-if.c,
	* erc32/func.c, * lm32/sim-if.c, * m32c/load.c, * m32c/trace.c,
	* m68hc11/interp.c, * ppc/hw_htab.c, * ppc/hw_init.c,
	* rl78/load.c, * rl78/trace.c, * rx/gdb-if.c, * rx/load.c,
	* rx/trace.c: Update throughout for bfd section macro changes.
2019-09-19 09:40:13 +09:30
Alan Modra 1bdd8facfb PowerPC64, support medium model access to common symbols
Some versions of clang apparently generate non-PIC on powerpc64le to
access common symbols.  Since a common symbol and a strong definition
with the same name should resolve to the strong definition we have the
possibility of non-PIC attempting to access shared library variables.
This is really a clanger since powerpc64le is supposed to be PIC by
default, but let's see if ld can cope by generating .dynbss copies.

	* elf64-ppc.c (must_be_dyn_reloc): Return 0 for TOC16 relocs.
	(ppc64_elf_check_relocs): Support dynamic/copy relocs for TOC16.
	(ppc64_elf_adjust_dynamic_symbol): Don't keep dynamic reloc when
	needs_copy even if all relocs are in rw sections.
	(dec_dynrel_count): Handle TOC16 relocs.
	(ppc64_elf_relocate_section): Support dynamic relocs for TOC16.
	(ppc64_elf_finish_dynamic_symbol): Adjust to handle needs_copy
	semantic change.
2019-09-18 21:32:51 +09:30
Alan Modra 133a1f6041 PowerPC64 GOT_PCREL relocs
PC-relative relocs typically use the addend in adjusting what they are
relative to.  For example:
	bcl 20,31,1f
1:	mflr 12
	addi 12,12,xxx-1b
generates "R_PPC64_REL16 xxx+0x4" for the addi (when little-endian).
The addend reflects the fact that you want the offset relative to the
previous insn not the current one in this case.

So the question is, will we ever want to do something like that for an
instruction using R_PPC64_GOT_PCREL34?  I thought so at the time I
first implemented support in ld but at the time I think the hardware
was possibly going to support pcrel+offset+reg addressing.  In which
case you might want something like:
	load_big_offset_into_r2
	pld 3,sym-big_offset@got@pcrel(2)
which would be a way of supporting more than 8G offsets from code to
the GOT.  We could do the same with
	load_big_offset_into_r2
	pla 9,sym-big_offset@got@pcrel
	ldx 3,9,2
However, this is really a poor version of TOC-pointer relative code.

So let's go with an addend on R_PPC64_GOT_PCREL34 meaning that
sym+addend should be put in a GOT entry, and the relocation calculate
the pc-relative offset to that GOT entry.

Note that this is an extension to the ABI, which says (by the
expression given for GOT relocs) that non-zero addends on GOT and PLT
relocs are ignored.  This is true for all GOT/PLT relocs, not just the
pcrel ones.

	* elf64-ppc.c (ppc64_elf_check_relocs): Interpret an addend in
	GOT_PCREL and PLT_PCREL relocs as affecting the value stored
	in the GOT/PLT entry rather than affecting the offset to that
	GOI/PLT entry.
	(ppc64_elf_edit_toc, ppc64_elf_relocate_section): Likewise.
2019-09-05 15:25:51 +09:30
Alan Modra 77486630b1 R_PPC64_PCREL_OPT
The loads and stores handled in the second instruction of a sequence
marked by R_PPC64_PCREL_OPT may be a prefix instruction.  For example:
 pld ra,symbol@got@pcrel
0:
 pld rt,off(ra)
 .reloc 0b-8,R_PPC64_PCREL_OPT,(.-8)-(0b-8)
can be optimised to
 pld rt,symbol+off@pcrel
 pnop

	* elf64-ppc.c (xlate_pcrel_opt): Handle prefix loads and stores
	in second instruction.
	(ppc64_elf_relocate_section): Likewise.
2019-09-05 13:56:20 +09:30
Alan Modra dd9b12c245 PowerPC64 xlate_pcrel_opt
We can easily support an offset on the second instruction of a
sequence marked with R_PPC64_PCREL_OPT.  For example,
  pla ra,symbol@pcrel
  ld rt,off(ra)
can be optimised to
  pld rt,symbol+off@pcrel
  nop

	* elf64-ppc.c (xlate_pcrel_opt): Add poff parameter.  Allow offset
	on second insn, return it in poff.
	(ppc64_elf_relocate_section): Add offset to paddi addend for
	PCREL_OPT.
2019-08-29 12:57:33 +09:30
Alan Modra 6d5554a605 PowerPC64 segfault in ppc64_elf_edit_toc
Found on a GOT reference to __ehdr_start, which is tweaked to be
undefined weak at some stages of linking.  SYMBOL_REFERENCES_LOCAL
isn't a sufficient test.

	* elf64-ppc.c (ppc64_elf_edit_toc): Exclude undefined weak
	symbols from GOT optimisation.
2019-08-24 10:05:40 +09:30
Alan Modra 903b777dde PowerPC64 ha/lo insn checks
These are done in ppc64_elf_edit_toc, which now also garbage collects
unused GOT entries.  The checks for legitimate instructions weren't
being done for the GOT relocs, unless the file also happened to have a
toc section.

	* elf64-ppc.c (struct ppc64_elf_obj_tdata): Rename has_gotrel
	to has_optrel.
	(struct _ppc64_elf_section_data): Likewise.
	(ppc64_elf_check_relocs): Set has_optrel for more relocs.
	(ppc64_elf_edit_toc): Do ha/lo insn checks in GOT loop rather
	than TOC loop.  Check PLT16 insns too.
2019-08-19 20:38:51 +09:30
Alan Modra c213164ad2 [PowerPC64] pc-relative TLS relocations
This patch supports using pcrel instructions in TLS code sequences.  A
number of new relocations are needed, gas operand modifiers to
generate those relocations, and new TLS optimisation.  For
optimisation it turns out that the new pcrel GD and LD sequences can
be distinguished from the non-pcrel GD and LD sequences by there being
different relocations on the new sequence.  The final "add ra,rb,13"
on IE sequences similarly needs a new relocation, or as I chose, a
modification of R_PPC64_TLS.  On pcrel IE code, the R_PPC64_TLS points
one byte into the "add" instruction rather than being on the
instruction boundary.

GD:
 pla 3,z@got@tlsgd@pcrel	  # R_PPC64_GOT_TLSGD34
 bl __tls_get_addr@notoc(z@tlsgd) # R_PPC64_TLSGD and R_PPC64_REL24_NOTOC
  edited to IE
   pld 3,z@got@tprel@pcrel
   add 3,3,13
  edited to LE
   paddi 3,13,z@tprel
   nop

LD:
 pla 3,z@got@tlsld@pcrel	  # R_PPC64_GOT_TLSLD34
 bl __tls_get_addr@notoc(z@tlsld) # R_PPC64_TLSLD and R_PPC64_REL24_NOTOC
 ..
 paddi 9,3,z2@dtprel
 pld 10,z3@got@dtprel@pcrel
 add 10,10,3
  edited to LE
   paddi 3,13,0x1000
   nop

IE:
 pld 9,z@got@tprel@pcrel	  # R_PPC64_GOT_TPREL34
 add 3,9,z@tls@pcrel		  # R_PPC64_TLS at insn+1
 ldx 4,9,z@tls@pcrel
 lwax 5,9,z@tls@pcrel
 stdx 5,9,z@tls@pcrel
  edited to LE
  paddi 9,13,z@tprel
  nop
  ld 4,0(9)
  lwa 5,0(9)
  std 5,0(9)

LE:
 paddi 10,13,z@tprel

include/
	* elf/ppc64.h (R_PPC64_TPREL34, R_PPC64_DTPREL34),
	(R_PPC64_GOT_TLSGD34, R_PPC64_GOT_TLSLD34),
	(R_PPC64_GOT_TPREL34, R_PPC64_GOT_DTPREL34): Define.
	(IS_PPC64_TLS_RELOC): Include new tls relocs.
bfd/
	* reloc.c (BFD_RELOC_PPC64_TPREL34, BFD_RELOC_PPC64_DTPREL34),
	(BFD_RELOC_PPC64_GOT_TLSGD34, BFD_RELOC_PPC64_GOT_TLSLD34),
	(BFD_RELOC_PPC64_GOT_TPREL34, BFD_RELOC_PPC64_GOT_DTPREL34),
	(BFD_RELOC_PPC64_TLS_PCREL): New pcrel tls relocs.
	* elf64-ppc.c (ppc64_elf_howto_raw): Add howtos for pcrel tls relocs.
	(ppc64_elf_reloc_type_lookup): Translate pcrel tls relocs.
	(must_be_dyn_reloc, dec_dynrel_count): Add R_PPC64_TPREL64.
	(ppc64_elf_check_relocs): Support pcrel tls relocs.
	(ppc64_elf_tls_optimize, ppc64_elf_relocate_section): Likewise.
	* bfd-in2.h: Regenerate.
	* libbfd.h: Regenerate.
gas/
	* config/tc-ppc.c (ppc_elf_suffix): Map "tls@pcrel", "got@tlsgd@pcrel",
	"got@tlsld@pcrel", "got@tprel@pcrel", and "got@dtprel@pcrel".
	(fixup_size, md_assemble): Handle pcrel tls relocs.
	(ppc_force_relocation, ppc_fix_adjustable): Likewise.
	(md_apply_fix, tc_gen_reloc): Likewise.
ld/
	* testsuite/ld-powerpc/tlsgd.d,
	* testsuite/ld-powerpc/tlsgd.s,
	* testsuite/ld-powerpc/tlsie.d,
	* testsuite/ld-powerpc/tlsie.s,
	* testsuite/ld-powerpc/tlsld.d,
	* testsuite/ld-powerpc/tlsld.s: New tests.
	* testsuite/ld-powerpc/powerpc.exp: Run them.
2019-07-19 18:01:25 +09:30
Alan Modra 71c4e95abe [PowerPC64] Use STN_UNDEF internally for edited relocs
It's not correct to use non-STT_TLS symbols with TLS relocation, not
that it matters much when editing relocs, but this edited reloc can be
output by --emit-relocs.  So don't use a symbol on the reloc.

	* elf64-ppc.c (ppc64_elf_relocate_section): Don't bother selecting
	a TLS section symbol for edited relocs.  Tighten TLS symbol/reloc
	match test.
2019-07-18 22:17:30 +09:30
Alan Modra 46e9995a20 [PowerPC64] Don't store TLS_EXPLICIT in tls_mask
This saves a bit in tls_mask, and fixes a bug that could be triggered
in the unlikely case that both @got (usual ELF style) and @toc
(PowerOpen style) code was used to set up args for __tls_get_addr.

	* elf64-ppc.c (TLS_EXPLICIT): Define as 256.
	(ppc64_elf_check_relocs): Don't store TLS_EXPLICIT even if char
	is more than 8 bits.
	(ppc64_elf_tls_optimize): Likewise.  Make tls_set, tls_clear, and
	tls_type vars unsigned int.
	(ppc64_elf_relocate_section): Use r_type rather than TLS_EXPLICIT
	to select r_type edit.
2019-07-18 22:17:30 +09:30
Alan Modra b00a0a86c4 [PowerPC] Rename TLS_TPRELGD to TLS_GDIE
Choose a better name, that reflects why the flag is set (GD to IE
optimisation) rather than what the flag produces (TPREL64 reloc on
a single GOT entry replacing a tls_index pair).

	* elf32-ppc.c (TLS_GDIE): Rename from TLS_TPRELGD throughout file.
	Correct comment.
	* elf64-ppc.c (TLS_GDIE): Likewise.
2019-07-18 22:17:30 +09:30
Alan Modra 0b1474281c [PowerPC64] correct tprel offset limit
I don't expect anyone will have hit this bug.  You'd need a TLS
segment of 2G before you'd notice.

	* elf64-ppc.c (ppc64_elf_tls_optimize): Correct test for allowed
	range of tp-relative offsets.
2019-07-18 22:17:29 +09:30
Alan Modra f26a32876b Dynamic TLS section symbols
It is possible to create shared libraries on PowerPC using
-ftls-model=inital-exec or -ftls-model=local-exec.  The first is half
reasonable, getting you a shared library that can't be dlopen'd but
otherwise is reasonable.  The second is quite bad.  Not only do you
lose being able to dlopen, the library also has dynamic text
relocations.  Worse, the TPREL16_LO, TPREL16_HA and other TPREL16
dynamic relocs emitted were wrong, resulting in wrong values being
applied by ld.so.

Using the first TLS section symbol in dynamic relocations for local
TLS symbols doesn't work.  It's wrong because TLS symbols used by TLS
relocs have values relative to the TLS segment, whereas the TLS
section symbols are addresses.  This patch instead uses a symbol index
of zero which is used elsewhere by PowerPC on dynamic TLS relocs.
It's not strictly ABI compliant to use a non-TLS symbol with TLS
relocs but symbol index zero can be interpreted as "no symbol".  Not
using the first TLS section symbol means it doesn't need to be dynamic.

The patch also fixes a further problem with PowerPC32 dynamic TPREL16*
relocs, which shouldn't have the symbol value in the addend as we do
for non-TLS symbols.

bfd/
	* elflink.c (_bfd_elf_omit_section_dynsym_default): Don't keep
	tls_sec.
	(_bfd_elf_init_1_index_section): Prefer not using TLS sections.
	(_bfd_elf_init_2_index_sections): Likewise.
	* elf64-ppc.c (ppc64_elf_relocate_section): When emitting dynamic
	relocations for local TLS symbols, use STN_UNDEF as the relocation
	symbol.
	* elf32-ppc.c (ppc_elf_relocate_section): Likewise, and don't
	leave TLS symbol value in the addend.
ld/
	* testsuite/ld-powerpc/tlsso.r: Update.
	* testsuite/ld-powerpc/tlsso32.g: Update.
	* testsuite/ld-powerpc/tlsso32.r: Update.
	* testsuite/ld-powerpc/tlstocso.r: Update.
	* testsuite/ld-cris/tls-dso-dtpoffd2.d: Update.
	* testsuite/ld-cris/tls-dso-dtpoffd4.d: Update.
	* testsuite/ld-cris/tls-dso-tpoffgotcomm1.d: Update.
	* testsuite/ld-cris/tls-gd-1.d: Update.
	* testsuite/ld-cris/tls-gd-1h.d: Update.
	* testsuite/ld-cris/tls-gd-2.d: Update.
	* testsuite/ld-cris/tls-gd-2h.d: Update.
	* testsuite/ld-cris/tls-ie-10.d: Update.
	* testsuite/ld-cris/tls-ie-11.d: Update.
	* testsuite/ld-cris/tls-ie-8.d: Update.
	* testsuite/ld-cris/tls-ie-9.d: Update.
	* testsuite/ld-cris/tls-js1.d: Update.
	* testsuite/ld-cris/tls-ld-4.d: Update.
	* testsuite/ld-cris/tls-ld-5.d: Update.
	* testsuite/ld-cris/tls-ld-6.d: Update.
	* testsuite/ld-cris/tls-ld-7.d: Update.
	* testsuite/ld-cris/tls-ldgd-14.d: Update.
	* testsuite/ld-cris/tls-ldgd-15.d: Update.
	* testsuite/ld-cris/tls-ldgdx-14.d: Update.
	* testsuite/ld-cris/tls-ldgdx-15.d: Update.
	* testsuite/ld-cris/tls-local-54.d: Update.
	* testsuite/ld-cris/tls-local-60.d: Update.
	* testsuite/ld-cris/tls-local-61.d: Update.
	* testsuite/ld-cris/tls-local-63.d: Update.
	* testsuite/ld-cris/tls-local-64.d: Update.
	* testsuite/ld-cris/tls-ok-30.d: Update.
	* testsuite/ld-cris/tls-ok-32.d: Update.
	* testsuite/ld-cris/tls-ok-34.d: Update.
	* testsuite/ld-mips-elf/tls-multi-got-1.got: Update.
	* testsuite/ld-mips-elf/tls-multi-got-1.r: Update.
	* testsuite/ld-mips-elf/tlsdyn-pie-o32.d: Update.
	* testsuite/ld-mips-elf/tlsdyn-pie-o32.got: Update.
	* testsuite/ld-mips-elf/tlslib-o32-hidden.got: Update.
	* testsuite/ld-mips-elf/tlslib-o32-ver.got: Update.
	* testsuite/ld-mips-elf/tlslib-o32.got: Update.
	* testsuite/ld-s390/tlspic.rd: Update.
	* testsuite/ld-s390/tlspic_64.rd: Update.
	* testsuite/ld-sparc/tlssunnopic32.rd: Update.
	* testsuite/ld-sparc/tlssunnopic64.rd: Update.
	* testsuite/ld-sparc/tlssunpic32.rd: Update.
	* testsuite/ld-sparc/tlssunpic64.rd: Update.
2019-07-13 09:57:50 +09:30
Alan Modra bb22a41815 PR24704, Internal error building skiboot for powerpc64-linux-gnu
While the skiboot linker script bears some culpability in this PR,
it's also true that the GOT indirect to GOT relative optimisation for
16-bit offsets isn't safe.  At least, it isn't safe to remove the GOT
entry based on distance between the GOT pointer and symbol calculated
from the preliminary layout.  So this patch removes that optimisation,
and reduces the range allowed for 32-bit and 34-bit offsets.

	PR 24704
bfd/
	* elf64-ppc.c (R_PPC64_GOT16_DS): Don't set has_gotrel.
	(ppc64_elf_edit_toc): Don't remove R_PPC64_GOT16_DS got entries.
	Reduce range of offsets allowed for other GOT relocs.
ld/
	* testsuite/ld-powerpc/elfv2exe.d: Update.
	* testsuite/ld-powerpc/elfv2so.d: Update.
2019-06-23 23:11:27 +09:30
Alan Modra 4a4e7361d6 PowerPC64 notoc calls
Calls from functions that don't have a valid toc pointer in r2 (these
calls are marked with _NOTOC relocs) to functions that require r2
valid must go via the callee global entry point.  This patch corrects
the condition the linker was using to detect functions that require r2
to be valid.  Values of both zero and one in st_other local entry bits
mean a function doesn't care about r2.

	* elf64-ppc.c (ppc64_elf_inline_plt): Correct st_other test for
	functions that require r2 valid to use local entry.
	(ppc64_elf_size_stubs, ppc64_elf_relocate_section): Likewise.
2019-06-19 14:01:05 +09:30
Alan Modra d4b87b1eb6 PowerPC comment fixes
"paddi rt,sym@pcrel" as an abbreviation for "paddi rt,0,sym@pcrel,1"
is invalid, so replace with "pla rt,sym@pcrel" which is a valid form
of "pla rt,sym@pcrel(0),1".

	* elf64-ppc.c: Fix comments involving paddi.
2019-06-14 10:22:49 +09:30
Alan Modra 04bdff6a76 PowerPC notoc linkage stubs
Use pcrel addressing instructions in linkage stubs.

bfd/
	* elf64-ppc.c: Comment on powerxx _notoc stub variants.
	(LI_R11_0, LIS_R11, ORI_R11_R11_0, SLDI_R11_R11_34): Define.
	(PADDI_R12_PC, PLD_R12_PC, D34, HA34): Define.
	(struct ppc_link_hash_table): Add powerxx_stubs.
	(ppc64_elf_check_relocs): Set powerxx_stubs.
	(build_powerxx_offset, size_powerxx_offset),
	(num_relocs_for_powerxx_offset),
	(emit_relocs_for_powerxx_offset): New functions.
	(plt_stub_size): Size powerxx stubs.
	(ppc_build_one_stub): Emit powerxx stubs.
	(ppc_size_one_stub): Size powerxx stubs.  Omit .eh_frame for
	powerxx stubs.
ld/
	* testsuite/ld-powerpc/notoc2.d,
	* testsuite/ld-powerpc/notoc2.s: New test.
	* testsuite/ld-powerpc/powerpc.exp: Run it.
2019-05-24 10:28:07 +09:30
Alan Modra 4a421c53cf PowerPC GOT_PCREL34 optimisation
bfd/
	* elf64-ppc.c (ppc64_elf_check_relocs): Set has_gotrel for
	R_PPC64_GOT_PCREL34.
	(xlate_pcrel_opt): New function.
	(ppc64_elf_edit_toc): Handle R_PPC64_GOT_PCREL34.
	(ppc64_elf_relocate_section): Edit GOT indirect to GOT relative
	for R_PPC64_GOT_PCREL34.  Implement R_PPC64_PCREL_OPT optimisation.
ld/
	* testsuite/ld-powerpc/pcrelopt.s,
	* testsuite/ld-powerpc/pcrelopt.d,
	* testsuite/ld-powerpc/pcrelopt.sec: New test.
	* testsuite/ld-powerpc/powerpc.exp: Run it.
2019-05-24 10:27:53 +09:30
Alan Modra 5663e32184 PowerPC relocations for prefix insns
include/
	* elf/ppc64.h (R_PPC64_PLTSEQ_NOTOC, R_PPC64_PLTCALL_NOTOC),
	(R_PPC64_PCREL_OPT, R_PPC64_D34, R_PPC64_D34_LO, R_PPC64_D34_HI30),
	(R_PPC64_D34_HA30, R_PPC64_PCREL34, R_PPC64_GOT_PCREL34),
	(R_PPC64_PLT_PCREL34, R_PPC64_PLT_PCREL34_NOTOC),
	(R_PPC64_ADDR16_HIGHER34, R_PPC64_ADDR16_HIGHERA34),
	(R_PPC64_ADDR16_HIGHEST34, R_PPC64_ADDR16_HIGHESTA34),
	(R_PPC64_REL16_HIGHER34, R_PPC64_REL16_HIGHERA34),
	(R_PPC64_REL16_HIGHEST34, R_PPC64_REL16_HIGHESTA34),
	(R_PPC64_D28, R_PPC64_PCREL28): Define.
bfd/
	* reloc.c (BFD_RELOC_PPC64_D34, BFD_RELOC_PPC64_D34_LO),
	(BFD_RELOC_PPC64_D34_HI30, BFD_RELOC_PPC64_D34_HA30),
	(BFD_RELOC_PPC64_PCREL34, BFD_RELOC_PPC64_GOT_PCREL34),
	(BFD_RELOC_PPC64_PLT_PCREL34),
	(BFD_RELOC_PPC64_ADDR16_HIGHER34, BFD_RELOC_PPC64_ADDR16_HIGHERA34),
	(BFD_RELOC_PPC64_ADDR16_HIGHEST34, BFD_RELOC_PPC64_ADDR16_HIGHESTA34),
	(BFD_RELOC_PPC64_REL16_HIGHER34, BFD_RELOC_PPC64_REL16_HIGHERA34),
	(BFD_RELOC_PPC64_REL16_HIGHEST34, BFD_RELOC_PPC64_REL16_HIGHESTA34),
	(BFD_RELOC_PPC64_D28, BFD_RELOC_PPC64_PCREL28): New reloc enums.
	* elf64-ppc.c (PNOP): Define.
	(ppc64_elf_howto_raw): Add reloc howtos for new relocations.
	(ppc64_elf_reloc_type_lookup): Translate new bfd reloc numbers.
	(ppc64_elf_ha_reloc): Adjust addend for highera34 and highesta34
	relocs.
	(ppc64_elf_prefix_reloc): New function.
	(struct ppc_link_hash_table): Add notoc_plt.
	(is_branch_reloc): Add R_PPC64_PLTCALL_NOTOC.
	(is_plt_seq_reloc): Add R_PPC64_PLT_PCREL34,
	R_PPC64_PLT_PCREL34_NOTOC, and R_PPC64_PLTSEQ_NOTOC.
	(ppc64_elf_check_relocs): Handle pcrel got and plt relocs.  Set
	has_pltcall for section on seeing R_PPC64_PLTCALL_NOTOC.  Handle
	possible need for dynamic relocs on non-pcrel powerxx relocs.
	(dec_dynrel_count): Handle non-pcrel powerxx relocs.
	(ppc64_elf_inline_plt): Handle R_PPC64_PLTCALL_NOTOC.
	(toc_adjusting_stub_needed): Likewise.
	(ppc64_elf_tls_optimize): Handle R_PPC64_PLTSEQ_NOTOC.
	(ppc64_elf_relocate_section): Handle new powerxx relocs.
	* bfd-in2.h: Regenerate.
	* libbfd.h: Regenerate.
gas/
	* config/tc-ppc.c (ppc_elf_suffix): Support @pcrel, @got@pcrel,
	@plt@pcrel, @higher34, @highera34, @highest34, and @highesta34.
	(fixup_size): Handle new powerxx relocs.
	(md_assemble): Warn for @pcrel on non-prefix insns.
	Accept @l, @h and @ha on prefix insns, and infer reloc without
	any @ suffix.  Translate powerxx relocs to suit DQ and DS field
	instructions.  Include operand tests as well as opcode test to
	translate BFD_RELOC_HI16_S to BFD_RELOC_PPC_16DX_HA.
	(ppc_fix_adjustable): Return false for pcrel GOT and PLT relocs.
	(md_apply_fix): Handle new powerxx relocs.
	* config/tc-ppc.h (TC_FORCE_RELOCATION_SUB_LOCAL): Accept
	BFD_RELOC_PPC64_ADDR16_HIGHER34, BFD_RELOC_PPC64_ADDR16_HIGHERA34,
	BFD_RELOC_PPC64_ADDR16_HIGHEST34, BFD_RELOC_PPC64_ADDR16_HIGHESTA34,
	BFD_RELOC_PPC64_D34, and BFD_RELOC_PPC64_D28.
	* testsuite/gas/ppc/prefix-reloc.d,
	* testsuite/gas/ppc/prefix-reloc.s: New test.
	* testsuite/gas/ppc/ppc.exp: Run it.
2019-05-24 10:27:49 +09:30
Alan Modra 066f4018ae PowerPC64 GOT indirect to GOT relative optimisation
This implements an optimisation that converts sequences like
  addis r9,r2,sym@got@ha
  ld r3,sym@got@l(r9)
to
  addis r9,r2,sym@toc@ha
  addi r3,r9,sym@toc@l
when "sym" is locally defined and can't be overridden.

bfd/
	* elf64-ppc.c (struct ppc64_elf_obj_tdata): Add has_gotrel.
	(struct _ppc64_elf_section_data): Likewise.
	(ppc64_elf_check_relocs): Set above fields.
	(ppc64_elf_edit_toc): Add a pass over GOT relocs.
	(ppc64_elf_relocate_section): Edit GOT indirect to GOT relative
	when possible.
ld/
	* testsuite/ld-powerpc/elfv2exe.d: Update.
	* testsuite/ld-powerpc/elfv2so.d: Update.
	* testsuite/ld-powerpc/tocopt.d: Update.
	* testsuite/ld-powerpc/tocopt.s: Update.
	* testsuite/ld-powerpc/tocopt5.d: Update.
	* testsuite/ld-powerpc/tocopt5.s: Update.
	* testsuite/ld-powerpc/tocopt7.d: Update.
	* testsuite/ld-powerpc/tocopt7.s: Update.
	* testsuite/ld-powerpc/tocopt8.d: Update.
	* testsuite/ld-powerpc/tocopt8.s: Update.
2019-04-30 22:09:54 +09:30
H.J. Lu a0ea3a14dc Check corrupt VTENTRY entry in bfd_elf_gc_record_vtentry
Instead of BFD_ASSERT (h != NULL) with

ld: BFD ... assertion fail .../bfd/elf64-x86-64.c:2562
ld: bad.o: invalid string offset 50331648 >= 371 for section `nterp'

check corrupt VTENTRY entry in bfd_elf_gc_record_vtentry with

ld: bad.o: section 'g': corrupt VTENTRY entry

	* elf-m10300.c (mn10300_elf_check_relocs): Remove BFD_ASSERT of
	"h != NULL".  Don't check "h != NULL" before calling.
	bfd_elf_gc_record_vtentry.
	* elf32-arm.c (elf32_arm_check_relocs): Likewise.
	* elf32-bfin.c (bfin_check_relocs): Likewise.
	* elf32-cris.c (cris_elf_check_relocs): Likewise.
	* elf32-csky.c (csky_elf_check_relocs): Likewise.
	* elf32-d10v.c (elf32_d10v_check_relocs): Likewise.
	* elf32-dlx.c (elf32_dlx_check_relocs): Likewise.
	* elf32-fr30.c (fr30_elf_check_relocs): Likewise.
	* elf32-frv.c (elf32_frv_check_relocs): Likewise.
	* elf32-hppa.c (elf32_hppa_check_relocs): Likewise.
	* elf32-i386.c (elf_i386_check_relocs): Likewise.
	* elf32-iq2000.c (iq2000_elf_check_relocs): Likewise.
	* elf32-m32r.c (m32r_elf_check_relocs): Likewise.
	* elf32-m68hc1x.c (elf32_m68hc11_check_relocs): Likewise.
	* elf32-m68k.c (elf_m68k_check_relocs): Likewise.
	* elf32-mcore.c (mcore_elf_check_relocs): Likewise.
	* elf32-metag.c (elf_metag_check_relocs): Likewise.
	* elf32-or1k.c (or1k_elf_check_relocs): Likewise.
	* elf32-ppc.c (ppc_elf_check_relocs): Likewise.
	* elf32-s390.c (elf_s390_check_relocs): Likewise.
	* elf32-sh.c (sh_elf_check_relocs): Likewise.
	* elf32-v850.c (v850_elf_check_relocs): Likewise.
	* elf32-vax.c (elf_vax_check_relocs): Likewise.
	* elf32-xstormy16.c (xstormy16_elf_check_relocs): Likewise.
	* elf32-xtensa.c (elf_xtensa_check_relocs): Likewise.
	* elf64-mmix.c (mmix_elf_check_relocs): Likewise.
	* elf64-ppc.c (ppc64_elf_check_relocs): Likewise.
	* elf64-s390.c (elf_s390_check_relocs): Likewise.
	* elf64-x86-64.c (elf_s390_check_relocs): Likewise.
	* elfxx-mips.c (_bfd_mips_elf_check_relocs): Likewise.
	* elfxx-sparc.c (_bfd_sparc_elf_check_relocs): Likewise.
	* elflink.c (bfd_elf_gc_record_vtinherit): Check for corrupt
	VTENTRY entry.
2019-04-11 06:45:05 -07:00
Alan Modra 827041555a Update year range in copyright notice of binutils files 2019-01-01 22:06:53 +10:30
Alan Modra c96e057398 [PowerPC64] Nop out ld 2,24(1) after old-style __tls_get_addr
When optimising inline plt calls to __tls_get_addr without tls marker
relocs, ld should zap any toc restore insn after the bctrl, to stop a
load-hit-store stall.

	* elf64-ppc.c (ppc64_elf_relocate_section <tls_ldgd_opt>): When
	editing an old-style __tls_get_addr call, replace a toc restore
	insn with a nop.
2018-12-31 12:12:38 +10:30
Alan Modra 7af5d5c4dd PR23980, assertion fail
All of the backend relocate_section functions that interpret reloc
numbers assuming the input file is of the expected type (ie. same as
output or very similar) really ought to be checking input file type.
Not many do, and those that do currently just assert.  This patch
replaces the assertion with a more graceful exit.

	PR 23980
	* elf32-i386.c (elf_i386_relocate_section): Exit with wrong format
	error rather than asserting input file is as expected.
	* elf32-s390.c (elf_s390_relocate_section): Likewise.
	* elf32-sh.c (sh_elf_relocate_section): Likewise.
	* elf32-xtensa.c (elf_xtensa_relocate_section): Likewise.
	* elf64-ppc.c (ppc64_elf_relocate_section): Likewise.
	* elf64-s390.c (elf_s390_relocate_section): Likewise.
	* elf64-x86-64.c (elf_x86_64_relocate_section): Likewise.
	* elf32-ppc.c (ppc_elf_relocate_section): Exit with wrong format
	error if input file is not ppc32 ELF.
2018-12-18 10:47:02 +10:30
Alan Modra 87469ba2d2 PR23980, powerpc64 ld segfault
PR 23980
	* elf64-ppc.c (ppc64_elf_hide_symbol): Check hash table type
	before referencing ppc64-only fields of hash entries.
2018-12-18 09:03:45 +10:30
Alan Modra ba85c15dab PR23937, powerpc64le local ifunc IRELATIVE relocs are wrong
IFUNC resolvers must always be called via their global entry point.
They will be called from ld.so rather than from the local executable.

	PR 23937
bfd/
	* elf64-ppc.c (write_plt_relocs_for_local_syms): Don't add local
	entry offset for ifuncs.
ld/
	* testsuite/ld-powerpc/pr23937.d,
	* testsuite/ld-powerpc/pr23937.s: New test.
	* testsuite/ld-powerpc/powerpc.exp: Run it.
2018-11-30 16:18:58 +10:30
Alan Modra 0930cb3021 _bfd_clear_contents bounds checking
This PR shows a fuzzed binary triggering a segfault via a bad
relocation in .debug_line.  It turns out that unlike normal
relocations applied to a section, the linker applies those with
symbols from discarded sections via _bfd_clear_contents without
checking that the relocation is within the section bounds.  The same
thing now happens when reading debug sections since commit
a4cd947aca, the PR23425 fix.

	PR 23770
	PR 23425
	* reloc.c (_bfd_clear_contents): Replace "location" param with
	"buf" and "off".  Bounds check "off".  Return status.
	* cofflink.c (_bfd_coff_generic_relocate_section): Update
	_bfd_clear_contents call.
	* elf-bfd.h (RELOC_AGAINST_DISCARDED_SECTION): Likewise.
	* elf32-arc.c (elf_arc_relocate_section): Likewise.
	* elf32-i386.c (elf_i386_relocate_section): Likewise.
	* elf32-metag.c (metag_final_link_relocate): Likewise.
	* elf32-nds32.c (nds32_elf_get_relocated_section_contents): Likewise.
	* elf32-ppc.c (ppc_elf_relocate_section): Likewise.
	* elf32-visium.c (visium_elf_relocate_section): Likewise.
	* elf64-ppc.c (ppc64_elf_relocate_section): Likewise.
	* elf64-x86-64.c *(elf_x86_64_relocate_section): Likewise.
	* libbfd-in.h (_bfd_clear_contents): Update prototype.
	* libbfd.h: Regenerate.
2018-10-13 23:54:33 +10:30
Alan Modra 3d58e1fcfb PowerPC64 --emit-relocs support for notoc stubs
This patch uses the newly defined high-part REL16 relocs to emit
relocations on the notoc stubs as we already do for other stubs.

	* elf64-ppc.c (num_relocs_for_offset): New function.
	(emit_relocs_for_offset): New function.
	(use_global_in_relocs): New function, split out from..
	(ppc_build_one_stub): ..here.  Output relocations for notoc stubs.
	(ppc_size_one_stub): Calculate reloc count for notoc stubs.
	(ppc64_elf_size_stubs): Don't count undefined syms in stub_globals.
2018-08-31 22:15:05 +09:30
Alan Modra 4a9699735b PowerPC64 higher REL16 relocations
There are occasions where someone might want to build a 64-bit
pc-relative offset from 16-bit pieces.  This adds the necessary REL16
relocs corresponding to existing ADDR16 relocs that can be used to
build 64-bit absolute values.

include/
	* elf/ppc64.h (R_PPC64_REL16_HIGH, R_PPC64_REL16_HIGHA),
	(R_PPC64_REL16_HIGHER, R_PPC64_REL16_HIGHERA),
	(R_PPC64_REL16_HIGHEST, R_PPC64_REL16_HIGHESTA): Define.
	(R_PPC64_LO_DS_OPT, R_PPC64_16DX_HA): Bump value.
bfd/
	* reloc.c (BFD_RELOC_PPC64_REL16_HIGH, BFD_RELOC_PPC64_REL16_HIGHA),
	(BFD_RELOC_PPC64_REL16_HIGHER, BFD_RELOC_PPC64_REL16_HIGHERA),
	(BFD_RELOC_PPC64_REL16_HIGHEST, BFD_RELOC_PPC64_REL16_HIGHESTA):
	Define.
	* elf64-ppc.c (ppc64_elf_howto_raw): Add new REL16 howtos.
	(ppc64_elf_reloc_type_lookup): Translate new REL16 relocs.
	(ppc64_elf_check_relocs, ppc64_elf_relocate_section): Handle them.
	* bfd-in2.h: Regenerate.
	* libbfd.h: Regenerate.
gas/
	* config/tc-ppc.h (TC_FORCE_RELOCATION_SUB_LOCAL): Allow ADDR16
	HIGH, HIGHA, HIGHER, HIGHERA, HIGHEST, and HIGHESTA relocs.
	Group 16-bit relocs.
	* config/tc-ppc.c (md_apply_fix): Translate those ADDR16 relocs
	to REL16 when pcrel.  Sort relocs.
2018-08-31 22:15:05 +09:30
Alan Modra f891966ff6 Rearrange ppc_size_one_stub and correct _notoc stub examples
This patch rearranges ppc_size_one_stub to make it a little easier to
compare against ppc_build_one_stub, and makes a few other random
changes that might help for future maintenance.  There should be no
functional changes here.

The patch also fixes code examples in comments.  A couple of "ori"
instructions lacked the source register operand, and "@high" is the
correct reloc modifier to use in a sequence building a 64-bit value.
(@hi reports overflow of a 32-bit signed value.)

	* elf64-ppc.c: Correct _notoc stub comments.
	(ppc_build_one_stub): Simplify output of branch for notoc
	long branch stub.  Don't include label offset of 8 bytes in
	"off" calculation for notoc plt stub.  Don't emit insns to get pc.
	(build_offset): Emit insns to get pc here instead.
	(size_offset): Add 4 extra insns.
	(plt_stub_size): Adjust for "off" and size_offset changes.
	(ppc_size_one_stub): Rearrange code into a switch, duplicating
	some to better match ppc_build_one_stub.
2018-08-31 22:15:05 +09:30
Alan Modra f53ad3cf2b PowerPC64 "call lacks nop"
The "-fPIC" and "-mcmodel=small" parts of these messages isn't always
true, so lets dispense with that and just report the type of stub
causing trouble.

	* elf64-ppc.c (ppc64_elf_relocate_section): Revise "call lacks
	nop" error message.
2018-08-24 00:23:27 +09:30
Alan Modra d0abeec8d4 Fix "unresolved reloc" error for NOTOC relocs
* elf64-ppc.c (ppc64_elf_relocate_section): Don't miss clearing
	unresolved_reloc on ppc_stub_plt_call_notoc.
2018-08-23 13:54:24 +09:30
Alan Modra 46807bf451 PowerPC HOWTOs
These take up far too many lines in the files.  This patch introduces
a replacement for the HOWTO macro that simplifies the relow howto
initialization.  Apart from the two relocs mentioned in the ChangeLog,
no relocation howto is changed.

	* elf64-ppc.c (HOW): Define.
	(ONES): Delete.
	(ppc64_elf_howto_raw): Use HOW to initialize entries.
	* elf32-ppc.c (HOW): Define.
	(ppc_elf_howto_raw): Use HOW to initialize entries, updating
	R_PPC_VLE_REL15 and R_PPC_VLE_REL24 to use bitpos=0.
2018-08-21 14:59:53 +09:30
Alan Modra 2cdcc33021 Correct elf64-ppc.c linkage stub comment and formatting fixes
ppc_stub_long_branch_notoc will never need more than a 32-bit offset
for the r12 offset since the stub target must be in range of a
branch instruction.

	* elf64-ppc.c: Correct ppc_stub_long_branch_notoc example.
	Formatting.
2018-08-16 22:57:00 +09:30
Alan Modra df136d64fa PowerPC64 EH info for _notoc linkage stubs
This patch generates EH info for the new _notoc linkage stubs, to
support unwinding from asynchronous signal handlers.  Unwinding
through the __tls_get_addr_opt stub was already supported, but that
was just a single stub.  With multiple stubs the EH opcodes need to be
emitted and sized when iterating over stubs, so this is done when
emitting and sizing the stub code.  Emitting the CIEs and FDEs is done
when sizing the stubs, as we did before in order to have the linker
generated FDEs indexed in .eh_frame_hdr.  I moved the final tweaks to
FDEs from ppc64_elf_finish_dynamic_sections to ppc64_elf_build_stubs
simply because it's tidier to be done with them at that point.

bfd/
	* elf64-ppc.c (struct map_stub): Delete tls_get_addr_opt_bctrl.
	Add lr_restore, eh_size and eh_base.
	(eh_advance, eh_advance_size): New functions.
	(build_tls_get_addr_stub): Emit EH info for stub.
	(ppc_build_one_stub): Likewise for _notoc stubs.
	(ppc_size_one_stub): Size EH info for stub.
	(group_sections): Init new map_stub fields.
	(stub_eh_frame_size): Delete.
	(ppc64_elf_size_stubs): Size EH info for stubs.  Set up dummy EH
	program for stubs.
	(ppc64_elf_build_stubs): Reinit new map_stub fields.  Set FDE
	offset to stub section here..
	(ppc64_elf_finish_dynamic_sections): ..rather than here.
ld/
	* testsuite/ld-powerpc/notoc.s: Generate some cfi.
	* testsuite/ld-powerpc/notoc.d: Adjust.
	* testsuite/ld-powerpc/notoc.wf: New file.
	* testsuite/ld-powerpc/powerpc.exp: Run "ext" and "notoc" tests
	as run_ld_link_tests rather than run_dump_test.
2018-08-07 18:43:55 +09:30
Alan Modra e81b4c933c __tls_get_addr_opt stubs and tocsave optimization
This patch fixes a bug in the handling of the __tls_get_addr_opt
stub.  Calls via this stub don't have a toc restoring instruction
following the "bl", and the stub itself doesn't have an initial toc
save instruction.  Thus it is incorrect to skip over the first
instruction when a __tls_get_addr call is marked with a tocsave
reloc.

	* elf64-ppc.c (ppc64_elf_relocate_section): Don't skip first
	instruction of __tls_get_addr_opt stub.
	(plt_stub_size): Omit ALWAYS_EMIT_R2SAVE condition when
	dealing with __tls_get_addr_opt stub.
	(build_tls_get_addr_stub, ppc_size_one_stub): Likewise.
2018-08-07 18:43:54 +09:30
Alan Modra 05d0e962f0 R_PPC64_REL24_NOTOC support
R_PPC64_REL24_NOTOC is used on calls like "bl foo@notoc" to tell the
linker that linkage stubs for PLT calls or long branches can't use r2
for pic addressing.  Instead, new stubs that generate pc-relative
addresses are used.  One complication is that pc-relative offsets to
the PLT may need to be 64-bit in large programs, in contrast to the
toc-relative addressing used by older PLT linkage stubs where a 32-bit
offset is sufficient until the PLT itself exceeds 2G in size.

.eh_frame info to cover the _notoc stubs is yet to be implemented.

bfd/
	* elf64-ppc.c (ADDI_R12_R11, ADDI_R12_R12, LIS_R12),
	(ADDIS_R12_R11, ORIS_R12_R12_0, ORI_R12_R12_0),
	(SLDI_R12_R12_32, LDX_R12_R11_R12, ADD_R12_R11_R12): Define.
	(ppc64_elf_howto_raw): Add R_PPC64_REL24_NOTOC entry.
	(ppc64_elf_reloc_type_lookup): Support R_PPC64_REL24_NOTOC.
	(ppc_stub_type): Add ppc_stub_long_branch_notoc,
	ppc_stub_long_branch_both, ppc_stub_plt_branch_notoc,
	ppc_stub_plt_branch_both, ppc_stub_plt_call_notoc, and
	ppc_stub_plt_call_both.
	(is_branch_reloc): Add R_PPC64_REL24_NOTOC.
	(build_offset, size_offset): New functions.
	(plt_stub_size): Support plt_call_notoc and plt_call_both.
	(ppc_build_one_stub, ppc_size_one_stub): Support new stubs.
	(toc_adjusting_stub_needed): Handle R_PPC64_REL24_NOTOC.
	(ppc64_elf_size_stubs): Likewise, and new stubs.
	(ppc64_elf_build_stubs, ppc64_elf_relocate_section): Likewise.
	* reloc.c: Add BFD_RELOC_PPC64_REL24_NOTOC.
	* bfd-in2.h: Regenerate.
	* libbfd.h: Regenerate.
gas/
	* config/tc-ppc.c (ppc_elf_suffix): Support @notoc.
	(ppc_force_relocation, ppc_fix_adjustable): Handle REL24_NOTOC.
ld/
	* testsuite/ld-powerpc/ext.d,
	* testsuite/ld-powerpc/ext.s,
	* testsuite/ld-powerpc/ext.lnk,
	* testsuite/ld-powerpc/notoc.d,
	* testsuite/ld-powerpc/notoc.s: New tests.
	* testsuite/ld-powerpc/powerpc.exp: Run them.
2018-08-05 12:11:51 +09:30
Alan Modra 3f6ff4799b Lose _r2off in powerpc64 stub names
Not a lot is conveyed by putting _r2off in a stub symbol that can't be
seen by inspecting the stub code or the toc restoring instruction
immediately after a call via such a stub.  Also, we don't distinguish
plt_call stub symbols from plt_call_r2save stub symbols, so this patch
makes long branch and plt branch stub symbols consistent with that
decision.

bfd/
	* elf64-ppc.c (ppc_build_one_stub): Lose "_r2off" in stub symbols.
ld/
	* testsuite/ld-powerpc/elfv2exe.d: Adjust for stub symbol change.
	* testsuite/ld-powerpc/tocopt6.d: Likewise.
2018-08-05 10:33:07 +09:30
Alan Modra 1aa4214141 PowerPC64 __tls_get_addr_opt stub .eh_frame fix
This patch sets stub_offset in ppc_size_one_stub rather than in
ppc_build_one_stub.  That allows the plt stub alignment to be done in
just ppc_size_one_stub rather than both functions.  The patch also
corrects the place where the alignment was done, fixing a possible
error in .eh_frame data, and tidies some offset calculations.

bfd/
	* elf64-ppc.c (plt_stub_pad): Delay plt_stub_size call until needed.
	(ppc_build_one_stub): Don't set stub_offset, instead assert that
	it is sane.  Don't adjust stub_offset for alignment.  Adjust size
	calculation.  Use "targ" temp when calculating offsets.
	(ppc_size_one_stub): Set stub_offset here.  Use "targ" temp when
	calculating offsets.  Adjust for alignment before setting
	tls_get_addr_opt_bctrl.
ld/
	* testsuite/ld-powerpc/powerpc.exp: Run tlsopt5 with plt alignment.
	* testsuite/ld-powerpc/tlsopt5.s: Add extra call.
	* testsuite/ld-powerpc/tlsopt5.wf: Adjust expected output.
	* testsuite/ld-powerpc/tlsopt5.d: Likewise.
2018-08-01 12:14:22 +09:30
Alan Modra 33cb30a1f9 Implement PowerPC64 .localentry for value 1
This adds support for ".localentry 1", a new st_other
STO_PPC64_LOCAL_MASK encoding that signifies a function with a single
entry point like ".localentry 0", but unlike a ".localentry 0"
function does not preserve r2.

include/
	* elf/ppc64.h: Specify byte offset to local entry for values
	of two to six in STO_PPC64_LOCAL_MASK.  Clarify r2 return
	value for such functions when entering via global entry point.
	Specify meaning of a value of one in STO_PPC64_LOCAL_MASK.
bfd/
	* elf64-ppc.c (ppc64_elf_size_stubs): Use a ppc_stub_long_branch_r2off
	for calls to symbols with STO_PPC64_LOCAL_MASK bits set to 1.
gas/
	* config/tc-ppc.c (ppc_elf_localentry): Allow .localentry values
	of 1 and 7 to directly set value into STO_PPC64_LOCAL_MASK bits.
ld/testsuite/
	* ld-powerpc/elfv2.s: Add .localentry f5,1 testcase.
	* ld-powerpc/elfv2exe.d: Update.
	* ld-powerpc/elfv2so.d: Update.
2018-07-26 12:53:50 +09:30