Commit Graph

5709 Commits

Author SHA1 Message Date
Ralf Wildenhues 822ce8ee21 Remove freebsd1 from libtool.m4 macros and config.rpath.
/:
	Import from Libtool and gnulib:

	2011-01-27  Gerald Pfeifer  <gerald@pfeifer.com>

	Prepare for supporting FreeBSD 10.
	* config.rpath: Remove handling of freebsd1* which soon would
	match FreeBSD 10.0.

	2011-01-20  Gerald Pfeifer  <gerald@pfeifer.com>  (tiny change)

	Remove support for FreeBSD 1.x.
	* libtool.m4 (_LT_LINKER_SHLIBS)
	(_LT_SYS_DYNAMIC_LINKER): Remove handling of freebsd1* which
	soon would incorrectly match FreeBSD 10.0.

bfd/:
	* configure: Regenerate.

gas/:
	* configure: Regenerate.

ld/:
	* configure: Regenerate.

opcodes/:
	* configure: Regenerate.

binutils/:
	* configure: Regenerate.

gprof/:
	* configure: Regenerate.
2011-02-13 21:00:14 +00:00
Mike Frysinger 13c02f06ff opcodes: blackfin: fix decoding of ABS
The single cycle dual mac ABS insn was incorrectly decoding the mac1
part of the insn.

Once we fix the decode, update the gas tests to have the correct output.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-02-13 18:55:22 +00:00
Mike Frysinger 4db6639409 opcodes: blackfin: fix decoding of dsp mult insns
When assigning to a register half, the mac0 part of the mult insn
was not decoding properly.  It would always show a full dreg instead
of the dreg low half.

Once we fix the disassembler, we have to update a few of the gas
tests as their previous expected output was incorrect.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-02-13 18:54:49 +00:00
Mike Frysinger 36f446111a gas/opcodes: blackfin: punt BYTEOP2M insn support
The BYTEOP2M insn was part of the initial Blackfin designs, but never made
it into any actual silicon.  So punt support for it.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-02-13 18:53:16 +00:00
Mike Frysinger 26bb3ddd50 gas/opcodes: blackfin: move dsp mac func defines to common header
The mmod field is decoded in a few places (gas/opcodes/sim), so move it to
a common place to avoid duplication.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-02-12 19:36:31 +00:00
Mike Frysinger 347d120a63 gas: blackfin: docs: typo fixes and fill out directive info
A bunch of Blackfin-specific directives were lacking info on what they
actually do, so fill in the blanks.  Further, the byte2/byte4 descriptions
were swapped.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-02-11 19:05:30 +00:00
Mike Frysinger 5f95629354 gas: blackfin: reject FP/SP with TESTSET
The TESTSET insn does not work with the FP/SP Pregs, so reject them.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-02-11 19:04:33 +00:00
Alan Modra c0e524fe0f * doc/c-ppc.texi (PowerPC-Opts <-nops>): Clarify. 2011-02-10 22:50:09 +00:00
Kai Tietz 40c034ebed 2011-02-10 Kai Tietz <kai.tietz@onevision.com>
* gas/cfi/cfi-x86_64.d: Adjust for x64 PE+.
2011-02-10 17:06:44 +00:00
Alan Modra 635fb38d39 * doc/as.texinfo (Overview): Add missing markup around Blackfin
and PowerPC options.
2011-02-10 12:29:23 +00:00
Alan Modra b8b738ac92 * config/tc-ppc.c (md_show_usage): Remove -l and -b. Add -K PIC.
* doc/as.texinfo: Refer to and include c-ppc.texi for PowerPC options.
	(Overview <Target PowerPC options>): Add a number of missing options.
	* doc/c-ppc.texi: Likewise.  Add markup for use in manpage generation.
2011-02-10 11:59:12 +00:00
Alan Modra 726eb385b2 * gas/m68k/cpu32.d: Set explicit architecture for objdump.
* gas/m68k/mcf-coproc.d: Likewise.
	* gas/m68k/mcf-wdebug.d: Likewise.
2011-02-10 08:43:27 +00:00
Alan Modra 867287bb32 * gas/elf/dwarf2-4.s: Don't use @. 2011-02-10 05:06:19 +00:00
H.J. Lu 2dde194857 Use f32_patt in i386_align_code when tuning for i686.
gas/

2011-02-08  H.J. Lu  <hongjiu.lu@intel.com>

	PR gas/6957
	* config/tc-i386.c (i386_align_code): Use f32_patt when tuning
	for i686.

gas/testsuite/

2011-02-08  H.J. Lu  <hongjiu.lu@intel.com>

	PR gas/6957
	* gas/i386/nops-1-i686.d: Updated.
	* gas/i386/nops-3-i686.d: Likewise.
	* gas/i386/nops-4-i686.d: Likewise.
2011-02-08 20:21:26 +00:00
H.J. Lu a586129ea5 Also update cpu_arch_isa_flags for ISA extensions.
gas/

2011-02-08  H.J. Lu  <hongjiu.lu@intel.com>

	* config/tc-i386.c (set_cpu_arch): Also update cpu_arch_isa_flags
	for ISA extensions.
	(md_parse_option): Likewise.

gas/testsuite/

2011-02-08  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/i386.exp: Run nops-4a-i686 and nops-6.

	* gas/i386/nops-4a-i686.d: New.
	* gas/i386/nops-6.d: Likewise.
	* gas/i386/nops-6.s: Likewise.
2011-02-08 18:12:25 +00:00
Alan Modra 32a96f364b PR gas/3041
* gas/m68k/p3041pcrel.s, * gas/m68k/p3041pcrel.d: New test.
	* gas/m68k/all.exp: Add "p3041pcrel" and enable p3041 tests for
	all m68k-aout targets.
2011-02-07 00:04:09 +00:00
Bernd Schmidt 98d23befa7 gas/
* doc/as.texinfo (Target TIC6X options): Don't mention "-matomic".
	* doc/c-tic6x.texi (TIC6X Directives): Don't mention ".atomic".
	(TIC6X Options): Don't mention "-matomic".
	* config/tc-tic6x.c (OPTION_MATOMIC, OPTION_MNO_ATOMIC): Delete.
	(md_longopts): Remove corresponding entries.
	(md_parse_option): Don't handle them.
	(md_show_usage): Don't document them.
	(tic6x_atomic): Delete variable.
	(tic6x_update_features): Always copy tic6x_arch_enable to
	tic6x_features.
	(tic6x_arch_enable): Remove references to TIC6X_INSN_ATOMIC.
	(s_tic6x_atomic, s_tic6x_noatomic): Remove functions.
	(md_pseudo_table): Remove ".atomic" and ".noatomic".

	gas/testsuite/
	* gas/tic6x/dir-junk.l: Remove tests for .atomic and .noatomic.
	* gas/tic6x/dir-junk.s: Likewise.
	* gas/tic6x/insns-c674x-bad.d: Remove test.
	* gas/tic6x/insns-c674x-bad.l: Likewise.
	* gas/tic6x/insns-atomic.d: Remove "-matomic" switch.

	include/opcode/
	* tic6x-opcode-table.h (cmtl, ll, sl): Available on C64XP.
	* tic6x.h (TIC6X_INSN_ATOMIC): Remove.
2011-02-03 23:20:26 +00:00
Nick Clifton a22429b98e * write.c (write_contents): Include output file name and bfd error
value when reporting the inability to write to the output file.
	* config/tc-rx.c (rx_handle_align): Do not insert NOPs into align
	frag that has a non-zero fill value.

	* gas/all/align.d: Skip for the RX.
	* gas/elf/group1a.d: Likewise.
	* gas/elf/groupautoa.d: Likewise.
	* gas/elf/elf.exp: Do not run section5 test for the RX port.
	* gas/elf/section4.d: Likewise.
	* gas/elf/section7.d: Likewise.
	* gas/macros/semi.s: Fill with a non-zero pattern.
	* gas/macros/semi.d: Expect non-zero fill value.
	* gas/rx/bcnd.d: Update expected disassembly.
	* gas/rx/bra.d: Likewise.
	* gas/rx/macros.inc: Add reg1 macro.
	* gas/rx/max.sm: Use reg1 macro to avoid generating illegal NOP
	instruction.
	* gas/rx/mov.sm: Likewise.
	* gas/rx/max.d: Update expected disassembly.
	* gas/rx/mov.d: Likewise.
	* gas/rx/rx-asm-good.s: Use Renesas section names.
	* gas/rx/rx-asm-good.d: Update expected disassembly.
2011-01-31 16:43:15 +00:00
DJ Delorie eb6fae196b * config/tc-rx.c (md_convert_frag): If we can't compute the target
address, zero out the values stored in the object file to make
objdump's output consistent.
2011-01-27 22:38:32 +00:00
Kai Tietz ca19b261ec 2011-01-26 Kai Tietz <kai.tietz@onevision.com>
* config/tc-i386.c (md_begin): Set for x64 windows COFF target
        x86_dwarf2_return_column to 32.
2011-01-26 10:16:12 +00:00
Nick Clifton b37a4e796b PR gas/12384
* config/tc-h8300.c (constant_fits_width_p): Use correct type for
	comparison.
2011-01-20 12:49:05 +00:00
H.J. Lu 6ac88ef38d Don't compress debug sections smaller than 32 bytes.
2011-01-18  H.J. Lu  <hongjiu.lu@intel.com>

	* write.c (compress_debug): Return if section size is small than
	32 byte.
2011-01-19 00:24:23 +00:00
H.J. Lu 24a2d04da0 Don't compress empty debug sections.
gas/

2011-01-18  H.J. Lu  <hongjiu.lu@intel.com>

	PR gas/12409
	* write.c (compress_debug): Return if section size is 0.

gas/testsuite/

2011-01-18  H.J. Lu  <hongjiu.lu@intel.com>

	PR gas/12409
	* gas/elf/dwarf2-4.d: New.
	* gas/elf/dwarf2-4.s: Likewise.
2011-01-18 18:55:59 +00:00
H.J. Lu e3949f17f3 Properly sign-extend byte.
gas/testsuite/

2011-01-18  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/intel.d: Updated.
	* gas/i386/opcode-intel.d: Likewise.
	* gas/i386/opcode-suffix.d: Likewise.
	* gas/i386/opcode.d: Likewise.

opcodes/

2011-01-18  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (sIbT): New.
	(b_T_mode): Likewise.
	(dis386): Replace sIb with sIbT on "pushT".
	(x86_64_table): Replace sIb with Ib on "aam" and "aad".
	(OP_sI): Handle b_T_mode.  Properly sign-extend byte.
2011-01-18 17:08:13 +00:00
H.J. Lu 0ae8ca9029 Add tbm flag and TBM instruction pattern.
2011-01-18  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/ilp32/x86-64-arch-2.d: Add tbm flag and TBM instruction
	pattern.
2011-01-18 16:39:50 +00:00
Nick Clifton 4a58c4bdc9 * config/tc-arm.c (arm_cpus): Add Faraday ARMv5TE compatible
cores: fa606te, fa616te, fmp626.  Modify the VFP of fa626te.
	* doc/c-arm.texi (ARM Options): Add -mcpu={fa606te, fa616te,
	fmp626} options.
2011-01-18 14:10:44 +00:00
Nick Clifton 7c31ae1375 PR gas/12390
* doc/all.texi: Add NS32K
	* doc/as.texinfo: Remove target specific details of which
	characters act as comment initiators and statement separators into
	individual target specific files.
	* doc/c-alpha.texi (Alpha-Chars): Document special behaviour of
	the hash character at the start of a line.
	* doc/c-arm.texi (ARM-Chars): Likewise.
	* doc/c-avr.texi (AVR-Chars): Likewise.
	* doc/c-d10v.texi (D10V-Chars): Likewise.
	* doc/c-d30v.texi (D30V-Chars):	Likewise.
	* doc/c-mmix.texi (MMIX-Chars): Likewise.
	* doc/c-s390.texi (s390 characters): Likewise.
	* doc/c-sh.texi (SH-Chars): Likewise.
	* doc/c-sh64.texi (SH64-Chars): Likewise.
	* doc/c-sparc.texi (SPARC-Chars): Likewise.
	* doc/c-tic6x.texi (TIC6X Syntax): Likewise.
	* doc/c-xtensa.texi (Xtensa Syntax): Likewise.
	* doc/c-z80.texi (Z80-Chars): Likewise.
	* doc/c-z8k.texi (Z8000-Chars): Likewise.
	* doc/c-pdp11.texi (PDP11-Syntax): Document line separator character.
	* doc/c-arc.texi (ARC-Chars): Fill in this subsection.
	* doc/c-bfin.texi (Blackfin Syntax): Document line comment and
	line separator characters.
	* doc/c-cr16.texi (CR16 Syntax): Likewise.
	* doc/c-i386.texi (i386-Chars): Likewise.
	* doc/c-i860.texi (i860-Chars):	Likewise.
	* doc/c-i960.texi (i960-Chars):	Likewise.
	* doc/c-ip2k.texi (IP2K-Chars):	Likewise.
	* doc/c-lm32.texi (LM32-Chars):	likewise.
	* doc/c-m32c.texi (M32C-Chars): Likewise.
	* doc/c-m68hc11.texi (M68HC11-syntax): Likewise.
	* doc/c-m68k.texi (M68K-Chars): Likewise.
	* doc/c-microblaze.texi (MicroBlaze-Chars): Likewise.
	* doc/c-msp430.texi (MSP430-Chars): Likewise.
	* doc/c-mt.texi (MT-Chars): Likewise.
	* doc/c-ns32k.texi (NS32K-Chars): Likewise.
	* doc/c-pj.texi (PJ-Chars): Likewise.
	* doc/c-ppc.texi (PowerPC-Chars): Likewise.
	* doc/c-rx.texi (RX-Chars): Likewise.
	* doc/c-score.texi (SCORE-Chars): Likewise.
	* doc/c-tic54x.texi (TIC54X-Chars): Likewise.
	* doc/c-v850.texi (V850-Chars): Likewise.
	* doc/c-vax.texi (VAX-Chars): Likewise.
	* doc/c-xc16x.texi (xc16x-Chars): Likewise.
2011-01-18 13:37:39 +00:00
Quentin Neill 337e412819 Add TBM testsuite files missing from last commit. 2011-01-17 22:17:16 +00:00
Quentin Neill 2a2a0f38e7 Add support for TBM instructions.
gas/

2011-01-17  Quentin Neill  <quentin.neill@amd.com>

	* config/tc-i386.c (cpu_arch): Add CPU_TBM_FLAGS.

	* doc/c-i386.texi (i386-TBM): New section.

opcodes/

2011-01-17  Quentin Neill  <quentin.neill@amd.com>

	* i386-dis.c (REG_XOP_TBM_01): New.
	(REG_XOP_TBM_02): New.
	(reg_table): Add REG_XOP_TBM_01 and REG_XOP_TBM_02 tables.
	(xop_table): Redirect to REG_XOP_TBM_01 and REG_XOP_TBM_02
	entries, and add bextr instruction.

	* i386-gen.c (cpu_flag_init): Add CPU_TBM_FLAGS, CpuTBM.
	(cpu_flags): Add CpuTBM.

	* i386-opc.h (CpuTBM) New.
	(i386_cpu_flags): Add bit cputbm.

	* i386-opc.tbl: Add bextr, blcfill, blci, blcic, blcmsk,
	blcs, blsfill, blsic, t1mskc, and tzmsk.

	* i386-init.h: Regenerated.
	* i386-tbl.h: Regenerated

gas/testsuite

2011-01-17  Quentin Neill  <quentin.neill@amd.com>

	* gas/i386/tbm.s: New.
	* gas/i386/tbm.d: New.
	* gas/i386/tbm-intel.d: New.
	* gas/i386/x86-64-tbm.s: New.
	* gas/i386/x86-64-tbm.d: New.
	* gas/i386/x86-64-tbm-intel.d: New.
	* gas/i386/arch-10.d: Add tbm flag and TBM instruction pattern.
	* gas/i386/arch-10.s: Add a TBM instruction.
	* gas/i386/arch-10-1.l: Add TBM instruction pattern.
	* gas/i386/arch-10-2.l: Likewise.
	* gas/i386/arch-10-3.l: Likewise.
	* gas/i386/arch-10-4.l: Likewise.
	* gas/i386/x86-64-arch-2.s: Likewise.
	* gas/i386/x86-64-arch-2.d: Likewise.
2011-01-17 18:40:36 +00:00
H.J. Lu 862be3fb9a Disallow 64bit relocations in x32 mode.
gas/

2011-01-16  H.J. Lu  <hongjiu.lu@intel.com>

	* config/tc-i386.c (disallow_64bit_disp): Renamed to ...
	(disallow_64bit_reloc): This.
	(md_assemble): Don't check movabs for x32 mode here.
	(i386_target_format): Updated.
	(tc_gen_reloc): Check if 64bit relocations are allowed.

gas/testsuite/

2011-01-16  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/ilp32/immed64.s: New.
	* gas/i386/ilp32/reloc64.s: Likewise.
	* gas/i386/ilp32/x86-64-pcrel.s: Likewise.

	* gas/i386/ilp32/inval.s: Add more tests.

	* gas/i386/ilp32/immed64.d: Updated.
	* gas/i386/ilp32/inval.l: Likewise.
	* gas/i386/ilp32/reloc64.d: Likewise.
	* gas/i386/ilp32/x86-64-pcrel.d: Likewise.
2011-01-16 17:06:12 +00:00
H.J. Lu 4a22cb7c64 Update ChangeLog. 2011-01-15 17:25:30 +00:00
H.J. Lu 7f56bc95d6 Don't allow movabs with relocation in x32 mode.
gas/

2011-01-15  H.J. Lu  <hongjiu.lu@intel.com>

	* config/tc-i386.c (disallow_64bit_disp): New.
	(x86_elf_abi): Replace X86_64_LP64_ABI/X86_64_ILP32_ABI with
	X86_64_ABI/X86_64_X32_ABI.
	(md_assemble): Don't allow movabs with relocation in x32 mode.
	(i386_target_format): Updated.

gas/testsuite/

2011-01-15  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/ilp32/ilp32.exp: Run inval.

	* gas/i386/ilp32/inval.l: New.
	* gas/i386/ilp32/inval.s: Likewise.
	* gas/i386/ilp32/x86-64.s: Likewise.

	* gas/i386/ilp32/x86-64.d: Don't use ../x86_64.s.  Updated.
2011-01-15 15:48:02 +00:00
H.J. Lu 570561f71a Rename --n32 to --x32.
gas/

2011-01-14  H.J. Lu  <hongjiu.lu@intel.com>

	* config/tc-i386.c (OPTION_N32): Renamed to ...
	(OPTION_X32): This.
	(md_longopts): Replace n32 with x32.
	(md_parse_option): Updated.
	(md_show_usage): Likewise.

	* doc/c-i386.texi: Replace n32 with x32.

gas/testsuite/

2011-01-14  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/ilp32/cfi/ilp32.exp: Replace --n32 with --x32.
	* gas/i386/ilp32/elf/ilp32.exp: Likewise.
	* gas/i386/ilp32/ilp32.exp: Likewise.
	* gas/i386/ilp32/lns/ilp32.exp: Likewise.

ld/testsuite/

2011-01-14  H.J. Lu  <hongjiu.lu@intel.com>

	* ld-x86-64/ilp32-1.d: Replace --n32 with --x32.
	* ld-x86-64/ilp32-2.d: Likewise.
	* ld-x86-64/ilp32-3.d: Likewise.
	* ld-x86-64/ilp32-4.d: Likewise.
	* ld-x86-64/ilp32-5.d: Likewise.
	* ld-x86-64/x86-64.exp: Likewise.
2011-01-14 23:07:11 +00:00
Mingjie Xing c95354ed13 Take unadjusted offset for loongson3a specific instructions. 2011-01-11 07:22:09 +00:00
Nick Clifton 7af8ed2d47 * config/tc-i386.c (x86_elf_abi): Only define for targets that use
it.
2011-01-10 10:10:06 +00:00
Nick Clifton cdf9ccec6a * config/tc-arm.c (s_arm_tls_desceq): Move code into ELF-only
part of the file.
2011-01-10 09:50:02 +00:00
Nathan Sidwell 0855e32bf5 bfd/
* reloc.c (BFD_RELOC_ARM_TLS_GOTDESC, BFD_RELOC_ARM_TLS_CALL,
	BFD_RELOC_ARM_THM_TLS_CALL, BFD_RELOC_ARM_TLS_DESCSEQ,
	BFD_RELOC_ARM_THM_TLS_DESCSEQ, BFD_RELOC_ARM_TLS_DESC): New
	relocations.
	* libbfd.h: Rebuilt.
	* bfd-in2.h: Rebuilt.
	* elf32-arm.c (elf32_arm_howto_table_1): Add new relocations.
	(elf32_arm_reloc_map): Likewise.
	(tls_trampoline, dl_tlsdesc_lazy_trampoline): New PLT templates.
	(elf32_arm_stub_long_branch_any_tls_pic,
	elf32_arm_stub_long_branch_v4t_thumb_tls_pic): New stub templates.
	(DEF_STUBS): Add new stubs.
	(struct_elf_arm_obj_data): Add local_tlsdesc_gotent field.
	(elf32_arm_local_tlsdesc_gotent): New.
	(GOT_TLS_GDESC): New mask.
	(GOT_TLS_GD_ANY): Define.
	(struct elf32_arm_link_hash_entry): Add tlsdesc_got field.
	(elf32_arm_compute_jump_table_size): New.
	(struct elf32_arm_link_hash_table): Add next_tls_desc_index,
	num_tls_desc, dt_tlsdesc_plt, dt_tlsdesc_got, tls_trampoline,
	sgotplt_jump_table_size fields.
	(elf32_arm_link_hash_newfunc): Initialize tlsdesc_got field.
	(elf32_arm_link_hash_table_create): Initialize new fields.
	(arm_type_of_stub): Check TLS desc relocs too.
	(elf32_arm_stub_name): TLS desc relocs can be shared.
	(elf32_arm_tls_transition): Determine relaxation.
	(arm_stub_required_alignment): Add tls stubs.
	(elf32_arm_size_stubs): Likewise.
	(elf32_arm_tls_relax): Perform TLS relaxing.
	(elf32_arm_final_link_relocate): Process TLS DESC relocations.
	(IS_ARM_TLS_GNU_RELOC): New.
	(IS_ARM_TLS_RELOC): Use it.
	(elf32_arm_relocate_section): Perform TLS relaxing.
	(elf32_arm_check_relocs): Anticipate TLS relaxing, process tls
	desc relocations.
	(allocate_dynrelocs): Allocate tls desc relcoations.
	(elf32_arm_output_arch_local_syms): Emit tls trampoline mapping
	symbols.
	(elf32_arm_size_dynamic_sections): Allocate tls trampolines and
	got slots.
	(elf32_arm_always_size_sections): New. Create _TLS_MODULE_BASE
	symbol.
	(elf32_arm_finish_dynamic_symbol): Adjust.
	(arm_put_trampoline): New.
	(elf32_arm_finish_dynamic_sections): Emit new dynamic tags and tls
	trampolines.
	(elf_backend_always_size_sections): Define.

	include/elf/
	* arm.h (R_ARM_TLS_DESC, R_ARM_TLS_GOTDESC, R_ARM_TLS_CALL,
	R_ARM_TLS_DESCSEQ, T_ARM_THM_TLS_CALL, R_ARM_THM_TLS_DESCSEQ): New
	relocations.

	gas/
	* doc/c-arm.texi: Document TLSDESC and TLSCALL relocations, and
	.tlsdescseq directive.
	* config/tc-arm.c (arm_typed_reg_parse): Check for potential reloc
	following a symbol.
	(s_arm_tls_descseq): New directive.
	(md_pseudo_table): Add it.
	(encode_branch): Allow TLS_CALL relocs too.
	(do_t_blx, do_t_branch23): Use encode_branch.
	(reloc_names): Add tlsdesc and tlscall.
	(md_apply_fix): Process tls desc relocations.
	(tc_gen_reloc): Likewise.
	(arm_fix_adjustable): Likewise.

	gas/testsuite/
	* gas/arm/tls.s: Add tlsdesc tests.
	* gas/arm/tls.d: Adjust.

	ld/testsuite/
	* ld-arm/arm-elf.exp: Added tests for new TLS handling
	relocations.
	* ld-arm/tls-descrelax-be32.d: New.
	* ld-arm/tls-descrelax-be32.s: New.
	* ld-arm/tls-descrelax-be8.d: New.
	* ld-arm/tls-descrelax-be8.s: New.
	* ld-arm/tls-descrelax-v7.d: New.
	* ld-arm/tls-descrelax-v7.s: New.
	* ld-arm/tls-descrelax.d: New.
	* ld-arm/tls-descrelax.s: New.
	* ld-arm/tls-descseq.d: New.
	* ld-arm/tls-descseq.r: New.
	* ld-arm/tls-descseq.s: New.
	* ld-arm/tls-gdesc-got.d: New.
	* ld-arm/tls-gdesc-got.s: New.
	* ld-arm/tls-gdesc-nlazy.g: New.
	* ld-arm/tls-gdesc-nlazy.s: New.
	* ld-arm/tls-gdesc.d: New.
	* ld-arm/tls-gdesc.r: New.
	* ld-arm/tls-gdesc.s: New.
	* ld-arm/tls-gdierelax.d: New.
	* ld-arm/tls-gdierelax.s: New.
	* ld-arm/tls-gdierelax2.d: New.
	* ld-arm/tls-gdierelax2.s: New.
	* ld-arm/tls-gdlerelax.d: New.
	* ld-arm/tls-gdlerelax.s: New.
	* ld-arm/tls-lib-loc.d: New.
	* ld-arm/tls-lib-loc.r: New.
	* ld-arm/tls-lib-loc.s: New.
	* ld-arm/tls-longplt-lib.d: New.
	* ld-arm/tls-longplt-lib.s: New.
	* ld-arm/tls-longplt.d: New.
	* ld-arm/tls-longplt.s: New.
	* ld-arm/tls-mixed.r: New.
	* ld-arm/tls-mixed.s: New.
	* ld-arm/tls-thumb1.d: New.
	* ld-arm/tls-thumb1.s: New.
	* ld-arm/arm-elf.exp: New.
2011-01-10 08:40:19 +00:00
H.J. Lu 5bc3844998 Update gas/i386/ilp32/x86-64-arch-2.d.
2011-01-07  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/ilp32/x86-64-arch-2.d: Add bmi flag and BMI instruction
	pattern.
2011-01-07 23:26:59 +00:00
Quentin Neill 87973e9f82 Add docs and arch tests to BMI.
gas/
2011-01-07  Quentin Neill  <quentin.neill@amd.com>

	* config/tc-i386.c (cpu_arch): Add CPU_BMI_FLAGS.

	* doc/c-i386.texi (i386-BMI): New section.

gas/testsuite/
2011-01-07  Quentin Neill  <quentin.neill@amd.com>

	* gas/i386/arch-10.s: Add a BMI instruction.
	* gas/i386/x86-64-arch-2.s: Likewise.
	* gas/i386/arch-10.d: Add bmi flag and BMI instruction pattern.
	* gas/i386/x86-64-arch-2.d: Likewise.
	* gas/i386/arch-10-1.l: Add BMI instruction pattern.
	* gas/i386/arch-10-2.l: Likewise.
	* gas/i386/arch-10-3.l: Likewise.
	* gas/i386/arch-10-4.l: Likewise.
2011-01-07 17:44:30 +00:00
Paul Koning 1df3baeaa6 * gas/pdp11/pdp11.exp: Add run of absreloc. 2011-01-07 01:51:45 +00:00
Paul Koning 12505806d0 * config/tc-pdp11.c (parse_op_no_deferred): Allow PC-relative
references to absolute addresses.
2011-01-06 16:41:35 +00:00
Paul Koning 6630558452 * gas/pdp11/opcode.d: Fix expected output for sec instruction. 2011-01-06 16:31:39 +00:00
Nathan Sidwell 639e30d297 gas/testsuite/
* gas/arm/blx-bad.s: New.
	* gas/arm/blx-bad.d: New.

	opcodes/
	* arm-dis.c (thumb32_opcodes): BLX must have bit zero clear.
2011-01-06 14:30:43 +00:00
DJ Delorie 9689e3a3a7 * reloc.c: Add BFD_RELOC_RX_OP_NEG.
* libbfd.h: Regenerate.
* bfd-in2.h: Regenerate.
* elf32-rx.c: Add it to the list, corresponding to R_RX_OPneg.

* config/tc-rx.c (tc_gen_reloc): Emit an RX_OP_NEG expression
instead of an RH_NEG32 one.
2011-01-05 22:04:09 +00:00
H.J. Lu 35cc6a0b56 Clarify --n32.
2011-01-05  Jonathan Wakely  <jwakely.gcc@gmail.com>

	* doc/c-i386.texi: Clarify --n32.
2011-01-05 21:35:08 +00:00
H.J. Lu f12dc42220 Implement BMI instructions. 2011-01-05 00:16:57 +00:00
H.J. Lu 4fb3aee212 Update copyright in comments to 2011. 2011-01-01 21:42:17 +00:00
H.J. Lu 0db46eb403 Update copyright to 2011.
binutils/

2011-01-01  H.J. Lu  <hongjiu.lu@intel.com>

	* version.c (print_version): Update copyright to 2011.

gas/

2011-01-01  H.J. Lu  <hongjiu.lu@intel.com>

	* gas.c (parse_args): Update copyright to 2011.

gold/

2011-01-01  H.J. Lu  <hongjiu.lu@intel.com>

	* version.cc (print_version): Update copyright to 2011.

ld/

2011-01-01  H.J. Lu  <hongjiu.lu@intel.com>

	* ldver.c (ldversion): Update copyright to 2011.

opcodes/

2011-01-01  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-gen.c (process_copyright): Update copyright to 2011.
2011-01-01 20:55:48 +00:00
H.J. Lu 1b0b9b7110 Also expect .zdebug in section name in ILP32 tests.
2011-01-01  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/ilp32/lns/lns-common-1.d: Also expect .zdebug in
	section name.
	* gas/i386/ilp32/lns/lns-duplicate.d: Likewise.
2011-01-01 19:27:52 +00:00
H.J. Lu 5b326c3ee2 Rotate gas ChangeLogs. 2011-01-01 16:44:48 +00:00