Commit Graph

150 Commits

Author SHA1 Message Date
Jonathan Larmour 53f541af8d * gencode.c (tab): Avoid inserting code before variables all declared. 2005-04-14 20:16:06 +00:00
Mark Kettenis 2b193c4ab6 From common/ChangeLog:
* aclocal.m4 Include ../../gettext.m4.
(CY_WITH_NLS, CY_GNU_GETTEXT, AM_PATH_PROG_WITH_TEST)
(AM_LC_MESSAGES): Remove.
* configure: Regenerate.

Regenerate all other configures.
2005-03-23 18:55:19 +00:00
Andrew Cagney 35695fd6e5 Index: arm/ChangeLog
2005-01-14  Andrew Cagney  <cagney@gnu.org>

	* configure.ac: Sinclude aclocal.m4 before common.m4.  Add
	explicit call to AC_CONFIG_HEADER.
	* configure: Regenerate.

Index: common/ChangeLog
2005-01-14  Andrew Cagney  <cagney@gnu.org>

	* configure.ac: Replace SIM_AC_COMMON with sinclude of common.m4.
	Add explicit call to AC_CONFIG_HEADER.
	* common.m4: Delete call to AC_CONFIG_HEADER, update usage.
	* configure: Re-generate.

Index: d10v/ChangeLog
2005-01-14  Andrew Cagney  <cagney@gnu.org>

	* configure.ac: Sinclude aclocal.m4 before common.m4.  Add
	explicit call to AC_CONFIG_HEADER.
	* configure: Regenerate.

Index: erc32/ChangeLog
2005-01-14  Andrew Cagney  <cagney@gnu.org>

	* configure.ac: Sinclude aclocal.m4 before common.m4.  Add
	explicit call to AC_CONFIG_HEADER.
	* configure: Regenerate.

Index: frv/ChangeLog
2005-01-14  Andrew Cagney  <cagney@gnu.org>

	* configure.ac: Sinclude aclocal.m4 before common.m4.  Add
	explicit call to AC_CONFIG_HEADER.
	* configure: Regenerate.

Index: h8300/ChangeLog
2005-01-14  Andrew Cagney  <cagney@gnu.org>

	* configure.ac: Sinclude aclocal.m4 before common.m4.  Add
	explicit call to AC_CONFIG_HEADER.
	* configure: Regenerate.

Index: m32r/ChangeLog
2005-01-14  Andrew Cagney  <cagney@gnu.org>

	* configure.ac: Sinclude aclocal.m4 before common.m4.  Add
	explicit call to AC_CONFIG_HEADER.
	* configure: Regenerate.

Index: m68hc11/ChangeLog
2005-01-14  Andrew Cagney  <cagney@gnu.org>

	* configure.ac: Sinclude aclocal.m4 before common.m4.  Add
	explicit call to AC_CONFIG_HEADER.
	* configure: Regenerate.

Index: mcore/ChangeLog
2005-01-14  Andrew Cagney  <cagney@gnu.org>

	* configure.ac: Sinclude aclocal.m4 before common.m4.  Add
	explicit call to AC_CONFIG_HEADER.
	* configure: Regenerate.

Index: mips/ChangeLog
2005-01-14  Andrew Cagney  <cagney@gnu.org>

	* configure.ac: Sinclude aclocal.m4 before common.m4.  Add
	explicit call to AC_CONFIG_HEADER.
	* configure: Regenerate.

Index: mn10300/ChangeLog
2005-01-14  Andrew Cagney  <cagney@gnu.org>

	* configure.ac: Sinclude aclocal.m4 before common.m4.  Add
	explicit call to AC_CONFIG_HEADER.
	* configure: Regenerate.

Index: sh/ChangeLog
2005-01-14  Andrew Cagney  <cagney@gnu.org>

	* configure.ac: Sinclude aclocal.m4 before common.m4.  Add
	explicit call to AC_CONFIG_HEADER.
	* configure: Regenerate.

Index: v850/ChangeLog
2005-01-14  Andrew Cagney  <cagney@gnu.org>

	* configure.ac: Sinclude aclocal.m4 before common.m4.  Add
	explicit call to AC_CONFIG_HEADER.
	* configure: Regenerate.
2005-01-14 20:05:48 +00:00
Andrew Cagney f05692463c Index: sh/ChangeLog
2005-01-12  Andrew Cagney  <cagney@gnu.org>

	* configure.ac: Update to use ../common/common.m4.
	* configure: Re-generate.

Index: mn10300/ChangeLog
2005-01-12  Andrew Cagney  <cagney@gnu.org>

	* configure.ac: Update to use ../common/common.m4.
	* configure: Re-generate.

Index: d10v/ChangeLog
2005-01-12  Andrew Cagney  <cagney@gnu.org>

	* configure.ac: Update to use ../common/common.m4.
	* configure: Re-generate.

Index: erc32/ChangeLog
2005-01-12  Andrew Cagney  <cagney@gnu.org>

	* configure.ac: Update to use ../common/common.m4.
	* configure: Re-generate.

Index: frv/ChangeLog
2005-01-12  Andrew Cagney  <cagney@gnu.org>

	* configure.ac: Update to use ../common/common.m4.
	* configure: Re-generate.

Index: h8300/ChangeLog
2005-01-12  Andrew Cagney  <cagney@gnu.org>

	* configure.ac: Update to use ../common/common.m4.
	* configure: Re-generate.

Index: m32r/ChangeLog
2005-01-12  Andrew Cagney  <cagney@gnu.org>

	* configure.ac: Update to use ../common/common.m4.
	* configure: Re-generate.

Index: mcore/ChangeLog
2005-01-12  Andrew Cagney  <cagney@gnu.org>

	* configure.ac: Update to use ../common/common.m4.
	* configure: Re-generate.

Index: mips/ChangeLog
2005-01-12  Andrew Cagney  <cagney@gnu.org>

	* configure.ac: Update to use ../common/common.m4.
	* configure: Re-generate.

Index: v850/ChangeLog
2005-01-12  Andrew Cagney  <cagney@gnu.org>

	* configure.ac: Update to use ../common/common.m4.
	* configure: Re-generate.

Index: common/ChangeLog
2005-01-12  Andrew Cagney  <cagney@gnu.org>

	* common.m4: New file, based on of aclocal.m4.

Index: arm/ChangeLog
2005-01-12  Andrew Cagney  <cagney@gnu.org>

	* configure.ac: Update to use ../common/common.m4.
	* configure: Re-generate.
2005-01-12 17:12:46 +00:00
Andrew Cagney 38f48d729d Index: m32r/ChangeLog
2005-01-11  Andrew Cagney  <cagney@localhost.localdomain>

	* configure: Regenerated to track ../common/aclocal.m4 changes.

Index: m68hc11/ChangeLog
2005-01-11  Andrew Cagney  <cagney@localhost.localdomain>

	* configure: Regenerated to track ../common/aclocal.m4 changes.

Index: mcore/ChangeLog
2005-01-11  Andrew Cagney  <cagney@localhost.localdomain>

	* configure: Regenerated to track ../common/aclocal.m4 changes.

Index: mips/ChangeLog
2005-01-11  Andrew Cagney  <cagney@localhost.localdomain>

	* configure: Regenerated to track ../common/aclocal.m4 changes.

Index: mn10300/ChangeLog
2005-01-11  Andrew Cagney  <cagney@localhost.localdomain>

	* configure: Regenerated to track ../common/aclocal.m4 changes.

Index: ppc/ChangeLog
2005-01-11  Andrew Cagney  <cagney@localhost.localdomain>

	* configure.ac: Delete AC_CONFIG_AUX_DIR.
	* configure: Re-generate.

Index: sh/ChangeLog
2005-01-11  Andrew Cagney  <cagney@localhost.localdomain>

	* configure: Regenerated to track ../common/aclocal.m4 changes.

Index: testsuite/ChangeLog
2005-01-11  Andrew Cagney  <cagney@localhost.localdomain>

	* configure: Regenerated to track ../common/aclocal.m4 changes.

Index: v850/ChangeLog
2005-01-11  Andrew Cagney  <cagney@localhost.localdomain>

	* configure: Regenerated to track ../common/aclocal.m4 changes.

Index: erc32/ChangeLog
2005-01-11  Andrew Cagney  <cagney@localhost.localdomain>

	* configure: Regenerated to track ../common/aclocal.m4 changes.

Index: frv/ChangeLog
2005-01-11  Andrew Cagney  <cagney@localhost.localdomain>

	* configure: Regenerated to track ../common/aclocal.m4 changes.

Index: h8300/ChangeLog
2005-01-11  Andrew Cagney  <cagney@localhost.localdomain>

	* configure: Regenerated to track ../common/aclocal.m4 changes.

Index: igen/ChangeLog
2005-01-11  Andrew Cagney  <cagney@localhost.localdomain>

	* configure.ac: Delete AC_CONFIG_AUX_DIR.
	* configure: Re-generate.

Index: d10v/ChangeLog
2005-01-11  Andrew Cagney  <cagney@localhost.localdomain>

	* configure: Regenerated to track ../common/aclocal.m4 changes.

Index: ChangeLog
2005-01-11  Andrew Cagney  <cagney@gnu.org>

	* Makefile.in (autoconf-common autoheader-common): Add --force to
	autoconf and autoheader.
	(autoconf-common autoheader-common)
	(autoconf-install autoheader-install): Check for configure.ac, not
	configure.in.
	* configure.ac: Delete AC_CONFIG_AUX_DIR.
	* configure: Re-generate.

Index: arm/ChangeLog
2005-01-11  Andrew Cagney  <cagney@localhost.localdomain>

	* configure: Regenerated to track ../common/aclocal.m4 changes.

Index: common/ChangeLog
2005-01-11  Andrew Cagney  <cagney@localhost.localdomain>

	* aclocal.m4 (SIM_AC_OUTPUT): Rewrite to use 2.59 macros.
	* configure: Regenerated to track ../common/aclocal.m4 changes.
2005-01-12 16:23:24 +00:00
Andrew Cagney b702665739 Index: arm/ChangeLog
2005-01-07  Andrew Cagney  <cagney@gnu.org>

	* configure.ac: Rename configure.in, require autoconf 2.59.
	* configure: Re-generate.

Index: ChangeLog
2005-01-07  Andrew Cagney  <cagney@gnu.org>

	* configure.ac: Replace configure.in.  Requires autoconf 2.59 and
	correctly calls AC_CONFIG_SUBDIRS.
	* configure: Re-generate.

Index: common/ChangeLog
2005-01-07  Andrew Cagney  <cagney@gnu.org>

	* configure.ac: Rename configure.in, require autoconf 2.59.
	* aclocal.m4 (SIM_AC_COMMON): Delete call to AC_CONFIG_AUX_DIR.
	* configure: Re-generate.

Index: d10v/ChangeLog
2005-01-07  Andrew Cagney  <cagney@gnu.org>

	* configure.ac: Rename configure.in, require autoconf 2.59.
	* configure: Re-generate.

Index: erc32/ChangeLog
2005-01-07  Andrew Cagney  <cagney@gnu.org>

	* configure.ac: Rename configure.in, require autoconf 2.59.
	* configure: Re-generate.

Index: frv/ChangeLog
2005-01-07  Andrew Cagney  <cagney@gnu.org>

	* configure.ac: Rename configure.in, require autoconf 2.59.
	* configure: Re-generate.

Index: h8300/ChangeLog
2005-01-07  Andrew Cagney  <cagney@gnu.org>

	* configure.ac: Rename configure.in, require autoconf 2.59.
	* configure: Re-generate.

Index: igen/ChangeLog
2005-01-07  Andrew Cagney  <cagney@gnu.org>

	* configure.ac: Rename configure.in, require autoconf 2.59.
	* configure: Re-generate.

Index: m32r/ChangeLog
2005-01-07  Andrew Cagney  <cagney@gnu.org>

	* configure.ac: Rename configure.in, require autoconf 2.59.
	* configure: Re-generate.

Index: m68hc11/ChangeLog
2005-01-07  Andrew Cagney  <cagney@gnu.org>

	* configure.ac: Rename configure.in, require autoconf 2.59.
	* configure: Re-generate.

Index: mcore/ChangeLog
2005-01-07  Andrew Cagney  <cagney@gnu.org>

	* configure.ac: Rename configure.in, require autoconf 2.59.
	* configure: Re-generate.

Index: mips/ChangeLog
2005-01-07  Andrew Cagney  <cagney@gnu.org>

	* configure.ac: Rename configure.in, require autoconf 2.59.
	* configure: Re-generate.

Index: mn10300/ChangeLog
2005-01-07  Andrew Cagney  <cagney@gnu.org>

	* configure.ac: Rename configure.in, require autoconf 2.59.
	* configure: Re-generate.

Index: ppc/ChangeLog
2005-01-07  Andrew Cagney  <cagney@gnu.org>

	* configure.ac: Rename configure.in, require autoconf 2.59.
	* configure: Re-generate.

Index: sh/ChangeLog
2005-01-07  Andrew Cagney  <cagney@gnu.org>

	* configure.ac: Rename configure.in, require autoconf 2.59.
	* configure: Re-generate.

Index: testsuite/d10v-elf/ChangeLog
2005-01-07  Andrew Cagney  <cagney@gnu.org>

	* configure.ac: Rename configure.in, require autoconf 2.59.
	* configure: Re-generate.

Index: testsuite/frv-elf/ChangeLog
2005-01-07  Andrew Cagney  <cagney@gnu.org>

	* configure.ac: Rename configure.in, require autoconf 2.59.
	* configure: Re-generate.

Index: testsuite/m32r-elf/ChangeLog
2005-01-07  Andrew Cagney  <cagney@gnu.org>

	* configure.ac: Rename configure.in, require autoconf 2.59.
	* configure: Re-generate.

Index: testsuite/mips64el-elf/ChangeLog
2005-01-07  Andrew Cagney  <cagney@gnu.org>

	* configure.ac: Rename configure.in, require autoconf 2.59.
	* configure: Re-generate.

Index: testsuite/ChangeLog
2005-01-07  Andrew Cagney  <cagney@gnu.org>

	* configure.ac: Rename configure.in, require autoconf 2.59.
	* configure: Re-generate.

Index: v850/ChangeLog
2005-01-07  Andrew Cagney  <cagney@gnu.org>

	* configure.ac: Rename configure.in, require autoconf 2.59.
	* configure: Re-generate.
2005-01-10 16:14:50 +00:00
Hans-Peter Nilsson 379832de9a * configure: Regenerate for ../common/aclocal.m4 update. 2004-12-07 23:51:23 +00:00
Corinna Vinschen ae0a84af70 * gencode.c (movua.l): Compensate for endianness.
* interp.c (RAISE_EXCEPTION_IF_IN_DELAY_SLOT): New macro.
	(in_delay_slot): New flag variable.
	(Delay_Slot): Set in_delay_slot.
	(sim_resume): Reset in_delay_slot after leaving code switch.
	* gencode.c (op tab): Call RAISE_EXCEPTION_IF_IN_DELAY_SLOT for all
	instructions not allowed in delay slots.

	Commited by Corinna Vinschen <vinschen@redhat.com>
	Introduce SH2a support.
	* interp.c: Change type of jump table to short.  Add various macros.
	(sim_load): Save the bfd machine code.
	(sim_create_inferior): Ditto.
	(union saved_state_type): Add tbr, ibnr and ibcr registers.
	Move bfd_mach to end of struct.  Add regstack pointer.
	(init_dsp): Don't swap contents of sh_dsp_table any more.  Instead
	use it directly in its own switch statement.  Allocate space for 512
	register banks.
	(do_long_move_insn): New function.
	(do_blog_insn): Ditto.
	(trap): Use trap #13 and trap #14 to set ibnr and ibcr.
	* gencode.c: Move movx/movy insns into separate switch statement.
	(op tab): Add sh2a insns.  Reject instructions that are disabled
	on that chip.
	(gensim_caselist): Generate default case here instead of in caller.
	(gensim): Generate two separate switch statements.  Call
	gensim_caselist once for each (for movsxy_tab and for tab).
	Add tokens for r15 and multiple regs.
	(conflict_warn, warn_conflicts): Add for debugging.
2004-09-08 09:11:50 +00:00
Joern Rennecke a134f341e6 * gencode.c (tab): For shad snd shld, fix result for
(op1 < 0 && shift_amount == 0).
2004-08-18 11:47:15 +00:00
Michael Snyder 915213a4d5 2004-02-02 Michael Snyder <msnyder@redhat.com>
* gencode.c (movua.l): Set thislock to 0, not n.
2004-02-13 00:01:19 +00:00
Michael Snyder 3e5117978b 2004-02-12 Michael Snyder <msnyder@redhat.com>
* gencode.c (table): Change from char to short.
	(dumptable): Change generated table from char to short.
	* interp.c (sh_jump_table, sh_dsp_table, ppi_table): char to short.
	(init_dsp): Compute size of sh_dsp_table.
	(sim_resume): Change jump_table from char to short.
2004-02-12 19:32:12 +00:00
Michael Snyder 0145ab2e52 2004-01-27 Michael Snyder <msnyder@redhat.com>
* gencode.c: (op tab): Some refs and defs fixes.
	"fsrra" -> "fsrra <FREG_N>".
        "sleep": replace array ref with array addr.
        "trapa": ditto.
2004-01-27 23:30:01 +00:00
Michael Snyder 4ae0cff4ca 2004-01-27 Michael Snyder <msnyder@redhat.com>
* gencode.c: Comment and whitespace clean-ups.
2004-01-27 23:23:57 +00:00
Michael Snyder 87acb4a7d1 2004-01-07 Michael Snyder <msnyder@redhat.com>
* gencode.c: Whitespace	cleanup.
        * interp.c: Ditto.
2004-01-10 00:43:28 +00:00
Michael Snyder 86bc60ebf4 2004-01-07 Michael Snyder <msnyder@redhat.com>
* gencode.c: Replace 'Hitachi' with 'Renesas'.
        (op tab): Add new instructions for sh4a, DBR, SBR.
        (expand_opcode): Add handling for new movxy combinations.
        (gensym_caselist): Ditto.
        (expand_ppi_movxy): Remove movx/movy expansions,
        now handled in expand_opcode.
        (gensym): Add some helpful macros.
        (expand_ppi_code): Flatten loop for simplicity, tweak for 12-bit
        instead of 8-bit table (some insns are ambiguous to 8 bits).
	(ppi_gensim, main): Generate 12-bit instead of 8-bit ppi table.

	* interp.c: Replace 'Hitachi' with 'Renesas'.
        (union saved_state_type): Add dbr, sgr, ldst.
        (get_loop_bounds_ext): New function.
        (init_dsp): Add bfd_mach_sh4al_dsp.
	(sim_resume): Handle extended loop bounds.
2004-01-09 19:44:50 +00:00
Michael Snyder 673fc5d0a7 2003-12-18 Michael Snyder <msnyder@redhat.com>
* gencode.c (expand_opcode): Simplify and reorganize.
        Eliminate "shift" parameter.  Eliminate "4 bits at a time"
        assumption.  Flatten switch statement to a single level.
        Add "eeee" token for even-numbered registers.
        (bton): Delete.
        (fsca): Use "eeee" token.
        (ppi_moves): Rename to "expand_ppi_movxy".  Do the ddt
        [movx/movy] expansion here, as well as the ppi expansion.
        (gensim_caselist): Accept 'eeee' along with 'nnnn'.
2004-01-06 01:05:02 +00:00
Joern Rennecke 794cd17b28 * interp.c (fsca_s, fsrra_s): New functions.
* gencode.c (tab): Add entries for fsca and fsrra.
	(expand_opcode): Allow variable length n / m fields.
2003-11-03 14:14:15 +00:00
Joern Rennecke 8822d0016c include/gdb:
* callback.h (struct host_callback_struct): New members ftruncate
        and truncate.
gdb:
sim/common:
        * callback.c (os_ftruncate, os_truncate): New functions.
        (default_callback): Initialize ftruncate and truncate members.
sim/sh:
        * syscall.h (SYS_truncate, SYS_ftruncate): Define.
        * interp.c (trap): Add support for SYS_ftruncate and SYS_truncate.
2003-10-15 12:30:47 +00:00
Michael Snyder d1789acece 2003-08-11 Shrinivas Atre <shrinivasa@KPITCummins.com>
* sim/sh/gencode.c ( tab[] ): Addition of MAC.L handler and
        correction for MAC.W handler
        * sim/sh/interp.c ( macl ): New Function. Implementation of
        MAC.L handler.
2003-08-11 19:28:05 +00:00
Michael Snyder 240f98d342 2003-08-07 Michael Snyder <msnyder@redhat.com>
* gencode.c (expand_ppi_code): Comment spelling fix.
2003-08-07 21:36:43 +00:00
Michael Snyder 437b0e60a1 2003-07-25 Michael Snyder <msnyder@redhat.com>
* gencode.c (pshl): Change < to <= (shift by 16 is allowed).
        Cast argument of >> to unsigned to prevent sign extension.
        (psha): Change < to <= (shift by 32 is allowed).
2003-07-25 23:52:43 +00:00
Michael Snyder 32fcda6a20 2003-07-24 Michael Snyder <msnyder@redhat.com>
* gencode.c: Fix typo in comment.
2003-07-25 00:59:36 +00:00
Michael Snyder e343a93ac0 2003-07-23 Michael Snyder <msnyder@redhat.com>
* gencode.c: A few more fix-ups of refs and defs.
        (frchg): Raise SIGILL if in double-precision mode.
        (ldtlb): We don't simulate cache, so this is a no-op.
        (movsxy_tab): Correct a few bit pattern errors.
2003-07-24 00:38:07 +00:00
Michael Snyder 1b606171ad 2003-07-09 Michael Snyder <msnyder@redhat.com>
* gencode.c (prnd): Clear LSW of result to zeros.
2003-07-23 21:47:28 +00:00
Michael Snyder fcfae95cf8 2003-07-09 Michael Snyder <msnyder@redhat.com>
* gencode.c (pmuls): Expression is mis-parenthesized.
2003-07-23 21:43:50 +00:00
Michael Snyder c13a4caaf8 2003-07-09 Michael Snyder <msnyder@redhat.com>
* gencode.c (ppi_gensim): For a conditional ppi insn, if the
        condition is false, we want to return (not break).  A break
        will take us to the end of the function where registers will
	be updated, whereas the desired outcome is for nothing to change.
2003-07-23 21:28:06 +00:00
Michael Snyder b939d772c1 2003-06-27 Michael Snyder <msnyder@redhat.com>
* gencode.c (op tab): Some fix-ups of refs and defs.
        (ocbi, ocbp): Cache not simulated, but may cause memory fault.
        (gensym_caselist): Add default case to switch statement.
        (expand_ppi_code): Add default case to switch statement.
2003-07-23 21:25:41 +00:00
Michael Snyder d2f18ae42a 2003-06-27 Michael Snyder <msnyder@redhat.com>
* gencode.c (op tab): Implement movca.l.
2003-07-23 21:23:32 +00:00
Michael Snyder 9e1d0fc1a1 2003-06-27 Michael Snyder <msnyder@redhat.com>
* gencode.c (op movsxy_tab): Fix an error in the bit pattern.
2003-07-23 21:17:33 +00:00
Michael Snyder 15dee5d561 2003-06-27 Michael Snyder <msnyder@redhat.com>
* gencode.c (gensim_caselist): The movy instructions use
        registers R6 and R7 (not R4 and R5 like the movx insns).
2003-07-23 21:14:54 +00:00
Michael Snyder e53a5a69d7 2003-07-03 Michael Snyder <msnyder@redhat.com>
* gencode.c (movs): Fix a couple of text transpositions.
2003-07-04 00:03:52 +00:00
Michael Snyder 0b2828595e 2003-06-27 Michael Snyder <msnyder@redhat.com>
* gencode.c (op movsxy_tab): Fix up some copy/paste errors
        in name: s/REG_x/REG_y/.
2003-06-28 01:34:47 +00:00
Michael Snyder 8dc30ef74a 2003-06-27 Michael Snyder <msnyder@redhat.com>
* gencode.c (op tab): Move misplaced semicolon.
2003-06-27 21:18:42 +00:00
Andrew Cagney 6b4a89357a Index: arm/ChangeLog
2003-02-27  Andrew Cagney  <cagney@redhat.com>

	* wrapper.c (sim_create_inferior, sim_open): Rename _bfd to bfd.

Index: common/ChangeLog
2003-02-27  Andrew Cagney  <cagney@redhat.com>

	* sim-utils.h (sim_analyze_program, sim_load_file): Rename _bfd to bfd.
	* sim-hload.c (sim_load), sim-base.h (sim_state_base): Ditto.
	* nrun.c (main): Ditto.

Index: d10v/ChangeLog
2003-02-27  Andrew Cagney  <cagney@redhat.com>

	* interp.c (sim_open, sim_create_inferior): Rename _bfd to bfd.

Index: erc32/ChangeLog
2003-02-27  Andrew Cagney  <cagney@redhat.com>

	* interf.c (sim_open, sim_create_inferior): Rename _bfd to bfd.

Index: h8300/ChangeLog
2003-02-27  Andrew Cagney  <cagney@redhat.com>

	* compile.c (sim_open, sim_create_inferior): Rename _bfd to bfd.

Index: h8500/ChangeLog
2003-02-27  Andrew Cagney  <cagney@redhat.com>

	* compile.c (sim_open, sim_create_inferior): Rename _bfd to bfd.

Index: i960/ChangeLog
2003-02-27  Andrew Cagney  <cagney@redhat.com>

	* sim-if.c (sim_open, sim_create_inferior): Rename _bfd to bfd.

Index: m32r/ChangeLog
2003-02-27  Andrew Cagney  <cagney@redhat.com>

	* sim-if.c (sim_open, sim_create_inferior): Rename _bfd to bfd.

Index: m68hc11/ChangeLog
2003-02-27  Andrew Cagney  <cagney@redhat.com>

	* interp.c (sim_prepare_for_program, sim_open)
	(sim_create_inferior): Rename _bfd to bfd.

Index: mcore/ChangeLog
2003-02-27  Andrew Cagney  <cagney@redhat.com>

	* interp.c (sim_open, sim_create_inferior): Rename _bfd to bfd.

Index: mips/ChangeLog
2003-02-27  Andrew Cagney  <cagney@redhat.com>

	* interp.c (sim_open):
	(sim_create_inferior):

Index: mn10200/ChangeLog
2003-02-27  Andrew Cagney  <cagney@redhat.com>

	* interp.c (sim_open, sim_create_inferior): Rename _bfd to bfd.

Index: mn10300/ChangeLog
2003-02-27  Andrew Cagney  <cagney@redhat.com>

	* interp.c (sim_open, sim_create_inferior, sim_open)
	(sim_create_inferior): Rename _bfd to bfd.

Index: ppc/ChangeLog
2003-02-27  Andrew Cagney  <cagney@redhat.com>

	* sim_calls.c (sim_open, sim_create_inferior): Rename _bfd to bfd.

Index: sh/ChangeLog
2003-02-27  Andrew Cagney  <cagney@redhat.com>

	* interp.c (init_dsp, sim_open, sim_create_inferior): Rename _bfd
	to bfd.

Index: v850/ChangeLog
2003-02-27  Andrew Cagney  <cagney@redhat.com>

	* interp.c (sim_open, sim_create_inferior): Rename _bfd to bfd.

Index: z8k/ChangeLog
2003-02-27  Andrew Cagney  <cagney@redhat.com>

	* iface.c (sim_open, sim_create_inferior): Rename _bfd to bfd.
2003-02-27 23:26:34 +00:00
Nick Clifton 2bc8946db8 Commit Sh2E addition 2003-02-06 10:42:33 +00:00
Joern Rennecke fd8f4948fe gcc uses trap 33 for profiling, but the simulator didn't support it.
This patch fixes the gcc.dg/nest.c failures for sh-elf.

Fri Oct 11 16:22:28 2002  J"orn Rennecke <joern.rennecke@superh.com>

	* interp.c (trap): Return int.  Take extra parameter for address
	of the trap instruction.  Changed all callers.
	Add case 33 for profiling.
	* gencode.c (trapa): Handle trap 33 using the trap function.
	Add read of vector for generic traps.
2002-10-11 15:31:28 +00:00
Joern Rennecke 2f14585c74 include/gdb:
* sim-sh.h: Add enum constants for sh[1-4], sh3e, sh3?-dsp,
	renumbering the sh-dsp registers to use distinct numbers.
sim/sh:
	* Makefile.in (interp.o): Depend on $(srcroot)/include/gdb/sim-sh.h.
	* interp.c: Include "gdb/sim-sh.h".
	(sim_store_register, sim_fetch_register): Use constants defined there.
gdb:
	* sh-tdep.c (sh_dsp_register_sim_regno): New function.
	(sh_gdbarch_init): Use it for sh-dsp.
2002-07-17 18:43:28 +00:00
Joern Rennecke dc9feb5c97 * interp.c (sim_resume): Fix setting of bus error for
instruction fetch.
2002-06-18 15:54:44 +00:00
Andrew Cagney c8cca39f98 Import current --enable-gdb-build-warnings. 2002-06-16 16:33:35 +00:00
Andrew Cagney 3c25f8c7b0 Move include/callback.h and include/remote-sim.h to include/gdb/.
Update accordingly.
2002-06-09 15:45:54 +00:00
Alexandre Oliva de0492b6fb * interp.c (sim_create_inferior): Record program arguments for
later inspection by the trap handler.
(count_argc): New function.
(prog_argv): Declare static.
(sim_write): Declare.
(trap): Implement argc, argnlen and argn system calls. Do not
abort on unknown system calls--simply return -1.
* syscall.h (SYS_argc, SYS_argnlen, SYS_argn): Define.
2001-01-30 23:03:56 +00:00
Alexandre Oliva 554064594b * interp.c (trap): Implement time. 2001-01-24 13:17:01 +00:00
Ben Elliston 8f1e3ff591 * pendanticism
2000-10-24  Ben Elliston  <bje@redhat.com>

	* gencode.c (tab): Delimit strings with commas where applicable.
2000-10-24 01:02:53 +00:00
Joern Rennecke 2532761bdf sh-dsp support, simulator speedup by using host byte order:
* Makefile.in (interp.o): Depends on ppi.c .
	(ppi.c): New rule.
	* gencode.c (printonmatch, think, genopc): Deleted.
	(MAX_NR_STUFF): Now 42.
	(tab): Add SH-DSP CPU instructions.
	Amalgamate ldc / stc / lds / sts instructions with similar
	bit patterns.  Fix opcodes of stc Rm_BANK,@-<REG_N>.
	Fix semantics of lds.l @<REG_N>+,MACH (no sign extend).
	(movsxy_tab): New array.
	For movs, change MMMM field to GGGG, and mmmm field to MMMM.
	Added entries for movx, movy and parallel processing insns.
	(ppi_tab): New array.
	(qfunc): Stabilize sort.
	(expand_opcode): Handle [01][01]NN, [01][01]xx and [01][01]yy.
	Handle 'M', 'G' 's' 'X', 'a', 'Y' and 'A'.
	(dumptable): Now takes three arguments.  Changed all callers.
	Emit just one contigous jump table.
	(filltable): Now takes an argument.  Changed all callers.
	Make index static.
	(ppi_moves, expand_ppi_code, ppi_filltable, ppi_gensim): New functions.
	(gensim_caselist): New function, broken out of gensim.
	Handle opcode fields 'x', 'y', 's', 'M', 'G', 'X', 'a', and 'Y'.
	Handle ref '9'.
	(gensim): Handle 'N' in code field and '8' in refs field.
	Call gensim_caselist - twice.
	(ppi_index): New static variable.
	(main): Unsupport default action.
	Add dsp support for -x / -s option.  Add -p option.
	* interp.c (sh_jump_table, sh_dsp_table, ppi_table): Declare.
	(saved_state_type): Rearrange to allow amalgamated ldc / stc /
	lds / sts to work efficiently.
	(target_dsp): New static variable.
	(GBR, VBR, SSR, SPC, MACH, MACL): Reflect saved_state_type change.
	(FPUL, Rn_BANK, SET_Rn_BANK, M, Q, S, T, SR_BL, SR_RB): Likewise.
	(SR_MD, SR_RC, SET_SR_BIT, GET_SR, SET_RC, GET_FPSCR): Likewise.
	(RS, RE, MOD, MOD_ME, DSP_R): Likewise.
	(set_fpscr1): Likewise.  Use target_dsp to check for dsp.
	(MOD_MSi, SIG_BUS_FETCH): Deleted.
	(CREG, SREG, PR, SR_MASK_DMY, SR_MASK_DMX, SR_DMY): New macros.
	(SR_DMX, DSR, MOD_DELTA, GET_DSP_GRD): Likewise.
	(SET_MOD): Reflect saved_state_type change.  Set MOD_DELTA instead
	of MOD_MS, and encode SR_DMY / SR_DMX into high word of MOD_ME.
	(set_sr): Reflect saved_state_type change.  Fix SR_RB handling.
	Use SET_MOD.
	(MA, L, TL, TB): Now controlled by ACE_FAST.
	(SEXT32): Just cast to int.
	(SIGN32): Fixed to only shift by 31.
	(CHECK_INSN_PTR): SIGBUS at insn fetch now represented by insn_end 0.
	(ppi_insn): Declare.
	(ppi.c): Include.
	(init_dsp): Set target_dsp.  When it changes, switch end of
	sh_jump_table with sh_dsp_table.
	(sim_resume) Don't declare sh_jump_table0.  Use sh_jump_table instead.
	Don't Declare PR if it's #defined.
	Fix single-stepping (Was broken in Mar  6 16:59:10 patch).
	(sim_store_register, sim_read_register): Translate accesses to
	reflect saved_state_type change.

	* interp.c (set_sr): Set sr.
	(SET_RC, MOD, MOD_MS, MOD_ME, SET_MOD, MOD_MS, MOD_ME): New macros.
	(set_fpscr1): Don't bank-switch fpu registers when simulating sh-dsp.
	(DSP_R): Fix definition.
	(sim_resume): Remove outdated SET_SR use.

	* interp.c (saved_state): New members for struct member asregs:
	rs, re, insn_end, xram_start, yram_start.
	(struct loop_bounds): New struct.
	(SKIP_INSN): New macro.
	(get_loop_bounds): New function.
	(endianw): Renamed to global_endianw.
	(maskw): negated bits.
	(PC): Now insn_ptr.
	(SR_MASK_RC, SR_RC_INCREMENT, SR_RC, RAISE_EXCEPTION): New macros.
	(RS, RE, DSP_R, DSP_GRD, A1, A0, X0, X1, Y0, Y1, M0, A1G): Likewise.
	(M1, A0G, RIAT, PT2H, PH2T, SET_NIP, CHECK_INSN_PTR): Likewise.
	(SIG_BUS_FETCH): Likewise
	(raise_exception, riat_fast): New functions.
	(raise_buserror, sim_stop): Use raise_exception.
	(PROCESS_SPECIAL_ADDRESS): Use xram_start / yram_start.
	(BUSERROR, WRITE_BUSERROR, READ_BUSERROR):
	Reverse sense of mask argument.
	(FP_OP, set_dr): Use RAISE_EXCEPTION.
	(wlat_fast, wwat_fast, wbat_fast, rlat_fast, rwat_fast, rbat_fast):
	Declare.  Remove redundant masking.
	(wwat_fast, rwat_fast): Add argument endianw.  Changed callers.
	(MA): Updated for change pc -> PC.
	(Delay_Slot): Use RIAT.
	(empty): Deleted.
	(trap): Remove argument little_endian.  Add argument endianw.
	Changed all callers.  Use raise_exception.
	(macw): Add argument endainw.  Changed all callers.
	(init_dsp): New function, extended after broken out of init_pointers.
	(sim_resume): Replace pc with insn_ptr.  Replace little_endian with
	endianw.  Replace nia with nip.  Reverse sense of maskb / maskw /
	maskl.  Implement logic for zero-overhead loops.  Don't try to
	interpret garbage when getting a SIGBUS at insn fetch.
	(sim_open): Call init_dsp.
	* gencode.c (tab): Use SET_NIP instead of nia = .  Use PH2T / PT2H /
	RAISE_EXCEPTION where appropriate.
	Add extra cycles for brai, braf , bsr, bsrf, jmp, jsr.

	* interp.c (sim_store_register, sim_fetch_register):
	Do proper endianness switch.

	* interp.c (saved_state_type): New members for struct member asregs:
	xymem_select, xmem, ymem, xmem_offset, ymem_offset.
	(special_address): Delete.
	(BUSERROR): Now a two-argument predicate.
	(PROCESS_SPECIAL_ADDRESS, WRITE_BUSERROR, READ_BUSERROR): New macros.
	(wlat_little, wwat_little, wbat_any, wlat_big, wwat_big): Delete.
	(process_wlat_addr, process_wwat_addr): New functions.
	(process_wbat_addr, process_rlat_addr, process_rwat_addr): Likewise.
	(process_rbat_addr): Likewise.
	(wlat_fast, wwat_fast, wbat_fast): Use WRITE_BUSERROR.
	(rlat_little, rwat_little, rbat_any, rlat_big, rwat_big): Delete.
	(rlat_fast, rwat_fast, rbat_fast): Use READ_BUSERROR.
	(RWAT, RLAT, RBAT, WWAT, WLAT, WBAT): Delete SLOW versions.
	(do_rdat, trap): Delete SLOW code.
	(SEXT32, SIGN32): New macros.
	(swap, swap16): Now integer in - integer out.  Changed all callers.
	(strswaplen, strnswap): Delete SLOW versions.
	(init_pointers): Initialize dsp memory selection (preliminary).
	(sim_store_register, sim_fetch_register): Use swap instead of
	big / little endian read / write functions.

	* interp.c (maskl): Deleted.
	(endianw, endianb): New variables.
	(special_address): Now inline.
	(bp_holder): Put raising of buserror there, rename to:
	(raise_buserror).
	(BUSERROR): Now yields a value.  Changed all users.
	(wbat_big): Delete.
	(wlat_fast, wwat_fast, wbat_fast): New functions.
	(rlat_fast, rwat_fast, rbat_fast): Likewise.
	(RWAT, RLAT, RBAT, WWAT, WLAT, WBAT): Use new functions.
	(do_rdat, do_wdat): Likewise.  Take maskl argument instead of
	little_endian one.  Changed caller macros.
	(swap, swap16): Use w[rw]lat_big / w[rw]lat_little directly.
	(strswaplen, strnswap): New functions.
	(trap): Use them to fix up endian mismatches;
	disable SYS_execve and SYS_execv; fix double address translation for
	SYS_pipe and SYS_stat.
	(sym_write, sym_read): Add endianness translation.
	(sym_store_register, sym_fetch_register): Add maskl local variable.
	(sim_open): Set endianw and endianb.
2000-06-07 14:59:16 +00:00
Andrew Cagney eb2d80b469 Change profiling so that it is enabled by default. Re-generate everything. 2000-05-24 04:39:50 +00:00
Joern Rennecke 63978407cb sh-dsp support, simulator speedup by using host byte order:
sim:
	* Makefile.in (interp.o): Depends on ppi.c .
	(ppi.c): New rule.
	* gencode.c (printonmatch, think, genopc): Deleted.
	(MAX_NR_STUFF): Now 42.
	(tab): Add SH-DSP CPU instructions.
	Amalgamate ldc / stc / lds / sts instructions with similar
	bit patterns.  Fix opcodes of stc Rm_BANK,@-<REG_N>.
	Fix semantics of lds.l @<REG_N>+,MACH (no sign extend).
	(movsxy_tab): New array.
	For movs, change MMMM field to GGGG, and mmmm field to MMMM.
	Added entries for movx, movy and parallel processing insns.
	(ppi_tab): New array.
	(qfunc): Stabilize sort.
	(expand_opcode): Handle [01][01]NN, [01][01]xx and [01][01]yy.
	Handle 'M', 'G' 's' 'X', 'a', 'Y' and 'A'.
	(dumptable): Now takes three arguments.  Changed all callers.
	Emit just one contigous jump table.
	(filltable): Now takes an argument.  Changed all callers.
	Make index static.
	(ppi_moves, expand_ppi_code, ppi_filltable, ppi_gensim): New functions.
	(gensim_caselist): New function, broken out of gensim.
	Handle opcode fields 'x', 'y', 's', 'M', 'G', 'X', 'a', and 'Y'.
	Handle ref '9'.
	(gensim): Handle 'N' in code field and '8' in refs field.
	Call gensim_caselist - twice.
	(ppi_index): New static variable.
	(main): Unsupport default action.
	Add dsp support for -x / -s option.  Add -p option.
	* interp.c (sh_jump_table, sh_dsp_table, ppi_table): Declare.
	(saved_state_type): Rearrange to allow amalgamated ldc / stc /
	lds / sts to work efficiently.
	(target_dsp): New static variable.
	(GBR, VBR, SSR, SPC, MACH, MACL): Reflect saved_state_type change.
	(FPUL, Rn_BANK, SET_Rn_BANK, M, Q, S, T, SR_BL, SR_RB): Likewise.
	(SR_MD, SR_RC, SET_SR_BIT, GET_SR, SET_RC, GET_FPSCR): Likewise.
	(RS, RE, MOD, MOD_ME, DSP_R): Likewise.
	(set_fpscr1): Likewise.  Use target_dsp to check for dsp.
	(MOD_MSi, SIG_BUS_FETCH): Deleted.
	(CREG, SREG, PR, SR_MASK_DMY, SR_MASK_DMX, SR_DMY): New macros.
	(SR_DMX, DSR, MOD_DELTA, GET_DSP_GRD): Likewise.
	(SET_MOD): Reflect saved_state_type change.  Set MOD_DELTA instead
	of MOD_MS, and encode SR_DMY / SR_DMX into high word of MOD_ME.
	(set_sr): Reflect saved_state_type change.  Fix SR_RB handling.
	Use SET_MOD.
	(MA, L, TL, TB): Now controlled by ACE_FAST.
	(SEXT32): Just cast to int.
	(SIGN32): Fixed to only shift by 31.
	(CHECK_INSN_PTR): SIGBUS at insn fetch now represented by insn_end 0.
	(ppi_insn): Declare.
	(ppi.c): Include.
	(init_dsp): Set target_dsp.  When it changes, switch end of
	sh_jump_table with sh_dsp_table.
	(sim_resume) Don't declare sh_jump_table0.  Use sh_jump_table instead.
	Don't Declare PR if it's #defined.
	Fix single-stepping (Was broken in Mar  6 16:59:10 patch).
	(sim_store_register, sim_read_register): Translate accesses to
	reflect saved_state_type change.

	* interp.c (set_sr): Set sr.
	(SET_RC, MOD, MOD_MS, MOD_ME, SET_MOD, MOD_MS, MOD_ME): New macros.
	(set_fpscr1): Don't bank-switch fpu registers when simulating sh-dsp.
	(DSP_R): Fix definition.
	(sim_resume): Remove outdated SET_SR use.

	* interp.c (saved_state): New members for struct member asregs:
	rs, re, insn_end, xram_start, yram_start.
	(struct loop_bounds): New struct.
	(SKIP_INSN): New macro.
	(get_loop_bounds): New function.
	(endianw): Renamed to global_endianw.
	(maskw): negated bits.
	(PC): Now insn_ptr.
	(SR_MASK_RC, SR_RC_INCREMENT, SR_RC, RAISE_EXCEPTION): New macros.
	(RS, RE, DSP_R, DSP_GRD, A1, A0, X0, X1, Y0, Y1, M0, A1G): Likewise.
	(M1, A0G, RIAT, PT2H, PH2T, SET_NIP, CHECK_INSN_PTR): Likewise.
	(SIG_BUS_FETCH): Likewise
	(raise_exception, riat_fast): New functions.
	(raise_buserror, sim_stop): Use raise_exception.
	(PROCESS_SPECIAL_ADDRESS): Use xram_start / yram_start.
	(BUSERROR, WRITE_BUSERROR, READ_BUSERROR):
	Reverse sense of mask argument.
	(FP_OP, set_dr): Use RAISE_EXCEPTION.
	(wlat_fast, wwat_fast, wbat_fast, rlat_fast, rwat_fast, rbat_fast):
	Declare.  Remove redundant masking.
	(wwat_fast, rwat_fast): Add argument endianw.  Changed callers.
	(MA): Updated for change pc -> PC.
	(Delay_Slot): Use RIAT.
	(empty): Deleted.
	(trap): Remove argument little_endian.  Add argument endianw.
	Changed all callers.  Use raise_exception.
	(macw): Add argument endainw.  Changed all callers.
	(init_dsp): New function, extended after broken out of init_pointers.
	(sim_resume): Replace pc with insn_ptr.  Replace little_endian with
	endianw.  Replace nia with nip.  Reverse sense of maskb / maskw /
	maskl.  Implement logic for zero-overhead loops.  Don't try to
	interpret garbage when getting a SIGBUS at insn fetch.
	(sim_open): Call init_dsp.
	* gencode.c (tab): Use SET_NIP instead of nia = .  Use PH2T / PT2H /
	RAISE_EXCEPTION where appropriate.
	Add extra cycles for brai, braf , bsr, bsrf, jmp, jsr.

	* interp.c (sim_store_register, sim_fetch_register):
	Do proper endianness switch.

	* interp.c (saved_state_type): New members for struct member asregs:
	xymem_select, xmem, ymem, xmem_offset, ymem_offset.
	(special_address): Delete.
	(BUSERROR): Now a two-argument predicate.
	(PROCESS_SPECIAL_ADDRESS, WRITE_BUSERROR, READ_BUSERROR): New macros.
	(wlat_little, wwat_little, wbat_any, wlat_big, wwat_big): Delete.
	(process_wlat_addr, process_wwat_addr): New functions.
	(process_wbat_addr, process_rlat_addr, process_rwat_addr): Likewise.
	(process_rbat_addr): Likewise.
	(wlat_fast, wwat_fast, wbat_fast): Use WRITE_BUSERROR.
	(rlat_little, rwat_little, rbat_any, rlat_big, rwat_big): Delete.
	(rlat_fast, rwat_fast, rbat_fast): Use READ_BUSERROR.
	(RWAT, RLAT, RBAT, WWAT, WLAT, WBAT): Delete SLOW versions.
	(do_rdat, trap): Delete SLOW code.
	(SEXT32, SIGN32): New macros.
	(swap, swap16): Now integer in - integer out.  Changed all callers.
	(strswaplen, strnswap): Delete SLOW versions.
	(init_pointers): Initialize dsp memory selection (preliminary).
	(sim_store_register, sim_fetch_register): Use swap instead of
	big / little endian read / write functions.

	* interp.c (maskl): Deleted.
	(endianw, endianb): New variables.
	(special_address): Now inline.
	(bp_holder): Put raising of buserror there, rename to:
	(raise_buserror).
	(BUSERROR): Now yields a value.  Changed all users.
	(wbat_big): Delete.
	(wlat_fast, wwat_fast, wbat_fast): New functions.
	(rlat_fast, rwat_fast, rbat_fast): Likewise.
	(RWAT, RLAT, RBAT, WWAT, WLAT, WBAT): Use new functions.
	(do_rdat, do_wdat): Likewise.  Take maskl argument instead of
	little_endian one.  Changed caller macros.
	(swap, swap16): Use w[rw]lat_big / w[rw]lat_little directly.
	(strswaplen, strnswap): New functions.
	(trap): Use them to fix up endian mismatches;
	disable SYS_execve and SYS_execv; fix double address translation for
	SYS_pipe and SYS_stat.
	(sym_write, sym_read): Add endianness translation.
	(sym_store_register, sym_fetch_register): Add maskl local variable.
	(sim_open): Set endianw and endianb.

gdb:

	* sh-tdep.c (sh_dsp_reg_names, sh3_dsp_reg_names): New arrays.
	(sh_processor_type_table): Add entries for bfd_mach_sh_dsp and
	 bfd_mach_sh3_dsp.
	(sh_show_regs): Floating point registers are called fr0-fr15.
	For sh4, display fpul, fpscr and fr0-fr15 / dr0-dr14 as appropriate.
	Handle sh-dsp and sh3-dsp.
	config/sh/tm-sh.h (REGISTER_VIRTUAL_TYPE): sh-dsp / sh3-dsp
	don't have floating point registers.
	(DSR_REGNUM, A0G_REGNUM, A0_REGNUM, A1G_REGNUM, A1_REGNUM): Define.
	(M0_REGNUM, M1_REGNUM, X0_REGNUM, X1_REGNUM, Y0_REGNUM): Likewise.
	(Y1_REGNUM, MOD_REGNUM, RS_REGNUM, RE_REGNUM, R0B_REGNUM): Likewise.
2000-05-15 21:12:42 +00:00
Stan Shebs d4f3574e77 import gdb-1999-09-08 snapshot 1999-09-09 00:02:17 +00:00
Jason Molenda 104c1213b4 import gdb-1999-08-30 snapshot 1999-08-31 01:14:27 +00:00
Stan Shebs cd0fc7c3eb import gdb-1999-05-10 1999-05-11 13:35:55 +00:00
Stan Shebs 7a292a7adf import gdb-19990422 snapshot 1999-04-26 18:34:20 +00:00