"f1" is a register name on ia64, and hence gets warned upon when used
as expression value:
.../binutils/2.25/ld/testsuite/ld-elf/pr16322.s: Assembler messages:
.../binutils/2.25/ld/testsuite/ld-elf/pr16322.s:6: Warning: register value used as expression
Change the name (and "p1" at once, which is a register name too, albeit
not currently causing any immediate problem).
ld/testsuite/
2015-01-28 Jan Beulich <jbeulich@suse.com>
* ld-elf/pr16322.s (p1): Rename to px1.
(f1): Rename to fx1.
The changes to reorder sections for better relro protection on powerpc64,
3e2b0f31, 23283c1b, and 5ad18f16, run into a problem with xlc.
xlc -qdatalocal puts global variables into .toc, which means that .toc
must be writable. The simplest way to accomplish this is to edit the
linker script to remove .toc sections from .got on detecting xlc object
files.
bfd/
* elf64-ppc.h (struct ppc64_elf_params): Add "object_in_toc".
* elf64-ppc.c (ppc64_elf_add_symbol_hook): Assume that global symbols
in .toc indicate xlc compiled code that might require a rw .toc.
ld/
* emulparams/elf64ppc.sh (INITIAL_READWRITE_SECTIONS): Define.
* emultempl/ppc64elf.em (params): Init new field.
(ppc_after_open): New function.
(LDEMUL_AFTER_OPEN): Define.
* ldlang.c (lang_final): Whitespace fix.
ld/testsuite/
* ld-powerpc/tocvar.d, * ld-powerpc/tocvar.s: New test.
* ld-powerpc/tocnovar.d, * ld-powerpc/tocnovar.s: New test.
* ld-powerpc/powerpc.exp: Run tocvar and tocnovar.
This patch fixes PR 4643 by allowing symbols in the LENGTH and ORIGIN
fields of MEMORY regions. Previously, only constants and constant
expressions are allowed.
For the AVR target, this helps define memory constraints more
accurately (per device), without having to create a ton of device
specific linker scripts.
ld/
PR 4643
* ldexp.c (fold_name): Fold LENGTH only after
lang_first_phase_enum.
* ldgram.y (memory_spec): Don't evaluate ORIGIN and LENGTH
rightaway.
* ldlang.h (struct memory_region_struct): Add origin_exp and
length_exp fields.
* ldlang.c (lang_do_memory_regions): New.
(lang_memory_region_lookup): Initialize origin_exp and
length_exp fields.
(lang_process): Call lang_do_memory_regions.
ld/testsuite/
* ld-scripts/memory.t: Define new symbol tred.
* ld-scripts/memory_sym.t: New.
* ld-scripts/script.exp: Perform MEMORY with symbols test, and
conditionally check values of linker symbols.
Tests that I added in commit c05b575a8d
fails on 32-bit hosts due to differences in whitespace.
This patch updates the expected output patterns to be more accepting of
differences in whitespace, the tests should now pass.
ld/testsuite/ChangeLog:
* ld-scripts/provide-4-map.d: Update expected output.
* ld-scripts/provide-5-map.d: Likewise.
When creating a linker mapfile (using -Map=MAPFILE), we previously would
always try to evaluate the expression from a PROVIDE statement.
However, this is not always safe, consider:
PROVIDE (foo = 0x10);
PROVIDE (bar = foo);
In this example, if neither 'foo' or 'bar' is needed, then while
generating the linker mapfile evaluating the expression for 'foo' is
harmless (just the value 0x10). However, evaluating the expression for
'bar' requires the symbol 'foo', which is undefined. This used to cause
a fatal error.
This patch changes the behaviour, so that when the destination of the
PROVIDE is not defined (that is the PROVIDE is not going to provide
anything) the expression is not evaluated, and instead a special string
is displayed to indicate that the linker is discarding the PROVIDE
statement.
This change not only fixes the spurious undefined symbol error, but also
means that a user can now tell if a PROVIDE statement has provided
anything by inspecting the linker mapfile, something that could not be
done before.
ld/ChangeLog:
* ldlang.c (print_assignment): Only evaluate the expression for a
PROVIDE'd assignment when the destination is being defined.
Display a special message for PROVIDE'd symbols that are not being
provided.
ld/testsuite/ChangeLog:
* ld-scripts/provide-4.d: New file.
* ld-scripts/provide-4-map.d: New file.
* ld-scripts/provide-4.t: New file.
* ld-scripts/provide-5.d: New file.
* ld-scripts/provide-5.s: New file.
* ld-scripts/provide-5-map.d: New file.
* ld-scripts/provide-5.t: New file.
* ld-scripts/provide.exp: Run the provide-4.d and provide-5.d
tests.
Add a new option 'map' to the ld run_dump_test mechanism. When the
'map' option is given run_dump_test will ensure that there is a
-Map=MAPFILE present in the linker command line, adding one if needed.
The MAPFILE is then compared with the file passed to the new 'map'
option using the regexp_diff function. This should make it slightly
easier to write tests that check the linker mapfile output.
The only test I found that already compares mapfile content is updated
to use the new mechanism.
ld/testsuite/ChangeLog:
* ld-scripts/overlay-size.d: Add 'map' option.
* ld-scripts/overlay-size.exp: Remove manual check of mapfile.
* lib/ld-lib.exp (run_dump_test): Add support for new 'map'
option, checking linker mapfile output.
This moves .got too, which requires .sdata and .sbss to move with it,
because these sections share addressing via the toc pointer and with
small-model code must be within a 16-bit signed offset. .plt, .iplt
and .branch_lt must also be moved since they are addressed via a
32-bit offset from the toc pointer, and we might have a very large
.data section.
This change means we may have some bss style sections before the data
segment, necessitating another PT_LOAD header. Also, since _edata is
defined at the end of the data segment it's possible with an empty
.data to have _edata at the end of .plt which looks a little unusual
since .plt is a bss style section. That should only happen rarely in
real world binaries, but does occur in the ld testsuite.
ld/
* emulparams/elf64ppc.sh (BSS_PLT): Don't define.
(OTHER_READWRITE_SECTIONS): Move .branch_lt to..
(OTHER_RELRO_SECTIONS_2): ..here.
(DATA_GOT, SEPARATE_GOTPLT, DATA_SDATA, DATA_PLT,
PLT_BEFORE_GOT): Define.
* scripttempl/elf.sc: Handle DATA_SDATA and DATA_GOT/DATA_PLT/
PLT_BEFORE_GOT combination.
(DATA_GOT, SDATA_GOT): Don't define if either is already defined.
ld/testsuite/
* ld-powerpc/ambiguousv1.d,
* ld-powerpc/ambiguousv1b.d,
* ld-powerpc/ambiguousv2.d,
* ld-powerpc/ambiguousv2b.d,
* ld-powerpc/elfv2exe.d,
* ld-powerpc/elfv2so.d,
* ld-powerpc/tlsexe.r,
* ld-powerpc/tlsexetoc.r,
* ld-powerpc/tlsso.r,
* ld-powerpc/tlstocso.r: Update.
Running lang_common before garbage collection means slightly less work
in garbage collection code, since common symbols should no longer
appear there. It does have the side effect of keeping linker script
symbols (at least those defined outside of sections) global too,
hence some testsuite churn.
bfd/
PR 17165
* elf-bfd.h (ELF_COMMON_DEF): Note that this might be true for
linker script assignments too.
* elflink.c (elf_gc_sweep_symbol): Don't drop ELF_COMMON_DEF syms.
(bfd_elf_gc_mark_dynamic_ref_symbol): Similarly.
ld/
PR 17165
* ldlang.c (lang_process): Run lang_common before lang_gc_sections.
ld/testsuite/
* ld-gc/pr14265.d,
* ld-cris/tls-gc-68.d,
* ld-cris/tls-gc-69.d,
* ld-cris/tls-gc-70.d,
* ld-cris/tls-gc-71.d,
* ld-cris/tls-gc-75.d,
* ld-cris/tls-gc-76.d,
* ld-cris/tls-gc-79.d,
* ld-mmix/bpo-10.d,
* ld-mmix/bpo-11.d: Update.
- 32 128 bit vector registers (overlapping with the existing 16 64 bit
floating point registers)
- vector double instructions
- vector integer instructions
- scalar vector instructions (allowing to have more floating point
registers for scalar operations)
- vector string instructions
gas/ChangeLog:
* config/tc-s390.c (struct pd_reg): Remove.
(pre_defined_registers): Remove.
(REG_NAME_CNT): Remove.
(reg_name_search): Calculate the register number instead of doing
a lookup.
(register_name, tc_s390_regname_to_dw2regnum): Adopt to the new
reg_name_search signature.
(s390_parse_cpu): Support the new arch string z13.
(s390_insert_operand): Support for vector registers with the extra
field for the fifth bit of each vector register operand.
(md_gather_operand): Adjust to the new handling of optional
parameters.
* doc/as.texinfo: Document the z13 cpu string.
gas/testsuite/ChangeLog:
* gas/s390/esa-g5.d: Add a variant without the optional operand.
* gas/s390/esa-g5.s: Likewise.
* gas/s390/esa-z9-109.d: Likewise.
* gas/s390/esa-z9-109.s: Likewise.
* gas/s390/zarch-z9-109.d: Likewise.
* gas/s390/zarch-z9-109.s: Likewise.
* gas/s390/zarch-z10.d: For variants with a zero optional argument
it is not dumped by objdump anymore.
* gas/s390/zarch-zEC12.d: Likewise.
* gas/s390/zarch-z13.d: New file.
* gas/s390/zarch-z13.s: New file.
* gas/s390/s390.exp: Run the test for the z13 files.
include/opcode/ChangeLog:
* s390.h (s390_opcode_cpu_val): Add S390_OPCODE_Z13.
ld/testsuite/ChangeLog:
* ld-s390/tlsbin.dd: The nopr register operand is optional and not
printed if 0 anymore.
opcodes/ChangeLog:
* s390-dis.c (s390_extract_operand): Support vector register
operands.
(s390_print_insn_with_opcode): Support new operands types and add
new handling of optional operands.
* s390-mkopc.c (s390_opcode_mode_val, s390_opcode_cpu_val): Remove
and include opcode/s390.h instead.
(struct op_struct): New field `flags'.
(insertOpcode, insertExpandedMnemonic): New parameter `flags'.
(dumpTable): Dump flags.
(main): Parse flags from the s390-opc.txt file. Add z13 as cpu
string.
* s390-opc.c: Add new operands types, instruction formats, and
instruction masks.
(s390_opformats): Add new formats for .insn.
* s390-opc.txt: Add new instructions.
When building executable, undefined symbol is a fatal error. We don't
complain about -fPIC if the symbol is undefined.
bfd/
PR ld/17847
* elf64-x86-64.c (elf_x86_64_relocate_section): Don't complain
about -fPIC if the symbol is undefined when building executable.
ld/testsuite/
PR ld/17847
* ld-x86-64/pie1.d: New file.
* ld-x86-64/pie1.s: Likwise.
* ld-x86-64/x86-64.exp: Run pie1.
bfd/ChangeLog
2015-01-13 Thomas Preud'homme <thomas.preudhomme@arm.com>
* elfnn-aarch64.c (elfNN_aarch64_final_link_relocate): Use
SYMBOLIC_BIND to check if a symbol should be bound symbolically.
ld/testsuite/ChangeLog
2015-01-13 Thomas Preud'homme <thomas.preudhomme@arm.com>
* ld-aarch64/aarch64-elf.exp: Added relocs-257-symbolic-func test.
* ld-aarch64/relocs-257-symbolic-func.d: New file.
* ld-aarch64/relocs-257-symbolic-func.s: Likewise.
bfd/
* elfnn-aarch64.c: (elfNN_aarch64_howto_table): Enable overflow check for
TLSLE_MOVW_TPREL_G2.
ld/testsuite/
* ld-aarch64/tprel_g2_overflow.s: New testcase.
* ld-aarch64/tprel_g2_overflow.d: New expectation file.
* ld-aarch64/aarch64-elf.exp: Run new testcase.
bfd/
PR ld/17415
* elfnn-aarch64.c (elfNN_aarch64_howto_table): Mark
R_AARCH64_TLSLE_ADD_TPREL_HI12 as complain_overflow_unsigned.
* elfxx-aarch64.c (_bfd_aarch64_elf_resolve_relocation): Correct the bit
mask.
ld/testsuite/
PR ld/17415
* ld-aarch64/pr17415.s: Source file for new test.
* ld-aarch64/pr17415.d: Expect file for new test.
* ld-aarch64/aarch64-elf.exp: Run the new test.
When building PIE, we should only discard space for pc-relative relocs
symbols which turn out to need copy relocs.
bfd/
PR ld/17827
* elf64-x86-64.c (elf_x86_64_allocate_dynrelocs): For PIE,
only discard space for pc-relative relocs symbols which turn
out to need copy relocs.
ld/testsuite/
PR ld/17827
* ld-x86-64/pr17689.out: Updated.
* ld-x86-64/pr17689b.S: Likewise.
* ld-x86-64/pr17827.rd: New file.
* ld-x86-64/x86-64.exp: Run PR ld/17827 test.
The original test output expectations cause it to fail when configure
determines enable_initfini_array=no (which was observed on a cross
build on an old 32-bit host, pointing out that taking into account host
properties in such a case is bogus anyway).
ld/testsuite/
2015-01-08 Jan Beulich <jbeulich@suse.com>
* ld-x86-64/pr14207.d: Adjust expecations to cover the
enable_initfini_array=no case.
Mention that readelf can be used as a test program in the comment of
run_dump_test.
ld/testsuite/ChangeLog:
* lib/ld-lib.exp (run_dump_test): Extend comment to mention
readelf.
bfd/
PR ld/17773
* elflink.c (bfd_elf_final_link): Assign the file position for
the symbol string table only there are symbols to be emitted.
ld/testsuite/
PR ld/17773
* ld-elf/binutils.exp (binutils_test): Add an optional
readelf_options. Replace -l with $readelf_options. Add a
gap test.
* ld/testsuite/ld-elf/gap.s: New file.
At some stage someone fixed a bug in ld -r output, preserving
SHF_INFO_LINK from input objects. These two tests expected the old
wrong output.
* ld-sh/sh64/crangerel1.rd: Update.
* ld-sh/sh64/crangerel2.rd: Update.
*** bfd/ChangeLog ***
2014-12-25 Thomas Preud'homme <thomas.preudhomme@arm.com>
* elf32-arm.c (elf32_arm_merge_eabi_attributes): Handle new
Tag_ABI_VFP_args value and replace hardcoded values by enum
values.
(elf32_arm_post_process_headers): Set e_flags in ELF header
as hard float only when Tag_ABI_VFP_args is 1, using new enum
value AEABI_VFP_args_vfp to check that.
*** binutils/ChangeLog ***
2014-12-25 Thomas Preud'homme <thomas.preudhomme@arm.com>
* readelf.c (arm_attr_tag_ABI_VFP_args): Add "compatible".
*** gdb/ChangeLog ***
2014-12-25 Thomas Preud'homme <thomas.preudhomme@arm.com>
* arm-tdep.c (arm_gdbarch_init): Explicitely handle value 3 of
Tag_ABI_VFP_args. Also replace hardcoded values by enum values
in the switch handling the different values of Tag_ABI_VFP_args.
*** gold/ChangeLog ***
2014-12-25 Thomas Preud'homme <thomas.preudhomme@arm.com>
* arm.cc (Target_arm::do_adjust_elf_header): Set e_flags in ELF
header as hard float only when Tag_ABI_VFP_args is 1, using new
enum value AEABI_VFP_args_vfp to check that.
(Target_arm::merge_object_attributes): Handle new Tag_ABI_VFP_args
value and replace hardcoded values by enum values.
*** include/elf/ChangeLog ***
2014-12-25 Thomas Preud'homme <thomas.preudhomme@arm.com>
* arm.h: New AEABI_FP_number_model_* and AEABI_VFP_args_* enum
values.
*** ld/testsuite/ChangeLog ***
2014-12-25 Thomas Preud'homme <thomas.preudhomme@arm.com>
* ld-arm/attr-merge-2a.s: Add Tag_ABI_VFP_args.
* ld-arm/attr-merge-2b.s: Likewise.
* ld-arm/attr-merge-2.attr: Likewise.
* ld-arm/attr-merge-4a.s: Add Tag_ABI_FP_number_model and
Tag_ABI_VFP_args.
* ld-arm/attr-merge-4b.s: Likewise.
* ld-arm/attr-merge-4.attr: Likewise.
* ld-arm/attr-merge-6a.s: Likewise.
* ld-arm/attr-merge-6b.s: Likewise.
* ld-arm/attr-merge-6.attr: Add Tag_ABI_FP_number_model.
Have the assembler prepare for linker relaxation by default. This
means that users will be able to make use of linker relaxation without
having to adjust the assembler flags, this can make life easier when
compiling libraries.
Having this on by default in the assembler should make no difference to
the assembler code produced, however, some of the debug information will
be slightly less compressed.
A few tests needed to be updated as a result of this change as they
relied on linker relaxation support being off by default.
I've tightened up the definition of which sections can be relaxed on AVR
as part of this commit, the assembler used to think that all
non-debugging sections could be relaxed, when in reality only code
sections can be relaxed for AVR. The previous definition was not
dangerous, just over cautious. The new tighter definition allows an
extra test (gas/testsuite/gas/all/forward.d) to continue to pass.
gas/ChangeLog:
* config/tc-avr.c (struct avr_opt_s): Change link_relax to
no_link_relax, extend comment.
(enum options): Add new OPTION_NO_LINK_RELAX.
(md_longopts): Add entry for -mno-link-relax.
(md_parse_option): Handle OPTION_NO_LINK_RELAX, and update
OPTION_LINK_RELAX.
(md_begin): Initialise linkrelax from no_link_relax.
(md_show_usage): Include -mno-link-relax option.
(relaxable_section): Only allocatable code sections can be
relaxed.
* config/tc-avr.h (TC_LINKRELAX_FIXUP): Define.
gas/testsuite/ChangeLog:
* gas/all/gas.exp: Test will not pass on AVR due to linker
relaxation support.
* gas/avr/noreloc_withoutrelax.d: Add -mno-link-relax option.
* gas/avr/link-relax-elf-flag-clear.d: Likewise.
ld/testsuite/ChangeLog:
* ld/testsuite/ld-avr/relax-elf-flags-02.d: Add -mno-link-relax
option.
* ld/testsuite/ld-avr/relax-elf-flags-03.d: Likewise.
* ld/testsuite/ld-avr/relax-elf-flags-04.d: Likewise.
* ld/testsuite/ld-avr/relax-elf-flags-05.d: Likewise.
* ld/testsuite/ld-avr/relax-elf-flags-06.d: Likewise.
The AVR target has an elf header flag to indicate if an object was
assembler ready for linker relaxation. If a partial link is performed
then it is important that the link-relax flag in the output object is
set correctly, otherwise, during the final link, we might try to perform
linker relaxation on code that was not assembled suitably.
As the link-relax elf header covers the entire object file we must be
conservative when setting the flag in the output object, so, for a
partial link, any input object that does not have the link-relax flag
set will cause the output object to also not have the link-relax flag
set.
This conservative approach could be softened in future, we only need to
disable the link relax flag if an input file is not marked link-relax
ready, and the input file contains a relaxable section. However, I've
left this optimisation for a later day.
For the final link I've overloaded the use of the link-relax elf header
flag, in a final executable, the flag now indicates if the executable
was built with linker relaxation on or not.
ld/ChangeLog:
* emultempl/avrelf.em: Add include of elf/avr.h.
(avr_finish): New function.
(LDEMUL_FINISH): Added.
ld/testsuite/ChangeLog:
* ld-avr/relax-elf-flags-01.d: New file.
* ld-avr/relax-elf-flags-02.d: New file.
* ld-avr/relax-elf-flags-03.d: New file.
* ld-avr/relax-elf-flags-04.d: New file.
* ld-avr/relax-elf-flags-05.d: New file.
* ld-avr/relax-elf-flags-06.d: New file.
* ld-avr/relax-elf-flags-07.d: New file.
* ld-avr/relax-elf-flags-08.d: New file.
* ld-avr/relax-elf-flags-a.s: New file.
* ld-avr/relax-elf-flags-b.s: New file.
Trying to use the SEC_LINKER_CREATED section flag to determine whether
a symbol is linker defined fails to work on targets like alpha that
define special SEC_COMMON sections. These might contain symbols that
originated in an object file.
include/
* bfdlink.h (struct bfd_link_hash_entry): Comment non_ir_ref. Add
linker_def.
bfd/
* elflink.c (_bfd_elf_define_linkage_sym): Set linker_def.
* linker.c (_bfd_generic_link_add_one_symbol): Clear linker_def
for CDEF, DEF, DEFW, COM.
ld/
* ldexp.c (exp_fold_tree_1 <etree_provide>): Test linker_def.
ld/testsuite/
* ld-powerpc/sdabase.s,
* ld-powerpc/sdabase.t,
* ld-powerpc/sdabase.d: New test.
* ld-powerpc/sdabase2.t,
* ld-powerpc/sdabase2.d: New test.
* ld-powerpc/powerpc.exp: Run them.
When there is a weak symbol with a real definition, the processor
independent code will have arranged for us to see the real definition
first. We need to copy the needs_copy bit from the real definition and
check it when allowing copy reloc in PIE.
bfd/
PR ld/17689
* elf64-x86-64.c (elf_x86_64_link_hash_entry): Add needs_copy.
Change has_bnd_reloc to bit field.
(elf_x86_64_link_hash_newfunc): Initialize needs_copy and
has_bnd_reloc to 0.
(elf_x86_64_check_relocs): Set has_bnd_reloc to 1 instead
of TRUE.
(elf_x86_64_adjust_dynamic_symbol): Copy needs_copy from the
real definition to a weak symbol.
(elf_x86_64_allocate_dynrelocs): Also check needs_copy of a
weak symbol for PIE when discarding space for relocs against
symbols which turn out to need copy relocs.
(elf_x86_64_relocate_section): Also check needs_copy of a
weak symbol for PIE with copy reloc.
ld/testsuite/
PR ld/17689
* ld-x86-64/pr17689.out: New file.
* ld-x86-64/pr17689.rd: Likewise.
* ld-x86-64/pr17689a.c: Likewise.
* ld-x86-64/pr17689b.S: Likewise.
* ld-x86-64/x86-64.exp: Run PR ld/17689 tests.
This patch allows copy relocs for non-GOT pc-relative relocation in PIE.
bfd/
* elf64-x86-64.c (elf_x86_64_create_dynamic_sections): Always
allow copy relocs for building executables.
(elf_x86_64_check_relocs): Allow copy relocs for non-GOT
pc-relative relocation in shared object.
(elf_x86_64_adjust_dynamic_symbol): Allocate copy relocs for
PIE.
(elf_x86_64_relocate_section): Don't copy a pc-relative
relocation into the output file if the symbol needs copy reloc.
ld/testsuite/
* ld-x86-64/copyreloc-lib.c: New file.
* ld-x86-64/copyreloc-main.c: Likewise.
* ld-x86-64/copyreloc-main.out: Likewise.
* ld-x86-64/copyreloc-main1.rd: Likewise.
* ld-x86-64/copyreloc-main2.rd: Likewise.
* ld-x86-64/x86-64.exp: Run copyreloc tests.
In MIPS the relocation calculation only ignores the overflow checks for undefined
weak symbols on relocations associated with j/jal. This patch extends this to
the relocations used by the: b* instructions; pc/gp relative symbol offsets; and the
lwpc/ldpc MIPS r6 instructions.
bfd/
* elfxx-mips.c (mips_elf_calculate_relocation): Only check for overflow
on non-weak undefined symbols.
ld/testsuite/
* ld-mips-elf/mips-elf.exp: Add in undefined weak overflow tests for
o32, n32 and n64.
* ld-mips-elf/undefweak-overflow.s: New test.
* ld-mips-elf/undefweak-overflow.d: New test.
* ld-mips-elf/undefweak-overflow-n32.d: New test.
* ld-mips-elf/undefweak-overflow-n64.d: New test.
Both readelf/objdump know how to get symbol version string for dynamic
symbols. This patch extracts this functionality into a separate
function and uses it to add symbol version string to versioned symbol
names when dumping dynamic relocations.
bfd/
PR binutils/16496
* elf-bfd.h (bfd_elf_get_symbol_version_string): New.
* elf.c (bfd_elf_get_symbol_version_string): New. Extracted
from bfd_elf_print_symbol.
(bfd_elf_print_symbol): Use it.
binutils/
PR binutils/16496
* objdump.c (objdump_print_symname): Call
bfd_elf_get_symbol_version_string to get ELF symbol version
string. Append version string if needed.
* readelf.c (versioned_symbol_info): New enum.
(get_symbol_version_string): New. Extracted from
process_symbol_table.
(dump_relocations): Add a new argument to indicate if dynamic
symbol table is used. Use get_symbol_version_string to get
symbol version string for dynamic symbol. Append version string
if needed.
(process_relocs): Updated dump_relocations call.
(process_symbol_table): Use get_symbol_version_string.
ld/testsuite/
PR binutils/16496
* ld-cris/weakref3.d: Add symbol version string to versioned
symbol names in dynamic relocation.
* ld-cris/weakref4.d: Likewise.
* ld-elfvers/vers24.rd: Likewise.
* ld-elf/pr16496a.c: New file.
* ld-elf/pr16496a.map: Likewise.
* ld-elf/pr16496b.c: Likewise.
* ld-elf/pr16496b.od: Likewise.
* ld-elf/shared.exp (build_tests): Add libpr16496a.so and
libpr16496b.so tests.
When there are both PLT and GOT references to the same function symbol,
linker will create a GOTPLT slot for PLT entry and a GOT slot for GOT
reference. A run-time JUMP_SLOT relocation is created to update the
GOTPLT slot and a run-time GLOB_DAT relocation is created to update the
GOT slot. Both JUMP_SLOT and GLOB_DAT relocations will apply the same
symbol value to GOTPLT and GOT slots, respectively, at run-time.
This optimization combines GOTPLT and GOT slots into a single GOT slot
and removes the run-time JUMP_SLOT relocation. It replaces the regular
PLT entry:
indirect jump [GOTPLT slot]
push relocation index
jump PLT0
with an GOT PLT entry with an indirect jump via the GOT slot:
indirect jump [GOT slot]
nop
and resolves PLT reference to the GOT PLT entry.
We must avoid this optimization if pointer equality is needed since
we don't clear symbol value in this case and the dynamic linker won't
update the GOT slot. Otherwise, the resulting binary will get into an
infinite loop at run-time.
bfd/
* elf32-i386.c (elf_i386_got_plt_entry): New.
(elf_i386_pic_got_plt_entry): Likewise.
(elf_i386_link_hash_entry): Add plt_got.
(elf_i386_link_hash_table): Likewise.
(elf_i386_link_hash_newfunc): Initialize plt_got.offset to -1.
(elf_i386_get_local_sym_hash): Likewise.
(elf_i386_check_relocs): Create the GOT PLT if there are both
PLT and GOT references when the regular PLT is used.
(elf_i386_allocate_dynrelocs): Use the GOT PLT if there are
both PLT and GOT references unless pointer equality is needed.
(elf_i386_relocate_section): Also check the GOT PLT when
resolving R_386_PLT32.
(elf_i386_finish_dynamic_symbol): Use the GOT PLT if it is
available.
* elf64-x86-64.c (elf_x86_64_link_hash_entry): Add plt_got.
(elf_x86_64_link_hash_table): Likewise.
(elf_x86_64_link_hash_newfunc): Initialize plt_got.offset to -1.
(elf_x86_64_get_local_sym_hash): Likewise.
(elf_x86_64_check_relocs): Create the GOT PLT if there are both
PLT and GOT references when the regular PLT is used.
(elf_x86_64_allocate_dynrelocs): Use the GOT PLT if there are
both PLT and GOT references unless pointer equality is needed.
(elf_x86_64_relocate_section): Also check the GOT PLT when
resolving R_X86_64_PLT32.
(elf_x86_64_finish_dynamic_symbol): Use the GOT PLT if it is
available.
ld/
* emulparams/elf_i386.sh (TINY_READONLY_SECTION): New.
* emulparams/elf_x86_64.sh (TINY_READONLY_SECTION): Add .plt.got.
ld/testsuite/
* ld-i386/i386.exp: Add run-time relocation tests for plt-main.
* ld-i386/plt-main.rd: New file.
* ld-x86-64/plt-main-bnd.dd: Likewise.
* ld-x86-64/plt-main.rd: Likewise.
* ld-x86-64/x86-64.exp: Add run-time relocation tests for
plt-main.
gas/
2014-11-21 Terry Guo <terry.guo@arm.com>
* config/tc-arm.c (md_assemble): Do not consider relaxation.
(md_convert_frag): Test and set target arch attribute accordingly.
(aeabi_set_attribute_string): Turn it into a global function.
* config/tc-arm.h (md_post_relax_hook): Enable it for ARM target.
(aeabi_set_public_attributes): Declare it.
gas/testsuite/
2014-11-21 Terry Guo <terry.guo@arm.com>
* gas/arm/attr-arch-assumption.d: New file.
* gas/arm/attr-arch-assumption.s: Likewise.
ld/testsuite/
2014-11-21 Terry Guo <terry.guo@arm.com>
* ld-arm/tls-longplt-lib.s: Require ARMv6T2.
* ld-arm/tls-longplt.s: Likewise.
* ld-arm/tls-longplt-lib.d: Updated.
* ld-arm/tls-longplt.d: Likewise.
This patch makes sure that compiler won't optimize out loading function
into a stack variable.
* ld-ifunc/ifunc-main.c (get_bar): New function.
(main): Use it.
Structions with R_X86_64_GOTTPOFF relocation must be encoded with REX
prefix even if it isn't required by destination register. Otherwise
linker can't safely perform IE -> LE optimization.
bfd/
PR ld/17482
* elf64-x86-64.c (elf_x86_64_relocate_section): Update comments
for IE->LE transition.
gas/
PR ld/17482
* config/tc-i386.c (output_insn): Add a dummy REX_OPCODE prefix
for structions with R_X86_64_GOTTPOFF relocation for x32 if needed.
gas/testsuite/
PR ld/17482
* gas/i386/ilp32/x32-tls.d: New file.
* gas/i386/ilp32/x32-tls.s: Likewise.
ld/testsuite/
PR ld/17482
* ld-x86-64/tlsie4.dd: Updated.
bfd/
* elfxx-mips.c (update_mips_abiflags_isa): Add E_MIPS_ARCH_32R6
and E_MIPS_ARCH_64R6 support.
ld/testsuite/
* ld-mips-elf/abiflags-strip10-ph.d: New file.
* ld-mips-elf/mips-eld.exp: Run the new test.
gas/
* config/tc-mips.c (mips_elf_final_processing): Add INSN_ISA32R6
and INSN_ISA64R6 support.
gas/testsuite/
* gas/mips/elf_arch_mips32r6.d: New file.
* gas/mips/elf_arch_mips64r6.d: New file.
* gas/mips/mips.exp: Run the new tests.
The @ character is a comment character on ARM, so use % instead. Also
use a wider glob for matching ARM targets to make sure the test gets
run.
ld/testsuite/ChangeLog:
2014-10-30 Will Newton <will.newton@linaro.org>
* ld-unique/unique.exp: Use a wider glob for matching ARM
targets.
* ld-unique/unique.s: Use % instead of @ in .type directive.
* ld-unique/unique_shared.s: Likewise.
2014-10-22 Tejas Belagod <tejas.belagod@arm.com>
bfd/
* bfd-in.h (bfd_elf64_aarch64_set_options): Add a parameter.
* bfd-in2.h (bfd_elf64_aarch64_set_options): Likewise.
* elfnn-aarch64.c (aarch64_erratum_835769_stub): New.
(elf_aarch64_stub_type): Add new type
aarch64_stub_erratum_835769_veneer.
(elf_aarch64_stub_hash_entry): New fields for erratum 835769.
(aarch64_erratum_835769_fix): New data struct to record erratum
835769.
(elf_aarch64_link_hash_table: Global flags for 835769.
(aarch64_build_one_stub): Add case for 835769.
(aarch64_size_one_stub): Likewise.
(aarch64_mem_op_p, aarch64_mlxl_p,
aarch64_erratum_sequence,erratum_835769_scan):
New. Decode and scan functions for erratum 835769.
(elf_aarch64_create_or_find_stub_sec): New.
(elfNN_aarch64_size_stubs): Look for erratum 835769 and record
them.
(bfd_elfNN_aarch64_set_options: Set global flag for 835769.
(erratum_835769_branch_to_stub_data,
make_branch_to_erratum_835769_stub):New. Connect up all the
erratum stubs to occurances by branches.
(elfNN_aarch64_write_section): New hook.
(aarch64_map_one_stub): Output erratum stub symbol.
(elfNN_aarch64_size_dynamic_sections): Init mapping symbol
information for erratum 835769.
(elf_backend_write_section): Define.
ld/
* emultempl/aarch64elf.em: Add command-line option for erratum
835769.
ld/testsuite/
* ld-aarch64/aarch64-elf.exp (aarch64elftests): Drive erratum
835769 tests.
* ld-aarch64/erratum835769.d: New.
* ld-aarch64/erratum835769.s: New.
* ld-scripts/sysroot-prefix.exp: Log $ld_sysroot. Handle sysroot
== "/" as a separate sysroot-configuration with separable
test-types.
(sysroot_prefix_tests): Include all existing sysroot tests in
sysroot == "/" tests except exclude those where a --sysroot option
is not specified.
* lib/ld-lib.exp (check_sysroot_available): Rewrite to use
--print-sysroot instead of relying on error code from using
--sysroot=... Also, set $ld_sysroot.
The reason we exclude not just the failing "full-path =-prefixed
without" but also the passing "plain =-prefixed without but -Lpath"
for sysroot == "/" is that for the latter to succeed, we have to make
assumptions about the system not having a /sysroot directory or
assumptions about its contents etc.
When passing --enable-targets=all --enable-64-bit-bfd (the
latter not required for a "64-bit-host" of course) the ld --help
output got too much to handle for poor tcl (or maybe dejagnu is
to blame) and remote_exec exited with an error, so the
configuration being tested was mishandled as being a
sysroot-less configuration. Using --version instead of --help
would work too, but the new --print-sysroot option calls for
nominal coverage, so why not use that instead.
* ld-scripts/sysroot-prefix.exp, ld-scripts/sysroot-prefix-x.s,
ld-scripts/sysroot-prefix-y.s: New files.
N.B: full coverage is only possible with complementary use of
--with-sysroot when configuring.
These are useless because they can't match any address. In fact,
worse than useless because the .eh_frame_hdr lookup table matching
addresses to FDEs does not contain information about the FDE range.
The table is sorted by address; Range is inferred by the address
delta from one entry to the next. So if a zero address range FDE is
followed by a normal non-zero range FDE for the same address,
everything is good. However, the qsort could just as easily sort the
FDEs in the other order, in which case the normal FDE would
effectively be seen to have a zero range.
bfd/
PR 17447
* elf-bfd.h (struct eh_cie_fde): Comment re NULL u.fde.cie_inf.
* elf-eh-frame.c (_bfd_elf_parse_eh_frame): Mark zero address
range FDEs for discarding.
(vma_compare): Sort on range after address.
(_bfd_elf_gc_mark_fdes): Test for NULL u.fde.cie_inf.
(_bfd_elf_discard_section_eh_frame): Likewise. Write "FDE" in
error message rather than "fde".
(_bfd_elf_write_section_eh_frame_hdr): Write "PC" and "FDE" in
error message.
ld/testsuite/
* ld-elf/eh1.s: Don't create FDEs with zero address ranges.
* ld-elf/eh3.s: Likewise.
* ld-elf/eh1.d, * ld-elf/eh2.d, * ld-elf/eh3.d: Adjust.
* ld-mips-elf/eh-frame1-n32.d: Warning match update.
* ld-mips-elf/eh-frame1-n64.d: Likewise.
* ld-mips-elf/eh-frame2-n32.d: Likewise.
* ld-mips-elf/eh-frame2-n64.d: Likewise.
I originally had this as --print-prog-name and changed back to
--print-file-name to suit older gcc, neglecting to check whether
gcc-5.0 --print-file-name finds the lto plugin. It doesn't.
* ld-plugin/lto.exp: Use both --print-file-name and --print-prog-name
when looking for lto plugin.
different architecture tags. Add a test case to make sure that this works,
and update readelf so that it will not seg-fault when trying to display the
attributes of binaries with invalid architecture tags.
* elf32-arm.c (elf32_arm_merge_eabi_attributes): Return false if
failed to merge.
* ld-arm/attr-merge-arch-2.d: New test case.
* ld-arm/attr-merge-arch-2a.s: New test case source file.
* ld-arm/attr-merge-arch-2b.s: Likewise.
* ld-arm/arm-elf.exp: Run new test case.
* readelf.c (display_arm_attribute): Use unsigned int type for
tag, val and type variables.
2014-08-26 Jiong Wang <jiong.wang@arm.com>
bfd/
* elfnn-aarch64.c (elfNN_aarch64_check_relocs): Initialize non_got_ref
properly for MOVW_G0/1/2_NC and MOVW_G3. Reject them when linking
shared library.
(elfNN_aarch64_gc_sweep_hook): Add check on these relocs.
ld/testsuite/
* ld-aarch64/copy-relocs-so.s: New test file.
* ld-aarch64/copy-relocs-exe.s: Likewise.
* ld-aarch64/copy-relocs.d: New expectation file.
* ld-aarch64/emit-relocs-264-bad.d: New test file.
* ld-aarch64/emit-relocs-266-bad.d: Likewise.
* ld-aarch64/emit-relocs-268-bad.d: Likewise.
* ld-aarch64/emit-relocs-269-bad.d: Likewise.
* ld-aarch64/aarch64-elf.exp: Run new added test.
Resolves PR 17312
* ld-aarch64/eh-frame-foo.s: Use 8-byte offset for X30.
* ld-aarch64/eh-frame-bar.s: Likewise.
* ld-aarch64/eh-frame.d: Updated to match current readelf output.
* ld-elf/eh5.d: Allow any register names.
Only set the VLE flag if the instruction has been pulled via the VLE
instruction set. This way the flag is guaranteed to be set for VLE-only
instructions or for VLE-only processors, however it'll remain clear for
dual-mode instructions on dual-mode and, more importantly, standard-mode
processors.
gas/
* config/tc-ppc.c (md_assemble): Only set the PPC_APUINFO_VLE
flag if both the processor and opcode flags match.
ld/testsuite/
* ld-powerpc/apuinfo-vle.rd: New test.
* ld-powerpc/apuinfo-vle.s: New test source.
* ld-powerpc/apuinfo.rd: Adjust according to GAS PPC_APUINFO_VLE
handling change.
* ld-powerpc/powerpc.exp: Run the new test.
2014-08-21 Tony Wang <tony.wang@arm.com>
* elf32-arm.c (elf32_arm_final_link_relocate): Implement
the veneer routine for R_ARM_THM_JUMP19.
(arm_type_of_stub): Add conditional clause for R_ARM_THM_JUMP19
(elf32_arm_size_stub): Ditto.
ld/testsuite/ChangeLog
2014-08-21 Tony Wang <tony.wang@arm.com>
* ld-arm/jump-reloc-veneers-cond.s: New test.
* ld-arm/farcall-cond-thumb-arm.s: Ditto.
* ld-arm/jump-reloc-veneers-cond-short.d: Expected output
for target without a veneer generation.
* ld-arm/jump-reloc-veneers-cond-long.d: Expected output
for target with a veneer generation.
* ld-arm/farcall-cond-thumb-arm.d: Expected output for
inter working veneer generation.
* ld-arm/arm-elf.exp: Add tests for conditional branch veneer.
bfd/
PR ld/17277
* elf32-arm.c (elf32_arm_check_relocs): Increment P->pc_count for
all reloc types with pc_relative set in the howto, not just for
R_ARM_REL32 and R_ARM_REL32_NOI.
(allocate_dynrelocs_for_symbol): Update comment.
(elf32_arm_gc_sweep_hook): For all reloc types with pc_relative
set in the howto, set call_reloc_p and may_need_local_target_p but
not may_become_dynamic_p; not only for R_ARM_REL32 and R_ARM_REL32_NOI.
(elf32_arm_check_relocs): Likewise.
ld/testsuite/
PR ld/17277
* ld-arm/pcrel-shared.s: New file.
* ld-arm/pcrel-shared.rd: New file.
* ld-arm/arm-elf.exp (armelftests_common): Add it.
PR 17287
bfd/
* elflink.c (on_needed_list): Only consider libraries that have
been loaded.
ld/
* ld.texinfo (--as-needed): Clarify that references from libraries
must be from needed libraries.
ld/testsuite/
* ld-plugin/needed3.c: New file.
* ld-elf/shared.exp: Add needed3 test.
* lib/ld-lib.exp (check_lto_fat_available): New.
(check_lto_available): Remove -ffat-lto-objects test.
* ld-plugin/lto.exp: Use [list ] rather than { } to set up list
variables, allowing substition of vars. Set lto_fat and plug_opt
and add to various tests.
Relocations against .got.plt section may not be in the same order as
entries in PLT section. It is incorrect to assume that the Ith reloction
index against .got.plt section always maps to the (I + 1)th entry in PLT
section. This patch matches the .got.plt relocation offset/index in PLT
entry against the index in .got.plt relocation table. It only checks
R_*_JUMP_SLOT and R_*_IRELATIVE relocations. It ignores R_*_TLS_DESC
and R_*_TLSDESC relocations since they have different PLT entries.
bfd/
PR binutils/17154
* elf32-i386.c (elf_i386_plt_sym_val): Only match R_*_JUMP_SLOT
and R_*_IRELATIVE relocation offset with PLT entry.
* elf64-x86-64.c (elf_x86_64_plt_sym_val): Likewise.
(elf_x86_64_plt_sym_val_offset_plt_bnd): New.
(elf_x86_64_get_synthetic_symtab): Use it.
ld/testsuite/
PR binutils/17154
* ld-ifunc/pr17154-i386.d: New file.
* ld-ifunc/pr17154-x86-64.d: Likewise.
* ld-ifunc/pr17154-x86.s: Likewise.
* ld-x86-64/bnd-ifunc-2.d: Likewise.
* ld-x86-64/bnd-ifunc-2.s: Likewise.
* ld-x86-64/mpx.exp: Run bnd-ifunc-2.
* ld-x86-64/tlsdesc-nacl.pd: Updated.
* ld-x86-64/tlsdesc.pd: Likewise.
Commit e1f987424b changed how
next_tls_desc_index was set up. This patch updates
elf_i386_compute_jump_table_size to use elf.srelplt->reloc_count
instead of next_tls_desc_index.
bfd/
PR ld/17057
* elf32-i386.c (elf_i386_compute_jump_table_size): Replace
next_tls_desc_index with elf.srelplt->reloc_count.
ld/testsuite/
PR ld/17057
* ld-i386/i386.exp: Run pr17057.
* ld-i386/pr17057.d: New file.
* ld-i386/pr17057.s: Likewise.
Specify -T relocs.ld for emit-relocs-local-addend.d to be consistent
will all other emit-relocs* testcases
ld/testsuite/
* ld-aarch64/emit-relocs-local-addend.d: Use target linker script.
With this change all gas and most ld tests pass when configured for
arm-linux. It doesn't look like these configurations have been
tested in a long time but this attempts to stem the bit-rot slightly.
gas/testsuite/ChangeLog:
2014-07-10 Will Newton <will.newton@linaro.org>
* gas/arm/bl-local-2.d: Only enable the test on EABI and
NaCl configurations.
* gas/arm/bl-local-v4t.d: Likewise.
* gas/arm/blx-local.d: Likewise.
* gas/arm/branch-reloc.d: Likewise.
ld/testsuite/ChangeLog:
2014-07-10 Will Newton <will.newton@linaro.org>
* ld-arm/arm-elf.exp (armelftests_nonacl): Move Cortex-A8 fix
tests, IFUNC tests and other EABI requiring tests to...
(armeabitests_nonacl): ...here.
* ld-arm/arm-app-abs32.d: Loosen regex for architecture type
to allow test to pass on configurations without an attributes
section.
* ld-arm/arm-app.d: Likewise.
* ld-arm/arm-lib-plt32.d: Likewise.
* ld-arm/arm-lib.d: Likewise.
* ld-arm/arm-static-app.d: Likewise.
* ld-arm/armthumb-lib.d: Likewise.
* ld-arm/cortex-a8-far.d: Likewise.
* ld-arm/farcall-mixed-app.d: Likewise.
* ld-arm/farcall-mixed-lib-v4t.d: Likewise.
* ld-arm/farcall-mixed-lib.d: Likewise.
* ld-arm/mixed-app-v5.d: Likewise.
* ld-arm/mixed-app.d: Likewise.
* ld-arm/mixed-lib.d: Likewise.
* ld-arm/tls-app.d: Likewise.
* ld-arm/tls-descrelax-be32.d: Likewise.
* ld-arm/tls-descrelax.d: Likewise.
* ld-arm/tls-descseq.d: Likewise.
* ld-arm/tls-gdesc-got.d: Likewise.
* ld-arm/tls-gdesc.d: Likewise.
* ld-arm/tls-gdierelax.d: Likewise.
* ld-arm/tls-gdierelax2.d: Likewise.
* ld-arm/tls-gdlerelax.d: Likewise.
* ld-arm/tls-lib-loc.d: Likewise.
* ld-arm/tls-lib.d: Likewise.
* ld-arm/tls-thumb1.d: Likewise.
ARM doesn't support non-PIC shared libraries so don't run those
tests.
ld/testsuite/ChangeLog:
2014-07-10 Will Newton <will.newton@linaro.org>
* ld-elfvers/vers.exp: Set pic to yes for ARM targets.
Increase the maximum page size to 64kB and align the TEXT_START_ADDR
to a 64kB boundary. This brings AArch32 in line with AArch64 and
improves compatability under certain conditions.
bfd/ChangeLog:
2014-07-08 Will Newton <will.newton@linaro.org>
* elf32-arm.c (ELF_MAXPAGESIZE): Increase the default
value to 64kB and remove custom setting for NaCl.
ld/ChangeLog:
2014-07-08 Will Newton <will.newton@linaro.org>
* emulparams/armelf_linux.sh (TEXT_START_ADDR): Increase
alignment to 64kB boundary.
ld/testsuite/ChangeLog:
2014-07-08 Will Newton <will.newton@linaro.org>
* ld-arm/arm-lib.ld: Increase MAXPAGESIZE value to
match bfd.
* ld-arm/cortex-a8-fix-bl-rel-plt.d: Update offsets to
take into account increased segment alignment.
* ld-arm/ifunc-gdesc.r: Likewise.
* ld-arm/tls-lib.d: Likewise.
This fixes a problem seen on powerpc64le ELFv2 when creating a
function symbol alias with ld --defsym. st_other needs to be copied
from the source symbol to the alias in order to set up the local entry
offset for the alias. I decided to make this change in the generic
ELF code rather than in elf64-ppc.c since it looks like other targets
that use st_other bits might benefit too.
bfd/
* elflink.c (_bfd_elf_copy_link_hash_symbol_type): Copy st_other
bits from source to dest.
* linker.c (_bfd_generic_copy_link_hash_symbol_type): Update comment.
* targets.c (struct bfd_target <_bfd_copy_link_hash_symbol_type>):
Likewise.
* bfd-in2.h: Regenerate.
ld/testsuite/
* ld-powerpc/defsym.s, * ld-powerpc/defsym.d: New test.
* ld-powerpc/powerpc.exp: Run it.
Objects built with -fno-fat-lto-objects (the default for gcc-4.9) have
no normal symbols, except things like __gnu_lto_slim. These useless
symbols are the ones put into the archive index, and of course nothing
references them so no objects are extracted by the linker. Running
ar with --plugin changes ar behaviour to put the lto symbols into the
archive index.
PR 17112
* ld-plugin/lto.exp: When building liblti-11.a, pass
--plugin path_to_gcc/liblto_plugin.so to ar.
toolchain that just contains the binutils - ie without a compiler.
* lib/ld-lib.exp (check_lto_available): Check that a compiler is
available before testing for LTO support.
Various ld-elf/shared.exp and ld-plugin/lto.exp tests simply appended
the testsuite -B options intended to force gcc use the linker under test.
This fails if $CC itself has -B options, as when setting CC to run gcc
out of a build directory. Net result is that tests were run using
the gcc build dir collect-ld.
* config/default.exp: Don't make tmpdir/gas. Put as symlink into
tmpdir/ld.
(gcc_gas_flag, gcc_ld_flag): Delete.
(gcc_B_opt, ld_L_opt): New globals.
ld-elf/shared.exp: Remove all refs to gcc_gas_flag and gcc_ld_flag.
ld-plugin/lto.exp: Likewise.
lib/ld-lib.exp (run_host_cmd): Add gcc_B_opt and ld_L_opt here.
(ld_simple_link): Remove -B handling now that this is done in
run_host_cmd. Simplify.
(default_ld_compile): Simplify.
(check_lto_available): Use run_host_cmd_yesno.
(check_lto_shared_available): Likewise.
libdummy.a is used to make run_cc_link_tests compile objects and
archive them. libdummy.a isn't used. What we're really doing is
preventing a final link. So do that directly.
* lib/ld-lib.exp (run_ld_link_tests): Stop after assembling objects
if binfile is empty.
(run_ld_link_exec_tests, run_cc_link_tests): Likewise. Tidy
status checks.
* ld-plugin/lto.exp: Don't use libdummy.a trick to compile objects.
Instead use an empty output file.
When a shared library appears within --start-group/--end-group ld may
only discover a need for loading the library on the second or
subsequent pass over archive libraries, as more objects are extracted.
ld/
PR 17068
* ldlang.c (load_symbols): Always check flags.reload.
(open_input_bfds): Always reload --as-needed shared libraries,
not just when rescanning.
* ldlang.h (struct lang_input_statement_flags): Update reload comment.
* plugin.c (plugin_should_reload): Assume shared library arg.
* plugin.h (plugin_should_reload): Update comment.
ld/testsuite
* ld-elf/pr17068.s: New.
* ld-elf/pr17068a.s: New.
* ld-elf/pr17068b.s: New.
* ld-elf/pr17068c.s: New.
* ld-elf/pr17068d.s: New.
* ld-elf/pr17068e.s: New.
* ld-elf/pr17068ez.s: New.
* ld-elf/elf.exp: Run new test.
doesn't always mean you need to define a function symbol on plt code.
If all references are in read-write sections, then using dynamic relocs
is OK.
bfd/
* elf32-ppc.c (ppc_elf_adjust_dynamic_symbol): Clear
pointer_equality_needed when !readonly_dynrelocs.
* elf64-ppc.c (ppc64_elf_adjust_dynamic_symbol): Likewise.
ld/testsuite/
* ld-powerpc/ambiguousv1.d: Match symbol table too.
* ld-powerpc/ambiguousv2.d: Likewise.
* ld-powerpc/ambiguousv1b.d: New.
* ld-powerpc/ambiguousv2b.d: New.
* ld-powerpc/powerpc.exp: Run new tests.
Addition of DF_STATIC_TLS in eea6dad2 results in the addition of
flags to the dynamic section, which in turn changes these addresses.
Fix them up to match their new positions.
ld/testsuite/Changelog:
2014-06-24 Kyle McMartin <kyle@redhat.com>
* ld-arm/tls-gdierelax2.d: Fix expected offsets.
Combining TLS descriptors and GNU indirect functions in the same
object could lead to assertions or multiple dynamic relocations
for the same GOT slot. Fix the bookkeeping so this doesn't happen.
This allows building and make checking glibc with -mtls-dialect=gnu2.
bfd/ChangeLog:
2014-06-16 Will Newton <will.newton@linaro.org>
* elf32-arm.c (elf32_arm_allocate_plt_entry): Increment
htab->next_tls_desc_index in the non-IPLT case.
Calculate GOT offset correctly for the non-IPLT case.
(allocate_dynrelocs_for_symbol): Don't increment
htab->next_tls_desc_index here.
ld/testsuite/ChangeLog:
2014-06-16 Will Newton <will.newton@linaro.org>
* ld-arm/arm-elf.exp: Add ifunc-gdesc test.
* ld-arm/ifunc-gdesc.r: New file.
* ld-arm/ifunc-gdesc.s: Likewise.
* ld-arm/ifunc-gdesc.ver: Likewise.
Power8 fuses addis,addi and addis,ld sequences when the target of the
addis is the same as the addi/ld. Thus
addis r12,r2,xxx@ha
addi r12,r12,xxx@l / ld r12,xxx@l(r12)
is faster than
addis r11,r2,xxx@ha
addi r12,r11,xxx@l / ld r12,xxx@l(r11)
So use the form that allows fusion in plt call and branch stubs.
bfd/
* elf64-ppc.c (ADDIS_R12_R2): Define.
(build_plt_stub): Support fusion on ELFv2 stub.
(ppc_build_one_stub): Likewise for plt branch stubs.
gold/
* powerpc.cc (addis_12_2): Define.
(Stub_table::do_write): Support fusion on ELFv2 stubs.
ld/testsuite/
* ld-powerpc/elfv2exe.d: Update for changed plt call stubs.
gdb/
* ppc64-tdep.c (ppc64_standard_linkage8): New.
(ppc64_skip_trampoline_code): Recognise ELFv2 stub supporting fusion.
ld/testsuite/
* lib/ld-lib.exp: Add objcopy_objects command to run_dump_test.
This allows each input object to be optionally run through
objcopy before linking.
aarch64 does not support building non-PIC shared objects, so mark
tests for these as xfail.
ld/testsuite/ChangeLog:
2014-05-20 Will Newton <will.newton@linaro.org>
* ld-shared/shared.exp: Mark non-PIC shared object tests
as xfail on aarch64.
* ld-elf/shared.exp: Introduce the extralibs variable to control
the libraries to be linked. Don't link -ldl on *-*-freebsd*.
* ld-bootstrap/bootstrap.exp: Do not add -ldl to the extralibs on
*-*-freebsd*.
ld:
* ldlang.c (lang_finish): Don't call bfd_link_hash_table_free here.
(output_bfd_hash_table_free_fn): New variable.
(open_output): Save the _bfd_link_hash_table_free function for the
output_bfd into output_bfd_hash_table_free_fn.
* ldmain.c (ld_cleanup): If set, call output_bfd_hash_table_free_fn
on link_info.hash.
* ldlang.h (output_bfd_hash_table_free_fn): Declare.
ld/testsuite:
* ld-mmix/wrap1.d, ld-mmix/wrap1a.s, ld-mmix/wrap1b.s,
ld-mmix/wrap1c.s, ld-mmix/wrap2.d, ld-mmix/wrap3.d,
ld-mmix/wrap3a.s, ld-mmix/wrap3b.s, ld-mmix/wrap4.d: New
tests.
R_XTENSA_DIFF relocation offsets are in fact signed. Treat them as such.
Add testcase that examines ld behaviour on R_XTENSA_DIFF relocation
changing sign during relaxation.
2014-05-02 Volodymyr Arbatov <arbatov@cadence.com>
David Weatherford <weath@cadence.com>
Max Filippov <jcmvbkbc@gmail.com>
bfd/
* elf32-xtensa.c (relax_section): treat R_XTENSA_DIFF* relocations as
signed.
gas/
* config/tc-xtensa.c (md_apply_fix): mark BFD_RELOC_XTENSA_DIFF*
fixups as signed.
ld/testsuite/
* ld-xtensa/diff_overflow.exp, * ld-xtensa/diff_overflow1.s,
* ld-xtensa/diff_overflow2.s: Add test for DIFF* relocation
signedness and overflow checking.
be placed towards the front of local GOT space, while entries addressed
via a 32-bit index are placed towards the rear.
Provided that there are fewer than ~16K local GOT entries addressed via
a 16-bit index in total, this should eliminate any relocation overflows
caused by such GOT entries being allocated beyond the addressable range.
bfd/
* elfxx-mips.c (struct mips_got_info): Delete assigned_gotno
field. Add assigned_low_gotno and assigned_high_gotno fields.
(mips_elf_create_local_got_entry): Update out-of-space condition.
Set index of new GOT entry to assigned_low_gotno if required by
the current relocation, else set it to assigned_high_gotno.
(mips_elf_set_global_gotidx): Replace uses of assigned_gotno
with assigned_low_gotno.
(mips_elf_multi_got): Initialize assigned_low_gotno and
assigned_high_gotno in secondary GOTs. Use assigned_low_gotno
in place of assigned_gotno when handling global GOT entries.
(mips_elf_lay_out_got): Initialize assigned_low_gotno and
assigned_high_gotno.
(_bfd_mips_elf_finish_dynamic_sections): Account for a possible
gap in the middle of local GOT space.
ld/testsuite/
* ld-mips-elf/elf-rel-xgot-n32.d: Update for new GOT layout.
* ld-mips-elf/elf-rel-xgot-n32-embed.d: Likewise.
* ld-mips-elf/elf-rel-xgot-n64.d: Likewise.
* ld-mips-elf/elf-rel-xgot-n64-embed.d: Likewise.
* ld-mips-elf/elf-rel-xgot-n64-linux.d: Likewise.
The AArch64 TLSDESC to IE relaxation code uses a bit mask intended to
ensure that destination register in a relaxed ldr instruction is
always X0. The mask has an off by one error resulting in the most
significant bit of the destination register being retained in the
relaxed instruction. The issue generally appears when the compiler
emits TLS accesses code under high register pressure resulting in a
broken code sequence.
When aligning input sections, we are supposed to take the fill pattern
from a FILL statement, if there is one in the output section statement.
ld/
* ldlang.c (lang_size_sections_1 <lang_input_section_enum>): Use
current "fill", not "output_section_statement->fill".
ld/testsuite/
* ld-scripts/fill.d, * ld-scripts/fill.t, * ld-scripts/fill_0.s,
* ld-scripts/fill_1.s, * ld-scripts/fill_2.s: New test.
* ld-scripts/data.exp: Run it.
This patch scans all input files for symbol reference warning if the
symbol reference doesn't exist in the current input file.
ld/
PR ld/16756
* ldmain.c (symbol_warning): New function.
(warning_callback): Use it. Scan all input files for a reference
to SYMBOL.
ld/testsuite/
PR ld/16756
* ld-plugin/lto.exp: Expect filename and line number for PR
ld/12760 test.
ELFv2 needs to create plt entries in a non-PIC executable for an
address reference to a function defined in a shared object. It's
possible that an object file has no features that distinguish it as
ELFv1 or ELFv2, eg. an object only containing data. Such files need
to be handled like those that are known to be ELFv2.
However, this unnecessarily creates plt entries for the analogous
ELFv1 case, so arrange to set output abi version earlier, and use the
output abi version to further distinguish ambiguous input files.
bfd/
* elf64-ppc.c (ppc64_elf_check_relocs): Account for possibly
needed plt entries when taking the address of functions for
abiversion == 0 (ie. unknown) as well as abiversion == 2.
Move opd setup and abiversion checks to..
(ppc64_elf_before_check_relocs): ..here. Renamed from
ppc64_elf_process_dot_syms. Set output abiversion from input and
input abiversion from output, if either is not set.
(ppc64_elf_merge_private_bfd_data): Don't merge flags here.
(elf_backend_check_directives): Update.
ld/testsuite/
* ld-powerpc/startv1.s, * ld-powerpc/startv2.s, * ld-powerpc/funref.s,
* ld-powerpc/funv1.s, * ld-powerpc/funv2.s,
* ld-powerpc/ambiguousv1.d, * ld-powerpc/ambiguousv2.d: New test files.
* ld-powerpc/powerpc.exp: Run new tests.
The current code subtracts the size of the output section containing
relplt from RELASZ. In some cases this will be the same output
section as the dynamic relocs causing a value of zero to be output.
Calculating the size from input sections seems to make more sense.
bfd/ChangeLog:
2014-03-25 Will Newton <will.newton@linaro.org>
* elfnn-aarch64.c (elfNN_aarch64_finish_dynamic_sections):
Set value of DT_PLTRELSZ and DT_RELASZ based on the size
of input sections rather than output sections.
ld/testsuite/ChangeLog:
2014-03-25 Will Newton <will.newton@linaro.org>
* ld-aarch64/aarch64-elf.exp: Add relasz dump test.
* ld-aarch64/relasz.d: New file.
* ld-aarch64/relasz.s: Likewise.
Unless pointer_equality_needed is set then set st_value to be zero
for undefined symbols.
bfd/ChangeLog:
2014-03-20 Will Newton <will.newton@linaro.org>
PR ld/16715
* elf32-arm.c (elf32_arm_check_relocs): Set
pointer_equality_needed for absolute references within
executable links.
(elf32_arm_finish_dynamic_symbol): Set st_value to zero
unless pointer_equality_needed is set.
ld/testsuite/ChangeLog:
2014-03-20 Will Newton <will.newton@linaro.org>
* ld-arm/ifunc-14.rd: Update symbol values.
ld/testsuite/
* ld-arm/gc-hidden-1.d: Remove target, add not-target to match
other ELF-only tests in this directory. Loosen regexps so they
don't care what the exact addresses are.
This adds support for "func@localentry", an expression that returns the
ELFv2 local entry point address of function "func". I've excluded
dynamic relocation support because that obviously would require glibc
changes.
include/elf/
* ppc64.h (R_PPC64_REL24_NOTOC, R_PPC64_ADDR64_LOCAL): Define.
bfd/
* elf64-ppc.c (ppc64_elf_howto_raw): Add R_PPC64_ADDR64_LOCAL entry.
(ppc64_elf_reloc_type_lookup): Support R_PPC64_ADDR64_LOCAL.
(ppc64_elf_check_relocs): Likewise.
(ppc64_elf_relocate_section): Likewise.
* Add BFD_RELOC_PPC64_ADDR64_LOCAL.
* bfd-in2.h: Regenerate.
* libbfd.h: Regenerate.
gas/
* config/tc-ppc.c (ppc_elf_suffix): Support @localentry.
(md_apply_fix): Support R_PPC64_ADDR64_LOCAL.
ld/testsuite/
* ld-powerpc/elfv2-2a.s, ld-powerpc/elfv2-2b.s: New files.
* ld-powerpc/elfv2-2exe.d, ld-powerpc/elfv2-2so.d: New files.
* ld-powerpc/powerpc.exp: Run new test.
elfcpp/
* powerpc.h (R_PPC64_REL24_NOTOC, R_PPC64_ADDR64_LOCAL): Define.
gold/
* powerpc.cc (Target_powerpc::Scan::local, global): Support
R_PPC64_ADDR64_LOCAL.
(Target_powerpc::Relocate::relocate): Likewise.
Enabled via the use of a new linker command line option: --long-plt.
* bfd-in.h: Add export of bfd_elf32_arm_use_long_plt.
* bfd-in2.h: Regenerate.
* elf32-arm.c (elf32_arm_plt_entry_long): New array.
(elf32_arm_link_hash_table_create): Set plt_entry_size to 16 if
using long PLT entries.
(bfd_elf32_arm_use_long_plt): New function.
(elf32_arm_populate_plt_entry): Add support for long PLT entries.
* emultempl/armelf.em (OPTION_LONG_PLT): Define.
(PARSE_AND_LIST_LONGOPTS): Add long-plt.
(PARSE_AND_LIST_OPTIONS): Likewise.
(PARSE_AND_LIST_ARGS_CASES): Handle long-plt.
* ld.texinfo: Document --long-plt.
* ld-arm/long-plt-format.s: New test case.
* ld-arm/long-plt-format.d: Expected disassembly.
* ld-arm/arm-elf.exp: Run the new test.
The manifest is necessary in order for the linked binaries to be executed in a Windows 8 environment.
The manifest is added using a linker script so that this feature will be compiler-neutral. The resource
merging code in the linker means that if an application provides its own manifest then the default
manifest will be ignored.
* configure.in (all_emul_extra_binaries): New variable. Populated
by invoking configure.tgt.
(EMUL_EXTRA_BINARIES): New substitution.
* configure: Regenerate.
* configure.tgt (target_extra_binaries): New variable. Set to
default-manifest.o for Cygwin and MinGW targets.
* Makefile.am (EMUL_EXTRA_BINARIES): New variable. Initialised
by the configure script.
(ALL_EMUL_EXTRA_BINARIES): New variable.
(default-manifest.o): New rule to build the default manifest.
(ld_new_DEPENDENCIES): Add EMUL_EXTRA_BINARIES.
(install-data-local): Add EMUL_EXTRA_BINARIES.
* Makefile.in: Regenerate.
* ld.texinfo: Document default manifest support.
* emulparams/i386pe.sh (DEFAULT_MANIFEST): Define.
* emulparams/i386pep.sh (DEFAULT_MANIFEST): Define.
* emultempl/default-manifest.rc: New file.
* scripttempl/pe.sc (R_RSRC): Include DEFAULT_MANIFEST, if defined.
* scripttempl/pep.sc (R_RSRC): Likewise.
* ld-pe/longsecn-1.d: Allow for extra sections.
* ld-pe/longsecn-2.d: Likewise.
* ld-pe/longsecn.d: Likewise.
* ld-pe/secrel.d: Likewise.
I was running this by hand to test out --ppc476-workaround. Another
bootstrap test doesn't take all that long, so let's add it to the
testsuite.
* ld-bootstrap/bootstrap.exp: Add ppc476 workaround test.
* ld-bootstrap/ppc476.t: New file.
Intel MPX introduces 4 bound registers, which will be used for parameter
passing in x86-64. Bound registers are cleared by branch instructions.
Branch instructions with BND prefix will keep bound register contents.
This leads to 2 requirements to 64-bit MPX run-time:
1. Dynamic linker (ld.so) should save and restore bound registers during
symbol lookup.
2. Change the current 16-byte PLT0:
ff 35 08 00 00 00 pushq GOT+8(%rip)
ff 25 00 10 00 jmpq *GOT+16(%rip)
0f 1f 40 00 nopl 0x0(%rax)
and 16-byte PLT1:
ff 25 00 00 00 00 jmpq *name@GOTPCREL(%rip)
68 00 00 00 00 pushq $index
e9 00 00 00 00 jmpq PLT0
which clear bound registers, to preserve bound registers.
We use 2 new relocations:
to mark branch instructions with BND prefix.
When linker sees any R_X86_64_PC32_BND or R_X86_64_PLT32_BND relocations,
it switches to a different PLT0:
ff 35 08 00 00 00 pushq GOT+8(%rip)
f2 ff 25 00 10 00 bnd jmpq *GOT+16(%rip)
0f 1f 00 nopl (%rax)
to preserve bound registers for symbol lookup and it also creates an
external PLT section, .pl.bnd. Linker will create a BND PLT1 entry
in .plt:
68 00 00 00 00 pushq $index
f2 e9 00 00 00 00 bnd jmpq PLT0
0f 1f 44 00 00 nopl 0(%rax,%rax,1)
and a 8-byte BND PLT entry in .plt.bnd:
f2 ff 25 00 00 00 00 bnd jmpq *name@GOTPCREL(%rip)
90 nop
Otherwise, linker will create a legacy PLT1 entry in .plt:
68 00 00 00 00 pushq $index
e9 00 00 00 00 jmpq PLT0
66 0f 1f 44 00 00 nopw 0(%rax,%rax,1)
and a 8-byte legacy PLT in .plt.bnd:
ff 25 00 00 00 00 jmpq *name@GOTPCREL(%rip)
66 90 xchg %ax,%ax
The initial value of the GOT entry for "name" will be set to the the
"pushq" instruction in the corresponding entry in .plt. Linker will
resolve reference of symbol "name" to the entry in the second PLT,
.plt.bnd.
Prelink stores the offset of pushq of PLT1 (plt_base + 0x10) in GOT[1]
and GOT[1] is stored in GOT[3]. We can undo prelink in GOT by computing
the corresponding the pushq offset with
GOT[1] + (GOT offset - &GOT[3]) * 2
Since for each entry in .plt except for PLT0 we create a 8-byte entry in
.plt.bnd, there is extra 8-byte per PLT symbol.
We also investigated the 16-byte entry for .plt.bnd. We compared the
8-byte entry vs the the 16-byte entry for .plt.bnd on Sandy Bridge.
There are no performance differences in SPEC CPU 2000/2006 as well as
micro benchmarks.
Pros:
No change to undo prelink in dynamic linker.
Only 8-byte memory overhead for each PLT symbol.
Cons:
Extra .plt.bnd section is needed.
Extra 8 byte for legacy branches to PLT.
GDB is unware of the new layout of .plt and .plt.bnd.
bfd/
* elf64-x86-64.c (elf_x86_64_bnd_plt0_entry): New.
(elf_x86_64_legacy_plt_entry): Likewise.
(elf_x86_64_bnd_plt_entry): Likewise.
(elf_x86_64_legacy_plt2_entry): Likewise.
(elf_x86_64_bnd_plt2_entry): Likewise.
(elf_x86_64_bnd_arch_bed): Likewise.
(elf_x86_64_link_hash_entry): Add has_bnd_reloc and plt_bnd.
(elf_x86_64_link_hash_table): Add plt_bnd.
(elf_x86_64_link_hash_newfunc): Initialize has_bnd_reloc and
plt_bnd.
(elf_x86_64_copy_indirect_symbol): Also copy has_bnd_reloc.
(elf_x86_64_check_relocs): Create the second PLT for Intel MPX
in 64-bit mode.
(elf_x86_64_allocate_dynrelocs): Handle the second PLT for IFUNC
symbols. Resolve call to the second PLT if it is created.
(elf_x86_64_size_dynamic_sections): Keep the second PLT section.
(elf_x86_64_relocate_section): Resolve PLT references to the
second PLT if it is created.
(elf_x86_64_finish_dynamic_symbol): Use BND PLT0 and fill the
second PLT entry for BND relocation.
(elf_x86_64_finish_dynamic_sections): Use MPX backend data if
the second PLT is created.
(elf_x86_64_get_synthetic_symtab): New.
(bfd_elf64_get_synthetic_symtab): Likewise. Undefine for NaCl.
ld/
* emulparams/elf_x86_64.sh (TINY_READONLY_SECTION): New.
ld/testsuite/
* ld-x86-64/mpx.exp: Run bnd-ifunc-1 and bnd-plt-1.
* ld-x86-64/bnd-ifunc-1.d: New file.
* ld-x86-64/bnd-ifunc-1.s: Likewise.
* ld-x86-64/bnd-plt-1.d: Likewise.
execute permission regardless of the underlying PT_LOAD segment permissions.
Deleting this code allows the default linker behavior which is to set the
dynamic segment to the same permissions as the sections that make it up.
This change alters one existing test case to check the segment flags for
PT_DYNAMIC.
bfd/ChangeLog
* elfxx-mips.c(_bfd_mips_elf_modify_segment_map): Deleted hard coding of
PT_DYNAMIC segment flags.
ld/testsuite/ChangeLog
* ld-mips-elf/pic-and-nonpic-3a.sd: Check DYNAMIC segment flags.
It is added for
commit 409ff343a4
Author: Alan Modra <amodra@gmail.com>
Date: Tue Nov 8 13:49:11 2011 +0000
* elflink.c (bfd_elf_gc_mark_dynamic_ref_symbol): Mark syms in
executables when export_dynamic.
* ld-elf/rdynamic-1.c: New file.
* ld-elf/rdynamic-1.rd: Likewise.
* ld-elf/shared.exp (build_tests): Add rdynamic-1.
Jan Beulich
Alan Modra
Senthil Kumar Selvaraj
Andrew Burgess
H.J. Lu
Andreas Krebbel
Jiong Wang
Terry Guo
Matthew Fortune
Eric Botcazou
Andrew Bennett
Igor Zamyatin
Will Newton
Hans-Peter Nilsson
Nick Clifton
Maciej W. Rozycki
Roland McGrath
H.J. Lu
Kaz Kojima
Kyle McMartin
Ryan Mansfield
Andreas Tobler
Volodymyr Arbatov
Christian Svensson
Kwok Cheung Yeung
Marcus Shawcroft
Denis Chertykov
Andreas Schwab
Yury Gribov
Richard Sandiford
Jack Carter
Thomas Schwinge
Sebastian Huber
Sandra Loosemore