6c29acca43
TIc80 simulator.
2000-07-04 05:00:54 +00:00
071ea11e85
Initial creation of sourceware repository
1999-04-16 01:34:07 +00:00
aaa11abe42
Clarify meaning of sim_signalled's SIGRC argument. Document that this
...
isn't possible in sim-reason.c and just return the target SIGRC
instead.
For simulators that rely on sim-reason.c, replace SIG* with SIM_SIG*.
Hack nrun.c so that when it is executed (ARGV[0]) as `step' instead
of `run' it single steps the simulator. Allows testing of single step
without full GDB.
1997-11-22 12:52:44 +00:00
f03b093cd3
o Implement generic halt/restart/abort module.
...
Use in tic80 and d30v simulators.
o Add signal hook to sim-core module
1997-05-19 03:42:33 +00:00
37a684b84d
o Make tic80 insn file more `cache ready'
...
o Have igen always zero r0 instead of constantly checking if
the designated register is r0.
1997-05-16 03:27:40 +00:00
1b6f4dde35
Make sure r0 == 0; Return EINVAL for system calls that are defined but not provided; Provide traps 74-79 as debugging traps
1997-05-13 22:04:32 +00:00
8490235019
Remove ANNULed cycle - was confusing gdb.
1997-05-13 13:57:49 +00:00
9af5dcea8f
Clear cntrl-c after handling it.
1997-05-12 08:33:56 +00:00
c445af5a2b
c80 simulator fixes.
1997-05-12 04:57:49 +00:00
381f42ef5d
o Clean-up tic80 fp tracing
...
o Fill in more tic80 insns
1997-05-07 13:58:52 +00:00
1ec53ef597
Remove extra : from nop, sink{1,2} tracing
1997-05-06 19:33:51 +00:00
7b167b0900
Add semantic tracing to the tic80
1997-05-06 19:27:57 +00:00
d9b7594738
o Add core and event objects into simulator
...
base type
o Add preliminary tracing support for same
o trace_printf() takes both SD and CPU arguments
o Add CIA to standard set of parameters for
generated functions.
o Pacify GCC
1997-05-02 05:31:34 +00:00
d5e2c74e38
Numerous fixes.
1997-04-29 08:41:15 +00:00
abe293a0c6
Enable more instructions.
1997-04-24 12:06:27 +00:00
15c1649391
TIc80 simulator checkpoint - runs 3 instructions - trap, addu, br.a.
1997-04-22 17:46:07 +00:00
Andrew Cagney
Stan Shebs
Michael Meissner