Commit Graph

13 Commits

Author SHA1 Message Date
Mike Frysinger 26f8bf63bf sim: mips: delete mmu stubs to move to common sim_{read,write}
The only unique thing about mip's sim_{read,write} helpers is the call to
address_translation on the incoming address.  When we look closer at that
function though, we see it's just a stub that maps physical to virtual,
and the cache/return values are hardcoded.  If we delete this function,
we can then collapse all the callers and drop the custom sim_{read,write}
logic entirely.

Some day we might want to add MMU support, but when we do, we'll want to
have the common layers handle things so all targets benefit.
2015-12-26 11:50:59 -05:00
Mike Frysinger 29bc024d07 sim: mips: switch to common WITH_TRACE_ANY_P
We want to add new common trace helpers including "TRACE", so change the
mips one to the new WITH_TRACE_ANY_P macro since they do the same thing.
2015-06-12 06:28:17 -04:00
Joel Brobecker 51b318dec8 [sim] Update old contact info in GPL license notices
sim/ChangeLog:

        Update old contact info in GPL license notices.
2012-12-19 07:18:22 +00:00
Joel Brobecker 3fd725ef34 Update sim copyright headers from GPLv2-or-later to GPLv3-or-later.
gdb/sim/ChangeLog:

        Update the non-FSF-copyrighted files in sim to GPLv3 or later.
2012-12-19 07:12:02 +00:00
Chris Demetriou e80fc1523d 2002-06-03 Chris Demetriou <cgd@broadcom.com>
* cp1.c: fix formatting of switch case and default labels.
        * interp.c: Likewise.
        * sim-main.c: Likewise.
2002-06-03 22:30:52 +00:00
Chris Demetriou 56b48a7a9b 2001-02-08 Ben Elliston <bje@redhat.com>
* sim-main.c (load_memory): Pass cia to sim_core_read* functions.
        (store_memory): Likewise, pass cia to sim_core_write*.
2001-02-08 05:22:04 +00:00
Jason Molenda dfcd3bfb6f import gdb-2000-02-04 snapshot 2000-02-05 07:30:26 +00:00
Stan Shebs c906108c21 Initial creation of sourceware repository 1999-04-16 01:35:26 +00:00
Stan Shebs 071ea11e85 Initial creation of sourceware repository 1999-04-16 01:34:07 +00:00
Andrew Cagney d1cbd70abb Add configury for mips-lsi-elf target (32 bit MIPS16).
Fix numerous problems with PENDING_* code.
In old gencode simulator, don't double tick each cycle.
Add BREAK instruction to MIPS16 gencode simulator.
1998-11-12 06:42:34 +00:00
Frank Ch. Eigler fd6e6422c8 * sky->devo merge, continued -- left out the r5900 TLB last time!
* includes a small PR 17224 tweak
1998-10-29 13:44:37 +00:00
Ian Carmichael 8e3a0b599f * SYSCALL now uses exception vector.
* SKY: New memory mapping rules for k1seg, k0seg.
* Modified Files: ChangeLog.sky ChangeLog interp.c sim-main.c
1998-06-02 19:53:36 +00:00
Andrew Cagney 64ed8b6a8c aclocal.m4: Don't enable inlining when cross-compiling.
mips/*: Tune mips simulator - allow all memory transfer code to be inlined.
1998-04-05 07:16:54 +00:00