For binary ouput, we don't have an ELF bfd output so can't access
elf_elfheader. The elf64-ppc.c changes are really just a tidy,
triggered by looking at all places where the abiversion bits are
accessed.
bfd/
* elf64-ppc.c (ppc64_elf_before_check_relocs): Do .opd processing
even when output is not ppc64 ELF. Remove redundant tests on
type of input bfd.
ld/
PR 17488
* emultempl/ppc64elf.em (gld${EMULATION_NAME}_finish): Don't attempt
to access ELF header e_flags when not ppc64 ELF output.
The idea here is to drop .eh_frame FDEs corresponding to dropped
comdat group sections or linkonce sections, but not perform changes in
encoding.
bfd/
PR 17467
* elf-eh-frame.c (ENSURE_NO_RELOCS): Don't stop at first NONE reloc.
(_bfd_elf_parse_eh_frame): When relocatable output, don't set
flags enabling conversion of CIEs and FDEs to use relative encoding.
(find_merged_cie): Similarly.
(_bfd_elf_write_section_eh_frame): Don't edit FDEs when
relocatable, except for CIE pointer.
* elflink.c (bfd_elf_reloc_symbol_deleted_p): Return true for
relocs against symbols in dropped comdat group sections.
(bfd_elf_discard_info): Do some eh_frame optimisation when
relocatable.
ld/
* ldlang.c (lang_add_section): Set up map_head.s and map_tail.s when
relocatable.
These are useless because they can't match any address. In fact,
worse than useless because the .eh_frame_hdr lookup table matching
addresses to FDEs does not contain information about the FDE range.
The table is sorted by address; Range is inferred by the address
delta from one entry to the next. So if a zero address range FDE is
followed by a normal non-zero range FDE for the same address,
everything is good. However, the qsort could just as easily sort the
FDEs in the other order, in which case the normal FDE would
effectively be seen to have a zero range.
bfd/
PR 17447
* elf-bfd.h (struct eh_cie_fde): Comment re NULL u.fde.cie_inf.
* elf-eh-frame.c (_bfd_elf_parse_eh_frame): Mark zero address
range FDEs for discarding.
(vma_compare): Sort on range after address.
(_bfd_elf_gc_mark_fdes): Test for NULL u.fde.cie_inf.
(_bfd_elf_discard_section_eh_frame): Likewise. Write "FDE" in
error message rather than "fde".
(_bfd_elf_write_section_eh_frame_hdr): Write "PC" and "FDE" in
error message.
ld/testsuite/
* ld-elf/eh1.s: Don't create FDEs with zero address ranges.
* ld-elf/eh3.s: Likewise.
* ld-elf/eh1.d, * ld-elf/eh2.d, * ld-elf/eh3.d: Adjust.
* ld-mips-elf/eh-frame1-n32.d: Warning match update.
* ld-mips-elf/eh-frame1-n64.d: Likewise.
* ld-mips-elf/eh-frame2-n32.d: Likewise.
* ld-mips-elf/eh-frame2-n64.d: Likewise.
ar, nm and ranlib currently lack the ability to handle more than one
plugin in lib/bfd-plugins. This patch reshuffles the logic in plugin.c
to add this functionality. One can now place both llvm and gcc plugins
in this directory and have them loaded automatically.
Mixed gcc/llvm archives are also supported (but not very useful until
ld.bfd and ld.gold also would load multiple plugins and use them to
claim different object files).
PR 17422
* plugin.c (try_claim): New function. Moved from
bfd_plugin_object_p.
(try_load_plugin): Pass through bfd. Add test.
(load_plugin): Pass through bfd.
(bfd_plugin_object_p): Move logic to try_claim.
During link-time relaxation distance between cross-section call site and
its target may grow, producing 'call target out of range' error for
relaxed calls. Be more conservative when calculating whether or not a
callx can be converted to a straight call.
2014-09-23 Sterling Augustine <augustine.sterling@gmail.com>
bfd/
* elf32-xtensa.c (is_resolvable_asm_expansion): for cross-section
call relaxation use furthermost addresses where call source and
destination can be to check whether it's in the range of a direct
call.
bfd:
2014-09-19 Andreas Krebbel <krebbel@linux.vnet.ibm.com>
* elf32-s390.c: Don't replace R_390_TLS_LE32 with R_390_TLS_TPOFF
for PIE.
* elf64-s390.c: Don't replace R_390_TLS_LE64 with R_390_TLS_TPOFF
for PIE.
since
5979d6b69bhttps://sourceware.org/git/?p=binutils-gdb.git;a=commitdiff;h=5979d6b69b20a8355ea94b75fad97415fce4788c
vdso handling
https://sourceware.org/ml/binutils/2014-03/msg00082.htmlhttps://sourceware.org/ml/binutils/2014-04/msg00003.html
Message-ID: <A78C989F6D9628469189715575E55B230AA884EB@IRSMSX104.ger.corp.intel.com>
I get on
kernel-3.16.2-200.fc20.x86_64
https://koji.fedoraproject.org/koji/buildinfo?buildID=575860
attaching its vdso.bin.gz
GDB (FSF HEAD 5e43d46791) regression:
reproducer:
./gdb -ex start ./gdb
actual result / FAIL:
Got object file from memory but can't read symbols: File truncated.
expected result / PASS:
<nothing>
or / PASS:
warning: Could not load shared library symbols for linux-vdso.so.1.
Do you need "set solib-search-path" or "set sysroot"?
That "warning: Could not load shared library..." is mostly harmless (it is
a bug in GDB), in the FAIL case it is not printed just because
bfd_check_format() fails there.
It seems logical to me this way when the 'size' parameter has been already
added.
Alan Modra:
I was wrongly thinking that the section headers were
always last when I wrote that code. (They are now! If you relink
that vdso with current binutils master you won't hit this problem, but
that of course doesn't help existing kernels.)
I do not see a regression for add-symbol-file-from-memory for libncurses.so.5
from the original thread above.
Start of section headers: 1080 (bytes into file)
Size of section headers: 64 (bytes)
Number of section headers: 13
Section header string table index: 8
Section Headers:
[Nr] Name Type Address Off Size ES Flg Lk Inf Al
[ 8] .fake_shstrtab STRTAB 0000000000000780 000780 000076 00 A 0 0 32
Program Headers:
Type Offset VirtAddr PhysAddr FileSiz MemSiz Flg Align
LOAD 0x000000 0x0000000000000000 0x0000000000000000 0x0012fe 0x0012fe R E 0x1000
size == 0x2000
shdr_end == 0x778 == 1080 + 13 * 64
high_offset == 0x12fe
else if (size >= shdr_end)
- high_offset = shdr_end;
+ high_offset = size;
But then 0x778 < 0x780 for "Section header string table index" so whole
bfd_check_format() fails because section headers were not cleared here:
/* If the segments visible in memory didn't include the section headers,
then clear them from the file header. */
if (high_offset < shdr_end)
bfd/ChangeLog
2014-09-18 Jan Kratochvil <jan.kratochvil@redhat.com>
PR gdb/17407
* elfcode.h (bfd_from_remote_memory): Use SIZE for HIGH_OFFSET.
different architecture tags. Add a test case to make sure that this works,
and update readelf so that it will not seg-fault when trying to display the
attributes of binaries with invalid architecture tags.
* elf32-arm.c (elf32_arm_merge_eabi_attributes): Return false if
failed to merge.
* ld-arm/attr-merge-arch-2.d: New test case.
* ld-arm/attr-merge-arch-2a.s: New test case source file.
* ld-arm/attr-merge-arch-2b.s: Likewise.
* ld-arm/arm-elf.exp: Run new test case.
* readelf.c (display_arm_attribute): Use unsigned int type for
tag, val and type variables.
Refactor each relaxation pattern to raise the maintainability.
In origin, all patterns is analysed in nds32_elf_relax_section,
so it is hard to debug and maintain. Therefore, we classify all
patterns into different functions in this patch.
Moreover, we adjust all optimizations into nds32_elf_relax_section
to take these optimizations in turn. This can promise all relaxation
being done after calling gld${EMULATION_NAME}_after_allocation.
bfd/
* aoutx.h (NAME (aout, machine_type)): Add mips32r6 and mips64r6.
* archures.c (bfd_architecture): Likewise.
* bfd-in2.h (bfd_architecture): Likewise.
(bfd_reloc_code_real): Add relocs BFD_RELOC_MIPS_21_PCREL_S2,
BFD_RELOC_MIPS_26_PCREL_S2, BFD_RELOC_MIPS_18_PCREL_S3 and
BFD_RELOC_MIPS_19_PCREL_S2.
* cpu-mips.c (arch_info_struct): Add mips32r6 and mips64r6.
* elf32-mips.c: Define relocs R_MIPS_PC21_S2, R_MIPS_PC26_S2
R_MIPS_PC18_S3, R_MIPS_PC19_S2, R_MIPS_PCHI16 and R_MIPS_PCLO16.
(mips_reloc_map): Add entries for BFD_RELOC_MIPS_21_PCREL_S2,
BFD_RELOC_MIPS_26_PCREL_S2, BFD_RELOC_MIPS_18_PCREL_S3,
BFD_RELOC_MIPS_19_PCREL_S2, BFD_RELOC_HI16_S_PCREL and
BFD_RELOC_LO16_PCREL.
* elf64-mips.c: Define REL, and RELA relocations R_MIPS_PC21_S2,
R_MIPS_PC26_S2, R_MIPS_PC18_S3, R_MIPS_PC19_S2, R_MIPS_PCHI16
and R_MIPS_PCLO16.
(mips_reloc_map): Add entries for BFD_RELOC_MIPS_21_PCREL_S2,
BFD_RELOC_MIPS_26_PCREL_S2, BFD_RELOC_MIPS_18_PCREL_S3,
BFD_RELOC_MIPS_19_PCREL_S2, BFD_RELOC_HI16_S_PCREL and
BFD_RELOC_LO16_PCREL.
* elfn32-mips.c: Likewise.
* elfxx-mips.c (MIPSR6_P): New define.
(mipsr6_exec_plt_entry): New array.
(hi16_reloc_p): Add support for R_MIPS_PCHI16.
(lo16_reloc_p): Add support for R_MIPS_PCLO16.
(aligned_pcrel_reloc_p): New function.
(mips_elf_relocation_needs_la25_stub): Add support for relocs:
R_MIPS_PC21_S2 and R_MIPS_PC26_S2.
(mips_elf_calculate_relocation): Add support for relocs:
R_MIPS_PC21_S2, R_MIPS_PC26_S2, R_MIPS_PC18_S3, R_MIPS_PC19_S2,
R_MIPS_PCHI16 and R_MIPS_PCLO16.
(_bfd_elf_mips_mach): Add support for mips32r6 and mips64r6.
(mips_elf_add_lo16_rel_addend): Add support for R_MIPS_PCHI16.
(_bfd_mips_elf_check_relocs): Add support for relocs:
R_MIPS_PC21_S2 and R_MIPS_PC26_S2.
(_bfd_mips_elf_relocate_section): Add a check for unaligned
pc relative relocs.
(_bfd_mips_elf_finish_dynamic_symbol): Add support for MIPS r6
plt entry.
(mips_set_isa_flags): Add support for mips32r6 and mips64r6.
(_bfd_mips_elf_print_private_bfd_data): Likewise.
(mips_32bit_flags_p): Add support for mips32r6.
* libbfd.h (bfd_reloc_code_real_names): Add entries for
BFD_RELOC_MIPS_21_PCREL_S2, BFD_RELOC_MIPS_26_PCREL_S2,
BFD_RELOC_MIPS_18_PCREL_S3 and BFD_RELOC_MIPS_19_PCREL_S2.
* reloc.c: Document relocs BFD_RELOC_MIPS_21_PCREL_S2,
BFD_RELOC_MIPS_26_PCREL_S2, BFD_RELOC_MIPS_18_PCREL_S3 and
BFD_RELOC_MIPS_19_PCREL_S2.
binutils/
* readelf.c (get_machine_flags): Add support for mips32r6 and
mips64r6.
elfcpp/
* mips.h (E_MIPS_ARCH_32R6, E_MIPS_ARCH_64R6): New enum constants.
gas/
* config/tc-mips.c (mips_nan2008): New static global.
(mips_flag_nan2008): Removed.
(LL_SC_FMT): New define.
(COP12_FMT): Updated.
(ISA_IS_R6): New define.
(ISA_HAS_64BIT_REGS): Add mips64r6.
(ISA_HAS_DROR): Likewise.
(ISA_HAS_64BIT_FPRS): Add mips32r6 and mips64r6.
(ISA_HAS_ROR): Likewise.
(ISA_HAS_ODD_SINGLE_FPR): Likewise.
(ISA_HAS_MXHC1): Likewise.
(hilo_interlocks): Likewise.
(md_longopts): Likewise.
(ISA_HAS_LEGACY_NAN): New define.
(options): Add OPTION_MIPS32R6 and OPTION_MIPS64R6.
(mips_ase): Add field rem_rev.
(mips_ases): Updated to add which ISA an ASE was removed in.
(mips_isa_rev): Add support for mips32r6 and mips64r6.
(mips_check_isa_supports_ase): Add support to check if an ASE
has been removed in the specified MIPS ISA revision.
(validate_mips_insn): Skip '-' character.
(macro_build): Likewise.
(mips_check_options): Prevent R6 working with fp32, mips16,
micromips, or branch relaxation.
(file_mips_check_options): Set R6 floating point registers to
64 bit. Also deal with the nan2008 option.
(limited_pcrel_reloc_p): Add relocs: BFD_RELOC_MIPS_21_PCREL_S2,
BFD_RELOC_MIPS_26_PCREL_S2, BFD_RELOC_MIPS_18_PCREL_S3,
BFD_RELOC_MIPS_19_PCREL_S2, BFD_RELOC_HI16_S_PCREL and
BFD_RELOC_LO16_PCREL.
(operand_reg_mask): Add support for OP_SAME_RS_RT, OP_CHECK_PREV
and OP_NON_ZERO_REG.
(match_check_prev_operand): New static function.
(match_same_rs_rt_operand): New static function.
(match_non_zero_reg_operand): New static function.
(match_operand): Added entries for: OP_SAME_RS_RT, OP_CHECK_PREV
and OP_NON_ZERO_REG.
(insns_between): Added case to deal with forbidden slots.
(append_insn): Added support for relocs: BFD_RELOC_MIPS_21_PCREL_S2
and BFD_RELOC_MIPS_26_PCREL_S2.
(match_insn): Add support for operands -A, -B, +' and +". Also
skip '-' character.
(mips_percent_op): Add entries for %pcrel_hi and %pcrel_lo.
(md_parse_option): Add support for mips32r6 and mips64r6. Also
update the nan option handling.
(md_pcrel_from): Add cases for relocs: BFD_RELOC_MIPS_21_PCREL_S2,
BFD_RELOC_MIPS_26_PCREL_S2.
(mips_force_relocation): Prevent forced relaxation for MIPS r6.
(md_apply_fix): Add support for relocs: BFD_RELOC_MIPS_21_PCREL_S2,
BFD_RELOC_MIPS_26_PCREL_S2, BFD_RELOC_MIPS_18_PCREL_S3,
BFD_RELOC_MIPS_19_PCREL_S2, BFD_RELOC_HI16_S_PCREL and
BFD_RELOC_LO16_PCREL.
(s_mipsset): Add support for mips32r6 and mips64r6.
(s_nan): Update to support the new nan2008 framework.
(tc_gen_reloc): Add relocs: BFD_RELOC_MIPS_21_PCREL_S2,
BFD_RELOC_MIPS_26_PCREL_S2, BFD_RELOC_MIPS_18_PCREL_S3,
BFD_RELOC_MIPS_19_PCREL_S2, BFD_RELOC_HI16_S_PCREL and
BFD_RELOC_LO16_PCREL.
(mips_elf_final_processing): Updated to use the mips_nan2008.
(mips_cpu_info_table): Add entries for mips32r6 and mips64r6.
(macro): Enable ldc2, sdc2, ll, lld, swc2, sc, scd, cache, pref
macros for R6.
(mips_fix_adjustable): Make PC relative R6 relocations relative
to the symbol and not the section.
* configure.ac: Add support for mips32r6 and mips64r6.
* configure: Regenerate.
* doc/c-mips.texi: Document the -mips32r6 and -mips64r6 command line
options.
* doc/as.texinfo: Likewise.
gas/testsuite/
* gas/mips/24k-triple-stores-1.s: If testing for r6 prevent
non-supported instructions from being tested.
* gas/mips/24k-triple-stores-2.s: Likewise.
* gas/mips/24k-triple-stores-3.s: Likewise.
* gas/mips/24k-triple-stores-6.s: Likewise.
* gas/mips/beq.s: Likewise.
* gas/mips/eva.s: Likewise.
* gas/mips/ld-zero-3.s: Likewise.
* gas/mips/mips32-cp2.s: Likewise.
* gas/mips/mips32.s: Likewise.
* gas/mips/mips4.s: Likewise.
* gas/mips/add.s: Don't test the add instructions if r6, and
add padding.
* gas/mips/add.d: Check for a triple dot not a nop at the end of the
disassembly output.
* gas/mips/micromips@add.d: Likewise.
* gas/mips/mipsr6@24k-branch-delay-1.d: New file.
* gas/mips/mipsr6@24k-triple-stores-1.d: New file.
* gas/mips/mipsr6@24k-triple-stores-2-llsc.d: New file.
* gas/mips/mipsr6@24k-triple-stores-2.d: New file.
* gas/mips/mipsr6@24k-triple-stores-3.d: New file.
* gas/mips/mipsr6@24k-triple-stores-6.d: New file.
* gas/mips/mipsr6@add.d: New file.
* gas/mips/mipsr6@attr-gnu-4-1-msingle-float.l: New file.
* gas/mips/mipsr6@attr-gnu-4-1-msingle-float.s: New file.
* gas/mips/mipsr6@attr-gnu-4-1-msoft-float.l: New file.
* gas/mips/mipsr6@attr-gnu-4-1-msoft-float.s: New file.
* gas/mips/mipsr6@attr-gnu-4-2-mdouble-float.l: New file.
* gas/mips/mipsr6@attr-gnu-4-2-mdouble-float.s: New file.
* gas/mips/mipsr6@beq.d: New file.
* gas/mips/mipsr6@bge.d: New file.
* gas/mips/mipsr6@bgeu.d: New file.
* gas/mips/mipsr6@blt.d: New file.
* gas/mips/mipsr6@bltu.d: New file.
* gas/mips/mipsr6@branch-misc-1.d: New file.
* gas/mips/mipsr6@branch-misc-2-64.d: New file.
* gas/mips/mipsr6@branch-misc-2pic-64.d: New file.
* gas/mips/mipsr6@branch-misc-4-64.d: New file.
* gas/mips/mipsr6@cache.d: New file.
* gas/mips/mipsr6@eva.d: New file.
* gas/mips/mipsr6@jal-svr4pic-noreorder.d: New file.
* gas/mips/mipsr6@jal-svr4pic.d: New file.
* gas/mips/mipsr6@ld-zero-2.d: New file.
* gas/mips/mipsr6@ld-zero-3.d: New file.
* gas/mips/mipsr6@loc-swap-dis.d: New file.
* gas/mips/mipsr6@mips32-cp2.d: New file.
* gas/mips/mipsr6@mips32-imm.d: New file.
* gas/mips/mipsr6@mips32.d: New file.
* gas/mips/mipsr6@mips32r2.d: New file.
* gas/mips/mipsr6@mips4-fp.d: New file.
* gas/mips/mipsr6@mips4-fp.l: New file.
* gas/mips/mipsr6@mips4-fp.s: New file.
* gas/mips/mipsr6@mips4.d: New file.
* gas/mips/mipsr6@mips5-fp.d: New file.
* gas/mips/mipsr6@mips5-fp.l: New file.
* gas/mips/mipsr6@mips5-fp.s: New file.
* gas/mips/mipsr6@mips64.d: New file.
* gas/mips/mipsr6@msa-branch.d: New file.
* gas/mips/mipsr6@msa.d: New file.
* gas/mips/mipsr6@pref.d: New file.
* gas/mips/mipsr6@relax-swap3.d: New file.
* gas/mips/r6-64-n32.d: New file.
* gas/mips/r6-64-n64.d: New file.
* gas/mips/r6-64-removed.l: New file.
* gas/mips/r6-64-removed.s: New file.
* gas/mips/r6-64.s: New file.
* gas/mips/r6-attr-none-double.d: New file.
* gas/mips/r6-n32.d: New file.
* gas/mips/r6-n64.d: New file.
* gas/mips/r6-removed.l: New file.
* gas/mips/r6-removed.s: New file.
* gas/mips/r6.d: New file.
* gas/mips/r6.s: New file.
* gas/mips/mipsr6@mips32-dsp.d: New file.
* gas/mips/mipsr6@mips32-dspr2.d: New file.
* gas/mips/mipsr6@mips32r2-ill.l: New file.
* gas/mips/mipsr6@mips32r2-ill.s: New file.
* gas/mips/cache.s: Add r6 instruction varients.
* gas/mips/mips.exp: Add support for the mips32r6 and mips64r6
architectures. Also prevent non r6 supported tests from running.
Finally, add in support for running the new r6 tests.
(run_dump_test_arch): Add support for mipsr6 tests.
(run_list_test_arch): Add support for using files of the
form arch@testname.l .
include/elf/
* mips.h: Add relocs: R_MIPS_PC21_S2, R_MIPS_PC26_S2, R_MIPS_PC18_S3,
R_MIPS_PC19_S2, R_MIPS_PCHI16 and R_MIPS_PCLO16.
(E_MIPS_ARCH_32R6): New define.
(E_MIPS_ARCH_64R6): New define.
include/opcode/
* mips.h (mips_operand_type): Add new entries: OP_SAME_RS_RT,
OP_CHECK_PREV and OP_NON_ZERO_REG. Add descriptions for the MIPS R6
instruction arguments: -a, -b, -d, -s, -t, -u, -v, -w, -x, -y, -A, -B,
+I, +O, +R, +:, +\, +", +;
(mips_check_prev_operand): New struct.
(INSN2_FORBIDDEN_SLOT): New define.
(INSN_ISA32R6): New define.
(INSN_ISA64R6): New define.
(INSN_UPTO32R6): New define.
(INSN_UPTO64R6): New define.
(mips_isa_table): Add INSN_UPTO32R6 and INSN_UPTO64R6.
(ISA_MIPS32R6): New define.
(ISA_MIPS64R6): New define.
(CPU_MIPS32R6): New define.
(CPU_MIPS64R6): New define.
(cpu_is_member): Add cases for CPU_MIPS32R6, and CPU_MIPS64R6.
ld/
* ldmain.c (get_emulation): Add support for -mips32r6 and -mips64r6.
opcodes/
* mips-dis.c (mips_arch_choices): Add entries for mips32r6 and
mips64r6.
(parse_mips_dis_option): Allow MSA and virtualization support for
mips64r6.
(mips_print_arg_state): Add fields dest_regno and seen_dest.
(mips_seen_register): New function.
(print_insn_arg): Refactored code to use mips_seen_register
function. Add support for OP_SAME_RS_RT, OP_CHECK_PREV and
OP_NON_ZERO_REG. Changed OP_REPEAT_DEST_REG case to print out
the register rather than aborting.
(print_insn_args): Add length argument. Add code to correctly
calculate the instruction address for pc relative instructions.
(validate_insn_args): New static function.
(print_insn_mips): Prevent jalx disassembling for r6. Use
validate_insn_args.
(print_insn_micromips): Use validate_insn_args.
all the arguments are valid.
* mips-formats.h (PREV_CHECK): New define.
* mips-opc.c (decode_mips_operand): Add support for -a, -b, -d, -s,
-t, -u, -v, -w, -x, -y, -A, -B, +I, +O, +R, +:, +\, +", +;
(RD_pc): New define.
(FS): New define.
(I37): New define.
(I69): New define.
(mips_builtin_opcodes): Add MIPS R6 instructions. Exclude recoded
MIPS R6 instructions from MIPS R2 instructions.
With larger binaries on 64-bit systems, or indeed just binaries that
have a large gap between text and data, it is possible for the
.eh_frame_hdr lookup table entry values to overflow a signed 32-bit
relative offset. It is also a requirement for the glibc FDE lookup
code that only one FDE claim to cover any given address.
* elf-bfd.h (struct eh_frame_array_ent): Add "range".
* elf-eh-frame.c (_bfd_elf_write_section_eh_frame): Stash address
range of FDEs to hdr_info->array.
(_bfd_elf_write_section_eh_frame_hdr): Report overflow in
.eh_frame_hdr entries, and overlapping FDEs.
ppc476 sections that end exactly on a page boundary need the
workaround applied when a function ends in "bctr", or when pasting
together code from multiple sections. The space allocated for the
patch area didn't allow for this case, while the code in
relocate_section performing the patches did, leading to an assertion
failure.
* elf32-ppc.c (ppc_elf_relax_section): Fix off by one error.
Any error other than bfd_error_wrong_format returned from object_p()
is effectively a fatal error.
* vms-alpha.c (alpha_vma_object_p): Don't return file_truncated
error. Remove redundant bfd_set_error.
2014-08-26 Jiong Wang <jiong.wang@arm.com>
bfd/
* elfnn-aarch64.c (elfNN_aarch64_check_relocs): Initialize non_got_ref
properly for MOVW_G0/1/2_NC and MOVW_G3. Reject them when linking
shared library.
(elfNN_aarch64_gc_sweep_hook): Add check on these relocs.
ld/testsuite/
* ld-aarch64/copy-relocs-so.s: New test file.
* ld-aarch64/copy-relocs-exe.s: Likewise.
* ld-aarch64/copy-relocs.d: New expectation file.
* ld-aarch64/emit-relocs-264-bad.d: New test file.
* ld-aarch64/emit-relocs-266-bad.d: Likewise.
* ld-aarch64/emit-relocs-268-bad.d: Likewise.
* ld-aarch64/emit-relocs-269-bad.d: Likewise.
* ld-aarch64/aarch64-elf.exp: Run new added test.
cie->output_sec is used to when merging CIEs to ensure that only CIEs
from the same output section are merged. I noticed an assignment to
this field in _bfd_elf_parse_eh_frame, and thought "That's wrong,
output_section isn't set properly when _bfd_elf_parse_eh_frame is
called from gc-sections code". It turns out that this assignment is
premature, and in fact a dead store. find_merged_cie overwrites with
the correct value before the field is ever used. On looking a little
more it becomes apparent that cie->cie_inf.u.cie.u.sec->output_section
holds the same value, so cie->output_sec is redundant.
* elf-eh-frame.c (struct cie): Delete "output_sec" field.
(cie_eq, cie_compute_hash): Use output_section from cie_inf instead.
I noticed recently that .eh_frame FDEs generated by the linker for
call stubs and .glink weren't being indexed in .eh_frame_hdr, due to
bfd_elf_discard_info being run before the linker generated .eh_frame
sections were available for parsing. This patch moves code around in
elf64-ppc.c and ppc64elf.em to avoid that problem.
Another problem fixed here is that --gc-sections parses .eh_frame
early, and the existing machinery allows only one go at parsing the
.eh_frame sections. That resulted in the linker generated .eh_frame
CIEs not being merged and no .eh_frame_hdr index entries for those
FDEs. It turns out that all the info from parsing .eh_frame is
attached to the section, so order of parsing isn't important, and
after parsing sec_info_type being set will prevent a section being
parsed again. At least, when parsing doesn't hit an error. So there
isn't really any need for "parsed_eh_frame". "merge_cies" is also
redundant, which means _bfd_elf_{begin,end}_eh_frame_parsing can also
disappear.
bfd/
* elf-bfd.h (struct eh_frame_hdr_info): Delete merge_cies and
parsed_eh_frames.
(_bfd_elf_begin_eh_frame_parsing): Delete.
(_bfd_elf_end_eh_frame_parsing): Delete.
* elf-eh-frame.c (_bfd_elf_begin_eh_frame_parsing): Delete.
(_bfd_elf_end_eh_frame_parsing): Delete.
(_bfd_elf_parse_eh_frame): Don't test parsed_eh_frame. Test
!info->relocatable in place of merge_cies.
* elflink.c (bfd_elf_gc_sections, bfd_elf_discard_info): Adjust.
* elf64-ppc.c (glink_eh_frame_cie): Pad to multiple of 8.
(ppc64_elf_size_stubs): Likewise pad stub FDE.
(ppc64_elf_build_stubs): Move code setting glink .eh_frame to..
(ppc64_elf_size_stubs): ..here and..
(ppc64_elf_finish_dynamic_sections): ..here.
ld/
* emultempl/ppc64elf.em (gld${EMULATION_NAME}_after_allocation): Call
bfd_elf_discard_info after generating glink .eh_frame. Delete
redundant test on ppc64_elf_setup_section_lists status.
2014-08-21 Tony Wang <tony.wang@arm.com>
* elf32-arm.c (elf32_arm_final_link_relocate): Implement
the veneer routine for R_ARM_THM_JUMP19.
(arm_type_of_stub): Add conditional clause for R_ARM_THM_JUMP19
(elf32_arm_size_stub): Ditto.
ld/testsuite/ChangeLog
2014-08-21 Tony Wang <tony.wang@arm.com>
* ld-arm/jump-reloc-veneers-cond.s: New test.
* ld-arm/farcall-cond-thumb-arm.s: Ditto.
* ld-arm/jump-reloc-veneers-cond-short.d: Expected output
for target without a veneer generation.
* ld-arm/jump-reloc-veneers-cond-long.d: Expected output
for target with a veneer generation.
* ld-arm/farcall-cond-thumb-arm.d: Expected output for
inter working veneer generation.
* ld-arm/arm-elf.exp: Add tests for conditional branch veneer.
bfd/
PR ld/17277
* elf32-arm.c (elf32_arm_check_relocs): Increment P->pc_count for
all reloc types with pc_relative set in the howto, not just for
R_ARM_REL32 and R_ARM_REL32_NOI.
(allocate_dynrelocs_for_symbol): Update comment.
(elf32_arm_gc_sweep_hook): For all reloc types with pc_relative
set in the howto, set call_reloc_p and may_need_local_target_p but
not may_become_dynamic_p; not only for R_ARM_REL32 and R_ARM_REL32_NOI.
(elf32_arm_check_relocs): Likewise.
ld/testsuite/
PR ld/17277
* ld-arm/pcrel-shared.s: New file.
* ld-arm/pcrel-shared.rd: New file.
* ld-arm/arm-elf.exp (armelftests_common): Add it.
At the moment it is possible to configure binutils for these triples
but the resulting linker defaults to little endian with huge numbers
of testsuite failures, which on the face of it does not appear to make
much sense.
This patch makes the behaviour similar to armeb-elf and the testsuite
is clean.
bfd/ChangeLog:
2014-08-20 Will Newton <will.newton@linaro.org>
* config.bfd: Default armeb-*-eabi* to big endian.
ld/ChangeLog:
2014-08-20 Will Newton <will.newton@linaro.org>
* configure.tgt: Default armeb-*-eabi* to big endian.
Directories that don't use libtool need to add -ldl (on most *nix
hosts) to provide dlopen for libbfd.
config/
* plugins.m4 (AC_PLUGINS): If plugins are enabled, add -ldl to
LIBS via AC_SEARCH_LIBS.
gdb/
* acinclude.m4 (GDB_AC_CHECK_BFD): Don't add -ldl.
* config.in: Regenerate.
sim/ppc/
* configure.ac: Invoke AC_PLUGINS.
* config.in: Regenerate.
and regen lots of configure files.
This probably could be fixed by making changes in relocate_section for
ifunc, but it's simpler to disable the optimisation for ifunc.
* elf64-ppc.c (ppc64_elf_adjust_dynamic_symbol): Don't attempt to
use dynrelocs for ifunc.
* elf32-ppc.c (ppc_elf_adjust_dynamic_symbol): Similarly.
PR 17287
bfd/
* elflink.c (on_needed_list): Only consider libraries that have
been loaded.
ld/
* ld.texinfo (--as-needed): Clarify that references from libraries
must be from needed libraries.
ld/testsuite/
* ld-plugin/needed3.c: New file.
* ld-elf/shared.exp: Add needed3 test.
Presents .eh_frame input sections to the optimisation machinery in
elf-eh-frame.c in the order they are given by the linker script.
PR 16563
bfd/
* elflink.c (bfd_elf_discard_info): Process .eh_frame and .stab
in the order they are mapped to output sections.
ld/
* ldlang.c (map_head_is_link_order): Rename from
stripped_excluded_sections.
(lang_clear_os_map): New function, extracted from..
(strip_excluded_output_sections): ..here.
* ldlang.h (lang_clear_os_map): Declare.
* ldwrite.c (ldwrite): Call lang_clear_os_map.
* emultempl/sh64elf.em (sh64_elf_${EMULATION_NAME}_after_allocation):
Likewise.
This also makes --enable-plugins default to on for hosts that can
support plugins, so we have consistent lto toolchain support. The
ACX_LARGEFILE moves aren't strictly necessary, but are harmless and
will be necessary if plugin support is extended to more hosts via
libtool's dlopen support. I started down that path then decided it
was more work than I was interested in doing. (ACX_LARGEFILE invokes
AC_PLUGINS.)
config/
* plugins.m4: Test for dlfcn.h or windows.h here to set default
for --enable-plugins. Report error if someone tries to enable
plugins on a host we don't support.
bfd/
* configure.ac: Delete redundant plugin related checks.
* configure: Regenerate.
binutils/
* configure.ac: Move ACX_LARGEFILE after LT_INIT.
* config.in: Regenerate.
* configure: Regenerate.
gas/
* configure.ac: Move ACX_LARGEFILE after LT_INIT.
* config.in: Regenerate.
* configure: Regenerate.
gprof/
* configure.ac: Move ACX_LARGEFILE after LT_INIT.
* configure: Regenerate.
* gconfig.in: Regenerate.
ld/
* configure.ac: Move AC_PROG_CC and other macros earlier. Delete
plugin checks now done in config/plugins.m4.
* config.in: Regenerate.
* configure: Regenerate.
This fixes a bug where R_OR1K_INSN_REL_26 relocations would be emitted
into shared libraries even when the referenced symbol was hidden
or the symbol was contained in the same .so which had been
linked with -Bsymbolic.
bfd/
* elf32-or1k.c (or1k_elf_relocate_section, or1k_elf_check_relocs,
allocate_dynrelocs): Use SYMBOL_REFERENCES_LOCAL, SYMBOL_CALLS_LOCAL
and SYMBOLIC_BIND.
The main aim of this change was to have non_ir_ref set correctly on
new indirect symbols. I could have added a "copy" param to the "notice"
function, so that indirect symbols could be created in plugin_notice,
but it seemed cleaner to create indirect syms earlier and pass them
rather than "string" to "notice".
include/
* bfdlink.h (struct bfd_link_callbacks <notice>): Remove "string"
param, add "inh".
bfd/
* coff-aux.c (coff_m68k_aux_link_add_one_symbol): Only call "notice"
here when not calling the generic add_symbol function. Formatting.
Correct handling of indirect symbols. Update notice call.
* elflink.c (_bfd_elf_notice_as_needed): Update notice call.
* linker.c (_bfd_generic_link_add_one_symbol): Create indirect
symbols early. Update notice call. Add comments regarding weak
symbols vs. indirect.
ld/
* ldmain.c (notice): Update args.
* plugin.c (plugin_notice): Likewise. Follow warning sym link.
Handle new indirect symbol.
WARN has always been able to be handled by the CWARN case (WARN was
used when the previous symbols was undef, undefweak or common and thus
must be on the undefs list, so the CWARN test passes). So let's merge
those two cases.
* linker.c (WARN, CWARN): Collapse these states to WARN.
(_bfd_generic_link_add_one_symbol): Use old CWARN case for
new WARN.
CODE_FRAGMENT. Also fix skip_past_newline to not skip past NUL.
* bfd-in2.h: Regenerate.
* libcoff.h: Regenerate.
doc/
* chew.c (skip_past_newline_1): New function.
(outputdots): Call it.
(skip_past_newline): Ditto.
* linker.c (generic_link_check_archive_element): Move handling
of command link -u symbols with a common symbol def to the
code handling non-common symbols so that archive element symbols
are loaded. Use generic_link_add_object_symbols.
Avoid scan of symbols on objects in coff archives since we don't need
to do anything special with common symbols. The scan is quite useless,
and breaks LTO due to slim LTO objects not having symbols available
until after the plugin has claimed them. Instead we can add objects
based on their archive symbol map.
Also, rip out the archive symbol hash table used by the generic
linker. Using a hash breaks one feature of unix archive linking;
The first object file in an archive defining any given symbol should
be the object extracted to satisfy that symbol. What's more a hash
isn't much faster except in pathological cases where object file
ordering causes many scans of the archive. See the comment which I'm
removing from elf_link_add_archive_symbols.
Finally, tidy elflink.c archive handling a little.
PR 13557
* linker.c (struct archive_list, struct archive_hash_entry,
struct archive_hash_table, archive_hash_newfunc,
archive_hash_table_init, archive_hash_lookup, archive_hash_allocate,
archive_hash_table_free): Delete.
(_bfd_generic_link_add_archive_symbols): Add h and name params to
checkfn. Rewrite using a straight-forward scan over archive map.
(generic_link_check_archive_element_no_collect,
generic_link_check_archive_element_collect,
generic_link_check_archive_element): Add h and name params.
* aoutx.h (aout_link_check_archive_element): Likewise.
* pdp11.c (aout_link_check_archive_element): Likewise.
* xcofflink.c (xcoff_link_check_archive_element): Likewise.
* cofflink.c (coff_link_check_archive_element): Likewise. Don't
scan symbols, simply add archive element whenever h is undefined.
(coff_link_check_ar_symbols): Delete.
* ecoff.c (read_ext_syms_and_strs): Delete.
(reread_ext_syms_and_strs): Delete.
(ecoff_link_check_archive_element): Add h and name param. Don't
scan symbols, simply add based on h. Use ecoff_link_add_object_symbols.
* elflink.c (elf_link_is_defined_archive_symbol): Don't test
archive_pass.
(elf_link_add_archive_symbols): Delete "defined" array, merge
functionality into "included". Make "included" a char array. Don't
set or test archive_pass.
* libbfd-in.h (_bfd_generic_link_add_archive_symbols): Update.
* libbfd.h: Regenerate.
Relocations against .got.plt section may not be in the same order as
entries in PLT section. It is incorrect to assume that the Ith reloction
index against .got.plt section always maps to the (I + 1)th entry in PLT
section. This patch matches the .got.plt relocation offset/index in PLT
entry against the index in .got.plt relocation table. It only checks
R_*_JUMP_SLOT and R_*_IRELATIVE relocations. It ignores R_*_TLS_DESC
and R_*_TLSDESC relocations since they have different PLT entries.
bfd/
PR binutils/17154
* elf32-i386.c (elf_i386_plt_sym_val): Only match R_*_JUMP_SLOT
and R_*_IRELATIVE relocation offset with PLT entry.
* elf64-x86-64.c (elf_x86_64_plt_sym_val): Likewise.
(elf_x86_64_plt_sym_val_offset_plt_bnd): New.
(elf_x86_64_get_synthetic_symtab): Use it.
ld/testsuite/
PR binutils/17154
* ld-ifunc/pr17154-i386.d: New file.
* ld-ifunc/pr17154-x86-64.d: Likewise.
* ld-ifunc/pr17154-x86.s: Likewise.
* ld-x86-64/bnd-ifunc-2.d: Likewise.
* ld-x86-64/bnd-ifunc-2.s: Likewise.
* ld-x86-64/mpx.exp: Run bnd-ifunc-2.
* ld-x86-64/tlsdesc-nacl.pd: Updated.
* ld-x86-64/tlsdesc.pd: Likewise.
Commit e1f987424b changed how
next_tls_desc_index was set up. This patch updates
elf_i386_compute_jump_table_size to use elf.srelplt->reloc_count
instead of next_tls_desc_index.
bfd/
PR ld/17057
* elf32-i386.c (elf_i386_compute_jump_table_size): Replace
next_tls_desc_index with elf.srelplt->reloc_count.
ld/testsuite/
PR ld/17057
* ld-i386/i386.exp: Run pr17057.
* ld-i386/pr17057.d: New file.
* ld-i386/pr17057.s: Likewise.
So that we munge isym->st_other once per symbol.
* elflink.c (elf_merge_st_other): Update comments. Simplify
visibility handling. Make isym const. Move code modifying
isym->st_other for --exclude-libs to..
(elf_link_add_object_symbols): ..here.
Increase the maximum page size to 64kB and align the TEXT_START_ADDR
to a 64kB boundary. This brings AArch32 in line with AArch64 and
improves compatability under certain conditions.
bfd/ChangeLog:
2014-07-08 Will Newton <will.newton@linaro.org>
* elf32-arm.c (ELF_MAXPAGESIZE): Increase the default
value to 64kB and remove custom setting for NaCl.
ld/ChangeLog:
2014-07-08 Will Newton <will.newton@linaro.org>
* emulparams/armelf_linux.sh (TEXT_START_ADDR): Increase
alignment to 64kB boundary.
ld/testsuite/ChangeLog:
2014-07-08 Will Newton <will.newton@linaro.org>
* ld-arm/arm-lib.ld: Increase MAXPAGESIZE value to
match bfd.
* ld-arm/cortex-a8-fix-bl-rel-plt.d: Update offsets to
take into account increased segment alignment.
* ld-arm/ifunc-gdesc.r: Likewise.
* ld-arm/tls-lib.d: Likewise.
This fixes a problem seen on powerpc64le ELFv2 when creating a
function symbol alias with ld --defsym. st_other needs to be copied
from the source symbol to the alias in order to set up the local entry
offset for the alias. I decided to make this change in the generic
ELF code rather than in elf64-ppc.c since it looks like other targets
that use st_other bits might benefit too.
bfd/
* elflink.c (_bfd_elf_copy_link_hash_symbol_type): Copy st_other
bits from source to dest.
* linker.c (_bfd_generic_copy_link_hash_symbol_type): Update comment.
* targets.c (struct bfd_target <_bfd_copy_link_hash_symbol_type>):
Likewise.
* bfd-in2.h: Regenerate.
ld/testsuite/
* ld-powerpc/defsym.s, * ld-powerpc/defsym.d: New test.
* ld-powerpc/powerpc.exp: Run it.
* elf32-avr.c: Handle R_AVR_PORT5 and R_AVR_PORT6.
* reloc.c: Add BFD_RELOC_AVR_PORT5 and BFD_RELOC_AVR_PORT6.
* bfd-in2.h: Regenerate.
* libbfd.h: Regenerate.
* avr.h: Add R_AVR_PORT5 and R_AVR_PORT6.
* config/tc-avr.c (avr_operand): Permit referring to r26-r31 by
name as [xyz][hl]. Permit using a symbol whoes name begins with
`r' to refer to a register.
Allow arbitrary expressions for the P and p operators.
(md_apply_fix): Check the BFD_RELOC_AVR_PORT5 and
BFD_RELOC_AVR_PORT6 relocations.
This removes usage of the obsolete AC_INIT and AM_INIT_AUTOMAKE in all
binutils configure.in files. The BFD version is now in bfd/version.m4
rather than bfd/configure.in, which allows automake to automatically
track this dependency.
bfd/
* version.m4: New file.
* configure.in: Include version.m4.
(AC_INIT): Update.
* Makefile.am (RELEASE): Delete.
(bfdver.h): Depend on development.sh, use instead of RELEASE.
* Makefile.in: Regenerate.
* doc/Makefile.in: Regenerate.
opcodes/
* configure.in: Include bfd/version.m4.
(AC_INIT, AM_INIT_AUTOMAKE): Use modern form.
(BFD_VERSION): Delete.
* Makefile.am (CONFIG_STATUS_DEPENDENCIES): Remove bfd/configure.in.
* configure: Regenerate.
* Makefile.in: Regenerate.
binutils/
* configure.in: Include bfd/version.m4.
(AC_INIT, AM_INIT_AUTOMAKE): Use modern form.
(BFD_VERSION): Delete.
* Makefile.am (CONFIG_STATUS_DEPENDENCIES): Remove bfd/configure.in.
* configure: Regenerate.
* Makefile.in: Regenerate.
* doc/Makefile.in: Regenerate.
gas/
* configure.in: Include bfd/version.m4.
(AC_INIT, AM_INIT_AUTOMAKE): Use modern form.
(BFD_VERSION): Delete.
* configure.com: Get bfd version from bfd/version.m4.
* Makefile.am (CONFIG_STATUS_DEPENDENCIES): Remove bfd/configure.in.
* configure: Regenerate.
* Makefile.in: Regenerate.
* doc/Makefile.in: Regenerate.
gprof/
* configure.in: Include bfd/version.m4.
(AC_INIT, AM_INIT_AUTOMAKE): Use modern form.
(BFD_VERSION): Delete.
* Makefile.am (CONFIG_STATUS_DEPENDENCIES): Remove bfd/configure.in.
* configure: Regenerate.
* Makefile.in: Regenerate.
ld/
* configure.in: Include bfd/version.m4.
(AC_INIT, AM_INIT_AUTOMAKE): Use modern form.
(BFD_VERSION): Delete.
* Makefile.am (CONFIG_STATUS_DEPENDENCIES): Remove bfd/configure.in.
* configure: Regenerate.
* Makefile.in: Regenerate.
doesn't always mean you need to define a function symbol on plt code.
If all references are in read-write sections, then using dynamic relocs
is OK.
bfd/
* elf32-ppc.c (ppc_elf_adjust_dynamic_symbol): Clear
pointer_equality_needed when !readonly_dynrelocs.
* elf64-ppc.c (ppc64_elf_adjust_dynamic_symbol): Likewise.
ld/testsuite/
* ld-powerpc/ambiguousv1.d: Match symbol table too.
* ld-powerpc/ambiguousv2.d: Likewise.
* ld-powerpc/ambiguousv1b.d: New.
* ld-powerpc/ambiguousv2b.d: New.
* ld-powerpc/powerpc.exp: Run new tests.
If we can dlopen an object then DF_STATIC_TLS is relevant.
* elf32-ppc.c (ppc_elf_check_relocs): Set DF_STATIC_TLS for PIEs too.
* elf64-ppc.c (ppc64_elf_check_relocs): Likewise.
for better packing. Removes a field and a flag that are never set.
bfd/
* bfd.c (struct bfd): Reorganise for better packing. Delete
"ifd" field. Make "format", "direction" and "flags" bitfields.
(HAS_LOAD_PAGE): Delete, renumber following flags.
* bfd-in2.h: Regenerate.
* coff-tic4x.c: Remove HAS_LOAD_PAGE from extra flags in target vecs.
binutils/
* objdump.c (dump_bfd_header): Don't print HAS_LOAD_PAGE.
The undefined function symbols (with non-zero value) on global entry
stubs are discarded by objdump when disassembling, so give objdump
another symbol to mark the stubs.
Also fixes a couple of bugs:
- entry_section was set to .opd for ELFv2, which meant a hard error
rather than a warning when _start wasn't defined.
- global entry stubs were not built if they were the only type of
stub in an executable.
bfd/
* elf64-ppc.c (ppc_stub_type): Add ppc_stub_global_entry.
(struct ppc_link_hash_table): Increase size of stub_count array.
(build_global_entry_stubs): Emit symbol on global entry stub.
(ppc64_elf_build_stubs): NULL check htab->brlt. Add global entry
stub stats.
ld/
* emultempl/ppc64elf.em (stub_added): Delete.
(gld${EMULATION_NAME}_finish): Call ppc64_elf_build_stubs even when
none of the usual stubs have been added. Only change entry_section
for ELFv1.
Makes the ld srec tests pass. Uses a horrible scan through symbols to
find ELF fields for symbol definitions, but the generic linker doesn't
offer anything better. Might be slow. Anyway, sane people will link
to ELF output then objcopy to convert formats.
* elf64-ppc.c (abiversion, set_abiversion): Move earlier.
(ppc64_elf_branch_reloc): Adjust addend for ELFv2 local offset.
(ppc64_elf_set_toc): Set ".TOC." symbol value when using
generic linker.
(ppc64_elf_relocate_section): Disable ELFv2 function entry
optimisation when --traditional-format.
* archures.c: add avrtiny architecture for avr target.
* bfd-in2.h: Regenerate.
* cpu-avr.c (arch_info_struct): add avrtiny arch info.
* elf32-avr.c (elf_avr_howto_table): new relocation R_AVR_LDS_STS_16
added for 16 bit LDS/STS instruction of avrtiny arch.
(avr_reloc_map): reloc R_AVR_LDS_STS_16 is mapped to
BFD_RELOC_AVR_LDS_STS_16.
(bfd_elf_avr_final_write_processing): select machine number avrtiny arch.
(elf32_avr_object_p): set machine number for avrtiny arch.
* libbfd.h: Regenerate.
* reloc.c: Add documentation for BFD_RELOC_AVR_LDS_STS_16 reloc.
* config/tc-avr.c (mcu_types): Add avrtiny arch.
Add avrtiny arch devices attiny4, attiny5, attiny9, attiny10, attiny20
and attiny40.
(md_show_usage): Add avrtiny arch in usage message.
(avr_operand): validate and issue error for invalid register for avrtiny.
add new reloc exp for 16 bit lds/sts instruction.
(md_apply_fix): check 16 bit lds/sts operand for out of range and encode.
(md_assemble): check ISA for arch and issue diagnostic.
* include/elf/avr.h (E_AVR_MACH_AVRTINY): define avrtiny machine number.
(R_AVR_LDS_STS_16): define 16 bit lds/sts reloc number.
* include/opcode/avr.h (AVR_ISA_TINY): define avrtiny specific ISA.
(AVR_ISA_2xxxa): define ISA without LPM.
(AVR_ISA_AVRTINY): define avrtiny arch ISA.
Add doc for contraint used in 16 bit lds/sts.
Adjust ISA group for icall, ijmp, pop and push.
Add 16 bit lds/sts encoding and update 32 bit lds/sts constraints.
* opcodes/avr-dis.c (avr_operand): Handle constraint j for 16 bit lds/sts.
(print_insn_avr): do not select opcode if insn ISA is avrtiny and machine
is not avrtiny.
* Makefile.am (ALL_EMULATION_SOURCES): add avrtiny emulation source.
(eavrtiny.c): add rules for avrtiny emulation source.
* Makefile.in: Regenerate.
* configure.tgt: Add avrtiny to avr target emulations.
* scripttempl/avrtiny.sc: New file.
linker script template for avrtiny arch.
* emulparams/avrtiny.sh: New file.
emulation parameters for avrtiny arch.
information, specifically a DW_AT_MIPS_linkage_name attribute that has a numeric
value rather than a string value.
PR binutils/16949
* dwarf2.c (is_str_attr): New function.
(find_abstract_instance_name): Use it to determine when an
attribute has a string value.
Prior to 93d1b056 _SDA_BASE_ used to be defined in a linker script
output section. Now _SDA_BASE_ is defined in an input section that is
subject to being stripped. If the section is stripped we don't output
the symbol, which results in --emit-relocs trying to emit relocs with
dangling references to _SDA_BASE_.
* elf32-ppc.c (ppc_elf_size_dynamic_sections): Arrange to keep
.sdata/.sdata2 when _SDA_BASE_/_SDA2_BASE_ should be output
for --emit-relocs.
other architectures when we emit IE relocs in a shared library.
* elf32-arm.c (elf32_arm_check_relocs): Set DF_STATIC_TLS when
emitting initial-exec relocs when not linking an executable.
Combining TLS descriptors and GNU indirect functions in the same
object could lead to assertions or multiple dynamic relocations
for the same GOT slot. Fix the bookkeeping so this doesn't happen.
This allows building and make checking glibc with -mtls-dialect=gnu2.
bfd/ChangeLog:
2014-06-16 Will Newton <will.newton@linaro.org>
* elf32-arm.c (elf32_arm_allocate_plt_entry): Increment
htab->next_tls_desc_index in the non-IPLT case.
Calculate GOT offset correctly for the non-IPLT case.
(allocate_dynrelocs_for_symbol): Don't increment
htab->next_tls_desc_index here.
ld/testsuite/ChangeLog:
2014-06-16 Will Newton <will.newton@linaro.org>
* ld-arm/arm-elf.exp: Add ifunc-gdesc test.
* ld-arm/ifunc-gdesc.r: New file.
* ld-arm/ifunc-gdesc.s: Likewise.
* ld-arm/ifunc-gdesc.ver: Likewise.
Cures these failures with MALLOC_PERTURB_=1
FAIL: GOT test (executable)
FAIL: GOT test (shared library)
FAIL: VAX export class call relocation test
FAIL: VAX export class data relocation test
* elf32-vax.c (elf_vax_size_dynamic_sections): Clear linker
created sections.
Fixes issues with dwz multi-file (-m) and ld's -wrap option.
Symbols referenced from DWARF debug info in a separate file, eg. to
specify low and high pc, must use the real symbol. The DWARF info
is specifying attributes of the real function, not one interposed
with --wrap.
include/
* bfdlink.h (unwrap_hash_lookup): Declare.
bfd/
* linker.c (unwrap_hash_lookup): New function.
* elf-bfd (RELOC_FOR_GLOBAL_SYMBOL): Call unwrap_hash_lookup.
* elf32-i370.c (i370_elf_relocate_section): Likewise.
* elf32-m32c.c (m32c_elf_relocate_section): Likewise.
* elf32-m32r.c (m32r_elf_relocate_section): Likewise.
* elf32-score.c (s3_bfd_score_elf_relocate_section): Likewise.
* elf32-score7.c (s7_bfd_score_elf_relocate_section): Likewise.
* elf32-spu.c (spu_elf_relocate_section): Likewise.
* elf64-hppa.c (elf64_hppa_relocate_section): Likewise.
There are legitimate reasons to allow a signed value in a cmpli insn
field, for example to test for a "stw r1,lock@sdarel(r13)" instruction
in user code, a kernel might use
subis r3,r3,STW_R1_0R13@ha # subtract off high part
cmplwi r3,lock@sdarel # is low part accessing lock?
Since the lock@sdarel may take a range of -32768 to 32767,
the allowed range of cmpli immediate must be at least [-32768,65535].
bfd/
* elf32-ppc.c (ppc_elf_relocate_section): Treat field of cmpli
insn as a bitfield; Use complain_overflow_bitfield.
* elf64-ppc.c (ppc64_elf_relocate_section): Likewise.
opcodes/
* ppc-opc.c (UISIGNOPT): Define and use with cmpli.
gas/
* config/tc-ppc.c (ppc_insert_operand): Handle PPC_OPERAND_SIGNOPT
on unsigned fields. Comment on PPC_OPERAND_SIGNOPT signed fields
in 64-bit mode.
gold/
* powerpc.cc (relocate): Treat field of cmpli insn as a bitfield.
The goal of this patch is to provide an easy way to make
--disable-werror the default when building binutils, or the parts
of binutils that need to get built when building GDB. In development
mode, we want to continue making -Werror the default with GCC.
But, when making releases, I think we want to make it as easy as
possible for regular users to successfully build from sources.
GDB already has this kind of feature to turn -Werror as well as
the use of the libmcheck library. As GDB Release Manager, I take
advantage of it to turn those off after having cut the branch.
I'd like to be able to do the same for the binutils bits. And
perhaps Tristan will want to do the same for his releases too
(not sure, binutils builders might be a little savvier than GDB
builders).
This patch introduces a new file, called development.sh, which
just sets a variable called $development. In our development branches
(Eg. "master"), it's set to true. But setting it to false would allow
us to change the default behavior of various development-related
features to be turned off; in this case, it turns off the use of
-Werror by default (use --enable-werror to turn it back on).
bfd/ChangeLog:
* development.sh: New file.
* warning.m4 (AM_BINUTILS_WARNINGS): Source bfd/development.sh.
Make -Werror the default with GCC only if DEVELOPMENT is true.
* Makefile.am (CONFIG_STATUS_DEPENDENCIES): Add
$(srcdir)/development.sh.
* Makefile.in, configure: Regenerate.
binutils/ChangeLog:
* Makefile.am (CONFIG_STATUS_DEPENDENCIES): Add dependency on
bfd's development.sh.
* Makefile.in, configure: Regenerate.
gas/ChangeLog:
* Makefile.am (CONFIG_STATUS_DEPENDENCIES): Add dependency on
bfd's development.sh.
* Makefile.in, configure: Regenerate.
gold/ChangeLog:
* Makefile.am (CONFIG_STATUS_DEPENDENCIES): New.
* Makefile.in, configure: Regenerate.
gprof/ChangeLog:
* Makefile.am (CONFIG_STATUS_DEPENDENCIES): Add dependency on
bfd's development.sh.
* Makefile.in, configure: Regenerate.
ld/ChangeLog:
* Makefile.am (CONFIG_STATUS_DEPENDENCIES): Add dependency on
bfd's development.sh.
* Makefile.in, configure: Regenerate.
opcodes/ChangeLog:
* Makefile.am (CONFIG_STATUS_DEPENDENCIES): Add dependency on
bfd's development.sh.
* Makefile.in, configure: Regenerate.
gdb/ChangeLog:
* development.sh: Delete.
* Makefile.in (config.status): Adjust dependency on development.sh.
* configure.ac: Adjust development.sh source call.
* configure: Regenerate.
gdb/gdbserver/ChangeLog:
* configure.ac: Adjust development.sh source call.
* Makefile.in (config.status): Adjust dependency on development.sh.
* configure: Regenerate.
Tested on x86_64-linux by building two ways: One with DEVELOPMENT
set to true, and one with DEVELOPMENT set to false. In the first
case, I could see the use of -Werror, while it disappeared in
the second case.
Add an assert and remove an unused line of code.
bfd/ChangeLog:
2014-06-04 Will Newton <will.newton@linaro.org>
* elfnn-aarch64.c (tpoff_base): Make test of tls_sec
being non-NULL into an assert.
(elfNN_aarch64_tls_relax): Remove unused code.
out that the section is supposed to be page-aligned, but the newly merged
section was not being padded out to a page boundary. This meant that when
the executable was stripped a badly sized .rsrc section was written out.
PR ld/16807
* peXXigen.c (rsrc_process_section): Page align the new contents
befgore writing out.
Power8 fuses addis,addi and addis,ld sequences when the target of the
addis is the same as the addi/ld. Thus
addis r12,r2,xxx@ha
addi r12,r12,xxx@l / ld r12,xxx@l(r12)
is faster than
addis r11,r2,xxx@ha
addi r12,r11,xxx@l / ld r12,xxx@l(r11)
So use the form that allows fusion in plt call and branch stubs.
bfd/
* elf64-ppc.c (ADDIS_R12_R2): Define.
(build_plt_stub): Support fusion on ELFv2 stub.
(ppc_build_one_stub): Likewise for plt branch stubs.
gold/
* powerpc.cc (addis_12_2): Define.
(Stub_table::do_write): Support fusion on ELFv2 stubs.
ld/testsuite/
* ld-powerpc/elfv2exe.d: Update for changed plt call stubs.
gdb/
* ppc64-tdep.c (ppc64_standard_linkage8): New.
(ppc64_skip_trampoline_code): Recognise ELFv2 stub supporting fusion.
Alan Modra
Tristan Gingold
H.J. Lu
Jose E. Marchesi
Markus Trippelsdorf
Sterling Augustine
Matthew Fortune
Kuan-Lin Chen
Andreas Krebbel
Jan Kratochvil
Terry Guo
Chen Gang
Andrew Bennett
DJ Delorie
Jiong Wang
Nick Clifton
Kai Tietz
Maciej W. Rozycki
Roland McGrath
Will Newton
Stefan Kristiansson
H.J. Lu
Doug Evans
Kaz Kojima
Anthony Green
Joel Sherrill
Maks Naumov
Barney Stratford
Philippe De Muyter
Kyle McMartin
Omair Javaid
Joel Brobecker