bfd/
2016-09-14 Thomas Preud'homme <thomas.preudhomme@arm.com>
* elf32-arm.c (elf32_arm_gc_mark_extra_sections): Only mark section
not already marked.
ld/
2016-09-14 Thomas Preud'homme <thomas.preudhomme@arm.com>
* testsuite/ld-arm/cmse-veneers.s: Add a test for ARMv8-M Security
Extensions entry functions in absolute section.
* testsuite/ld-arm/cmse-veneers.rd: Adapt expected output accordingly.
We can resolve size relocation against symbol which needs copy relocation
when building executable.
bfd/
PR ld/20550
* elf64-x86-64.c (elf_x86_64_relocate_section): Resolve size
relocation with copy relocation when building executable.
ld/
PR ld/20550
* testsuite/ld-x86-64/pr20550a.s: New file.
* testsuite/ld-x86-64/pr20550b.s: Likewise.
* testsuite/ld-x86-64/x86-64.exp (x86_64tests): Add tests for
PR ld/20550.
Prior to the patch, addends for relocs were being adjusted even if
they went beyond an alignment boundary. This is wrong - to
preserve alignment constraints, the relaxation logic adds as many padding
bytes at the alignment boundary as was deleted, so addends beyond the
boundary should not be adjusted. avr-prop-7.s reproduces this
scenario.
Also, prior to this patch, the relaxation logic assumed that the addr
parameter pointed to the middle of the instruction to be deleted, and
that addr - count would therefore be the shrinked instruction's
address. This is true when actually shrinking instructions.
The alignment constraints handling logic also invokes the same logic
though, with addr as the starting offset of padding bytes and
with count as the number of bytes to be deleted. Calculating the
shrinked insn's address as addr - count is obviously wrong in this
case - that offset would point to count bytes before the last
non-padded byte. avr-prop-8.s reproduces this scenario.
To fix scenario 1, the patch adds an additional check to ensure reloc addends
aren't adjusted if they cross a shrink boundary. The shrink boundary
is either the section size or an alignment boundary. Addends pointing
at an alignment boundary don't need to be adjusted, as padding would
occur and keep the boundary the same. Addends pointing at section size
need to be adjusted though, as no padding occurs and the section size
itself would get decremented. The patch records whether padding
occured (did_pad) and uses that to detect and handle this condition.
To fix scenario 2, the patch adds an additional parameter
(delete_shrinks_insn) to elf32_avr_relax_delete_bytes to distinguish
instruction bytes deletion from padding bytes deletion. It then uses that to
correctly set shrinked_insn_address.
bfd/ChangeLog:
2016-09-02 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com>
PR ld/20545
* elf32-avr.c (elf32_avr_relax_delete_bytes): Add parameter
delete_shrinks_insn. Modify computation of shrinked_insn_address.
Compute shrink_boundary and adjust addend only if
addend_within_shrink_boundary.
(elf32_avr_relax_section): Modify calls to
elf32_avr_relax_delete_bytes to pass extra parameter.
ld/ChangeLog:
2016-09-02 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com>
PR ld/20545
* testsuite/ld-avr/avr-prop-7.d: New test.
* testsuite/ld-avr/avr-prop-7.s: New test.
* testsuite/ld-avr/avr-prop-8.d: New test.
* testsuite/ld-avr/avr-prop-8.s: New test.
bfd/
* elf32-arm.c (cmse_entry_fct_p): Store instruction encoding in an
array of bytes and use bfd_get_16 to interpret its encoding according
to endianness of target.
Fixes a gdb segfault if a section named .opd is found in ELFv2 binaries.
* elf64-ppc.c (synthetic_opd): New static var.
(compare_symbols): Don't treat symbols in .opd specially for ELFv2.
(ppc64_elf_get_synthetic_symtab): Likewise. Comment.
Like 57f6d32d, this patch ensures that sections containing external
conditional branches limit the group size.
* elf64-ppc.c (group_sections): Delete stub14_group_size. Instead,
track max group size with a new "group_size" var that is reduced
by a factor of 1024 from the 24-bit branch size whenever a 14-bit
branch is seen.
ELF section sh_flags SHF_PPC_VLE was being set based on arch/mach,
which meant all code sections in an object file has the flag or all
lacked it. We can do better than that. Only those code sections
where VLE is enabled ought to have the flag, allowing an object file
to contain both VLE and non-VLE code.
Also, ELF header p_flags PF_PPC_VLE wasn't being set, and segments
were being split unnecessarily.
bfd/
* elf32-ppc.c (ppc_elf_section_processing): Delete.
(elf_backend_section_processing): Don't define.
(ppc_elf_modify_segment_map): Set p_flags and mark valid. Don't
split on non-exec sections differing in SHF_PPC_VLE. When
splitting segments, mark size invalid.
gas/
* config/tc-ppc.c (md_assemble): Set sh_flags for VLE. Test
ppc_cpu rather than calling ppc_mach to determine VLE mode.
(ppc_frag_check, ppc_handle_align): Likewise use ppc_cpu.
On i386, IFUNC function must be called via PLT. Since PLT in PIC
object uses EBX register, R_386_PLT32 relocation must be used to
call IFUNC function even when IFUNC function is defined locally.
Linker should issue an error when R_386_PC32 relocation is used
to call IFUNC function.
Since PR ld/19784 tests doesn't use PLT relocation to local IFUNC
function, they are moved to the x86-64 test directory.
bfd/
PR ld/14961
PR ld/20515
* elf32-i386.c (elf_i386_check_relocs): Issue an error when
R_386_PC32 relocation is used to call IFUNC function in PIC
object.
ld/
PR ld/14961
PR ld/20515
* testsuite/ld-i386/i386.exp: Run pr20515.
* testsuite/ld-i386/pr20515.d: New file.
* testsuite/ld-i386/pr20515.s: Likewise.
* testsuite/ld-ifunc/ifunc-14a.s: Use R_386_PLT32 to call IFUNC
function.
* testsuite/ld-ifunc/ifunc-14c.s: Likewise.
* testsuite/ld-ifunc/ifunc-2-i386.s: Likewise.
* testsuite/ld-ifunc/ifunc-2-local-i386.s: Likewise.
* testsuite/ld-ifunc/ifunc.exp: Move PR ld/19784 tests to ...
* testsuite/ld-x86-64/x86-64.exp: Here.
* testsuite/ld-ifunc/pr19784a.c: Moved to ...
* testsuite/ld-x86-64/pr19784a.c: Here.
* testsuite/ld-ifunc/pr19784b.c: Moved to ...
* testsuite/ld-x86-64/pr19784b.c: Here.
* testsuite/ld-ifunc/pr19784c.c: Moved to ...
* testsuite/ld-x86-64/pr19784c.c: Here.
Commit 980aa3e6 was supposed to cure dyn_reloc counting problems, but
did the opposite. For PIC we count two types of dyn_reloc, those on
pc-relative relocs, and the total. If a sym needs pc-relative dyn
relocs then all the relocs are dynamic. If not, then only those that
are must_be_dyn_reloc are dynamic.
PR 20519
* elf64-ppc.c (pc_dynrelocs): New function.
(ppc64_elf_relocate_section): Use it and must_be_dyn_reloc to
handle pic dynamic relocs.
2016-08-26 Thomas Preud'homme <thomas.preudhomme@arm.com>
bfd/
* bfd-in.h (struct elf32_arm_params): Define.
(bfd_elf32_arm_set_target_relocs): Rename into ...
(bfd_elf32_arm_set_target_params): This. Use a struct
elf32_arm_params to pass all parameters but the bfd and bfd_link_info.
* bfd-in2.h: Regenerate.
* elf32-arm.c (bfd_elf32_arm_set_target_relocs): Rename into ...
(bfd_elf32_arm_set_target_params): This. Pass all values via a struct
elf32_arm_params rather than as individual parameters.
ld/
* emultempl/armelf.em (params): New static variable.
(thumb_entry_symbol, byteswap_code, target1_is_rel, target2_type,
fix_v4bx, use_blx, vfp11_denorm_fix, stm32l4xx_fix, fix_cortex_a8,
no_enum_size_warning, no_wchar_size_warning, pic_veneer,
merge_exidx_entries, fix_arm1176, cmse_implib): move as part of the
above new structure.
(arm_elf_before_allocation): Access static variable from the params
structure.
(gld${EMULATION_NAME}_finish): Likewise.
(arm_elf_create_output_section_statements): Likewise and pass the
address of that structure to bfd_elf32_arm_set_target_relocs instead
of the static variables.
(PARSE_AND_LIST_ARGS_CASES): Access static variable from the params
structure.
bfd/
* elf32-arm.c (elf32_arm_get_stub_entry): Assert that we don't access
passed the end of htab->stub_group array.
(elf32_arm_create_or_find_stub_sec): Likewise.
(elf32_arm_create_stub): Likewise.
Forgot to set should_relocate to TRUE in case of GOT and TLS relocations of
undefined symbols for shared libraries.
In dynamic libraries if symbol is not known the instruction relocation would
not be resolved to point to the respective .got entry.
A test was created to detect similar future mistakes.
bfd/ChangeLog:
Cupertino Miranda <cmiranda@synopsys.com>
* elf32-arc.c (elf_arc_relocate_section): Changed. Set should_relocate
to TRUE for GOT and TLS relocs.
ld/ChangeLog:
Cupertino Miranda <cmiranda@synopsys.com>
* ld/testsuite/ld-arc/tls_gd-01.s: Added a testcase for this patch.
* ld/testsuite/ld-arc/tls_gd-01.d: Likewise.
ARC was overloading this options by forcing DT_INIT AND DT_FINI
to always point to _init and _fini, respectively.
bfd/ChangeLog:
Cupertino Miranda <cmiranda@synospsys.com>
* elf32-arc.c (elf_arc_finish_dynamic_sections): Changed.
Fixed conditions related to dynamic relocs relative offset patching.
Added arc_link_hash_table to be able to always generate and track
.rela.bss section.
bfd/ChangeLog:
Cupertino Miranda <cmiranda@synopsys.com>
* elf-bfd.h: Added ARC_ELF_DATA to enum elf_target_id.
* elf32-arc.c (struct elf_arc_link_hash_entry): Added.
(struct elf_arc_link_hash_table): Likewise.
(elf_arc_link_hash_newfunc): Likewise.
(elf_arc_link_hash_table_free): Likewise.
(arc_elf_link_hash_table_create): Likewise.
(elf_arc_relocate_section): Fixed conditions related to dynamic
(elf_arc_check_relocs): Likewise.
(arc_elf_create_dynamic_sections): Added
(elf_arc_adjust_dynamic_symbol): Changed access to .rela.bss to be done
through the hash table.
When no dynamic relocation was generated the .got content would not be
updated for the TLS_IE_GOT relocation addresses.
bfd/ChangeLog:
Cupertino Miranda <cmiranda@synopsys.com>
* arc-got.h (relocate_fix_got_relocs_for_got_info): Fixed addresses in
debug comments. Fixed address in .got related to TLS_IE_GOT dynamic
relocation.
ld/ChangeLog:
Cupertino Miranda <cmiranda@synopsys.com>
* testsuite/ld-arc/tls_ie-01.s: Added to verify associated fix.
* testsuite/ld-arc/tls_ie-01.d: Likewise
Added support for ARC_SDA_12 reloc.
Fixed ARC_N32_ME.
Added ME (middle-endian) to ARC_SDA_12 reloc.
bfd/ChangeLog:
Cupertino Miranda <cmiranda@synopsys.com>
* reloc.c: Fixed type in ARC_SECTOFF relocations. Added ARC_SDA_12
relocation.
* bfd-in2.h: Regenerated from the previous changes.
* libbfd.h: Regenerated from the previous changes.
include/ChangeLog:
Cupertino Miranda <cmiranda@synopsys.com>
* elf/arc-reloc.def: Fixed relocation formula for N*, SDA, SDA_12,
SDA_16_LD*, S13_PCREL, N32_ME, SECTOFF_* relocations.
* opcode/arc-func.h (replace_disp12s): Added. Used for SDA_12 relocation.
2016-08-26 Thomas Preud'homme <thomas.preudhomme@arm.com>
bfd/
* bfd-in.h (bfd_elf32_arm_set_target_relocs): Add a new parameter for
the input import library bfd.
* bfd-in2.h: Regenerate.
* elf32-arm.c (struct elf32_arm_link_hash_table): New in_implib_bfd
and new_cmse_stub_offset fields.
(stub_hash_newfunc): Initialize stub_offset and stub_template_size to
-1.
(elf32_arm_add_stub): Likewise for stub_offset.
(arm_new_stubs_start_offset_ptr): New function.
(arm_build_one_stub): Only allocate a stub_offset if it is -1. Allow
empty SG veneers to have zero relocations.
(arm_size_one_stub): Only initialize stub size and template
information for non empty veneers. Do not update veneer section size
if veneer already has an offset.
(elf32_arm_create_stub): Return the stub entry pointer or NULL instead
of a boolean indicating success or failure.
(cmse_scan): Change stub_changed parameter into an integer pointer
parameter cmse_stub_created to count the number of stub created and
adapt to change of return value in elf32_arm_create_stub.
(cmse_entry_fct_p): New function.
(arm_list_new_cmse_stub): Likewise.
(set_cmse_veneer_addr_from_implib): Likewise.
(elf32_arm_size_stubs): Define cmse_stub_created, pass its address to
cmse_scan instead of that of cmse_stub_changed to compute the number
of stub created and use it to initialize stub_changed. Call
set_cmse_veneer_addr_from_implib after all cmse_scan. Adapt to change
of return value in elf32_arm_create_stub. Use
arm_stub_section_start_offset () if not NULL to initialize size of
secure gateway veneers section. Initialize stub_offset of Cortex-A8
erratum fix to -1. Use ret to hold return value.
(elf32_arm_build_stubs): Use arm_stub_section_start_offset () if not
NULL to initialize size of secure gateway veneers section. Adapt
comment to stress the importance of zeroing veneer section content.
(bfd_elf32_arm_set_target_relocs): Add new in_implib_bfd parameter to
initialize eponymous field in struct elf32_arm_link_hash_table.
ld/
* emultempl/armelf.em (in_implib_filename): Declare and initialize new
variable.
(arm_elf_create_output_section_statements): Open import input library
file for writing and pass resulting in_implib_bfd to
bfd_elf32_arm_set_target_relocs.
(PARSE_AND_LIST_PROLOGUE): Define OPTION_IN_IMPLIB option.
(PARSE_AND_LIST_LONGOPTS): Define --in-implib option.
(PARSE_AND_LIST_OPTIONS): Add help message for --in-implib option.
(PARSE_AND_LIST_ARGS_CASES): Handle new OPTION_IN_IMPLIB case.
* ld.texinfo (--cmse-implib): Update to mention --in-implib.
(--in-implib): Document new option.
* NEWS: Likewise.
* testsuite/ld-arm/arm-elf.exp
(Secure gateway import library generation): add --defsym VER=1 to gas
CLI.
(Secure gateway import library generation: errors): Likewise.
(Input secure gateway import library): New test.
(Input secure gateway import library: no output import library):
Likewise.
(Input secure gateway import library: not an SG input import library):
Likewise.
(Input secure gateway import library: earlier stub section base):
Likewise.
(Input secure gateway import library: later stub section base):
Likewise.
(Input secure gateway import library: veneer comeback): Likewise.
(Input secure gateway import library: entry function change):
Likewise.
* testsuite/ld-arm/cmse-implib.s: Add input import library testing.
* testsuite/ld-arm/cmse-implib.rd: Update accordingly.
* testsuite/ld-arm/cmse-new-implib.out: New file.
* testsuite/ld-arm/cmse-new-implib.rd: Likewise.
* testsuite/ld-arm/cmse-new-implib-no-output.out: Likewise.
* testsuite/ld-arm/cmse-new-implib-not-sg-in-implib.out: Likewise.
* testsuite/ld-arm/cmse-new-earlier-later-implib.out: Likewise.
* testsuite/ld-arm/cmse-new-comeback-implib.rd: Likewise.
* testsuite/ld-arm/cmse-new-wrong-implib.out: Likewise.
This enhances the 32-bit and 64-bit s390 ELF backends with support for
reading and writing the core dump note sections NT_PRSTATUS and
NT_PRPSINFO. Byte swapping is done as appropriate, such that core files
can now be processed correctly on non-s390 platforms.
bfd/ChangeLog:
* elf32-s390.c (stdarg.h): New include.
(elf_s390_grok_psinfo): New function.
(elf_s390_write_core_note): New function.
(elf_backend_grok_psinfo): Declare backend hook.
(elf_backend_write_core_note): Likewise.
* elf64-s390.c (stdarg.h): New include.
(elf_s390_grok_prstatus): New function.
(elf_s390_grok_psinfo): New function.
(elf_s390_write_core_note): New function.
(elf_backend_grok_prstatus): Declare backend hook.
(elf_backend_grok_psinfo): Likewise.
(elf_backend_write_core_note): Likewise.
This patch adds function elf32_arc_grok_parse to parse NOTE section of core
dump files. GDB requires this to work properly with core dumps.
bfd/
2016-08-24 Anton Kolesov <Anton.Kolesov@synopsys.com>
* elf32-arc.c (elf32_arc_grok_prstatus): New function.
Signed-off-by: Claudiu Zissulescu <claziss@synopsys.com>
GDB Administrator