Commit Graph

1852 Commits

Author SHA1 Message Date
James Bowman f46e4eb78b sim: ft32: new port
FT32 is a new high performance 32-bit RISC core developed by FTDI for
embedded applications.
2015-03-28 02:12:33 -04:00
H.J. Lu 332f5759ac Add ELFOSABI_CLOUDABI and SHF_COMPRESSED
Update from gABI DRAFT - 10 June 2013.

	* common.h (ELFOSABI_CLOUDABI): New.
	(SHF_COMPRESSED): Likewise.
	(ELFCOMPRESS_ZLIB): Likewise.
	(ELFCOMPRESS_LOOS): Likewise.
	(ELFCOMPRESS_HIOS): Likewise.
	(ELFCOMPRESS_LOPROC): Likewise.
	(ELFCOMPRESS_HIPROC): Likewise.
2015-03-26 08:42:58 -07:00
Terry Guo 823d25713d Extend arm_feature_set struct to provide more bits
gas/ChangeLog:
2015-03-24  Terry Guo  <terry.guo@arm.com>

	* config/tc-arm.c (no_cpu_selected): Use new macro to compare
	features.
	(parse_psr): Likewise.
	(do_t_mrs): Likewise.
	(do_t_msr): Likewise.
	(static const arm_feature_set arm_ext_*): Defined with new
	macros.
	(static const arm_feature_set arm_cext_*): Likewise.
	(static const arm_feature_set fpu_fpa_ext_*): Likewise.
	(static const arm_feature_set fpu_vfp_ext_*): Likewise.
	(deprecated_coproc_regs): Likewise.
	(UL_BARRIER): Likewise.
	(barrier_opt_names): Likewise.
	(arm_cpus): Likewise.
	(arm_extensions): Likewise.

include/opcode/ChangeLog:
2015-03-24  Terry Guo  <terry.guo@arm.com>

	* arm.h (arm_feature_set): Extended to provide more available
	* bits.
	(ARM_ANY): Updated to follow above new definition.
	(ARM_CPU_HAS_FEATURE): Likewise.
	(ARM_CPU_IS_ANY): Likewise.
	(ARM_MERGE_FEATURE_SETS): Likewise.
	(ARM_CLEAR_FEATURE): Likewise.
	(ARM_FEATURE): Likewise.
	(ARM_FEATURE_COPY): New macro.
	(ARM_FEATURE_EQUAL): Likewise.
	(ARM_FEATURE_ZERO): Likewise.
	(ARM_FEATURE_CORE_EQUAL): Likewise.
	(ARM_FEATURE_LOW): Likewise.
	(ARM_FEATURE_CORE_LOW): Likewise.
	(ARM_FEATURE_CORE_COPROC): Likewise.

opcodes/ChangeLog:
2015-03-24  Terry Guo  <terry.guo@arm.com>

	* arm-dis.c (opcode32): Updated to use new arm feature struct.
	(opcode16): Likewise.
	(coprocessor_opcodes): Replace bit with feature struct.
	(neon_opcodes): Likewise.
	(arm_opcodes): Likewise.
	(thumb_opcodes): Likewise.
	(thumb32_opcodes): Likewise.
	(print_insn_coprocessor): Likewise.
	(print_insn_arm): Likewise.
	(select_arm_features): Follow new feature struct.
2015-03-24 14:08:08 +08:00
Nick Clifton 1740ba0cec Add support for G13 and G14 flag bits in RL78 ELF binaries.
inc	* rl78.h (E_FLAG_RL78_G10): Redefine.
	(E_FLAG_RL78_CPU_MASK, E_FLAG_RL78_ANY_CPU, E_FLAG_RL78_G13
	E_FLAG_RL78_G14): New flags.

bin	* readelf.c (get_machine_flags): Decode RL78's G13 and G14 flags.

gas	* config/tc-rl78.c (enum options): Add G13 and G14.
	(md_longopts): Add -mg13 and -mg14.
	(md_parse_option): Handle -mg13 and -mg14.
	(md_show_usage): List -mg13 and -mg14.
	* doc/c-rl78.texi: Add description of -mg13 and -mg14 options.

bfd	* elf32-rl78.c (rl78_cpu_name): New function.  Prints the name of
	the RL78 core based upon the flags.
	(rl78_elf_merge_private_bfd_data): Handle merging of G13 and G14
	flags.
	(rl78_elf_print_private_bfd_data): Use rl78_cpu_name.
	(elf32_rl78_machine): Always return bfd_mach_rl78.
2015-03-19 15:37:43 +00:00
Mike Frysinger 8406bb5944 sim: dv-sockser: push module init prototype down
Pull out the duplicated dv_sockser_install prototype from the tconfig.in
files and put it in the one place it gets used -- sim-module.c.  This is
still arguably incorrect, but it's better than the status quo where the
tconfig.in has to include header files and duplicate the dv-sockser func.
The tconfig header is meant to be simple and contain a target defines.
2015-03-15 03:05:05 -04:00
Jiong Wang a5721eddd1 [ARM] PR ld/16572: Remove EF_ARM_HASENTRY flag
bfd/
2015-03-10  Yuri Gribov  <y.gribov@samsung.arm>

	PR ld/16572
	* elf32-arm.c (elf32_arm_final_link_relocate): Remove
	support for ELF_ARM_HASENTRY.
	(elf32_arm_print_private_bfd_data): Likewise.

binutils/
2015-03-10  Yuri Gribov  <y.gribov@samsung.arm>

	PR ld/16572
	* readelf.c: Remove support for ELF_ARM_HASENTRY.

include/
2015-03-10  Matthew Wahab  <matthew.wahab@arm.com>

	PR ld/16572
	* elf/arm.h (EF_ARM_HASENTRY): Remove.
2015-03-10 11:15:13 +00:00
Marcus Shawcroft 3c12b05436 Add ADR :tlsgd: directive and TLSGD_ADR_PREL21 support. 2015-02-26 22:23:09 +00:00
Nick Clifton 685080f210 Adds support for generating notes in V850 binaries.
bfd	* elf32-v850.c (v850_set_note): New function.  Creates a Renesas
	style note entry.
	(v850_elf_make_note_section): New function.  Creates a note
	section.
	(v850_elf_create_sections): New function.  Create a note section
	if one is not already present.
	(v850_elf_set_note): New function.  Adds a note to a bfd.
	(v850_elf_copy_private_bfd_data): New function.  Copies V850
	notes.
	(v850_elf_merge_notes): New function.  Merges V850 notes.
	(print_v850_note): New function.  Displays a V850 note.
	(v850_elf_print_notes): New function. Displays all notes attached
	to a bfd.
	(v850_elf_merge_private_bfd_data): Call v850_elf_merge_notes.
	(v850_elf_print_private_bfd_data): Call v850_elf_print_notes.
	(v850_elf_fake_sections): Set the type of the V850 note section.
	* bfd-in.h (v850_elf_create_sections): Add prototype.
	(v850_elf_set_note): Add prototype.
	* bfd-in2.h: Regenerate.

binutils* readelf.c (get_machine_flags): Remove deprecated V850 machine
	flags.
	(get_v850_section_type_name): New function.  Handles V850 special
	sections.
	(get_section_type_name): Add support for V850.
	(get_v850_elf_note_type): New function.  Returns the name of a
	V850 note.
	(print_v850_note): New function.  Prints a V850 note.
	(process_v850_notes): New function.  Prints V850 notes.
	(process_note_sections): Add support for V850.

binutils/testsute
	* binutils-all/objcopy.exp: Skip the strip-10 test for the V850.

gas	* config/tc-v850.c (soft_float): New variable.
	(v850_data_8): New variable.
	(md_show_usage): Add -msoft-float/-mhard-float.
	(md_parse_option): Likewise.
	(md_begin): Set the default value of soft_float.
	(v850_md_end): New function.  Creates a note section.
	* config/tc-v850.h (md_end): Define.
	* doc/c-v850.texi: Document -msoft-float/-mhard-float.

gas/testsuite
	* gas/elf/elf.exp: Add special version of the section2 test for
	the V850.
	* gas/elf/section2.e-v850: New file.

include/elf
	* v850.h (EF_RH850_SIMD): Delete deprecated flag.
	(EF_RH850_CACHE): Likewise.
	(EF_RH850_MMU): Likewise.
	(EF_RH850_DATA_ALIGN8): Likewise.
	(SHT_RENESAS_IOP): Fix typo in name.
	(SHT_RENESAS_INFO): Define.
	(V850_NOTE_SECNAME): Define.
	(SIZEOF_V850_NOTE): Define.
	(V850_NOTE_NAME): Define.
	(enum v850_notes): New enum.
	(NUM_V850_NOTES): Define.

ld/ChangeLog
2015-02-24  Nick Clifton  <nickc@redhat.com>

	* Makefile.am (ev850.c): Add dependency upon
	$(srcdir)/emultempl/v850elf.em.
	(ev850_rh850.c): Likewise.
	* Makefile.in: Regenerate.
	* emultempl/v850elf.em: New file.
	* emulparams/v850.sh (EXTRA_EM_FILE): Define.
	* emulparams/v850_rh850.sh (EXTRA_EM_FILE): Define.
	* scripttempl/v850.sc: Add .note.renesas section.
	* scripttempl/v850_rh850.sc: Likewise.

ld/testsuite
	* ld-elf/extract-symbol-1sec.d: Expect to fail on the V850.
2015-02-24 17:54:09 +00:00
Nick Clifton 8f3102ea1a Fixes a typo in the license notice in include/elf/score.h
PR 17915
	* score.h: Fix typo in license header.
2015-02-23 14:52:12 +00:00
Andreas Arnez 4ef9f41a95 S390: Support new vector register sections
The IBM z13 has new 128-bit wide vector registers v0-v31, where v0-v15
include the existing 64-bit wide floating point registers.  The Linux
kernel presents the vector registers as two additional register sets,
one for the right halves of v0-v15 and another one for the full
registers v16-v31.  Thus a new core file may contain two new register
note sections, and this patch adds support to binutils for them.

bfd/
	* elf-bfd.h (elfcore_write_s390_vxrs_low): Add prototype.
	(elfcore_write_s390_vxrs_high): Likewise.
	* elf.c (elfcore_grok_s390_vxrs_low): New function.
	(elfcore_grok_s390_vxrs_high): New function.
	(elfcore_grok_note): Call them.
	(elfcore_write_s390_vxrs_low): New function.
	(elfcore_write_s390_vxrs_high): New function.
	(elfcore_write_register_note): Call them.

binutils/
	* readelf.c (get_note_type): Add NT_S390_VXRS_LOW and
	NT_S390_VXRS_HIGH.

include/elf/
	* common.h (NT_S390_VXRS_LOW): New macro.
	(NT_S390_VXRS_HIGH): Likewise.
2015-02-20 10:39:53 +01:00
Pedro Alves f63c17760f Wrap a few opcodes headers in extern "C" for C++
These are sufficient to link an --enable-targets=all GDB build in C++
mode, on x86_64 Fedora 20.

include/opcode/
2015-02-19  Pedro Alves  <palves@redhat.com>

	* cgen.h [__cplusplus]: Wrap in extern "C".
	* msp430-decode.h [__cplusplus]: Likewise.
	* nios2.h [__cplusplus]: Likewise.
	* rl78.h [__cplusplus]: Likewise.
	* rx.h [__cplusplus]: Likewise.
	* tilegx.h [__cplusplus]: Likewise.

opcodes/
2015-02-19  Pedro Alves  <palves@redhat.com>

	* microblaze-dis.h [__cplusplus]: Wrap in extern "C".
2015-02-19 22:45:47 +00:00
Pedro Alves 07df97c857 floatformat.h: Wrap in extern "C"
Just like libiberty.h.  So that C++ programs, such as GDB when built
as a C++ program, can use it.

include/ChangeLog:
2015-02-19  Pedro Alves  <palves@redhat.com>

	* floatformat.h [__cplusplus]: Wrap in extern "C".
2015-02-19 22:44:44 +00:00
Alan Modra ce875075f9 PR ld/17973 LTO file syms
LTO output objects have an STT_FILE symbol using the name of the file,
a temporary file.  This results in executables that can't be exactly
reproduced, so the file name needs to be dropped.  We don't want to
lose all file symbols when linking a mix of lto and non-lto objects as
a file symbol can be used to figure which source file generated a
given local symbol.  So lto output objects need to be marked.

I chose to mark lto output objects with a new bfd flag.  This flag is
also used to fix a bug in the link-once handling;  An object being
loaded after "loading_lto_outputs" is set might be one extracted from
an archive to satisfy new references from lto objects, not an lto
object itself.

The new flag is copied from archive to elements, and the same done
for no_export.  This fixes a bug in that --exclude-libs doesn't work
with thin archives.  I'm not completely happy with this part of the
patch and may revist this to avoid the hack in
_bfd_look_for_bfd_in_cache.

	PR ld/17973
include/
	* bfdlink.h (struct bfd_link_info): Delete loading_lto_outputs.
bfd/
	* bfd.c (struct bfd): Add lto_output.
	* linker.c (_bfd_handle_already_linked): Explicitly test for
	objects added by the lto plugin.
	* opncls.c (_bfd_new_bfd_contained_in): Copy lto_output and
	no_export flags from archive.
	* archive.c (open_nested_file): New function, setting lto_output
	and no_export, extracted from..
	(find_nested_archive): ..here.  Flip params.  Rename from
	_bfd_find_nested_archive.
	(_bfd_get_elt_at_filepos): Correct var typo.  Use open_nested_file.
	(_bfd_look_for_bfd_in_cache): Copy no_export.
	* elflink.c (elf_link_add_object_symbols): Remove now unnecessary
	my_archive->no_export test.
	(elf_link_input_bfd): Drop existing lto_output STT_FILE syms.
	Don't use the file name when adding lto_output STT_FILE sym.
	* bfd-in2.h: Regenerate.
ld/
	* ldlang.h (struct lang_input_statement_flags): Add lto_output.
	* ldlang.c (lang_process): Don't set loading_lto_outputs.
	* ldfile.c (ldfile_try_open_bfd): Transfer entry flags.lto_output
	to bfd.
	* plugin.c (add_input_file, add_input_library): Set flags.lto_output.
2015-02-14 23:41:54 +10:30
Mark Wielaard 5a19504458 Recognize new DWARF5/GCC5 DW_LANG constants for Fortran 03 and Fortran 08.
DWARFv5 defines and GCC5 may output two new DW_LANG constants for the
Fortran 2003 and Fortran 2008 standards. Handle and display both in
binutils.

binutils/ChangeLog:

	* dwarf.c (read_and_display_attr_value): Handle DW_LANG_Fortran03
	and DW_LANG_Fortran08.

include/ChangeLog:

	* dwarf2.h: Add DW_LANG_Fortran03 and DW_LANG_Fortran08.

http://dwarfstd.org/ShowIssue.php?issue=141121.1
2015-02-10 09:07:25 +01:00
Mark Wielaard a2c2acaf15 GCC5/DWARFv5 Handle DW_TAG_atomic_type for C11 _Atomic type qualifier.
gdb/ChangeLog

	* c-typeprint.c (cp_type_print_method_args): Handle '_Atomic'.
	(c_type_print_modifier): Likewise.
	* dwarf2read.c (read_tag_atomic_type): New function.
	(read_type_die_1): Handle DW_TAG_atomic_type.
	* gdbtypes.c (make_atomic_type): New function.
	(recursive_dump_type): Handle TYPE_ATOMIC.
	* gdbtypes.h (enum type_flag_values): Renumber.
	(enum type_instance_flag_value): Add TYPE_INSTANCE_FLAG_ATOMIC.
	(TYPE_ATOMIC): New macro.
	(make_atomic_type): Declare.

gdb/testsuite/ChangeLog

	* gdb.dwarf2/atomic.c: New file.
	* gdb.dwarf2/atomic-type.exp: Likewise.

include/ChangeLog

	* dwarf2.def: Add DW_TAG_atomic_type.
2015-02-09 15:09:22 +01:00
Doug Evans 9f0500621b Add support for inlining scripts into .debug_gdb_scripts.
include/gdb/ChangeLog:

	* section-scripts.h: Remove "future extension" comment.
	(SECTION_SCRIPT_ID_PYTHON_TEXT): New macro.
	(SECTION_SCRIPT_ID_SCHEME_TEXT): New macro.

gdb/ChangeLog:

	* NEWS: Mention inlined scripts in .debug_gdb_scripts section.
	* auto-load.c: #include ctype.h.
	(struct auto_load_pspace_info): Replace member loaded_scripts with
	new members loaded_script_files, loaded_script_texts.
	(auto_load_pspace_data_cleanup): Update.
	(init_loaded_scripts_info): Update.
	(get_auto_load_pspace_data_for_loading): Update.
	(maybe_add_script_file): Renamed from maybe_add_script.  All callers
	updated.
	(maybe_add_script_text): New function.
	(clear_section_scripts): Update.
	(source_script_file, execute_script_contents): New functions.
	(source_section_scripts): Add support for
	SECTION_SCRIPT_ID_PYTHON_TEXT, SECTION_SCRIPT_ID_GUILE_TEXT.
	(print_scripts): New function.
	(auto_load_info_scripts): Also print inlined scripts.
	(maybe_print_unsupported_script_warning): Renamed from
	unsupported_script_warning_print.  All callers updated.
	(maybe_print_script_not_found_warning): Renamed from
	script_not_found_warning_print.  All callers updated.
	* extension-priv.h (struct extension_language_script_ops): New member
	objfile_script_executor.
	* extension.c (ext_lang_objfile_script_executor): New function.
	* extension.h (objfile_script_executor_func): New typedef.
	(ext_lang_objfile_script_executor): Declare.
	* guile/guile-internal.h (gdbscm_execute_objfile_script): Declare.
	* guile/guile.c (guile_extension_script_ops): Update.
	* guile/scm-objfile.c (gdbscm_execute_objfile_script): New function.
	* python/python.c (python_extension_script_ops): Update.
	(gdbpy_execute_objfile_script): New function.

gdb/doc/ChangeLog:

	* gdb.texinfo (dotdebug_gdb_scripts section): Update docs to
	distinguish script files vs inlined scripts.
	* python.texi (Python Auto-loading): Ditto.

gdb/testsuite/ChangeLog:

	* gdb.guile/scm-section-script.c: Add duplicate inlined section script
	entries.  Duplicate file section script entries.
	* gdb.guile/scm-section-script.exp: Add tests for duplicate entries,
	inlined entries.  Add test for safe-path rejection.
	* gdb.python/py-section-script.c: Add duplicate inlined section script
	entries.  Duplicate file section script entries.
	* gdb.python/py-section-script.exp: Add tests for duplicate entries,
	inlined entries.  Add test for safe-path rejection.
2015-01-31 12:01:13 -08:00
Alan Modra 3f8107ab38 FT32 initial support
FT32 is a new 32-bit RISC core developed by FTDI for embedded applications.

	* configure.ac: Add FT32 support.
	* configure: Regenerate.
bfd/
	* Makefile.am: Add FT32 files.
	* archures.c (enum bfd_architecture): Add bfd_arch_ft32.
	(bfd_mach_ft32): Define.
	(bfd_ft32_arch): Declare.
	(bfd_archures_list): Add bfd_ft32_arch.
	* config.bfd: Handle FT32.
	* configure.ac: Likewise.
	* cpu-ft32.c: New file.
	* elf32-ft32.c: New file.
	* reloc.c (BFD_RELOC_FT32_10, BFD_RELOC_FT32_20, BFD_RELOC_FT32_17,
	BFD_RELOC_FT32_18): Define.
	* targets.c (_bfd_target_vector): Add ft32_elf32_vec.
	* bfd-in2.h: Regenerate.
	* libbfd.h: Regenerate.
	* Makefile.in: Regenerate.
	* configure: Regenerate.
	* po/SRC-POTFILES.in: Regenerate.
binutils/
	* readelf.c: Add FT32 support.
gas/
	* Makefile.am: Add FT32 files.
	* config/tc-ft32.c: New file.
	* config/tc-ft32.h: New file.
	* configure.tgt: Add FT32 support.
	* Makefile.in: Regenerate.
	* po/POTFILES.in: Regenerate.
gas/testsuite/
	* gas/ft32/ft32.exp: New file.
	* gas/ft32/insn.d: New file.
	* gas/ft32/insn.s: New file.
include/
	* dis-asm.h (print_insn_ft32): Declare.
include/elf/
	* common.h (EM_FT32): Define.
	* ft32.h: New file.
include/opcode/
	* ft32.h: New file.
ld/
	* Makefile.am: Add FT32 files.
	* configure.tgt: Handle FT32 target.
	* emulparams/elf32ft32.sh: New file.
	* scripttempl/ft32.sc: New file.
	* Makefile.in: Regenerate.
opcodes/
	* Makefile.am: Add FT32 files.
	* configure.ac: Handle FT32.
	* disassemble.c (disassembler): Call print_insn_ft32.
	* ft32-dis.c: New file.
	* ft32-opc.c: New file.
	* Makefile.in: Regenerate.
	* configure: Regenerate.
	* po/POTFILES.in: Regenerate.
2015-01-28 16:25:18 +10:30
Mark Wielaard 743649fd80 Use GCC5/DWARF5 DW_AT_noreturn to mark functions that don't return normally.
Add a flag field is_noreturn to struct func_type. Make calling_convention
a small bit field to not increase the size of the struct. Set is_noreturn
if the new GCC5/DWARF5 DW_AT_noreturn is set on a DW_TAG_subprogram.
Use this information to warn the user before doing a finish or return from
a function that does not return normally to its caller.

(gdb) finish
warning: Function endless does not return normally.
Try to finish anyway? (y or n)

(gdb) return
warning: Function does not return normally to caller.
Make endless return now? (y or n)

gdb/ChangeLog

	* dwarf2read.c (read_subroutine_type): Set TYPE_NO_RETURN from
	DW_AT_noreturn.
	* gdbtypes.h (struct func_type): Add is_noreturn field flag. Make
	calling_convention an 8 bit bit field.
	(TYPE_NO_RETURN): New macro.
	* infcmd.c (finish_command): Query if function does not return
	normally.
	* stack.c (return_command): Likewise.

gdb/testsuite/ChangeLog

	* gdb.base/noreturn-return.c: New file.
	* gdb.base/noreturn-return.exp: New file.
	* gdb.base/noreturn-finish.c: New file.
	* gdb.base/noreturn-finish.exp: New file.

include/ChangeLog

	* dwarf2.def (DW_AT_noreturn): New DWARF5 attribute.

The dwarf2.h addition and the code to emit the new attribute is already in
the gcc tree.
2015-01-23 17:29:19 +01:00
Andreas Krebbel 1e2e8c529c S/390: Add support for IBM z13.
- 32 128 bit vector registers (overlapping with the existing 16 64 bit
  floating point registers)
- vector double instructions
- vector integer instructions
- scalar vector instructions (allowing to have more floating point
  registers for scalar operations)
- vector string instructions

gas/ChangeLog:

	* config/tc-s390.c (struct pd_reg): Remove.
	(pre_defined_registers): Remove.
	(REG_NAME_CNT): Remove.
	(reg_name_search): Calculate the register number instead of doing
	a lookup.
	(register_name, tc_s390_regname_to_dw2regnum): Adopt to the new
	reg_name_search signature.
	(s390_parse_cpu): Support the new arch string z13.
	(s390_insert_operand): Support for vector registers with the extra
	field for the fifth bit of each vector register operand.
	(md_gather_operand): Adjust to the new handling of optional
	parameters.

	* doc/as.texinfo: Document the z13 cpu string.

gas/testsuite/ChangeLog:

	* gas/s390/esa-g5.d: Add a variant without the optional operand.
	* gas/s390/esa-g5.s: Likewise.
	* gas/s390/esa-z9-109.d: Likewise.
	* gas/s390/esa-z9-109.s: Likewise.
	* gas/s390/zarch-z9-109.d: Likewise.
	* gas/s390/zarch-z9-109.s: Likewise.
	* gas/s390/zarch-z10.d: For variants with a zero optional argument
	it is not dumped by objdump anymore.
	* gas/s390/zarch-zEC12.d: Likewise.

	* gas/s390/zarch-z13.d: New file.
	* gas/s390/zarch-z13.s: New file.
	* gas/s390/s390.exp: Run the test for the z13 files.

include/opcode/ChangeLog:

	* s390.h (s390_opcode_cpu_val): Add S390_OPCODE_Z13.

ld/testsuite/ChangeLog:

	* ld-s390/tlsbin.dd: The nopr register operand is optional and not
	printed if 0 anymore.

opcodes/ChangeLog:

	* s390-dis.c (s390_extract_operand): Support vector register
	operands.
	(s390_print_insn_with_opcode): Support new operands types and add
	new handling of optional operands.
	* s390-mkopc.c (s390_opcode_mode_val, s390_opcode_cpu_val): Remove
	and include opcode/s390.h instead.
	(struct op_struct): New field `flags'.
	(insertOpcode, insertExpandedMnemonic): New parameter `flags'.
	(dumpTable): Dump flags.
	(main): Parse flags from the s390-opc.txt file.  Add z13 as cpu
	string.
	* s390-opc.c: Add new operands types, instruction formats, and
	instruction masks.
	(s390_opformats): Add new formats for .insn.
	* s390-opc.txt: Add new instructions.
2015-01-16 12:28:58 +01:00
Jan-Benedict Glaw edabaaee81 Merge include/libiberty.h from GCC
This pulls in some missing prototypes and also adds corresponding entries
to the ChangeLog file. Please note that for one function, strverscmp(),
the ChangeLog entry was already there, but the actual prototype wasn't.

  These ChangeLog entries are added:

	2014-10-28  Yury Gribov  <y.gribov@samsung.com>

	       * libiberty.h (strtol, strtoul, strtoll, strtoull): New prototypes.

	2014-10-15  David Malcolm  <dmalcolm@redhat.com>

	       * libiberty.h (choose_tmpdir): New prototype.
2015-01-14 22:15:02 +01:00
Anthony Green 400cf8cbe9 Use official ELF machine number for moxie 2015-01-09 07:13:07 -05:00
Richard Earnshaw 7c89917ffa Sync with gcc/libiberty. 2015-01-07 17:34:29 +00:00
Alan Modra 60ebc25751 Fixes a buffer overflow when compiling assembler for the MinGW targets.
PR binutils/17754
	* internal.h (internal_auxent): Increase size of x_fname field to
	20 to allow for PE format's longer file names.
2015-01-06 16:46:40 +00:00
Alan Modra b90efa5b79 ChangeLog rotatation and copyright year update 2015-01-02 00:53:45 +10:30
Joel Brobecker 32d0add0a6 Update year range in copyright notice of all files owned by the GDB project.
gdb/ChangeLog:

        Update year range in copyright notice of all files.
2015-01-01 13:32:14 +04:00
Anthony Green bffb60047d Limit moxie sto/ldo offsets to 16 bits 2014-12-27 10:57:51 -05:00
Terry Guo 5c294fee9a ARM: Add support for value 3 of Tag_ABI_VFP_args attribute
*** bfd/ChangeLog ***

2014-12-25  Thomas Preud'homme  <thomas.preudhomme@arm.com>

	* elf32-arm.c (elf32_arm_merge_eabi_attributes): Handle new
	Tag_ABI_VFP_args value and replace hardcoded values by enum
	values.
	(elf32_arm_post_process_headers): Set e_flags in ELF header
	as hard float only when Tag_ABI_VFP_args is 1, using new enum
	value AEABI_VFP_args_vfp to check that.

*** binutils/ChangeLog ***

2014-12-25  Thomas Preud'homme  <thomas.preudhomme@arm.com>

	* readelf.c (arm_attr_tag_ABI_VFP_args): Add "compatible".

*** gdb/ChangeLog ***

2014-12-25  Thomas Preud'homme  <thomas.preudhomme@arm.com>

	* arm-tdep.c (arm_gdbarch_init): Explicitely handle value 3 of
	Tag_ABI_VFP_args. Also replace hardcoded values by enum values
	in the switch handling the different values of Tag_ABI_VFP_args.

*** gold/ChangeLog ***

2014-12-25  Thomas Preud'homme  <thomas.preudhomme@arm.com>

	* arm.cc (Target_arm::do_adjust_elf_header): Set e_flags in ELF
	header as hard float only when Tag_ABI_VFP_args is 1, using new
	enum value AEABI_VFP_args_vfp to check that.
	(Target_arm::merge_object_attributes): Handle new Tag_ABI_VFP_args
	value and replace hardcoded values by enum values.

*** include/elf/ChangeLog ***

2014-12-25  Thomas Preud'homme  <thomas.preudhomme@arm.com>

	* arm.h: New AEABI_FP_number_model_* and AEABI_VFP_args_* enum
	values.

*** ld/testsuite/ChangeLog ***

2014-12-25  Thomas Preud'homme  <thomas.preudhomme@arm.com>

	* ld-arm/attr-merge-2a.s: Add Tag_ABI_VFP_args.
	* ld-arm/attr-merge-2b.s: Likewise.
	* ld-arm/attr-merge-2.attr: Likewise.
	* ld-arm/attr-merge-4a.s: Add Tag_ABI_FP_number_model and
	Tag_ABI_VFP_args.
	* ld-arm/attr-merge-4b.s: Likewise.
	* ld-arm/attr-merge-4.attr: Likewise.
	* ld-arm/attr-merge-6a.s: Likewise.
	* ld-arm/attr-merge-6b.s: Likewise.
	* ld-arm/attr-merge-6.attr: Add Tag_ABI_FP_number_model.
2014-12-25 09:55:03 +08:00
Alan Modra 12b2843a6b Use a symbol flag bit to mark linker defined symbols
Trying to use the SEC_LINKER_CREATED section flag to determine whether
a symbol is linker defined fails to work on targets like alpha that
define special SEC_COMMON sections.  These might contain symbols that
originated in an object file.

include/
	* bfdlink.h (struct bfd_link_hash_entry): Comment non_ir_ref.  Add
	linker_def.
bfd/
	* elflink.c (_bfd_elf_define_linkage_sym): Set linker_def.
	* linker.c (_bfd_generic_link_add_one_symbol): Clear linker_def
	for CDEF, DEF, DEFW, COM.
ld/
	* ldexp.c (exp_fold_tree_1 <etree_provide>): Test linker_def.
ld/testsuite/
	* ld-powerpc/sdabase.s,
	* ld-powerpc/sdabase.t,
	* ld-powerpc/sdabase.d: New test.
	* ld-powerpc/sdabase2.t,
	* ld-powerpc/sdabase2.d: New test.
	* ld-powerpc/powerpc.exp: Run them.
2014-12-23 23:36:50 +10:30
Tom Tromey a92a2e3435 add gcc/gdb interface files
The gcc plugin is split into two parts.  One part is an ordinary gcc
plugin.  The other part is a shared library that is loaded by gdb.

This patch adds some files that define the interface exported by this
shared library to gdb.  These files also define the internal API by
which the gdb- and gcc-sides communicate.

These files will be kept in sync between gcc and gdb like much of
include/.

The exported API has been intentionally kept very simple.  In
particular only a single function is exported from the gdb-side
library; symbol visibility is used to hide everything else.  This
exported symbol is a function which is called to return a structure
holding function pointers that gdb then uses.  This structure is
versioned so that changes can be made without necessarily requiring a
simultaneous gdb upgrade.

Note that the C compiler API is broken out separately.  This lets us
extend it to other GCC front ends as desired.  We plan to investigate
C++ in the future.

include/ChangeLog
2014-12-12  Phil Muldoon  <pmuldoon@redhat.com>
	    Jan Kratochvil  <jan.kratochvil@redhat.com>
	    Tom Tromey  <tromey@redhat.com>

	* gcc-c-fe.def: New file.
	* gcc-c-interface.h: New file.
	* gcc-interface.h: New file.
2014-12-12 22:23:53 +01:00
Eric Botcazou d924db559b Add Visium support to bfd
bfd/
	* config.bfd: Add Visium support.
	* configure.ac: Likewise.
	* configure: Regenerate.
	* Makefile.am (ALL_MACHINES): Add cpu-visium.lo.
	(ALL_MACHINES_CFILES): Add cpu-visium.c.
	(BFD32_BACKENDS): Add elf32-visium.lo.
	(BFD32_BACKENDS_CFILES): Add elf32-visium.c.
	* Makefile.in: Regenerate.
	* archures.c (DESCRIPTION): Add Visium support.
	(bfd_visium_arch): Declare.
	(bfd_archures_list): Add bfd_visium_arch.
	* reloc.c: Add Visium relocations.
	* targets.c (visium_elf32_vec): Declare.
	(_bfd_target_vector): Add visium_elf32_vec.
	* bfd-in2.h: Regenerate.
	* libbfd.h: Likewise.
	* cpu-visium.c: New file.
	* elf32-visium.c: Likewise.
	* po/SRC-POTFILES.in: Regenerate.
include/elf/
	* common.h (EM_VISIUM): Define.
	* visium.h: New file.
2014-12-06 16:35:18 +01:00
Eric Botcazou 1945cfa59d Add Visium support to opcodes
include/
	* dis-asm.h (print_insn_visium): Declare.
include/opcode/
	* visium.h: New file.
opcodes/
	* configure.ac: Add Visium support.
	* configure: Regenerate.
	* Makefile.am (TARGET_LIBOPCODES_CFILES): Add visium-dis.c and
	visium-opc.c.
	* Makefile.in: Regenerate.
	* disassemble.c (ARCH_visium): Define if ARCH_all.
	(disassembler): Deal with bfd_arch_visium if ARCH_visium.
	* visium-dis.c: New file.
	* visium-opc.c: Likewise.
	* po/POTFILES.in: Regenerate.
2014-12-06 16:25:55 +01:00
Joel Brobecker 2d7bb7580a callback.h:struct host_callback_struct compilation error on Windows hosts.
On Windows, a recent gnulib update imported the lstat module, and
this caused a remote-sim.c build failure in struct host_callback_struct:

    In file included from /[...]/gdb/remote-sim.c:34:0:
    /[...]/gdb/../include/gdb/callback.h:93:9: error: duplicate member '_stati64'
       int (*lstat) (host_callback *, const char *, struct stat *);
             ^
What happens it that gnulib's stat.h makes the following defines:

     /* Large File Support on native Windows.  */
     #if 1
     # define stat _stati64
     #endif

and then:

    #if 1
    # if ! 0
    /* mingw does not support symlinks, therefore it does not have lstat.  But
       without links, stat does just fine.  */
    #  if !(defined __cplusplus && defined GNULIB_NAMESPACE)
    #   define lstat stat
    #  endif

So, the following fields in struct host_callback_struct...

      int (*stat) (host_callback *, const char *, struct stat *);
      int (*fstat) (host_callback *, int, struct stat *);
      int (*lstat) (host_callback *, const char *, struct stat *);

... get translated to...

      int (*_stati64) (host_callback *, const char *, struct _stati64 *);
      int (*_fstati64) (host_callback *, int, struct _stati64 *);
      int (*_stati64) (host_callback *, const char *, struct _stati64 *);

... which causes two fields to have the same name.

This patch fixes the issue by renaming the stat-related fields
by adding a "to_" prefix, similar to what is done in GDB's
target_ops vector.

include/gdb/ChangeLog:

	* callback.h (struct host_callback_struct) <to_stat>: Renamed
	from "stat".
	<to_fstat>: Renamed from "fstat".
	<to_lstat>: Renamed from "lstat".

sim/common/ChangeLog:

	* sim-io.c (sim_io_stat, sim_io_fstat): Adjust calls to "stat"
	and "fstat" callbacks by calls to "to_stat" and "to_fstat" (resp)
	callbacks following renaming in callback.h.
	* syscall.c (cb_syscall): Likewise.  Adjust calls to "lstat"
	callback by call to "to_lstat" callback

sim/cris/ChangeLog:

	* traps.c (cris_break_13_handler): Adjust call to "fstat" callback
	by call to "to_fstat" following renaming in callback.h.

sim/h8300/ChangeLog:

	* compile.c (sim_resume):  Adjust calls to "stat" and "fstat"
	callbacks by calls to "to_stat" and "to_fstat" (resp) callbacks
	following renaming in callback.h.
2014-12-03 13:43:08 +04:00
Sandra Loosemore d306ce58b4 Remove broken nios2 assembler dwim support.
2014-11-28  Sandra Loosemore  <sandra@codesourcery.com>

	include/opcode/
	* nios2.h (NIOS2_INSN_ADDI, NIOS2_INSN_ANDI): Delete.
	(NIOS2_INSN_ORI, NIOS2_INSN_XORI): Delete.
	(NIOS2_INSN_OPTARG): Renumber.

	opcodes/
	* nios2-opc.c (nios2_r1_opcodes): Remove deleted attributes
	from descriptors.

	gas/
	* config/tc-nios2.c (can_evaluate_expr, get_expr_value): Delete.
	(output_addi, output_andi, output_ori, output_xori): Delete.
	(md_assemble): Remove calls to deleted functions.

	gas/testsuite/
	* gas/nios2/nios2.exp: Make "movi" a list test.
	* gas/nios2/movi.s: Adjust comments, add another case.
	* gas/nios2/movi.l: New.
	* gas/nios2/movi.d: Delete.
2014-11-28 14:41:32 -08:00
Mark Wielaard 0cfd832fc7 Recognize new DWARFv5 C11, C++11 and C++14 DW_LANG constants.
gdb/ChangeLog

	* dwarf2read.c (set_cu_language): Recognize DW_LANG_C11,
	DW_LANG_C_plus_plus_11, DW_LANG_C_plus_plus_14.

include/ChangeLog

	* dwarf2.h: Add DW_LANG_C_plus_plus_11, DW_LANG_C11 and
	DW_LANG_C_plus_plus_14.
2014-11-26 12:47:29 +01:00
Andrew Burgess b8b64fa5e4 Merge include/* files from GCC commit 69a2f316d3.
include/ChangeLog:

	* dwarf2.def (DW_AT_APPLE_optimized, DW_AT_APPLE_flags)
	(DW_AT_APPLE_isa, DW_AT_APPLE_block)
	(DW_AT_APPLE_major_runtime_vers, DW_AT_APPLE_runtime_class)
	(DW_AT_APPLE_omit_frame_ptr, DW_AT_APPLE_property_name)
	(DW_AT_APPLE_property_getter, DW_AT_APPLE_property_setter)
	(DW_AT_APPLE_property_attribute, DW_AT_APPLE_objc_complete_type)
	(DW_AT_APPLE_property): New macros.
2014-11-21 22:47:32 +00:00
Andrew Burgess e235c3a213 Merge include/* files from GCC commit 77cab4753.
include/ChangeLog:

	PR debug/63239
	* dwarf2.def (DW_AT_GNU_deleted): New attribute.
2014-11-21 22:46:39 +00:00
Terry Guo a715796ba1 Support ARM Cortex-M7
include/ChangeLog:
2014-11-21  Terry Guo  <terry.guo@arm.com>

	* opcode/arm.h (FPU_VFP_EXT_ARMV8xD): New macro.
	(FPU_VFP_V5D16): Likewise.
	(FPU_VFP_V5_SP_D16): Likewise.
	(FPU_ARCH_VFP_V5D16): Likewise.
	(FPU_ARCH_VFP_V5_SP_D16): Likewise.

bfd/ChangeLog:
2014-11-21  Terry Guo  <terry.guo@arm.com>

	* elf32-arm.c (elf32_arm_merge_eabi_attributes): Support FPv5.

binutils/ChangeLog:
2014-11-21  Terry Guo  <terry.guo@arm.com>

	* readelf.c (arm_attr_tag_FP_arch): Extended to support FPv5.

gas/ChangeLog:
2014-11-21  Terry Guo  <terry.guo@arm.com>

	* config/tc-arm.c (fpu_vfp_ext_armv8xd): New.
	(arm_cpus): Support cortex-m7.
	(arm_fpus): Support fpv5-sp-d16 and fpv5-d16.
	(do_vfp_nsyn_cvt_fpv8): Generate error when use D register for S
	register only target like FPv5-SP-D16.
	(do_neon_cvttb_1): Likewise.
	(do_vfp_nsyn_fpv8): Likewise.
	(do_vrint_1): Likewise.
	(aeabi_set_public_attributes): Set proper FP arch for FPv5.
	* doc/c-arm.texi: Document new cpu and fpu names for cortex-m7.

gas/testsuite/ChangeLog:
2014-11-21  Terry Guo  <terry.guo@arm.com>

	* gas/arm/armv7e-m+fpv5-d16.s: New.
	* gas/arm/armv7e-m+fpv5-d16.d: Likewise.
	* gas/arm/armv7e-m+fpv5-sp-d16.s: Likewise.
	* gas/arm/armv7e-m+fpv5-sp-d16.d: Likewise.

ld/testsuite/ChangeLog:
2014-11-21  Terry Guo  <terry.guo@arm.com>

	* ld-arm/attr-merge-vfp-4-sp.s: New test source file.
	* ld-arm/attr-merge-vfp-5-sp.s: Likewise.
	* ld-arm/attr-merge-vfp-5.s: Likewise.
	* ld-arm/attr-merge-vfp-8.d: New test.
	* ld-arm/attr-merge-vfp-8r.d: Likewise.
	* ld-arm/attr-merge-vfp-9.d: Likewise.
	* ld-arm/attr-merge-vfp-9r.d: Likewise.
	* ld-arm/attr-merge-vfp-10.d: Likewise.
	* ld-arm/attr-merge-vfp-10r.d: Likewise.
	* ld-arm/attr-merge-vfp-11.d: Likewise.
	* ld-arm/attr-merge-vfp-11r.d: Likewise.
	* ld-arm/attr-merge-vfp-12.d: Likewise.
	* ld-arm/attr-merge-vfp-12r.d: Likewise.
	* ld-arm/attr-merge-vfp-13.d: Likewise.
	* ld-arm/attr-merge-vfp-13r.d: Likewise.
	* ld-arm/attr-merge-vfp-14.d: Likewise.
	* ld-arm/attr-merge-vfp-14r.d: Likewise.
	* ld-arm/arm-elf.exp: Run the new tests.
2014-11-21 11:36:06 +08:00
Igor Zamyatin d258b82828 Add -z bndplt to generate BND prefix in PLT entries
This patch adds "-z bndplt" option Linux/x86-64 linker to generate BND
prefix in PLT entries.  It also updated Linux/x86-64 assembler not to
generate R_X86_64_PLT32_BND nor R_X86_64_PC32_BND relocations.

bfd/

2014-11-18  Igor Zamyatin  <igor.zamyatin@intel.com>

	* elf64-x86-64.c (elf_x86_64_check_relocs): Enable MPX PLT only
	for -z bndplt.

gas/

2014-11-18  Igor Zamyatin  <igor.zamyatin@intel.com>

	* config/tc-i386-intel.c (i386_operator): Remove last argument
	from lex_got call.
	* config/tc-i386.c (reloc): Remove bnd_prefix from parameters'
	list.  Return always BFD_RELOC_32_PCREL.
	* (output_branch): Remove condition for BFD_RELOC_X86_64_PC32_BND.
	* (output_jump): Update call to reloc accordingly.
	* (output_interseg_jump): Likewise.
	* (output_disp): Likewise.
	* (output_imm): Likewise.
	* (x86_cons_fix_new): Likewise.
	* (lex_got): Remove bnd_prefix from parameters' list in macro and
	declarations. Don't use BFD_RELOC_X86_64_PLT32_BND.
	* (x86_cons): Update call to lex_got accordingly.
	* (i386_immediate): Likewise.
	* (i386_displacement): Likewise.
	* (md_apply_fix): Don't use BFD_RELOC_X86_64_PLT32_BND nor
	BFD_RELOC_X86_64_PC32_BND.
	* (tc_gen_reloc): Likewise.

include/

2014-11-18  Igor Zamyatin  <igor.zamyatin@intel.com>

	* bfdlink.h (struct bfd_link_info): Add bndplt.

ld/

2014-11-18  Igor Zamyatin  <igor.zamyatin@intel.com>

	* emulparams/elf_x86_64.sh (BNDPLT): Set to yes for x86_64.
	* emultempl/elf32.em (gld${EMULATION_NAME}_handle_option): Handle
	"-z bndplt" if BNDPLT is yes.
	(gld${EMULATION_NAME}_list_options): Add "-z bndplt" entry.
	* ld.texinfo: Add description for bndplt.

ld/testsuite/

2014-11-18  Igor Zamyatin  <igor.zamyatin@intel.com>

	* testsuite/ld-x86-64/bnd-ifunc-1.d: Add bndplt option.
	* testsuite/ld-x86-64/bnd-ifunc-2.d: Likewise.
	* testsuite/ld-x86-64/bnd-plt-1.d: Likewise.  Update dissassembly
	sections.
	* testsuite/ld-x86-64/mpx.exp: Handle mpx3 and mpx4 tests.
	* testsuite/ld-x86-64/mpx1a.rd: Remove _BND from relocation name.
	* testsuite/ld-x86-64/mpx1c.rd: Likewise.
	* testsuite/ld-x86-64/mpx2a.rd: Likewise.
	* testsuite/ld-x86-64/mpx2c.rd: Likewise.
	* testsuite/ld-x86-64/mpx3.dd: New file.
	* testsuite/ld-x86-64/mpx3a.s: Likewise.
	* testsuite/ld-x86-64/mpx3b.s: Likewise.
	* testsuite/ld-x86-64/mpx4.dd: Likewise.
	* testsuite/ld-x86-64/mpx4a.s: Likewise.
	* testsuite/ld-x86-64/mpx4b.s: Likewise.
2014-11-18 05:40:17 -08:00
H.J. Lu 0be3630492 Mark R_X86_64_GOTPLT64 obsolete
* x86-64.h (R_X86_64_GOTPLT64): Mark it obsolete.
2014-11-13 11:26:47 -08:00
Sandra Loosemore b4714c7c30 Add mach parameter to nios2_find_opcode_hash.
2014-11-06  Sandra Loosemore  <sandra@codesourcery.com>

	include/opcode/
	* nios2.h (nios2_find_opcode_hash): Add mach parameter to
	declaration.  Fix obsolete comment.

	opcodes/
	* nios2-dis.c (nios2_find_opcode_hash): Add mach parameter.
	(nios2_disassemble): Adjust call to nios2_find_opcode_hash.

	gas/
	* config/tc-nios2.c (nios2_diagnose_overflow): Adjust call to
	nios2_find_opcode_hash.
2014-11-06 13:12:21 -08:00
Naveen H.S 2c62985659 MIPS: Add Octeon 3 support
binutils:
2014-10-31  Andrew Pinski  <apinski@cavium.com>
            Naveen H.S  <Naveen.Hurugalawadi@caviumnetworks.com>

	* readelf.c (print_mips_isa_ext): Print the value of Octeon3.

gas:
2014-10-31  Andrew Pinski  <apinski@cavium.com>
            Naveen H.S  <Naveen.Hurugalawadi@caviumnetworks.com>

	* config/tc-mips.c (CPU_IS_OCTEON): Handle CPU_OCTEON3.
	(mips_cpu_info_table): Octeon3 enables virt ase.
	* doc/c-mips.texi: Document octeon3 as an acceptable value for
	-march=.

gas/testsuite:
2014-10-31  Andrew Pinski  <apinski@cavium.com>
            Naveen H.S  <Naveen.Hurugalawadi@caviumnetworks.com>

	* gas/mips/mips.exp: Add support for Octeon3 architecture.
	Also add in support for running Octeon3 tests.
	* gas/mips/octeon3.d: New test.
	* gas/mips/octeon3.s: New test source.

opcodes:
2014-10-31  Andrew Pinski  <apinski@cavium.com>
            Naveen H.S  <Naveen.Hurugalawadi@caviumnetworks.com>

	* mips-dis.c (mips_arch_choices): Add octeon3.
	* mips-opc.c (IOCT): Include INSN_OCTEON3.
	(IOCT2): Likewise.
	(IOCT3): New define.
	(IVIRT): New define.
	(mips_builtin_opcodes): Add dmfgc0, dmtgc0, hypcall, mfgc0, mtgc0,
	tlbinv, tlbinvf, tlbgr, tlbgwi, tlbginv, tlbginvf, tlbgwr, tlbgp, tlti
	IVIRT instructions.
	Extend mtm0, mtm1, mtm2, mtp0, mtp1, mtp2 instructions to take another
	operand for IOCT3.

bfd:
2014-10-31  Andrew Pinski  <apinski@cavium.com>
            Naveen H.S  <Naveen.Hurugalawadi@caviumnetworks.com>

	* archures.c: Add octeon3 for mips target.
	* bfd-in2.h: Regenerate.
	* bfd/cpu-mips.c: Define I_mipsocteon3.
	nfo_struct): Add octeon3 support.
	* bfd/elfxx-mips.c: (_bfd_elf_mips_mach): Add support for
	octeon3.
	(mips_set_isa_flags): Add support for octeon3.
	(bfd_mips_isa_ext): Add bfd_mach_mips_octeon3.
	(mips_mach_extensions): Make bfd_mach_mips_octeon3 an
	extension of bfd_mach_mips_octeon2.
	(print_mips_isa_ext): Print the value of Octeon3.
2014-10-31 13:50:10 -07:00
Sandra Loosemore 96ba42336f Refactoring/cleanup of nios2 opcodes and assembler code.
2014-10-23  Sandra Loosemore  <sandra@codesourcery.com>

	include/opcode/
	* nios2.h (enum iw_format_type): New.
	(struct nios2_opcode): Update comments.  Add size and format fields.
	(NIOS2_INSN_OPTARG): New.
	(REG_NORMAL, REG_CONTROL, REG_COPROCESSOR): New.
	(struct nios2_reg): Add regtype field.
	(GET_INSN_FIELD, SET_INSN_FIELD): Delete.
	(IW_A_LSB, IW_A_MSB, IW_A_SZ, IW_A_MASK): Delete.
	(IW_B_LSB, IW_B_MSB, IW_B_SZ, IW_B_MASK): Delete.
	(IW_C_LSB, IW_C_MSB, IW_C_SZ, IW_C_MASK): Delete.
	(IW_IMM16_LSB, IW_IMM16_MSB, IW_IMM16_SZ, IW_IMM16_MASK): Delete.
	(IW_IMM26_LSB, IW_IMM26_MSB, IW_IMM26_SZ, IW_IMM26_MASK): Delete.
	(IW_OP_LSB, IW_OP_MSB, IW_OP_SZ, IW_OP_MASK): Delete.
	(IW_OPX_LSB, IW_OPX_MSB, IW_OPX_SZ, IW_OPX_MASK): Delete.
	(IW_SHIFT_IMM5_LSB, IW_SHIFT_IMM5_MSB): Delete.
	(IW_SHIFT_IMM5_SZ, IW_SHIFT_IMM5_MASK): Delete.
	(IW_CONTROL_REGNUM_LSB, IW_CONTROL_REGNUM_MSB): Delete.
	(IW_CONTROL_REGNUM_SZ, IW_CONTROL_REGNUM_MASK): Delete.
	(OP_MASK_OP, OP_SH_OP): Delete.
	(OP_MASK_IOP, OP_SH_IOP): Delete.
	(OP_MASK_IRD, OP_SH_IRD): Delete.
	(OP_MASK_IRT, OP_SH_IRT): Delete.
	(OP_MASK_IRS, OP_SH_IRS): Delete.
	(OP_MASK_ROP, OP_SH_ROP): Delete.
	(OP_MASK_RRD, OP_SH_RRD): Delete.
	(OP_MASK_RRT, OP_SH_RRT): Delete.
	(OP_MASK_RRS, OP_SH_RRS): Delete.
	(OP_MASK_JOP, OP_SH_JOP): Delete.
	(OP_MASK_IMM26, OP_SH_IMM26): Delete.
	(OP_MASK_RCTL, OP_SH_RCTL): Delete.
	(OP_MASK_IMM5, OP_SH_IMM5): Delete.
	(OP_MASK_CACHE_OPX, OP_SH_CACHE_OPX): Delete.
	(OP_MASK_CACHE_RRS, OP_SH_CACHE_RRS): Delete.
	(OP_MASK_CUSTOM_A, OP_SH_CUSTOM_A): Delete.
	(OP_MASK_CUSTOM_B, OP_SH_CUSTOM_B): Delete.
	(OP_MASK_CUSTOM_C, OP_SH_CUSTOM_C): Delete.
	(OP_MASK_CUSTOM_N, OP_SH_CUSTOM_N): Delete.
	(OP_<insn>, OPX_<insn>, OP_MATCH_<insn>, OPX_MATCH_<insn>): Delete.
	(OP_MASK_<insn>, OP_MASK): Delete.
	(GET_IW_A, GET_IW_B, GET_IW_C, GET_IW_CONTROL_REGNUM): Delete.
	(GET_IW_IMM16, GET_IW_IMM26, GET_IW_OP, GET_IW_OPX): Delete.
	Include nios2r1.h to define new instruction opcode constants
	and accessors.
	(nios2_builtin_opcodes): Rename to nios2_r1_opcodes.
	(bfd_nios2_num_builtin_opcodes): Rename to nios2_num_r1_opcodes.
	(bfd_nios2_num_opcodes): Rename to nios2_num_opcodes.
	(NUMOPCODES, NUMREGISTERS): Delete.
	* nios2r1.h: New file.

	opcodes/
	* nios2-opc.c (nios2_builtin_regs): Add regtype field initializers.
	(nios2_builtin_opcodes): Rename to nios2_r1_opcodes.  Use new
	MATCH_R1_<insn> and MASK_R1_<insn> macros in initializers.  Add
	size and format initializers.  Merge 'b' arguments into 'j'.
	(NIOS2_NUM_OPCODES): Adjust definition.
	(bfd_nios2_num_builtin_opcodes): Rename to nios2_num_r1_opcodes.
	(nios2_opcodes): Adjust.
	(bfd_nios2_num_opcodes): Rename to nios2_num_opcodes.
	* nios2-dis.c (INSNLEN): Update comment.
	(nios2_hash_init, nios2_hash): Delete.
	(OPCODE_HASH_SIZE): New.
	(nios2_r1_extract_opcode): New.
	(nios2_disassembler_state): New.
	(nios2_r1_disassembler_state): New.
	(nios2_init_opcode_hash): Add state parameter.  Adjust to use it.
	(nios2_find_opcode_hash): Use state object.
	(bad_opcode): New.
	(nios2_print_insn_arg): Add op parameter.  Use it to access
	format.  Remove 'b' case.
	(nios2_disassemble): Remove special case for nop.  Remove
	hard-coded instruction size.

	gas/
	* config/tc-nios2.c (nios2_insn_infoS): Add constant_bits field.
	(nios2_arg_infoS, nios2_arg_hash, nios2_arg_lookup): Delete.
	(nios2_control_register_arg_p): Delete.
	(nios2_coproc_reg): Delete.
	(nios2_relax_frag): Remove hard-coded instruction size.
	(md_convert_frag): Use new insn accessor macros.
	(nios2_diagnose_overflow): Remove hard-coded instruction size.
	(md_apply_fix): Likewise.
	(bad_opcode): New.
	(nios2_parse_reg): New.
	(nios2_assemble_expression): Remove prev_reloc parameter.  Adjust
	uses and callers.
	(nios2_assemble_arg_c): New.
	(nios2_assemble_arg_d): New.
	(nios2_assemble_arg_s): New.
	(nios2_assemble_arg_t): New.
	(nios2_assemble_arg_i): New.
	(nios2_assemble_arg_u): New.
	(nios2_assemble_arg_o): New.
	(nios2_assemble_arg_j): New.
	(nios2_assemble_arg_l): New.
	(nios2_assemble_arg_m): New.
	(nios2_assemble_args): New.
	(nios2_assemble_args_dst): Delete.
	(nios2_assemble_args_tsi): Delete.
	(nios2_assemble_args_tsu): Delete.
	(nios2_assemble_args_sto): Delete.
	(nios2_assemble_args_o): Delete.
	(nios2_assemble_args_is): Delete.
	(nios2_assemble_args_m): Delete.
	(nios2_assemble_args_s): Delete.
	(nios2_assemble_args_tis): Delete.
	(nios2_assemble_args_dc): Delete.
	(nios2_assemble_args_cs): Delete.
	(nios2_assemble_args_ds): Delete.
	(nios2_assemble_args_ldst): Delete.
	(nios2_assemble_args_none): Delete.
	(nios2_assemble_args_dsj): Delete.
	(nios2_assemble_args_d): Delete.
	(nios2_assemble_args_b): Delete.
	(nios2_arg_info_structs): Delete.
	(NIOS2_NUM_ARGS): Delete.
	(nios2_consume_arg): Remove insn parameter.  Use new macros.
	Don't check register arguments here.  Remove 'b' case.
	(nios2_consume_separator): Move check for missing separators to...
	(nios2_parse_args): ...here.  Remove special case for optional
	arguments.
	(output_insn): Avoid using hard-coded insn size.
	(output_ubranch): Likewise.
	(output_cbranch): Likewise.
	(output_call): Use new macros.
	(output_addi): Likewise.
	(output_ori): Likewise.
	(output_xori): Likewise.
	(output_movia): Likewise.
	(md_begin): Remove nios2_arg_info_structs initialization.
	(md_assemble): Initialize constant_bits field.  Use
	nios2_parse_args instead of looking up parse function in hash table.

	gdb/
	* nios2-tdep.c (nios2_analyze_prologue): Use new instruction field
	accessors and constants from nios2 opcodes update.
	(nios2_get_next_pc): Likewise.
2014-10-23 09:54:15 -07:00
Matthew Fortune 00ac7aa072 Show information about unknown ASEs and extensions in .MIPS.abiflags
bfd/
	* elfxx-mips.c (print_mips_ases): Print unknown ASEs.
	(print_mips_isa_ext): Print the value of an unknown extension.

binutils/

	* readelf.c (print_mips_ases): Print unknown ASEs.
	(print_mips_isa_ext): Print the value of an unknown extension.

include/

	* elf/mips.h (AFL_ASE_MASK): Define.
2014-10-22 10:37:26 +01:00
Jose E. Marchesi 0b6be41550 opcodes, elf: annotate instructions with HWCAP2_VIS3B.
This patch annotates the following SPARC instructions as VIS3B
instructions: ldx *, %efsr, fpadd64, fpsub64, fpcmpule8, fpcmpune8,
fpcmpugt8, fpcmpueq8.  It also improves the documentation of the VIS3B
capability in several headers.

Tested in sparc64-unknown-linux-gnu and sparc-unknown-linux-gnu.
No visible regressions.

opcodes/ChangeLog:

  2014-10-17  Jose E. Marchesi  <jose.marchesi@oracle.com>

	* sparc-opc.c (sparc-opcodes): Annotate several instructions with
	the HWCAP2_VIS3B hwcap.

include/opcodes/ChangeLog:

  2014-10-17  Jose E. Marchesi  <jose.marchesi@oracle.com>

	* sparc.h (HWCAP2_VIS3B): Documentation improved.

include/elf/ChangeLog:

  2014-10-17  Jose E. Marchesi  <jose.marchesi@oracle.com>

	* sparc.h (ELF_SPARC_HWCAP2_VIS3B): Documentation improved.
2014-10-17 22:00:02 +02:00
Iain Buclaw b55f967878 Sync libiberty with upstream GCC.
include/ChangeLog
	* libiberty.h (PEX_STDOUT_APPEND): New flag.
	(PEX_STDERR_APPEND): Likewise.

	* demangle.h (DMGL_DLANG): New macro.
	(DMGL_STYLE_MASK): Add DMGL_DLANG.
	(demangling_styles): Add dlang_demangling.
	(DLANG_DEMANGLING_STYLE_STRING): New macro.
	(DLANG_DEMANGLING): New macro.
	(dlang_demangle): New prototype.

	* longlong.h: Add __udiv_w_sdiv prototype.

libiberty/ChangeLog
	* cp-demangle.c (d_substitution): Handle abi tags on abbreviation.

	* pex-common.h (struct pex_funcs): Add new parameter for open_write field.
	* pex-unix.c (pex_unix_open_write): Add support for new parameter.
	* pex-djgpp.c (pex_djgpp_open_write): Likewise.
	* pex-win32.c (pex_win32_open_write): Likewise.
	* pex-common.c (pex_run_in_environment): Likewise.

	* Makefile.in (CFILES): Add d-demangle.c.
	(REQUIRED_OFILES): Add d-demangle.o.
	* cplus-dem.c (libiberty_demanglers): Add dlang_demangling case.
	(cplus_demangle): Likewise.
	* d-demangle.c: New file.
	* testsuite/Makefile.in (really-check): Add check-d-demangle.
	* testsuite/d-demangle-expected: New file.

	* simple-object-elf.c (simple_object_elf_write_ehdr): Correctly
	handle objects with more than SHN_LORESERVE sections.
	(simple_object_elf_write_shdr): Add sh_link parameter.
	(simple_object_elf_write_to_file): Correctly handle objects with
	more than SHN_LORESERVE sections.

	* cp-demangle.c (d_dump): Only access field from s_fixed part of
	the union for DEMANGLE_COMPONENT_FIXED_TYPE.
	(d_count_templates_scopes): Likewise.

	* testsuite/demangler-fuzzer.c: New file.
	* testsuite/Makefile.in (fuzz-demangler): New rule.
	(demangler-fuzzer): Likewise.
	(mostlyclean): Clean up demangler fuzzer.
2014-10-11 10:29:10 +01:00
Jose E. Marchesi 3d68f91c0f This is a series of patches that add support for the SPARC M7 cpu to
binutils.  They were discussed and approved here:

  https://sourceware.org/ml/binutils/2014-10/msg00038.html
2014-10-09 13:16:53 +01:00
Will Newton 23664eacaf include/elf/aarch64.h: Add reloc numbers from ABI release 1.0
Add the relocation numbers defined in ABI release 1.0 but missing
from the current header. This will allow tools like objdump to dump
objects that use these relocations.

include/elf/ChangeLog:

2014-10-08  Will Newton  <will.newton@linaro.org>

	* aarch64.h: Sync up relocations with ABI release 1.0.
2014-10-08 10:07:45 +01:00
Kuan-Lin Chen 1c8f6a4d1f NDS32: Code refactoring of relaxation.
Refactor each relaxation pattern to raise the maintainability.
In origin, all patterns is analysed in nds32_elf_relax_section,
so it is hard to debug and maintain.  Therefore, we classify all
patterns into different functions in this patch.
Moreover, we adjust all optimizations into nds32_elf_relax_section
to take these optimizations in turn.  This can promise all relaxation
being done after calling gld${EMULATION_NAME}_after_allocation.
2014-09-16 13:08:00 +08:00
Kuan-Lin Chen 40c7a7cb74 NDS32/opcodes: Add audio ISA extension and modify the disassemble implemnt.
First, add nds32 audio ISA extension including opcodes and registers.
Second, redesign the disassemble implement.
The original disassemble decode instruction opcode using switch-case.
It is hard to synchronize when adding new instructions.
Therefore, the new implement reuses nds32_opcodes to dump the instructions.
2014-09-16 12:28:11 +08:00
Andrew Bennett 7361da2c95 Add support for MIPS R6.
bfd/
 	* aoutx.h (NAME (aout, machine_type)): Add mips32r6 and mips64r6.
 	* archures.c (bfd_architecture): Likewise.
 	* bfd-in2.h (bfd_architecture): Likewise.
 	(bfd_reloc_code_real): Add relocs BFD_RELOC_MIPS_21_PCREL_S2,
 	BFD_RELOC_MIPS_26_PCREL_S2, BFD_RELOC_MIPS_18_PCREL_S3 and
 	BFD_RELOC_MIPS_19_PCREL_S2.
 	* cpu-mips.c (arch_info_struct): Add mips32r6 and mips64r6.
 	* elf32-mips.c: Define relocs R_MIPS_PC21_S2, R_MIPS_PC26_S2
 	R_MIPS_PC18_S3, R_MIPS_PC19_S2, R_MIPS_PCHI16 and R_MIPS_PCLO16.
 	(mips_reloc_map): Add entries for BFD_RELOC_MIPS_21_PCREL_S2,
 	BFD_RELOC_MIPS_26_PCREL_S2, BFD_RELOC_MIPS_18_PCREL_S3,
 	BFD_RELOC_MIPS_19_PCREL_S2, BFD_RELOC_HI16_S_PCREL and
 	BFD_RELOC_LO16_PCREL.
 	* elf64-mips.c: Define REL, and RELA relocations R_MIPS_PC21_S2,
	R_MIPS_PC26_S2, R_MIPS_PC18_S3, R_MIPS_PC19_S2, R_MIPS_PCHI16
	and R_MIPS_PCLO16.
 	(mips_reloc_map): Add entries for BFD_RELOC_MIPS_21_PCREL_S2,
 	BFD_RELOC_MIPS_26_PCREL_S2, BFD_RELOC_MIPS_18_PCREL_S3,
 	BFD_RELOC_MIPS_19_PCREL_S2, BFD_RELOC_HI16_S_PCREL and
 	BFD_RELOC_LO16_PCREL.
 	* elfn32-mips.c: Likewise.
 	* elfxx-mips.c (MIPSR6_P): New define.
 	(mipsr6_exec_plt_entry): New array.
	(hi16_reloc_p): Add support for R_MIPS_PCHI16.
	(lo16_reloc_p): Add support for R_MIPS_PCLO16.
 	(aligned_pcrel_reloc_p): New function.
 	(mips_elf_relocation_needs_la25_stub): Add support for relocs:
 	R_MIPS_PC21_S2 and R_MIPS_PC26_S2.
 	(mips_elf_calculate_relocation): Add support for relocs:
 	R_MIPS_PC21_S2, R_MIPS_PC26_S2, R_MIPS_PC18_S3, R_MIPS_PC19_S2,
 	R_MIPS_PCHI16 and R_MIPS_PCLO16.
 	(_bfd_elf_mips_mach): Add support for mips32r6 and mips64r6.
	(mips_elf_add_lo16_rel_addend): Add support for R_MIPS_PCHI16.
 	(_bfd_mips_elf_check_relocs): Add support for relocs:
	R_MIPS_PC21_S2 and R_MIPS_PC26_S2.
 	(_bfd_mips_elf_relocate_section): Add a check for unaligned
 	pc relative relocs.
 	(_bfd_mips_elf_finish_dynamic_symbol): Add support for MIPS r6
 	plt entry.
 	(mips_set_isa_flags): Add support for mips32r6 and mips64r6.
 	(_bfd_mips_elf_print_private_bfd_data): Likewise.
 	(mips_32bit_flags_p): Add support for mips32r6.
 	* libbfd.h (bfd_reloc_code_real_names): Add entries for
 	BFD_RELOC_MIPS_21_PCREL_S2, BFD_RELOC_MIPS_26_PCREL_S2,
 	BFD_RELOC_MIPS_18_PCREL_S3 and BFD_RELOC_MIPS_19_PCREL_S2.
 	* reloc.c: Document relocs BFD_RELOC_MIPS_21_PCREL_S2,
 	BFD_RELOC_MIPS_26_PCREL_S2, BFD_RELOC_MIPS_18_PCREL_S3 and
 	BFD_RELOC_MIPS_19_PCREL_S2.

binutils/
 	* readelf.c (get_machine_flags): Add support for mips32r6 and
 	mips64r6.

elfcpp/
 	* mips.h (E_MIPS_ARCH_32R6, E_MIPS_ARCH_64R6): New enum constants.

gas/
 	* config/tc-mips.c (mips_nan2008): New static global.
	(mips_flag_nan2008): Removed.
	(LL_SC_FMT): New define.
	(COP12_FMT): Updated.
	(ISA_IS_R6): New define.
 	(ISA_HAS_64BIT_REGS): Add mips64r6.
 	(ISA_HAS_DROR): Likewise.
 	(ISA_HAS_64BIT_FPRS): Add mips32r6 and mips64r6.
 	(ISA_HAS_ROR): Likewise.
 	(ISA_HAS_ODD_SINGLE_FPR): Likewise.
 	(ISA_HAS_MXHC1): Likewise.
 	(hilo_interlocks): Likewise.
 	(md_longopts): Likewise.
	(ISA_HAS_LEGACY_NAN): New define.
 	(options): Add OPTION_MIPS32R6 and OPTION_MIPS64R6.
 	(mips_ase): Add field rem_rev.
 	(mips_ases): Updated to add which ISA an ASE was removed in.
 	(mips_isa_rev): Add support for mips32r6 and mips64r6.
 	(mips_check_isa_supports_ase): Add support to check if an ASE
 	has been removed in the specified MIPS ISA revision.
 	(validate_mips_insn): Skip '-' character.
	(macro_build): Likewise.
	(mips_check_options): Prevent R6 working with fp32, mips16,
	micromips, or branch relaxation.
	(file_mips_check_options): Set R6 floating point registers to
	64 bit.  Also deal with the nan2008 option.
 	(limited_pcrel_reloc_p): Add relocs: BFD_RELOC_MIPS_21_PCREL_S2,
 	BFD_RELOC_MIPS_26_PCREL_S2, BFD_RELOC_MIPS_18_PCREL_S3,
 	BFD_RELOC_MIPS_19_PCREL_S2, BFD_RELOC_HI16_S_PCREL and
 	BFD_RELOC_LO16_PCREL.
 	(operand_reg_mask): Add support for OP_SAME_RS_RT, OP_CHECK_PREV
	and OP_NON_ZERO_REG.
 	(match_check_prev_operand): New static function.
 	(match_same_rs_rt_operand): New static function.
	(match_non_zero_reg_operand): New static function.
 	(match_operand): Added entries for: OP_SAME_RS_RT, OP_CHECK_PREV
	and OP_NON_ZERO_REG.
 	(insns_between): Added case to deal with forbidden slots.
 	(append_insn): Added support for relocs: BFD_RELOC_MIPS_21_PCREL_S2
 	and BFD_RELOC_MIPS_26_PCREL_S2.
 	(match_insn): Add support for operands -A, -B, +' and +".  Also
 	skip '-' character.
 	(mips_percent_op): Add entries for %pcrel_hi and %pcrel_lo.
 	(md_parse_option): Add support for mips32r6 and mips64r6.  Also
	update the nan option handling.
 	(md_pcrel_from): Add cases for relocs: BFD_RELOC_MIPS_21_PCREL_S2,
 	BFD_RELOC_MIPS_26_PCREL_S2.
 	(mips_force_relocation): Prevent forced relaxation for MIPS r6.
 	(md_apply_fix): Add support for relocs: BFD_RELOC_MIPS_21_PCREL_S2,
 	BFD_RELOC_MIPS_26_PCREL_S2, BFD_RELOC_MIPS_18_PCREL_S3,
 	BFD_RELOC_MIPS_19_PCREL_S2, BFD_RELOC_HI16_S_PCREL and
 	BFD_RELOC_LO16_PCREL.
 	(s_mipsset): Add support for mips32r6 and mips64r6.
	(s_nan): Update to support the new nan2008 framework.
 	(tc_gen_reloc): Add relocs: BFD_RELOC_MIPS_21_PCREL_S2,
 	BFD_RELOC_MIPS_26_PCREL_S2, BFD_RELOC_MIPS_18_PCREL_S3,
 	BFD_RELOC_MIPS_19_PCREL_S2, BFD_RELOC_HI16_S_PCREL and
 	BFD_RELOC_LO16_PCREL.
	(mips_elf_final_processing): Updated to use the mips_nan2008.
 	(mips_cpu_info_table): Add entries for mips32r6 and mips64r6.
	(macro): Enable ldc2, sdc2, ll, lld, swc2, sc, scd, cache, pref
	macros for R6.
	(mips_fix_adjustable): Make PC relative R6 relocations relative
	to the symbol and not the section.
 	* configure.ac: Add support for mips32r6 and mips64r6.
 	* configure: Regenerate.
 	* doc/c-mips.texi: Document the -mips32r6 and -mips64r6 command line
 	options.
	* doc/as.texinfo: Likewise.

gas/testsuite/
	* gas/mips/24k-triple-stores-1.s: If testing for r6 prevent
	non-supported instructions from being tested.
	* gas/mips/24k-triple-stores-2.s: Likewise.
	* gas/mips/24k-triple-stores-3.s: Likewise.
	* gas/mips/24k-triple-stores-6.s: Likewise.
	* gas/mips/beq.s: Likewise.
	* gas/mips/eva.s: Likewise.
	* gas/mips/ld-zero-3.s: Likewise.
	* gas/mips/mips32-cp2.s: Likewise.
	* gas/mips/mips32.s: Likewise.
	* gas/mips/mips4.s: Likewise.
	* gas/mips/add.s: Don't test the add instructions if r6, and
	add padding.
	* gas/mips/add.d: Check for a triple dot not a nop at the end of the
	disassembly output.
	* gas/mips/micromips@add.d: Likewise.
	* gas/mips/mipsr6@24k-branch-delay-1.d: New file.
	* gas/mips/mipsr6@24k-triple-stores-1.d: New file.
	* gas/mips/mipsr6@24k-triple-stores-2-llsc.d: New file.
	* gas/mips/mipsr6@24k-triple-stores-2.d: New file.
	* gas/mips/mipsr6@24k-triple-stores-3.d: New file.
	* gas/mips/mipsr6@24k-triple-stores-6.d: New file.
	* gas/mips/mipsr6@add.d: New file.
	* gas/mips/mipsr6@attr-gnu-4-1-msingle-float.l: New file.
	* gas/mips/mipsr6@attr-gnu-4-1-msingle-float.s: New file.
	* gas/mips/mipsr6@attr-gnu-4-1-msoft-float.l: New file.
	* gas/mips/mipsr6@attr-gnu-4-1-msoft-float.s: New file.
	* gas/mips/mipsr6@attr-gnu-4-2-mdouble-float.l: New file.
	* gas/mips/mipsr6@attr-gnu-4-2-mdouble-float.s: New file.
	* gas/mips/mipsr6@beq.d: New file.
	* gas/mips/mipsr6@bge.d: New file.
	* gas/mips/mipsr6@bgeu.d: New file.
	* gas/mips/mipsr6@blt.d: New file.
	* gas/mips/mipsr6@bltu.d: New file.
	* gas/mips/mipsr6@branch-misc-1.d: New file.
	* gas/mips/mipsr6@branch-misc-2-64.d: New file.
	* gas/mips/mipsr6@branch-misc-2pic-64.d: New file.
	* gas/mips/mipsr6@branch-misc-4-64.d: New file.
	* gas/mips/mipsr6@cache.d: New file.
	* gas/mips/mipsr6@eva.d: New file.
	* gas/mips/mipsr6@jal-svr4pic-noreorder.d: New file.
	* gas/mips/mipsr6@jal-svr4pic.d: New file.
	* gas/mips/mipsr6@ld-zero-2.d: New file.
	* gas/mips/mipsr6@ld-zero-3.d: New file.
	* gas/mips/mipsr6@loc-swap-dis.d: New file.
	* gas/mips/mipsr6@mips32-cp2.d: New file.
	* gas/mips/mipsr6@mips32-imm.d: New file.
	* gas/mips/mipsr6@mips32.d: New file.
	* gas/mips/mipsr6@mips32r2.d: New file.
	* gas/mips/mipsr6@mips4-fp.d: New file.
	* gas/mips/mipsr6@mips4-fp.l: New file.
	* gas/mips/mipsr6@mips4-fp.s: New file.
	* gas/mips/mipsr6@mips4.d: New file.
	* gas/mips/mipsr6@mips5-fp.d: New file.
	* gas/mips/mipsr6@mips5-fp.l: New file.
	* gas/mips/mipsr6@mips5-fp.s: New file.
	* gas/mips/mipsr6@mips64.d: New file.
	* gas/mips/mipsr6@msa-branch.d: New file.
	* gas/mips/mipsr6@msa.d: New file.
	* gas/mips/mipsr6@pref.d: New file.
	* gas/mips/mipsr6@relax-swap3.d: New file.
	* gas/mips/r6-64-n32.d: New file.
	* gas/mips/r6-64-n64.d: New file.
	* gas/mips/r6-64-removed.l: New file.
	* gas/mips/r6-64-removed.s: New file.
	* gas/mips/r6-64.s: New file.
	* gas/mips/r6-attr-none-double.d: New file.
	* gas/mips/r6-n32.d: New file.
	* gas/mips/r6-n64.d: New file.
	* gas/mips/r6-removed.l: New file.
	* gas/mips/r6-removed.s: New file.
	* gas/mips/r6.d: New file.
	* gas/mips/r6.s: New file.
	* gas/mips/mipsr6@mips32-dsp.d: New file.
	* gas/mips/mipsr6@mips32-dspr2.d: New file.
	* gas/mips/mipsr6@mips32r2-ill.l: New file.
	* gas/mips/mipsr6@mips32r2-ill.s: New file.
	* gas/mips/cache.s: Add r6 instruction varients.
	* gas/mips/mips.exp: Add support for the mips32r6 and mips64r6
	architectures.  Also prevent non r6 supported tests from running.
	Finally, add in support for running the new r6 tests.
	(run_dump_test_arch): Add support for mipsr6 tests.
	(run_list_test_arch): Add support for using files of the
	form arch@testname.l .

include/elf/
 	* mips.h: Add relocs: R_MIPS_PC21_S2, R_MIPS_PC26_S2, R_MIPS_PC18_S3,
 	R_MIPS_PC19_S2, R_MIPS_PCHI16 and R_MIPS_PCLO16.
 	(E_MIPS_ARCH_32R6): New define.
 	(E_MIPS_ARCH_64R6): New define.

include/opcode/
 	* mips.h (mips_operand_type): Add new entries: OP_SAME_RS_RT,
 	OP_CHECK_PREV and OP_NON_ZERO_REG.  Add descriptions for the MIPS R6
	instruction arguments: -a, -b, -d, -s, -t, -u, -v, -w, -x, -y, -A, -B,
	 +I, +O, +R, +:, +\, +", +;
	(mips_check_prev_operand): New struct.
 	(INSN2_FORBIDDEN_SLOT): New define.
 	(INSN_ISA32R6): New define.
 	(INSN_ISA64R6): New define.
	(INSN_UPTO32R6): New define.
	(INSN_UPTO64R6): New define.
	(mips_isa_table): Add INSN_UPTO32R6 and INSN_UPTO64R6.
 	(ISA_MIPS32R6): New define.
 	(ISA_MIPS64R6): New define.
 	(CPU_MIPS32R6): New define.
 	(CPU_MIPS64R6): New define.
 	(cpu_is_member): Add cases for CPU_MIPS32R6, and CPU_MIPS64R6.

ld/
 	* ldmain.c (get_emulation): Add support for -mips32r6 and -mips64r6.

opcodes/
 	* mips-dis.c (mips_arch_choices): Add entries for mips32r6 and
 	mips64r6.
 	(parse_mips_dis_option): Allow MSA and virtualization support for
 	mips64r6.
 	(mips_print_arg_state): Add fields dest_regno and seen_dest.
 	(mips_seen_register): New function.
 	(print_insn_arg): Refactored code to use mips_seen_register
	function.  Add support for OP_SAME_RS_RT, OP_CHECK_PREV and
	OP_NON_ZERO_REG.  Changed OP_REPEAT_DEST_REG case to print out
	the register rather than aborting.
 	(print_insn_args): Add length argument.  Add code to correctly
	calculate the instruction address for pc relative instructions.
	(validate_insn_args): New static function.
 	(print_insn_mips): Prevent jalx disassembling for r6.  Use
	validate_insn_args.
	(print_insn_micromips): Use validate_insn_args.
	all the arguments are valid.
	* mips-formats.h (PREV_CHECK): New define.
 	* mips-opc.c (decode_mips_operand): Add support for -a, -b, -d, -s,
 	-t, -u, -v, -w, -x, -y, -A, -B, +I, +O, +R, +:, +\, +", +;
 	(RD_pc): New define.
 	(FS): New define.
 	(I37): New define.
 	(I69): New define.
 	(mips_builtin_opcodes): Add MIPS R6 instructions.  Exclude recoded
 	MIPS R6 instructions from MIPS R2 instructions.
2014-09-15 12:15:55 +01:00