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Author SHA1 Message Date
Jozef Lawrynowicz b7dcc42dfd MSP430: Fix simulator execution of RRUX instruction 
The MSP430X RRUX instruction (unsigned right shift) is synthesized as
the RRC (rotate right through carry) instruction, but with the ZC
(zero carry) bit of the opcode extention word set.

Ensure the carry flag is ignored when the ZC bit is set.

sim/msp430/ChangeLog:

2020-01-22  Jozef Lawrynowicz  <jozef.l@mittosystems.com>

	* msp430-sim.c (msp430_step_once): Ignore the carry flag when executing
	an RRC instruction, if the ZC bit of the extension word is set.

sim/testsuite/sim/msp430/ChangeLog:

2020-01-22  Jozef Lawrynowicz  <jozef.l@mittosystems.com>

	* rrux.s: New test.
 2020-01-22 21:52:29 +00:00
Nick Clifton 296ebfbb91 Fix the execution of the MSP430 simulator testsuite. 
ld	* emulparams/msp430elf.sh (RAM_START): Move to 0x500 - above the
	MSP430 hardware multiply address range.
	* scripttempl/elf32msp430.sc (__romdatastart): Define.
	(__romdatacopysize): Define.
	* scripttempl/elf32msp430_3.sc: Likewise.

tests	* testutils.inc (__pass): Use the LMA addresses of the _passmsg
	symbol.
	(__fail): Likewise.
 2016-01-05 16:43:58 +00:00
Mike Frysinger f32d1b7f58 sim: msp430: start a test framework 
The current sim lacks any sort of tests.  Start a basic framework and
add a simple one to test the add insn.
 2014-03-10 23:59:59 -04:00