487565fe48
* configure.tgt: Whiltespace. Sort moxie entry.
2010-02-19 03:36:06 +00:00
cd21e5460f
* bfd/elf32-arm.c (elf32_arm_merge_eabi_attributes): Add support for
...
merging Tag_DIV_use, Tag_MPextension_use, and
Tag_MPextension_use_legacy tags.
* binutils/readelf.c (arm_attr_tag_Advanced_SIMD_arch): Add
description of newly permitted attribute values.
(arm_attr_tag_Virtualization_use): Likewise.
(arm_attr_tag_DIV_use): Add description of new attribute.
(arm_attr_tag_MPextension_use_legacy): Likewise.
* gas/config/tc-arm.c (arm_convert_symbolic_attribute):
Add Tag_DIV_use.
* gas/doc/c-arm.texi: Likewise.
* gas/testsuite/gas/arm/attr-order.d: Fix test for new names for
attribute values.
* include/elf/arm.h (Tag_MPextension_use): Renumber.
(Tag_DIV_use): Add.
(Tag_MPextension_use_legacy): Likewise.
* ld/testsuite/ld-arm/attr-merge-3.attr: Fix test for new attribute
values.
* ld/testsuite/ld-arm/attr-merge-3b.s: Likewise.
* ld/testsuite/ld-arm/attr-merge-unknown-1.d: Fix test now that 42
is a recognised attribute ID.
* ld/testsuite/ld-arm/attr-merge-unknown-1.s: Likewise.
* ld/testsuite/ld-arm/attr-merge-6.attr: New test.
* ld/testsuite/ld-arm/attr-merge-6a.s: Likewise.
* ld/testsuite/ld-arm/attr-merge-6b.s: Likewise.
* ld/testsuite/ld-arm/attr-merge-7.attr: Likewise.
* ld/testsuite/ld-arm/attr-merge-7a.s: Likewise.
* ld/testsuite/ld-arm/attr-merge-7b.s: Likewise.
* ld/testsuite/ld-arm/arm-elf.exp: Run the new tests.
2010-02-18 10:56:28 +00:00
77551a33a8
*** empty log message ***
2010-02-12 20:18:47 +00:00
5be8be5d5d
gas/
...
* config/tc-arm.c (asm_opcode): operands type
change.
(BAD_PC_ADDRESSING): New macro message.
(BAD_PC_WRITEBACK): Likewise.
(MIX_ARM_THUMB_OPERANDS): New macro.
(operand_parse_code): Added enum values.
(parse_operands): Added thumb/arm distinction,
plus new enum values handling.
(encode_arm_addr_mode_2): Validations enhanced.
(encode_arm_addr_mode_3): Likewise.
(do_rm_rd_rn): Likewise.
(encode_thumb32_addr_mode): Likewise.
(do_t_ldrex): Likewise.
(do_t_ldst): Likewise.
(do_t_strex): Likewise.
(md_assemble): Call parse_operands with
a new parameter.
(OPS_1): New macro.
(OPS_2): Likewise.
(OPS_3): Likewise.
(OPS_4): Likewise.
(OPS_5): Likewise.
(OPS_6): Likewise.
(insns): Updated insns operands.
gas/testsuite/
* gas/arm/sp-pc-validations-bad.d: New testcase.
* gas/arm/sp-pc-validations-bad.l: New file.
* gas/arm/sp-pc-validations-bad.s: New file.
* gas/arm/sp-pc-validations-bad-t.d: New testcase.
* gas/arm/sp-pc-validations-bad-t.l: New file.
* gas/arm/sp-pc-validations-bad-t.s: New file.
* gas/arm/sp-pc-usage-t.d: Removed invalid insns.
* gas/arm/sp-pc-usage-t.s: Likewise.
* gas/arm/unpredictable.d: Likewise.
* gas/arm/unpredictable.s: Likewise.
* gas/arm/thumb2_bcond.d: Added test.
* gas/arm/thumb2_bcond.s: Likewise.
2010-02-12 20:15:13 +00:00
9d0e849713
gas/
...
2010-02-12 Tristan Gingold <gingold@adacore.com>
Douglas B Rupp <rupp@gnat.com>
* config/tc-ia64.c (enum reloc_func): Add FUNC_SLOTCOUNT_RELOC.
(DUMMY_RELOC_IA64_SLOTCOUNT): Added.
(pseudo_func): Add an entry for slotcount.
(md_begin): Initialize slotcount pseudo symbol.
(ia64_parse_name): Handle @slotcount parameter.
(ia64_gen_real_reloc_type): Handle slotcount.
(md_apply_fix): Ditto.
* doc/c-ia64.texi (IA-64-Relocs): Document @slotcount.
gas/testsuite/
2010-02-12 Tristan Gingold <gingold@adacore.com>
* gas/ia64/slotcount.s, gas/ia64/slotcount.s: New test.
* gas/ia64/ia64.exp: Add slotcount test (vms only).
2010-02-12 14:34:45 +00:00
6fa78d941b
2010-02-11 Sterling Augustine <sterling@jaw.hq.tensilica.com>
...
* config/tc-xtensa.c (istack_init): Don't call memset.
2010-02-11 19:08:09 +00:00
e716010d3e
Fix as obvious a merge error
2010-02-11 19:01:17 +00:00
a89c407e4b
2010-02-11 Sterling Augustine <sterling@tensilica.com>
...
* config/tc-xtensa.c (cache_literal_section): Handle prefixes as
well as suffixes.
2010-02-11 19:00:21 +00:00
24981e7b95
Reformat build_modrm_byte.
...
2010-02-11 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (build_modrm_byte): Reformat.
2010-02-11 14:02:50 +00:00
c75ef631bd
Update copyright.
...
gas/
2010-02-11 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c: Update copyright.
opcodes/
2010-02-11 H.J. Lu <hongjiu.lu@intel.com>
* i386-dis.c: Update copyright.
* i386-gen.c: Likewise.
* i386-opc.h: Likewise.
* i386-opc.tbl: Likewise.
2010-02-11 13:41:19 +00:00
a683cc34e4
2010-02-10 Quentin Neill <quentin.neill@amd.com>
...
Sebastian Pop <sebastian.pop@amd.com>
gas:
* config/tc-i386.c (vec_imm4) New operand type.
(fits_in_imm4): New.
(VEX_check_operands): New.
(check_reverse): Call VEX_check_operands.
(build_modrm_byte): Reintroduce code for 5
operand insns. Fix whitespace.
gas/testsuite:
* gas/i386/x86-64-xop.d: Add vpermil2p[sd] tests.
* gas/i386/x86-64-xop.s: Likewise.
* gas/i386/xop.d: Likewise.
* gas/i386/xop.s: Likewise.
opcodes:
* i386-dis.c (OP_EX_VexImmW): Reintroduced
function to handle 5th imm8 operand.
(PREFIX_VEX_3A48): Added.
(PREFIX_VEX_3A49): Added.
(VEX_W_3A48_P_2): Added.
(VEX_W_3A49_P_2): Added.
(prefix table): Added entries for PREFIX_VEX_3A48
and PREFIX_VEX_3A49.
(vex table): Added entries for VEX_W_3A48_P_2 and
and VEX_W_3A49_P_2.
* i386-gen.c (operand_type_init): Added OPERAND_TYPE_VEC_IMM4
for Vec_Imm4 operands.
* i386-opc.h (enum): Added Vec_Imm4.
(i386_operand_type): Added vec_imm4.
* i386-opc.tbl: Add entries for vpermilp[ds].
* i386-init.h: Regenerated.
* i386-tbl.h: Regenerated.
2010-02-11 05:06:14 +00:00
3c83b96e24
2010-02-10 Sterling Augustine <sterling@tensilica.com>
...
* config/tc-xtensa.c (xtensa_find_unaligned_loops): Rewrite.
2010-02-10 20:18:14 +00:00
cdc51b0748
gas/
...
* config/tc-ppc.c (md_show_usage): Add -mpwr4, -mpwr5, -mpwr5x,
-mpwr6 and -mpwr7.
opcodes/
* ppc-dis.c (ppc_opts): Add "pwr4", "pwr5", "pwr5x", "pwr6"
and "pwr7". Move "a2" into alphabetical order.
2010-02-10 19:59:07 +00:00
3a1e9c4a2d
2010-02-09 Sterling Augustine <sterling@tensilica.com>
...
* config/tc-xtensa.c (RELAXED_LOOP_INSN_BYTES): New.
(next_frag_pre_opcode_bytes): Use RELAXED_LOOP_INSN_BYTES.
(xtensa_mark_zcl_first_insns): Rewrite to handle corner case.
2010-02-09 19:36:50 +00:00
486499d044
2010-02-08 Christophe Lyon <christophe.lyon@st.com>
...
gas/
* config/tc-arm.c (md_pcrel_from_section): Keep base to zero for
non-local branches (BFD_RELOC_THUMB_PCREL_BRANCH23,
BFD_RELOC_THUMB_PCREL_BLX, BFD_RELOC_ARM_PCREL_BLX,
BFD_RELOC_ARM_PCREL_CALL)
gas/testsuite/
* gas/arm/branch-reloc.s, gas/arm/branch-reloc.d,
gas/arm/branch-reloc.l: New tests and expected results with all
variants of call: ARM/Thumb, local/global, inter/intra-section,
using BL/BLX.
2010-02-09 14:44:50 +00:00
19ef5f3d6d
2010-02-08 Sterling Augustine <sterling@tensilica.com>
...
* config/tc-xtensa.c (frag_format_size): Generalize logic to
handle more instruction sizes and fetch widths.
(branch_align_power): Likewise.
(text_align_power): Likewise.
(bytes_to_stretch): Likewise.
2010-02-08 18:45:05 +00:00
bb7c70edcc
* objdump.c (disassemble_bytes): Clear aux->reloc before printing
...
a new address, so as not to reuse a previous, non-related reloc.
* gas/arm/arm-it-auto.d, gas/arm/bl-local-v4t.d,
gas/arm/blx-local.d, gas/arm/thumb-w-good.d: Update expected
results.
2010-02-08 14:33:22 +00:00
ce3d2015b2
include/
...
* opcode/ppc.h (PPC_OPCODE_TITAN): Define.
bfd/
* archures.c (bfd_mach_ppc_titan): Define.
* bfd-in2.h: Regenerate.
* cpu-powerpc.c (bfd_powerpc_archs): Add titan entry.
opcodes/
* ppc-dis.c (ppc_opts): Add titan entry.
* ppc-opc.c (TITAN, MULHW): Define.
(powerpc_opcodes): Support AppliedMicro Titan core (APM83xxx).
gas/
* config/tc-ppc.c (md_show_usage): Mention -mtitan. Don't use tabs.
(ppc_mach): Handle titan.
* doc/c-ppc.texi: Mention -mtitan.
gas/testsuite/
* gas/ppc/titan.d, * gas/ppc/titan.s: New test.
* gas/ppc/ppc.exp: Run it.
2010-02-08 01:59:38 +00:00
1beeb6866d
10-02-05 Sterling Augustine <sterling@tensilica.com>
...
* config/tc-xtensa.c (UNREACHABLE_MAX_WIDTH): Delete and
replace with...
(xtensa_fetch_width) ...this.
2010-02-05 18:52:27 +00:00
1e4cb85751
* Makefile.am (CPU_TYPES, OBJ_FORMATS, CPU_OBJ_VALID,
...
MULTI_CPU_TYPES, MULTI_CPU_OBJ_VALID): Remove.
* Makefile.in: Regenerate.
2010-02-05 12:43:09 +00:00
68339fdf88
2010-02-03 Quentin Neill <quentin.neill@amd.com>
...
gas/
* config/tc-i386.c (cpu_arch): Change amdfam15 to bdver1.
(i386_align_code): Rename PROCESSOR_AMDFAM15 to PROCESSOR_BDVER1.
* config/tc-i386.h (processor_type): Same.
* doc/c-i386.texi: Change amdfam15 to bdver1.
opcodes/
* i386-gen.c (cpu_flag_init): Rename CPU_AMDFAM15_FLAGS
to CPU_BDVER1_FLAGS
* i386-init.h: Regenerated.
testsuite/
* gas/i386/i386.exp: Rename amdfam15 test cases to bdver1.
* gas/i386/x86-64-nops-1-amdfam15.d: Renamed test case to
gas/i386/x86-64-nops-1-bdver1.d.
* gas/i386/nops-1-amdfam15.d: Renamed test case to
gas/i386/nops-1-bdver1.d.
2010-02-03 20:36:14 +00:00
b0e28b39b7
gas/testsuite/
...
* gas/arm/dis-data.d: Update test name. Do not expect
.word output.
* gas/arm/dis-data2.d, gas/arm/dis-data2.s,
gas/arm/dis-data3.d, gas/arm/dis-data3.s: New tests.
opcodes/
* opcodes/arm-dis.c (struct arm_private_data): New.
(print_insn_coprocessor, print_insn_arm): Update to use struct
arm_private_data.
(is_mapping_symbol, get_map_sym_type): New functions.
(get_sym_code_type): Check the symbol's section. Do not check
mapping symbols.
(print_insn): Default to disassembling ARM mode code. Check
for mapping symbols separately from other symbols. Use
struct arm_private_data.
2010-01-29 16:47:55 +00:00
99b253c514
PR 11136
...
* config/tc-arm.c (neon_check_type): Handle a neon_shape value of
NS_NULL.
* gas/arm/neon-omit.s: Add instruction that causes crash.
* gas/arm/neon-omit.d: Add expected disassembly.
2010-01-29 16:02:41 +00:00
09be49c9dd
* gas/pe/section-align-1.d: Don't test section flags.
...
* gas/pe/section-align-2.d: Likewise.
2010-01-28 19:00:03 +00:00
1c4809636b
Allow VL=1 on scalar FMA instructions.
...
gas/testsuite/
2010-01-28 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/fma-scalar-intel.d: New.
* gas/i386/fma-scalar.d: Likewise.
* gas/i386/fma-scalar.s: Likewise.
* gas/i386/x86-64-fma-scalar-intel.d: Likewise.
* gas/i386/x86-64-fma-scalar.d: Likewise.
* gas/i386/x86-64-fma-scalar.s: Likewise.
* gas/i386/i386.exp: Run fma-scalar, fma-scalar-intel,
x86-64-fma-scalar and x86-64-fma-scalar-intel.
opcodes/
2010-01-28 H.J. Lu <hongjiu.lu@intel.com>
* i386-dis.c (EXVexWdqScalar): New.
(vex_scalar_w_dq_mode): Likewise.
(prefix_table): Update entries for PREFIX_VEX_3899,
PREFIX_VEX_389B, PREFIX_VEX_389D, PREFIX_VEX_389F,
PREFIX_VEX_38A9, PREFIX_VEX_38AB, PREFIX_VEX_38AD,
PREFIX_VEX_38AF, PREFIX_VEX_38B9, PREFIX_VEX_38BB,
PREFIX_VEX_38BD and PREFIX_VEX_38BF.
(intel_operand_size): Handle vex_scalar_w_dq_mode.
(OP_EX): Likewise.
2010-01-28 15:33:23 +00:00
70ecb3842d
PR 11225
...
* objdump.c (only): Replace with linked list.
(only_size, only_used): Replace with only_list.
(process_section_p): Set seen field on matches sections.
(add_only): New function.
(free_only_list): New function.
(disassemble_section): Check only_list.
(main): Use add_only and free_only_list.
* gas/pe/aligncomm-c.d: Dump all sections.
* ld-sh/refdbg-0-dso.d: Dump all sections.
2010-01-28 15:25:20 +00:00
31907d5e90
gas/ChangeLog:
...
* NEWS: Mention new feature.
* config/obj-coff.c (obj_coff_section): Accept digits and use
to override default section alignment power if specified.
* doc/as.texinfo (.section directive): Update documentation.
gas/testsuite/ChangeLog:
* gas/pe/section-align-1.s: New test source file.
* gas/pe/section-align-1.d: Likewise control script.
* gas/pe/section-align-2.s: Likewise ...
* gas/pe/section-align-2.d: ... and likewise.
* gas/pe/pe.exp: Invoke new testcases.
2010-01-27 22:01:38 +00:00
539f890d01
Allow VL=1 on AVX scalar instructions.
...
gas/
2010-01-27 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (avxscalar): New.
(OPTION_MAVXSCALAR): Likewise.
(build_vex_prefix): Select vector_length for scalar instructions
based on avxscalar.
(md_longopts): Add OPTION_MAVXSCALAR.
(md_parse_option): Handle OPTION_MAVXSCALAR.
(md_show_usage): Add -mavxscalar=.
* doc/c-i386.texi: Document -mavxscalar=.
gas/testsuite/
2010-01-27 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/avx-scalar-intel.d: New.
* gas/i386/avx-scalar.d: Likewise.
* gas/i386/avx-scalar.s: Likewise.
* gas/i386/x86-64-avx-scalar-intel.d: Likewise.
* gas/i386/x86-64-avx-scalar.d: Likewise.
* gas/i386/x86-64-avx-scalar.s: Likewise.
* gas/i386/i386.exp: Run avx-scalar, avx-scalar-intel,
x86-64-avx-scalar and x86-64-avx-scalar-intel.
opcodes/
2010-01-27 H.J. Lu <hongjiu.lu@intel.com>
* i386-dis.c (XMScalar): New.
(EXdScalar): Likewise.
(EXqScalar): Likewise.
(EXqScalarS): Likewise.
(VexScalar): Likewise.
(EXdVexScalarS): Likewise.
(EXqVexScalarS): Likewise.
(XMVexScalar): Likewise.
(scalar_mode): Likewise.
(d_scalar_mode): Likewise.
(d_scalar_swap_mode): Likewise.
(q_scalar_mode): Likewise.
(q_scalar_swap_mode): Likewise.
(vex_scalar_mode): Likewise.
(vex_len_table): Duplcate entries for VEX_LEN_10_P_1,
VEX_LEN_10_P_3, VEX_LEN_11_P_1, VEX_LEN_11_P_3, VEX_LEN_2A_P_1,
VEX_LEN_2A_P_3, VEX_LEN_2C_P_3, VEX_LEN_2D_P_1, VEX_LEN_2E_P_0,
VEX_LEN_2E_P_2, VEX_LEN_2F_P_2, VEX_LEN_51_P_1, VEX_LEN_51_P_3,
VEX_LEN_52_P_1, VEX_LEN_53_P_1, VEX_LEN_58_P_1, VEX_LEN_58_P_3,
VEX_LEN_59_P_1, VEX_LEN_5A_P_1, VEX_LEN_5A_P_3, VEX_LEN_5C_P_1,
VEX_LEN_5C_P_3, VEX_LEN_5D_P_1, VEX_LEN_5D_P_3, VEX_LEN_5E_P_1,
VEX_LEN_5E_P_3, VEX_LEN_5F_P_1, VEX_LEN_5F_P_3, VEX_LEN_6E_P_2,
VEX_LEN_7E_P_1, VEX_LEN_7E_P_2, VEX_LEN_D6_P_2, VEX_LEN_C2_P_1,
VEX_LEN_C2_P_3, VEX_LEN_3A0A_P_2 and VEX_LEN_3A0B_P_2.
(vex_w_table): Update entries for VEX_W_10_P_1, VEX_W_10_P_3,
VEX_W_11_P_1, VEX_W_11_P_3, VEX_W_2E_P_0, VEX_W_2E_P_2,
VEX_W_2F_P_0, VEX_W_2F_P_2, VEX_W_51_P_1, VEX_W_51_P_3,
VEX_W_52_P_1, VEX_W_53_P_1, VEX_W_58_P_1, VEX_W_58_P_3,
VEX_W_59_P_1, VEX_W_59_P_3, VEX_W_5A_P_1, VEX_W_5A_P_3,
VEX_W_5C_P_1, VEX_W_5C_P_3, VEX_W_5D_P_1, VEX_W_5D_P_3,
VEX_W_5E_P_1, VEX_W_5E_P_3, VEX_W_5F_P_1, VEX_W_5F_P_3,
VEX_W_7E_P_1, VEX_W_D6_P_2 VEX_W_C2_P_1, VEX_W_C2_P_3,
VEX_W_3A0A_P_2 and VEX_W_3A0B_P_2.
(intel_operand_size): Handle d_scalar_mode, d_scalar_swap_mode,
q_scalar_mode, q_scalar_swap_mode.
(OP_XMM): Handle scalar_mode.
(OP_EX): Handle d_scalar_mode, d_scalar_swap_mode, q_scalar_mode
and q_scalar_swap_mode.
(OP_VEX): Handle vex_scalar_mode.
2010-01-27 14:34:40 +00:00
80de6e001d
Set the first 3byte VEX prefix individually.
...
2010-01-24 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (build_vex_prefix): Set i.vex.bytes[0] to
0xc4 individually.
2010-01-24 15:44:05 +00:00
caca49762b
Add more AVX tests.
...
2010-01-23 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/avx.s: Add more tests.
* gas/i386/x86-64-avx.s: Likewise.
* gas/i386/avx-intel.d: Updated.
* gas/i386/avx.d: Likewise.
* gas/i386/x86-64-avx-intel.d: Likewise.
* gas/i386/x86-64-avx.d: Likewise.
2010-01-23 18:04:05 +00:00
c865e45b1b
bfd/
...
* coff-rs6000.c (xcoff_howto_table): Change size to 0 and bitsize to 1.
(_bfd_xcoff_reloc_type_lookup): Handle BFD_RELOC_NONE.
* coff64-rs6000.c (xcoff64_howto_table): Change size to 0 and
bitsize to 1.
(xcoff64_reloc_type_lookup): Handle BFD_RELOC_NONE.
gas/
* write.h (fix_at_start): Declare.
* write.c (fix_new_internal): Add at_beginning parameter.
Use it instead of REVERSE_SORT_RELOCS. Fix the handling of
seg_fix_tailP for the at_beginning/REVERSE_SORT_RELOCS case.
(fix_new, fix_new_exp): Update accordingly.
(fix_at_start): New function.
* config/tc-ppc.c (md_pseudo_table): Add .ref to the OBJ_XCOFF section.
(ppc_ref): New function, for OBJ_XCOFF.
(md_apply_fix): Handle BFD_RELOC_NONE for OBJ_XCOFF.
* config/te-i386aix.h (REVERSE_SORT_RELOCS): Remove #undef.
gas/testsuite/
* gas/ppc/xcoff-ref-1.s, gas/ppc/xcoff-ref-1.l: New test.
* gas/ppc/aix.exp: Run it.
ld/testsuite/
* ld-powerpc/aix-ref-1-32.od, ld-powerpc/aix-ref-1-64.od,
ld-powerpc/aix-ref-1.s: New tests.
* ld-powerpc/aix52.exp: Run them.
2010-01-23 12:05:33 +00:00
53e5c8fee6
* config/te-solaris.h (DWARF2_EH_FRAME_READ_ONLY): Make read-only
...
on 64-bit Solaris/x86.
Include obj-format.h earlier.
2010-01-21 20:58:34 +00:00
706e820514
Correct month.
2010-01-21 17:32:32 +00:00
73bb672904
Add xsave64 and xrstor64.
...
gas/testsuite/
2010-02-21 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/x86-64-xsave.s: Add tests for xsave64 and xrstor64.
* gas/i386/x86-64-xsave-intel.d: Updated.
* gas/i386/x86-64-xsave.d: Likewise.
opcodes/
2010-02-21 H.J. Lu <hongjiu.lu@intel.com>
* i386-dis.c (mod_table): Use FXSAVE on xsave and xrstor.
* i386-opc.tbl: Add xsave64 and xrstor64.
* i386-tbl.h: Regenerated.
2010-01-21 17:30:14 +00:00
55786da2bf
2010-01-21 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
...
* readelf.c (get_machine_flags): Handle EF_S390_HIGH_GPRS.
2010-01-21 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
* s390.h (EF_S390_HIGH_GPRS): Added macro definition.
2010-01-21 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
* config/tc-s390.c (s390_elf_final_processing): New function.
* config/tc-s390.h (elf_tc_final_processing): New macro definition.
(s390_elf_final_processing): Added prototype.
2010-01-21 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
* elf32-s390.c (elf32_s390_merge_private_bfd_data): New function.
(bfd_elf32_bfd_merge_private_bfd_data): New macro definition.
2010-01-21 11:40:28 +00:00
760f3a89bc
Add changelog entries for PR 11109. Patch itself was accidentally committed earlier.
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Remove Spurious whitespace in ChangeLog-2009.
2010-01-20 11:21:37 +00:00
37a1f2771f
2010-01-18 Tristan Gingold <gingold@adacore.com>
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* config/tc-ia64.c (ia64_vms_note): Generate 24 bytes note headers.
2010-01-19 09:14:54 +00:00
a6461c0251
2010-01-15 Sebastian Pop <sebastian.pop@amd.com>
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gas/
* config/tc-i386.c (md_assemble): Before accessing the IMM field
check that it's not an XOP insn.
gas/testsuite/
* gas/i386/x86-64-xop.d: Add missing patterns.
* gas/i386/x86-64-xop.s: Same.
* gas/i386/xop.d: Same.
* gas/i386/xop.s: Same.
opcodes/
* i386-opc.tbl: Support all the possible aliases for VPCOM* insns.
* i386-tbl.h: Regenerated.
2010-01-15 21:24:13 +00:00
62fb9fe1fc
* config/bfin-aux.h: Remove argument names in function
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declarations.
* config/bfin-lex.l (parse_int): Fix shadowed variable name
warning.
* config/bfin-parse.y (value_match): Remove argument names
in declaration.
(notethat): Likewise.
(yyerror): Likewise.
2010-01-14 04:52:57 +00:00
43579b2591
gas/testsuite/
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* gas/arm/thumb-nop.s: Add .syntax unified.
2010-01-13 19:07:31 +00:00
afa62d5e34
gas/
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* config/tc-arm.c (do_t_nop): Correct check for Thumb-2 NOP.
gas/testsuite/
* gas/arm/thumb-nop.d, gas/arm/thumb-nop.s: New test.
* gas/arm/relax_branch_align.d: Expect a default NOP instruction.
* gas/arm/vfp1_t2.d, gas/arm/vfp1xD_t2.d: Specify a CPU with
Thumb-2.
ld/testsuite/
* ld-arm/arm-elf.exp (armelftests): Assemble Cortex-A8 tests with
-mcpu=cortex-a8.
2010-01-13 19:01:10 +00:00
52b010e442
* config/tc-h8300.c (h8300_elf_section): New function - issue a
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warning message if a new section is created without setting any
attributes for it.
(md_pseudo_table): Intercept section creation pseudos.
(md_pcrel_from): Replace abort with an error message.
* config/obj-elf.c (obj_elf_section_name): Export this function.
* config/obj-elf.h (obj_elf_section_name): Prototype.
* gas/elf/section0.d: Skip this test for the h8300.
* gas/elf/section1.d: Likewise.
* gas/elf/section6.d: Likewise.
* gas/elf/elf.exp: Skip section2 and section5 tests when the
target is the h8300.
* ld-scrips/sort.exp: Skip these tests when the target is the
h8300.
2010-01-13 14:08:54 +00:00
cc761f759c
PR 11122
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* listing.c (print_source): Add one to line number.
2010-01-12 01:10:55 +00:00
3725885a65
Sync Libtool from GCC.
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/:
* libtool.m4: Sync from git Libtool.
* ltmain.sh: Likewise.
* ltoptions.m4: Likewise.
* ltversion.m4: Likewise.
* lt~obsolete.m4: Likewise.
sim/iq2000/:
* configure: Regenerate.
sim/d10v/:
* configure: Regenerate.
sim/m32r/:
* configure: Regenerate.
sim/frv/:
* configure: Regenerate.
sim/:
* avr/configure: Regenerate.
* cris/configure: Regenerate.
* microblaze/configure: Regenerate.
sim/h8300/:
* configure: Regenerate.
sim/mn10300/:
* configure: Regenerate.
sim/erc32/:
* configure: Regenerate.
sim/arm/:
* configure: Regenerate.
sim/m68hc11/:
* configure: Regenerate.
sim/lm32/:
* configure: Regenerate.
sim/sh64/:
* configure: Regenerate.
sim/v850/:
* configure: Regenerate.
sim/cr16/:
* configure: Regenerate.
sim/moxie/:
* configure: Regenerate.
sim/m32c/:
* configure: Regenerate.
sim/mips/:
* configure: Regenerate.
sim/mcore/:
* configure: Regenerate.
sim/sh/:
* configure: Regenerate.
gprof/:
* Makefile.in: Regenerate.
* configure: Regenerate.
opcodes/:
* Makefile.in: Regenerate.
* configure: Regenerate.
gas/:
* Makefile.in: Regenerate.
* configure: Regenerate.
* doc/Makefile.in: Regenerate.
ld/:
* configure: Regenerate.
gdb/testsuite/:
* gdb.cell/configure: Regenerate.
binutils/:
* Makefile.in: Regenerate.
* configure: Regenerate.
* doc/Makefile.in: Regenerate.
bfd/:
* Makefile.in: Regenerate.
* configure: Regenerate.
bfd/doc/:
* Makefile.in: Regenerate.
2010-01-09 21:11:44 +00:00
5256a5b03f
Change to "Copyright 2010".
2010-01-08 19:40:08 +00:00
69dd98654a
2010-01-06 Quentin Neill <quentin.neill@amd.com>
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gas/
* config/tc-i386.c (cpu_arch): Add amdfam15.
(i386_align_code): Add PROCESSOR_AMDFAM15 cases.
* config/tc-i386.h (processor_type): Add PROCESSOR_AMDFAM15.
* doc/c-i386.texi: Add amdfam15.
opcodes/
* i386-gen.c (cpu_flag_init): Add new CPU_AMDFAM15_FLAGS.
* i386-init.h: Regenerated.
testsuite/
* gas/i386/i386.exp: Add new amdfam15 test cases.
* gas/i386/nops-1-amdfam15.d: New.
2010-01-06 22:52:47 +00:00
e3e535bc58
* arm-dis.c (print_insn): Fixed search for next
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symbol and data dumping condition, and the
initial mapping symbol state.
* gas/arm/dis-data.d: New test case.
* gas/arm/dis-data.s: New file.
2010-01-06 15:02:45 +00:00
4316f0d240
2010-01-04 Daniel Gutson <dgutson@codesourcery.com>
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gas/
* config/tc-arm.c (do_neon_logic): Accept imm value
in the third operand too.
(operand_parse_code): OP_RNDQ_IMVNb renamed to
OP_RNDQ_Ibig.
(parse_operands): OP_NILO case removed, applied renaming.
(insns): Neon shape changed for some logic instructions.
gas/testsuite/
* gas/arm/neon-logic.d: New test case.
* gas/arm/neon-logic.s: New file.
2010-01-04 23:31:04 +00:00
b1a769ed35
2010-01-04 Daniel Gutson <dgutson@codesourcery.com>
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gas/
* config/tc-arm.c (do_neon_ldx_stx): Added
validation for vector load/store insns.
gas/testsuite/
* gas/arm/neon-addressing-bad.d: New test case.
* gas/arm/neon-addressing-bad.s: New file.
* gas/arm/neon-addressing-bad.l: New file.
2010-01-04 22:19:03 +00:00
0dc9305793
bfd/
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* archures.c: Add bfd_mach_ppc_e500mc64.
* bfd-in2.h: Regenerate.
* cpu-powerpc.c (bfd_powerpc_archs): Add entry for
bfd_mach_ppc_e500mc64.
gas/
* config/tc-ppc.c (md_show_usage): Document -me500mc64.
opcodes/
* ppc-dis.c (ppc_opts): Add entry for "e500mc64".
2010-01-04 02:32:56 +00:00
Alan Modra
Matthew Gretton-Dann
Daniel Gutson
Tristan Gingold
Sterling Augustine
H.J. Lu
Sebastian Pop
Richard Sandiford
Christophe Lyon
Nick Clifton
Joseph Myers
Daniel Jacobowitz
Dave Korn
Rainer Orth
Andreas Krebbel
Jie Zhang
Ralf Wildenhues