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Author SHA1 Message Date
Alexandre Oliva
c76b4bab30 2000-08-07 Graham Stott <grahams@cygnus.co.uk> 
* am33-2.igen (fmadd, fmsub, fmnadd, fmnsub): Correct typo.
2000-05-29  Alexandre Oliva  <aoliva@cygnus.com>
* interp.c (fpu_disabled_exception, fpu_unimp_exception,
fpu_check_signal_exception): Take additional state arguments.
Print exception type and call program_interrupt.  Adjust callers.
(fpu_rsqrt, fpu_cmp, fpu_add, fpu_sub, fpu_mul, fpu_div,
fpu_fmadd, fpu_fmsub, fpu_fnmadd, fpu_fnmsub): Take additional
arguments.
* mn10300_sim.h (fpu_disabled_exception, fpu_unimp_exception,
fpu_check_signal_exception): Adjust prototypes.
(fpu_rsqrt, fpu_cmp, fpu_add, fpu_sub, fpu_mul, fpu_div,
fpu_fmadd, fpu_fmsub, fpu_fnmadd, fpu_fnmsub): Likewise.
* am33-2.igen: Adjust calls.
2000-05-19  Alexandre Oliva  <aoliva@cygnus.com>
* op_utils.c (cmp2fcc): Moved...
* interp.c: ... here.
2000-05-18  Alexandre Oliva  <aoliva@cygnus.com>
* am33-2.igen: Use `unsigned32', `signed32', `unsigned64' or
`signed64' where type width is relevant.
2000-05-15  Alexandre Oliva  <aoliva@cygnus.com>
* mn10300_sim.h: Include sim-fpu.h.
(FD2FPU, FPU2FD): Enclose the FD argument in parentheses.
(fpu_check_signal_exception): Declare.
(struct fp_prec_t, fp_single_prec, fp_double_prec): Likewise.
(FP_SINGLE, FP_DOUBLE): Shorthands for fp_*_prec.
(fpu_rsqrt, fpu_cmp, fpu_add, fpu_sub, fpu_mul, fpu_div,
fpu_fmadd, fpu_fmsub, fpu_fnmadd, fpu_fnmsub): Declare.
* interp.c (fpu_disabled_exception): Document.
(fpu_unimp_exception): Likewise.
(fpu_check_signal_exception): Define.
(reg2val_32, round_32, val2reg_32, fp_single_prec): Likewise.
(reg2val_64, round_64, val2reg_64, fp_double_prec): Likewise.
(REG2VAL, ROUND, VAL2REG): Define shorthands.
(fpu_status_ok): Define.
(fpu_rsqrt, fpu_cmp, fpu_add, fpu_sub, fpu_mul, fpu_div,
fpu_fmadd, fpu_fmsub, fpu_fnmadd, fpu_fnmsub): Define.
* am33-2.igen (frsqrt, fcmp, fadd, fsub, fmul, fdiv,
fmadd, fmsub, fnmadd, fnmsub): Use new functions.
2000-04-27  Alexandre Oliva  <aoliva@cygnus.com>
* interp.c (sim_create_inferior): Set PSW bit to enable FP insns
if architecture is AM33/2.0.
* am33.igen: Include am33-2.igen.
2000-04-23  Alexandre Oliva  <aoliva@cygnus.com>
* mn10300.igen (movm, call, ret, retf): Check for am33_2 too.
* am33.igen (movm): Likewise.
2000-04-19  Alexandre Oliva  <aoliva@cygnus.com>
* am33.igen: Added `*am33_2' to some instructions that were
missing it.
2000-04-07  Alexandre Oliva  <aoliva@cygnus.com>
* am33-2.igen: New file.  All insns implemented, but FP flags are
only set for fcmp, exceptional conditions are not handled yet.
* Makefile.in (IGEN_INSN): Added am33-2.igen.
(tmp-igen): Added -M am33_2.
* mn10300.igen, am33.igen: Added `*am33_2' to all insns.
* gencode.c: Support FMT_D3.
* mn10300_sim.h (dword): New type.
(struct _state): Added fpregs.
(REG_FPCR, FPCR): New define.  All assorted bitmaps.
(XS2FS, AS2FS, Xf2FD): New macros.
(FS2FPU, FD2FPU, FPU2FS, FPU2FD): Likewise.
(load_dword, store_dword): New functions or macros.
(u642dw, dw2u64): New functions.
(fpu_disabled_exception, fpu_unimp_exception): Declared.
* interp.c (fpu_disabled_exception): Defined; no actual
implementation.
(fpu_unimp_exception): Likewise.
* op_utils.c (cmp2fcc): New function.
 2004-06-26 22:18:18 +00:00
Alexandre Oliva
489503ee33 * interp.c, mn10300_sim.h, op_utils.c: Convert function prototypes 
and definitions to ISO C.
 2004-06-26 21:53:47 +00:00
Alexandre Oliva
622c89b6e6 * gencode.c, simops.c: Delete. 
* Makefile.in: Remove non-COMMON dependencies and commands.
 2004-06-26 21:44:56 +00:00
Alexandre Oliva
599e0b9e0d * configure.in: Use common simulator always. Don't subst sim_gen 
nor mn10300_common.
* configure: Rebuilt.
* Makefile.in (WITHOUT_COMMON_OBJS, WITHOUT_COMMON_INTERP_DEP,
WITHOUT_COMMON_RUN_OBJS): Remove.
(WITH_COMMON_OBJS): Rename to MN10300_OBJS.
(WITH_COMMON_INTERP_DEP): Rename to MN10300_INTERP_DEP.
(WITH_COMMON_RUN_OBJS): Rename to SIM_RUN_OBJS.
(SIM_EXTRA_CFLAGS): Don't use @sim_gen@.
* interp.c: Remove non-common bits.
* mn10300_sim.h: Likewise.
 2004-06-26 18:45:53 +00:00
Chris Demetriou
139181c8d6 2004-06-25 Chris Demetriou <cgd@broadcom.com> 
* configure.in (sim_m16_machine): Include mipsIII.
        * configure: Regenerate.
 2004-06-25 18:35:18 +00:00
Joern Rennecke
594ee3a79f 2004-06-25 J"orn Rennecke <joern.rennecke@superh.com> 
include/gdb:
	* callback.h (host_callback_struct): Replace members fdopen and
        alwaysopen with fd_buddy.
sim/common:
	* callback.c: Changed all users.
 2004-06-25 16:48:03 +00:00
Alexandre Oliva
eaabf82046 2004-06-17 Alexandre Oliva <aoliva@redhat.com> 
* band.s, biand.s: imm3_abs16 is not available on h8300h.
* bset.s: Likewise.  Ditto for rn_abs32.
 2004-06-24 21:08:11 +00:00
Alan Modra
dcb74f961a * hw_htab.c (htab_sum_binary(bfd): Use bfd_get_section_size 
instead of bfd_get_section_size_before_reloc.
	(htab_dma_binary(bfd): Likewise.
	* hw_init.c (update_for_binary_section(bfd): Likewise.
 2004-06-15 01:08:57 +00:00
Alan Modra
84b11e2eb5 * interp.c (sim_prepare_for_program): Use bfd_get_section_size 
instead of bfd_get_section_size_before_reloc.
 2004-06-15 01:08:34 +00:00
Alan Modra
5f510f9ca0 * sim-load.c (sim_load_file): Use bfd_get_section_size 
instead of bfd_get_section_size_before_reloc.
 2004-06-15 01:08:00 +00:00
Andrew Cagney
3973a7d36d ChangeLog editorial fixes. 2004-06-14 22:52:52 +00:00
Michael Snyder
d6fd015d6e 2004-06-10 Michael Snyder <msnyder@redhat.com> 
Patch submitted by Nitin Yewale <NitinY@KPITCummins.com>.
        * compile.c (sim_resume): Corrected ANDC operation on EXR for H8S.
 2004-06-10 20:22:17 +00:00
Daniel Jacobowitz
7659f80a23 * dv-glue.c (hw_glue_finish): Cast result of sizeof to long before 
passing it to printf.
 2004-05-18 21:20:07 +00:00
Daniel Jacobowitz
4d06b60c7f * Makefile.in (stamp-xmloop, stamp-2mloop): Use -outfile-suffix. 2004-05-18 21:19:53 +00:00
Ben Elliston
bc81a370c5 * lib/sim-defs.exp: Remove stray semicolons. 2004-05-12 03:34:26 +00:00
Chris Demetriou
1a27f959ea 2004-05-11 Maciej W. Rozycki <macro@ds2.pg.gda.pl> 
* mips/interp.c (decode_coproc): Sign-extend the address retrieved
        from COP0_BADVADDR.
        * mips/sim-main.h (COP0_BADVADDR): Remove a cast.
 2004-05-12 01:42:33 +00:00
Daniel Jacobowitz
3e5e53f9b0 * configure.in (sim_fpu_cflags): Add -I../common. 
* configure: Regenerated.
 2004-05-11 02:21:58 +00:00
Daniel Jacobowitz
41ee5402be * callback.c: Update copyright dates. 
* run.c: Likewise.
	* sim-basics.h: Likewise.
	* sim-load.c: Likewise.
	* syscall.c: Likewise.
From Maciej W. Rozycki  <macro@ds2.pg.gda.pl>
	* callback.c: Include cconfig.h instead of config.h.
	* run.c: Likewise.
	* sim-basics.h: Likewise.
	* sim-load.c: Likewise.
	* syscall.c: Likewise.
 2004-05-10 16:18:03 +00:00
Chris Demetriou
adad0f8a2b 2004-04-11 Chris Demetriou <cgd@broadcom.com> 
* utils-fpu.inc (enable_fpu, ckm_fp_cc): New macros.
        (clrset_fp_cc): Fix mask used for upper 7 condition codes.
        * utils-mdmx.inc: Include utils-fpu.inc.
        (enable_mdmx): Use enable_fpu.
 2004-04-11 07:12:13 +00:00
Chris Demetriou
cdc89eb2c3 2004-04-10 Chris Demetriou <cgd@broadcom.com> 
* utils-fpu.inc: New file.
        * utils-mdmx.inc: New file.
        * mdmx-ob.s: New file.
        * mdmx-ob-sb1.s: New file.
        * basic.exp: Run new mdmx-ob and mdmx-ob-sb1 tests.
 2004-04-11 06:28:08 +00:00
Chris Demetriou
5dbb7b5a1d im/mips/ChangeLog ] 
2004-04-10  Chris Demetriou  <cgd@broadcom.com>

        * sb1.igen (DIV.PS, RECIP.PS, RSQRT.PS, SQRT.PS): New.

[ sim/testsuite/sim/mips/ChangeLog ]
2004-04-10  Chris Demetriou  <cgd@broadcom.com>

        * fpu64-ps-sb1.s: New file.
        * basic.exp: Recognize mipsisa64sb1 targets, and run fpu64-ps-sb1.s
        if appropriate.
 2004-04-10 07:11:29 +00:00
Chris Demetriou
55dc1ac473 2004-04-10 Chris Demetriou <cgd@broadcom.com> 
* fpu64-ps.s: New file.
        * basic.exp: Run fpu64-ps.s.
 2004-04-10 07:02:57 +00:00
Chris Demetriou
f90bdbaba7 (and adjust paths in last entry, for move 2004-04-10 06:58:54 +00:00
Chris Demetriou
ba3b645acc move entry from: 
2004-03-29  Richard Sandiford  <rsandifo@redhat.com>
from ChangeLog into sim/mips/Changelog
 2004-04-10 06:58:21 +00:00
Chris Demetriou
1423405663 2004-04-09 Chris Demetriou <cgd@broadcom.com> 
* mips.igen (check_fmt): Remove.
        (ABS.fmt, ADD.fmt, C.cond.fmta, C.cond.fmtb, CEIL.L.fmt, CEIL.W)
        (CVT.D.fmt, CVT.L.fmt, CVT.S.fmt, CVT.W.fmt, DIV.fmt, FLOOR.L.fmt)
        (FLOOR.W.fmt, MADD.fmt, MOV.fmt, MOVtf.fmt, MOVN.fmt, MOVZ.fmt)
        (MSUB.fmt, MUL.fmt, NEG.fmt, NMADD.fmt, NMSUB.fmt, RECIP.fmt)
        (ROUND.L.fmt, ROUND.W.fmt, RSQRT.fmt, SQRT.fmt, SUB.fmt)
        (TRUNC.L.fmt, TRUNC.W): Explicitly specify allowed FPU formats.
        (check_fmt_p, CEIL.L.fmt, CEIL.W, DIV.fmt, FLOOR.L.fmt)
        (FLOOR.W.fmt, RECIP.fmt, ROUND.L.fmt, ROUND.W.fmt, RSQRT.fmt)
        (SQRT.fmt, TRUNC.L.fmt, TRUNC.W): Remove all uses of check_fmt.
        (C.cnd.fmta): Remove incorrect call to check_fmt_p.
 2004-04-10 06:51:49 +00:00
Chris Demetriou
c6f9085cab 2004-04-09 Chris Demetriou <cgd@broadcom.com> 
* sb1.igen (check_sbx): New function.
        (PABSDIFF.fmt, PABSDIFC.fmt, PAVG.fmt): Use check_sbx.
 2004-04-10 06:17:55 +00:00
Richard Sandiford
11d66e667f Fix date in last delta. 2004-03-29 22:01:45 +00:00
Richard Sandiford
a584aa6330 * sim/mips/hilo-hazard-[123].s: New files. 
* sim/mips/basic.exp (run_hilo_test): New procedure.
	(models): Only list models that are included in the configuration.
	(submodels): New variable, set to submodels of the above.
	(mips64vr-*-elf, mips64vrel-*-elf): New configuration stanza.
	Run hilo-hazard-[123].s.
 2004-03-29 21:58:01 +00:00
Richard Sandiford
0e1b7197a4 * sim-main.h (MIPS_MACH_HAS_MT_HILO_HAZARD) 
(MIPS_MACH_HAS_MULT_HILO_HAZARD, MIPS_MACH_HAS_DIV_HILO_HAZARD): New.
	* mips.igen (check_mt_hilo, check_mult_hilo, check_div_hilo): Provide
	separate implementations for mipsIV and mipsV.  Use new macros to
	determine whether the restrictions apply.
 2004-03-29 21:56:02 +00:00
Ben Elliston
523f6a2717 * MAINTAINERS: Update my mail address. 2004-03-10 02:58:24 +00:00
Richard Sandiford
676a64f422 Add fr450 support. 2004-03-01 10:11:46 +00:00
Richard Sandiford
c7a48b9ac9 cpu/ 
* frv.cpu (nsdiv, nudiv, nsdivi, nudivi): Remove fr400 profiling unit.
	(scutss): Change unit to I0.
	(calll, callil, ccalll): Add missing FR550-MAJOR and profile unit.
	(mqsaths): Fix FR400-MAJOR categorization.
	(media-quad-multiply-cross-acc, media-quad-cross-multiply-cross-acc)
	(media-quad-cross-multiply-acc): Change unit from MDUALACC to FMALL.
	* frv.opc (fr400_check_insn_major_constraints): Check for (M-2,M-1)
	combinations.

opcodes/
	* frv-desc.c, frv-opc.c: Regenerate.

sim/frv/
	* cache.c (frv_cache_init): Change fr400 cache statistics to match
	the fr405.
	(non_cache_access): Add missing breaks.
	* interrupts.c (set_exception_status_registers): Always set EAR15
	for data_access_errors.
	* memory.c (fr400_check_write_address): Remove redundant alignment
	check.
	* model.c: Regenerate.
 2004-03-01 09:42:33 +00:00
Richard Sandiford
8b73069fed sim/frv/ 
* frv.c (frvbf_iacc_cut): Rework, taking rounding into account.

testsuite/
	* sim/frv/fr400/scutss.cgs: Fix tests to account for rounding.
	Add some new ones.
 2004-03-01 09:33:48 +00:00
Richard Sandiford
8ae0baa268 cpu/ 
* frv.cpu (r-store, r-store-dual, r-store-quad): Delete.
	(rstb, rsth, rst, rstd, rstq): Delete.
	(rstbf, rsthf, rstf, rstdf, rstqf): Delete.

gas/testsuite/
	* gas/frv/allinsn.s (rstb, rsth, rst, rstd, rstq): Replace with nops.
	(rstbf, rsthf, rstf, rstdf, rstqf): Likewise.
	* gas/frv/allinsn.d: Update accordingly.

opcodes/
	* frv-desc.c, frv-opc.c, frv-opc.h: Regenerate.

sim/frv/
	* decode.c, decode.h, model.c, sem.c: Regenerate.

sim/testsuite/
	* sim/frv/{rstb,rsth,rst,rstd,rstq}.cgs: Delete.
	* sim/frv/{rstbf,rsthf,rstf,rstdf,rstqf}.cgs: Delete.
 2004-03-01 09:26:33 +00:00
Michael Snyder
915213a4d5 2004-02-02 Michael Snyder <msnyder@redhat.com> 
* gencode.c (movua.l): Set thislock to 0, not n.
 2004-02-13 00:01:19 +00:00
Michael Snyder
d60d62653d 2004-02-12 Michael Snyder <msnyder@redhat.com> 
* and.s, movi.s, sett.s: New files.
	* allinsn.exp: Add new tests.
	* testutils.inc (set_sr_bit): Fix macro labels.
 2004-02-12 22:29:48 +00:00
Michael Snyder
3e5117978b 2004-02-12 Michael Snyder <msnyder@redhat.com> 
* gencode.c (table): Change from char to short.
	(dumptable): Change generated table from char to short.
	* interp.c (sh_jump_table, sh_dsp_table, ppi_table): char to short.
	(init_dsp): Compute size of sh_dsp_table.
	(sim_resume): Change jump_table from char to short.
 2004-02-12 19:32:12 +00:00
Andrew Cagney
df2a9ff479 2004-02-04 Andrew Cagney <cagney@redhat.com> 
Committed by Andrew Cagney.
	* mloopx.in: Update copyright.
	(xextract-pbb): Fixed trap for system calls operation in parallel.
	* mloop2.in (xextract-pbb): Ditto.
 2004-02-04 22:05:37 +00:00
Michael Snyder
0145ab2e52 2004-01-27 Michael Snyder <msnyder@redhat.com> 
* gencode.c: (op tab): Some refs and defs fixes.
	"fsrra" -> "fsrra <FREG_N>".
        "sleep": replace array ref with array addr.
        "trapa": ditto.
 2004-01-27 23:30:01 +00:00
Michael Snyder
4ae0cff4ca 2004-01-27 Michael Snyder <msnyder@redhat.com> 
* gencode.c: Comment and whitespace clean-ups.
 2004-01-27 23:23:57 +00:00
Andrew Cagney
54273454d0 2004-01-27 Andrew Cagney <cagney@redhat.com> 
* ppc-instructions: Update copyright.
	(convert_to_integer): Add trailing ";" to label.
 2004-01-27 13:21:09 +00:00
Chris Demetriou
df0a8012b1 [ sim/ChangeLog ] 
2004-01-26  Chris Demetriou  <cgd@broadcom.com>

        * configure.in (mips*-*-*): Configure in testsuite.
        * configure: Regenerate.

[ sim/testsuite/ChangeLog ]
2004-01-26  Chris Demetriou  <cgd@broadcom.com>

        * sim/mips: New directory.  Tests for the MIPS simulator.

[ sim/testsuite/sim/mips/ChangeLog ]
2004-01-26  Chris Demetriou  <cgd@broadcom.com>

        * basic.exp: New file.
        * testutils.inc: New file.
        * sanity.s: New file.
 2004-01-26 08:12:44 +00:00
Ben Elliston
2345c93c5f * lib/sim-defs.exp (run_sim_test): Delete the .o and .x files if a 
test passes.
 2004-01-23 03:15:27 +00:00
Chris Demetriou
b3208fb8f7 2004-01-19 Chris Demetriou <cgd@broadcom.com> 
* mips.igen (check_mf_cycles, check_mt_hilo, check_mf_hilo)
        (check_mult_hilo): Improve comments.
        (check_div_hilo): Likewise.  Also, fork off a new version
        to handle mips32/mips64 (since there are no hazards to check
        in MIPS32/MIPS64).
 2004-01-20 07:06:14 +00:00
Mark Kettenis
4389ce38f0 * simops.c: Include <sys/types.h>. 2004-01-18 14:56:40 +00:00
Ben Elliston
6d0c993e08 * Makefile.in (clean): Remove rm -f $(ALL), as $(ALL) is empty. 2004-01-15 21:25:06 +00:00
Michael Snyder
87acb4a7d1 2004-01-07 Michael Snyder <msnyder@redhat.com> 
* gencode.c: Whitespace	cleanup.
        * interp.c: Ditto.
 2004-01-10 00:43:28 +00:00
Michael Snyder
4321271fd4 2004-01-07 Michael Snyder <msnyder@redhat.com> 
* dmxy.s, fipr.s, fpchg.s, ldrc.s, loop.s, movli.s, movua.s,
        movxy.s, pabs.s, pclr.s, prnd.s, psub.s, pswap.s: New files.
        * allinsn.exp: Add new tests.
        * testutils.inc (set_sr_bit): Add argument.
        (set_greg): Add .align directives.
 2004-01-09 19:47:36 +00:00
Michael Snyder
86bc60ebf4 2004-01-07 Michael Snyder <msnyder@redhat.com> 
* gencode.c: Replace 'Hitachi' with 'Renesas'.
        (op tab): Add new instructions for sh4a, DBR, SBR.
        (expand_opcode): Add handling for new movxy combinations.
        (gensym_caselist): Ditto.
        (expand_ppi_movxy): Remove movx/movy expansions,
        now handled in expand_opcode.
        (gensym): Add some helpful macros.
        (expand_ppi_code): Flatten loop for simplicity, tweak for 12-bit
        instead of 8-bit table (some insns are ambiguous to 8 bits).
	(ppi_gensim, main): Generate 12-bit instead of 8-bit ppi table.

	* interp.c: Replace 'Hitachi' with 'Renesas'.
        (union saved_state_type): Add dbr, sgr, ldst.
        (get_loop_bounds_ext): New function.
        (init_dsp): Add bfd_mach_sh4al_dsp.
	(sim_resume): Handle extended loop bounds.
 2004-01-09 19:44:50 +00:00
Michael Snyder
673fc5d0a7 2003-12-18 Michael Snyder <msnyder@redhat.com> 
* gencode.c (expand_opcode): Simplify and reorganize.
        Eliminate "shift" parameter.  Eliminate "4 bits at a time"
        assumption.  Flatten switch statement to a single level.
        Add "eeee" token for even-numbered registers.
        (bton): Delete.
        (fsca): Use "eeee" token.
        (ppi_moves): Rename to "expand_ppi_movxy".  Do the ddt
        [movx/movy] expansion here, as well as the ppi expansion.
        (gensim_caselist): Accept 'eeee' along with 'nnnn'.
 2004-01-06 01:05:02 +00:00