Commit Graph

12 Commits

Author SHA1 Message Date
Martin Schwidefsky
8dd744b6c0 * s390-opc.txt: Add unnormalized hfp multiply and multiply-and-add
instructions.
2005-10-19 15:05:10 +00:00
Martin Schwidefsky
ad101263eb * s390-dis.c (print_insn_s390): Print unsigned operands with %u.
* s390-mkopc.c (s390_opcode_cpu_val): Add support for cpu type z9-109.
	(main): Likewise.
	* s390-opc.c (I32_16, U32_16, M_16): Add defines 32 bit immediates
	and 4 bit optional masks.
	(INSTR_RIL_RI, INSTR_RIL_RU, INSTR_RRF_M0RR, INSTR_RSE_CCRD,
	INSTR_RSY_CCRD, INSTR_SSF_RRDRD): Add new instruction formats.
	(MASK_RIL_RI, MASK_RIL_RU, MASK_RRF_M0RR, MASK_RSE_CCRD,
	MASK_RSY_CCRD, MASK_SSF_RRDRD): Likewise.
	(s390_opformats): Likewise.
	* s390-opc.txt: Add new instructions for cpu type z9-109.
2005-08-12 18:03:03 +00:00
Alan Modra
aef6203bd6 update copyright dates 2005-03-03 11:52:12 +00:00
Martin Schwidefsky
0451f5dff4 * s390-opc.txt: Correct architecture mask for some opcodes.
lrv, lrvh, strv, ml, dl, alc, slb rll and mvclu are available
	in the esa mode as well.
2004-06-01 13:56:11 +00:00
Martin Schwidefsky
bac0268913 * s390-dis.c (s390_extract_operand): Add support for long displacements.
* s390-mkopc.c (s390_opcode_cpu_val): Add support for cpu type z990.
        * s390-opc.c (D20_20): Add define for 20 bit displacements.
        (INSTR_RRF_R0RR, INSTR_RSL_R0RD, INSTR_RSY_RRRD, INSTR_RSY_RURD,
        INSTR_RSY_AARD, INSTR_RXY_RRRD, INSTR_RXY_FRRD, INSTR_SIY_URD): Add
        new instruction formats.
        (MASK_RRF_R0RR, MASK_RSL_R0RD, MASK_RSY_RRRD, MASK_RSY_RURD,
        MASK_RSY_AARD, MASK_RXY_RRRD, MASK_RXY_FRRD, MASK_SIY_URD): Likewise.
        (s390_opformats): Likewise.
        * s390-opc.txt: Add new instructions for cpu type z990. Add missing
        hfp instructions. Add missing instructions pgin, pgout and xsch.
2003-07-01 14:47:58 +00:00
Martin Schwidefsky
af169f2333 * s390-dis.c (init_disasm): Rename S390_OPCODE_ESAME to
S390_OPCODE_ZARCH.
	(print_insn_s390): Use new modes field of s390_opcodes.
	* s390-mkopc.c (ARCHBITS_ESAONLY, ARCHBITS_ESA, ARCHBITS_ESAME): Remove.
	(s390_opcode_mode_val, s390_opcode_cpu_val): New enums.
	(struct op_struct): Remove archbits. Add mode_bits and min_cpu.
	(insertOpcode): Replace archbits by min_cpu and mode_bits.
	(dumpTable): Write mode_bits and min_cpu instead of archbits.
	(main): Adapt to new format in s390-opcode.txt.
	* s390-opc.c (s390_opformats): Replace archbits by min_cpu and
	mode_bits.
	* s390-opc.txt: Replace archbits by min_cpu and mode_bits.
2003-03-21 13:28:09 +00:00
Nick Clifton
b6849f55b9 s390 assembler improvements and testsuite 2001-09-18 15:41:33 +00:00
Andreas Jaeger
355d475e91 * opcodes/s390-opc.c: Add "low or high" and "not low or high"
branch instructions for gcc 3.0.
	* opcodes/s390-opc.txt: Likewise.
2001-08-23 06:38:56 +00:00
Nick Clifton
6fc1282450 Add lgh instruction. 2001-06-12 11:50:53 +00:00
Nick Clifton
82b66b2339 Add new opcodes 2001-03-16 18:42:26 +00:00
Nick Clifton
060d22b0d0 Fix typos in ChangeLogs; fix dates in copyright notices 2001-03-13 22:58:38 +00:00
Nick Clifton
a85d7ed0f0 Add s390 support 2001-02-10 00:58:38 +00:00