* ppc-tdep.h (struct gdbarch_tdep): Add ev registers.
* rs6000-tdep.c (rs6000_register_virtual_type): Return 64 bit
vector type for ev registers.
(e500_pseudo_register_read): New function.
(e500_pseudo_register_write): New function.
(e500_dwarf2_reg_to_regnum): New function.
(PPC_UISA_NOFP_SPRS): New macro.
(PPC_EV_REGS): New macro.
(PPC_GPRS_PSEUDO_REGS): New macro.
(registers_e500): New register set for e500.
(variants): Add e500 variant.
(rs6000_gdbarch_init): Move setting of pc, sp, fp regnums to
before setting architectural dependent variations. Initialize ev
registers numbers. Add case for e500 architecture. Set the
number of pseudo registers.
* config/mips/tm-mips.h (STORE_STRUCT_RETURN): Delete.
(EXTRACT_STRUCT_VALUE_ADDRESS): Delete.
* mips-tdep.c (mips_store_struct_return): New function.
(mips_extract_struct_value_address): New function.
(mips_gdbarch_init): Set store_struct_return and
extract_struct_value_address.
* config/mips/tm-mips.h (STORE_STRUCT_RETURN): Delete.
(EXTRACT_STRUCT_VALUE_ADDRESS): Delete.
* mips-tdep.c (mips_store_struct_return): New function.
(mips_extract_struct_value_address): New function.
(mips_gdbarch_init): Set store_struct_return and
extract_struct_value_address.
* dwarf2read.c (dwarf2_build_psymtabs): Check that
dwarf_line_offset is nonzero before creating dwarf_line_buffer.
(read_file_scope): Check that line_header is nonzero before
decoding macro information.
* infcmd.c (do_registers_info): Print vector registers in hex
format only.
(print_vector_info): Check that printing registers
makes sense.
(print_float_info): Ditto.
* mips-tdep.c (mips_gdbarch_init): Update.
(mips_o32_extract_return_value): Rewrite.
(mips_o32_store_return_value): Rewrite.
(mips_o32_xfer_return_value): New function.
(mips_xfer_register): Tweak debug print message. Allow for
buf_offset when dumping the value transfered.
* config/tc-mips.c (macro2): Implement rotates by zero using shifts
by zero.
[gas/testsuite]
* gas/mips/rol.s: Add rotate by zero tests.
* gas/mips/rol.d: Update accordingly.
* gas/mips/rol64.d: Expect rotates by zero to use dsrl.
* rs6000-tdep.c (struct reg): Add field to indicate a pseudo
register.
(P): New macro to define a register as a pseudo register.
(R, R4, R8, R16, FR32, R64, R0): Updated.
(struct variant): Add new fields for number of pseudo registers
and number of total registers.
(tot_num_registers): New macro replacing....
(num_registers): ...deleted macro.
(num_registers): New function.
(num_pseudo_registers): New function.
(variants): Update all variants to intialize new fields correctly.
Postpone initialization of number of pseudo regs and real regs.
(init_variants): New function.
(rs6000_gdbarch_init): Initialize variants. Update calculation of
registers offsets.
* valops.c (search_struct_field): Change error message to treat
return value of 0 from value_static_field as meaning that field is
optimized out.
(value_struct_elt_for_reference): Ditto.
* values.c (value_static_field): Treat an unresolved location the
same as a nonexistent symbol. Fix PR gdb/635.
* mips-tdep.c (mips_xfer_register): New function.
(mips_n32n64_extract_return_value): Rewrite.
(mips_gdbarch_init): For N32 and N64, set extract_return_value
instead of deprecated_extract_return_value.
From matthew green <mrg@redhat.com>
* config/tc-ppc.c (PPC_OPCODE_CLASSIC): Enable this everywhere
PPC_OPCODE_PPC is, except for BookE architectures.
(md_parse_option): Add support for -mspe.
(md_show_usage): Add -mspe.
(md_parse_option): Add support for -me500 and
-me500x2 to generate code for Motorola e500 core complex.
(md_show_usage): Add -me500 and -me500x2.
(PPC_APUINFO_ISEL, PPC_APUINFO_PMR, PPC_APUINFO_RFMCI,
PPC_APUINFO_CACHELCK, PPC_APUINFO_SPE, PPC_APUINFO_EFS,
PPC_APUINFO_BRLOCK): New macros.
(ppc_cleanup): New function.
(ppc_apuinfo_section_add): New function.
(APUID): New macro.
(md_assemble): Collect info and write the APUinfo section.
* config/tc-ppc.h (md_cleanup): Define.
(ppc_cleanup): Export.
(ELF_TC_SPECIAL_SECTIONS): Add .PPC.EMB.apuinfo section.
From matthew green <mrg@redhat.com>
* ppc.h (PPC_OPCODE_SPE): New opcode flag for Powerpc e500
instructions.
(PPC_OPCODE_ISEL, PPC_OPCODE_BRLOCK, PPC_OPCODE_PMR,
PPC_OPCODE_CACHELCK, PPC_OPCODE_RFMCI): New opcode flags for the
e500x2 Integer select, branch locking, performance monitor,
cache locking and machine check APUs, respectively.
(PPC_OPCODE_EFS): New opcode type for efs* instructions.
(PPC_OPCODE_CLASSIC): New opcode type for Classic PowerPC instructions.
conditionally.
(JB_PC, JB_ELEMENT_SIZE): Rename to MIPS_LINUX_JB_PC and
MIPS_LINUX_JB_ELEMENT_SIZE.
* mips-linux-tdep.c (supply_gregset, fill_gregset): Use alloca
for MAX_REGISTER_RAW_SIZE arrays.
(mips_linux_get_longjmp_target): Use MIPS_LINUX_JB_PC and
MIPS_LINUX_JB_ELEMENT_SIZE.
Michael Snyder