Symbol table entries for section symbols are different between IRIX and
traditional MIPS ELF targets in that IRIX entries have their `st_name'
member pointing at the section's name in the string table section, while
traditional entries have 0 there and the section header string table has
to be referred via the relevant section header's `shn_name' member
instead.
This is chosen with the `elf_backend_name_local_section_symbols' backend
and can be observed with `readelf -s' output for an IRIX object:
Symbol table '.symtab' contains 12 entries:
Num: Value Size Type Bind Vis Ndx Name
0: 00000000 0 NOTYPE LOCAL DEFAULT UND
1: 00000000 0 SECTION LOCAL DEFAULT 1 .text
2: 00000000 0 SECTION LOCAL DEFAULT 3 .data
3: 00000000 0 SECTION LOCAL DEFAULT 4 .bss
4: 00000000 0 SECTION LOCAL DEFAULT 5 .reginfo
5: 00000000 0 SECTION LOCAL DEFAULT 6 .MIPS.abiflags
6: 00000000 0 SECTION LOCAL DEFAULT 7 .pdr
7: 00000000 0 SECTION LOCAL DEFAULT 9 .gnu.attributes
8: 00002000 16 FUNC GLOBAL DEFAULT 1 foo
9: 00004008 0 FUNC LOCAL DEFAULT 1 abar
10: 00002008 0 FUNC LOCAL DEFAULT 1 afoo
11: 00004000 16 FUNC GLOBAL DEFAULT 1 bar
and a corresponding traditional object:
Symbol table '.symtab' contains 12 entries:
Num: Value Size Type Bind Vis Ndx Name
0: 00000000 0 NOTYPE LOCAL DEFAULT UND
1: 00000000 0 SECTION LOCAL DEFAULT 1
2: 00000000 0 SECTION LOCAL DEFAULT 3
3: 00000000 0 SECTION LOCAL DEFAULT 4
4: 00004008 0 FUNC LOCAL DEFAULT 1 abar
5: 00002008 0 FUNC LOCAL DEFAULT 1 afoo
6: 00000000 0 SECTION LOCAL DEFAULT 5
7: 00000000 0 SECTION LOCAL DEFAULT 6
8: 00000000 0 SECTION LOCAL DEFAULT 7
9: 00000000 0 SECTION LOCAL DEFAULT 9
10: 00002000 16 FUNC GLOBAL DEFAULT 1 foo
11: 00004000 16 FUNC GLOBAL DEFAULT 1 bar
respectively. Consequently the right way to retrieve a section symbol's
name has to be chosen in `mips_elf_calculate_relocation' for the purpose
of error reporting.
Originally we produced symbol tables in the traditional object format
only and we handled it correctly until it was lost in a rewrite with:
commit 7403cb6305
Author: Mark Mitchell <mark@codesourcery.com>
Date: Wed Jun 30 20:13:43 1999 +0000
probably because of the extra pointer indirection added which made the
same expression have a different meaning.
With the addition of IRIX symbol table format with:
commit 174fd7f955
Author: Richard Sandiford <rdsandiford@googlemail.com>
Date: Mon Feb 9 08:04:00 2004 +0000
the bug has been partially covered and now when a relocation error is
triggered with an IRIX object the offending section symbol is correctly
reported:
tmpdir/dump0.o: In function `foo':
(.text+0x2000): relocation truncated to fit: R_MIPS_26 against `.text'
tmpdir/dump0.o: In function `bar':
(.text+0x4000): relocation truncated to fit: R_MIPS_26 against `.text'
because `bfd_elf_string_from_elf_section' retrieves the name from the
string table section. With a traditional object however the function
returns an empty string and consequently `no symbol' is printed instead:
tmpdir/dump0.o: In function `foo':
(.text+0x2000): relocation truncated to fit: R_MIPS_26 against `no symbol'
tmpdir/dump0.o: In function `bar':
(.text+0x4000): relocation truncated to fit: R_MIPS_26 against `no symbol'
Restore the original semantics so that the section name is always
correctly retrieved.
bfd/
* elfxx-mips.c (mips_elf_calculate_relocation): Also use the
section name if `bfd_elf_string_from_elf_section' returns an
empty string.
ld/
* testsuite/ld-mips-elf/reloc-local-overflow.d: New test.
* testsuite/ld-mips-elf/reloc-local-overflow.s: Source for the
new test.
* testsuite/ld-mips-elf/mips-elf.exp: Run the new test.
Upon a `bfd_reloc_outofrange' error continue processing so that any
further issues are also reported, similarly to how `bfd_reloc_overflow'
is handled. Adjust message formatting accordingly, using `%X' to abort
processing at conclusion.
Reduce the number of test cases by grouping relocations the handling of
which can now be verified together with a single source and dump.
bfd/
* elfxx-mips.c (_bfd_mips_elf_relocate_section)
<bfd_reloc_outofrange>: Use the `%X%H' rather than `%C' format
for message. Continue processing rather than returning failure.
ld/
* testsuite/ld-mips-elf/unaligned-jalx-0.d: Fold
`unaligned-jalx-2' here.
* testsuite/ld-mips-elf/unaligned-jalx-mips16-0.d: Fold
`unaligned-jalx-mips16-2' here.
* testsuite/ld-mips-elf/unaligned-jalx-micromips-0.d: Fold
`unaligned-jalx-micromips-2' here.
* testsuite/ld-mips-elf/unaligned-jalx-0.s: Update accordingly.
* testsuite/ld-mips-elf/unaligned-jalx-1.d: Update error
message.
* testsuite/ld-mips-elf/unaligned-jalx-mips16-1.d: Likewise.
* testsuite/ld-mips-elf/unaligned-jalx-micromips-1.d: Likewise.
* testsuite/ld-mips-elf/unaligned-jalx-2.d: Remove test.
* testsuite/ld-mips-elf/unaligned-jalx-mips16-2.d: Remove test.
* testsuite/ld-mips-elf/unaligned-jalx-micromips-2.d: Remove
test.
* testsuite/ld-mips-elf/unaligned-jalx-2.s: Remove test source.
* testsuite/ld-mips-elf/unaligned-lwpc-0.d: Fold
`unaligned-lwpc-3' here.
* testsuite/ld-mips-elf/unaligned-lwpc-0.s: Update accordingly.
* testsuite/ld-mips-elf/unaligned-lwpc-1.d: Fold
`unaligned-lwpc-2' here.
* testsuite/ld-mips-elf/unaligned-lwpc-1.s: Update accordingly.
* testsuite/ld-mips-elf/unaligned-lwpc-2.d: Remove test.
* testsuite/ld-mips-elf/unaligned-lwpc-2.s: Remove test source.
* testsuite/ld-mips-elf/unaligned-lwpc-3.d: Remove test.
* testsuite/ld-mips-elf/unaligned-lwpc-3.s: Remove test source.
* testsuite/ld-mips-elf/unaligned-ldpc-0.d: Fold
`unaligned-ldpc-4' here.
* testsuite/ld-mips-elf/unaligned-ldpc-0.s: Update accordingly.
* testsuite/ld-mips-elf/unaligned-ldpc-1.d: Update error
message. Fold `unaligned-ldpc-2' and `unaligned-ldpc-3' here.
* testsuite/ld-mips-elf/unaligned-ldpc-1.s: Update accordingly.
* testsuite/ld-mips-elf/unaligned-ldpc-2.d: Remove test.
* testsuite/ld-mips-elf/unaligned-ldpc-2.s: Remove test source.
* testsuite/ld-mips-elf/unaligned-ldpc-3.d: Remove test.
* testsuite/ld-mips-elf/unaligned-ldpc-3.s: Remove test source.
* testsuite/ld-mips-elf/unaligned-ldpc-4.d: Remove test.
* testsuite/ld-mips-elf/unaligned-ldpc-4.s: Remove test source.
* testsuite/ld-mips-elf/mips-elf.exp: Delete removed tests.
A `bfd_reloc_outofrange' condition from `mips_elf_calculate_relocation'
currently triggers the warning callback, which in the case of LD prints
messages like:
foo.o: In function `foo':
(.text+0x0): warning: JALX to a non-word-aligned address
or:
foo.o: In function `foo':
(.text+0x0): warning: PC-relative load from unaligned address
and nothing else, which suggests this is a benign condition and link has
otherwise successfully run to completion. This is however not the case,
the link terminates right away with no further messages and no output
produced.
Use the general error or warning info callback then, preserving the
message format. Also set a BFD error condition so that a failure is
unambiguously reported. Complement the change with a set of suitable
test suite additions.
bfd/
* elfxx-mips.c (_bfd_mips_elf_relocate_section)
<bfd_reloc_outofrange>: Call `->einfo' rather than `->warning'.
Call `bfd_set_error'.
ld/
* testsuite/ld-mips-elf/unaligned-jalx-0.d: New test.
* testsuite/ld-mips-elf/unaligned-jalx-1.d: New test.
* testsuite/ld-mips-elf/unaligned-jalx-2.d: New test.
* testsuite/ld-mips-elf/unaligned-jalx-mips16-0.d: New test.
* testsuite/ld-mips-elf/unaligned-jalx-mips16-1.d: New test.
* testsuite/ld-mips-elf/unaligned-jalx-mips16-2.d: New test.
* testsuite/ld-mips-elf/unaligned-jalx-micromips-0.d: New test.
* testsuite/ld-mips-elf/unaligned-jalx-micromips-1.d: New test.
* testsuite/ld-mips-elf/unaligned-jalx-micromips-2.d: New test.
* testsuite/ld-mips-elf/unaligned-lwpc-0.d: New test.
* testsuite/ld-mips-elf/unaligned-lwpc-1.d: New test.
* testsuite/ld-mips-elf/unaligned-lwpc-2.d: New test.
* testsuite/ld-mips-elf/unaligned-lwpc-3.d: New test.
* testsuite/ld-mips-elf/unaligned-ldpc-0.d: New test.
* testsuite/ld-mips-elf/unaligned-ldpc-1.d: New test.
* testsuite/ld-mips-elf/unaligned-ldpc-2.d: New test.
* testsuite/ld-mips-elf/unaligned-ldpc-3.d: New test.
* testsuite/ld-mips-elf/unaligned-ldpc-4.d: New test.
* testsuite/ld-mips-elf/unaligned-jalx-0.s: New test source.
* testsuite/ld-mips-elf/unaligned-jalx-1.s: New test source.
* testsuite/ld-mips-elf/unaligned-jalx-2.s: New test source.
* testsuite/ld-mips-elf/unaligned-insn.s: New test source.
* testsuite/ld-mips-elf/unaligned-lwpc-0.s: New test source.
* testsuite/ld-mips-elf/unaligned-lwpc-1.s: New test source.
* testsuite/ld-mips-elf/unaligned-lwpc-2.s: New test source.
* testsuite/ld-mips-elf/unaligned-lwpc-3.s: New test source.
* testsuite/ld-mips-elf/unaligned-ldpc-0.s: New test source.
* testsuite/ld-mips-elf/unaligned-ldpc-1.s: New test source.
* testsuite/ld-mips-elf/unaligned-ldpc-2.s: New test source.
* testsuite/ld-mips-elf/unaligned-ldpc-3.s: New test source.
* testsuite/ld-mips-elf/unaligned-ldpc-4.s: New test source.
* testsuite/ld-mips-elf/unaligned-syms.s: New test source.
* testsuite/ld-mips-elf/mips-elf.exp: Run the new tests.
The microMIPS JALX instruction shares the R_MICROMIPS_26_S1 relocation
with microMIPS J/JAL/JALS instructions, however unlike the latters its
encoded immediate argument is unusually shifted left by 2 rather than 1
in calculating the value used for the operation requested.
We already handle this exception in `mips_elf_calculate_relocation' in
LD, in a scenario where JALX is produced as a result of relaxing JAL for
the purpose of making a cross-mode jump. We also get it right in the
disassembler in `decode_micromips_operand'.
What we don't correctly do however is processing microMIPS JALX produced
by GAS from an assembly source, where a non-zero constant argument or a
symbol reference with a non-zero in-place addend has been used. In this
case the same calculation is made as for microMIPS J/JAL/JALS, causing
the wrong encoding to be produced by GAS on making an object file, and
then again by LD in the final link. The latter in particular causes the
calculation, where the addend fits in the relocatable field, to produce
different final addresses for the same source code depending on whether
REL or RELA relocations are used.
Correct these issues by special-casing microMIPS JALX in the places that
have been previously missed.
bfd/
* elfxx-mips.c (mips_elf_read_rel_addend): Adjust the addend for
microMIPS JALX.
gas/
* config/tc-mips.c (append_insn): Correct the encoding of a
constant argument for microMIPS JALX.
(tc_gen_reloc): Correct the encoding of an in-place addend for
microMIPS JALX.
* testsuite/gas/mips/jalx-addend.d: New test.
* testsuite/gas/mips/jalx-addend-n32.d: New test.
* testsuite/gas/mips/jalx-addend-n64.d: New test.
* testsuite/gas/mips/jalx-imm.d: New test.
* testsuite/gas/mips/jalx-imm-n32.d: New test.
* testsuite/gas/mips/jalx-imm-n64.d: New test.
* testsuite/gas/mips/jalx-addend.s: New test source.
* testsuite/gas/mips/jalx-imm.s: New test source.
* testsuite/gas/mips/mips.exp: Run the new tests.
ld/
* testsuite/ld-mips-elf/jalx-addend.d: New test.
* testsuite/ld-mips-elf/jalx-addend-n32.d: New test.
* testsuite/ld-mips-elf/jalx-addend-n64.d: New test.
* testsuite/ld-mips-elf/mips-elf.exp: Run the new tests.
Just mask higher bits off, which returns the same set of 3-bit register
encodings of { 0, 1, 2, 3, 4, 5, 6, 7 } for the allowed 5-bit encodings
of { 16, 17, 2, 3, 4, 5, 6, 7 }. Input has already been validated with
OP16_VALID_REG.
bfd/
* elfxx-mips.c (BZ16_REG_FIELD): Simplify calculation.
Factor out the parts of `_bfd_mips_elf_merge_private_bfd_data'
responsible for ABI flag merging to `mips_elf_merge_obj_abiflags'. No
functional change.
bfd/
* elfxx-mips.c (mips_elf_merge_obj_abiflags): New function,
factored out from...
(_bfd_mips_elf_merge_private_bfd_data): ... here.
We have a problem in that in making compatibility checks while merging
private BFD data on the MIPS target we give priority to the attribute
check, which may fail and cause the function to abort early on. The
problem with this is the ABI compatibility aspect recorded in the
attributes is relatively minor compared to aspects recorded in the ELF
file header. However the premature exit causes any more important
compatibility aspect violated to be masked and not reported to the user
once a problem with attributes has been noticed.
So move the attribute check after the ELF file header flag check in
`_bfd_mips_elf_merge_private_bfd_data', and do not return prematurely
there. Take advantage of the resulting grouping of ELF file header
handling together and remove the premature success return point for the
first input object being handled, letting the code later on figure out
output ABI flags even for this object.
Update LD test cases according to messages from ELF file header checks
now preceding ones from attribute checks.
bfd/
* elfxx-mips.c (_bfd_mips_elf_merge_private_bfd_data): Move
attribute check after ELF file header flag check.
ld/
* testsuite/ld-mips-elf/attr-gnu-4-14.d: Update the order of
messages expected according to MIPS BFD private data merge
changes.
* testsuite/ld-mips-elf/attr-gnu-4-24.d: Likewise.
* testsuite/ld-mips-elf/attr-gnu-4-34.d: Likewise.
* testsuite/ld-mips-elf/attr-gnu-4-41.d: Likewise.
* testsuite/ld-mips-elf/attr-gnu-4-42.d: Likewise.
* testsuite/ld-mips-elf/attr-gnu-4-43.d: Likewise.
* testsuite/ld-mips-elf/attr-gnu-4-45.d: Likewise.
* testsuite/ld-mips-elf/attr-gnu-4-46.d: Likewise.
* testsuite/ld-mips-elf/attr-gnu-4-47.d: Likewise.
* testsuite/ld-mips-elf/attr-gnu-4-48.d: Likewise.
* testsuite/ld-mips-elf/attr-gnu-4-49.d: Likewise.
* testsuite/ld-mips-elf/attr-gnu-4-54.d: Likewise.
* testsuite/ld-mips-elf/attr-gnu-4-64.d: Likewise.
* testsuite/ld-mips-elf/attr-gnu-4-74.d: Likewise.
Fix the issue of any failure from `_bfd_elf_merge_object_attributes' not
being propagated by `mips_elf_merge_obj_attributes'.
bfd/
* elfxx-mips.c (mips_elf_merge_obj_attributes): Propagate the
return status from `_bfd_elf_merge_object_attributes'.
Factor out the parts of `_bfd_mips_elf_merge_private_bfd_data'
responsible for ELF file header flag compatibility checks to
`mips_elf_merge_obj_e_flags'. As a side effect remove a premature
return point from `_bfd_mips_elf_merge_private_bfd_data'. No functional
change otherwise.
bfd/
* elfxx-mips.c (mips_elf_merge_obj_e_flags): New function,
factored out from...
(_bfd_mips_elf_merge_private_bfd_data): ... here.
Fold the handling of input MIPS ABI flags in private BFD data merging
together, moving the attribute check afterwards, and consequently making
input vs output compatibility checks only start once all input ABI flag
data has been gathered, checked for inconsistencies and put in order.
Consequently also address the issue of input ABI flag inconsistencies
being masked by a failing attribute check, which currently makes
`_bfd_mips_elf_merge_private_bfd_data' exit prematurely and therefore
prevent input ABI flag inconsistencies from being reported. Such
inconsistencies need to be reported as they may be the very cause of an
attribute check failure.
bfd/
* elfxx-mips.c (_bfd_mips_elf_merge_private_bfd_data): Fold the
handling of input MIPS ABI flags together.
We currently special-case the handling of attribute checks on input
objects and make them even before we check a given input object actually
contains any sections. This does not add value as empty objects do not
cause a compatibility concern and we already make this observation for
other properties such as ELF file header flags. Moreover the attributes
themselves are stored in a `.gnu.attributes' section so the absence of
any section (except from a few special cases) implies there have been no
attributes provided either. Therefore it is safe to move the attribute
checks later on, after the null-section check has been made.
bfd/
* elfxx-mips.c (_bfd_mips_elf_merge_private_bfd_data): Suppress
attribute checks for null input.
Use local pointers to target data to reduce the amount of indirection
and improve the readability of `_bfd_mips_elf_merge_private_bfd_data'.
bfd/
* elfxx-mips.c (_bfd_mips_elf_merge_private_bfd_data): Use local
pointers to target data.
Correct a warning produced on any FP ABI mismatch observed. Unlike the
other settings, which in the presence of `.MIPS.abiflags' are duplicated
in the `e_flags' member of the ELF file header, information on the FP
ABI in use is duplicated in `.gnu.attributes' rather than in the former
place. Update the warning message accordingly.
bfd/
* elfxx-mips.c (_bfd_mips_elf_merge_private_bfd_data): Correct
an FP ABI warning.
bfd/
* elfxx-mips.c (mips_elf_check_mips16_stubs): Set a stub's output
section to bfd_abs_section_ptr if the stub is discarded.
ld/testsuite/
* ld-mips-elf/mips16-fp-stub-1.s: New.
* ld-mips-elf/mips16-fp-stub-2.s: New.
* ld-mips-elf/mips16-fp-stub.d: New.
* ld-mips-elf/mips-elf.exp: Run new tests.
* ld-mips-elf/mips16-intermix.d: Update expected output.
https://sourceware.org/ml/binutils/2015-10/msg00137.html
bfd PR ld/18401
* elfxx-mips.c (bfd_mips_isa_ext_mach): New function: Converts an
ISA value to a bfd machine number.
(bfd_mips_isa_ext): Update the ISA level and revision if
necessary. Use mips_mach_extends_p to decide if the ISA extension
needs to be set.
(_bfd_mips_elf_merge_private_bfd_data): Allow the ISA extension to
be inferred from the ABI setting. Set the ISA level from the
maximum of the incoming and outgoing ISA levels.
tests
* ld-mips-elf/mips-elf-flags.exp: Add more ISA conflict tests.
For the case of MIPS n64 target and 32-bit host, the computation of
the DT_MIPS_RLD_MAP_REL tag involves sdyn->output_section->vma +
sdyn->output_offset (64-bit) being added to b (32-bit host pointer),
so losing the high part and resulting in an incorrect
DT_MIPS_RLD_MAP_REL tag, and all dynamically linked glibc tests
failing for n64. This patch fixes this (spot-tested with glibc tests;
however, I don't have a self-contained testcase for this bug).
* elfxx-mips.c (_bfd_mips_elf_finish_dynamic_sections)
<DT_MIPS_RLD_MAP_REL>: Add target address to host address
difference, not to host pointer.
Copy relocs are used in a scheme to avoid dynamic text relocations in
non-PIC executables that refer to variables defined in shared
libraries. The idea is to have the linker define any such variable in
the executable, with a copy reloc copying the initial value, then have
both the executable and shared library refer to the executable copy.
If the shared library defines the variable as protected then we have
two copies of the variable being used.
PR 15228
* elflink.c (_bfd_elf_adjust_dynamic_copy): Add "info" param.
Error on copy relocs against protected symbols.
(elf_merge_st_other): Set h->protected_def.
* elf-bfd.h (struct elf_link_hash_entry): Add "protected_def".
(_bfd_elf_adjust_dynamic_copy): Update prototype.
* elf-m10300.c (_bfd_mn10300_elf_adjust_dynamic_symbol): Update
_bfd_elf_adjust_dynamic_copy call.
* elf32-arm.c (elf32_arm_adjust_dynamic_symbol): Likewise.
* elf32-cr16.c (_bfd_cr16_elf_adjust_dynamic_symbol): Likewise.
* elf32-cris.c (elf_cris_adjust_dynamic_symbol): Likewise.
* elf32-hppa.c (elf32_hppa_adjust_dynamic_symbol): Likewise.
* elf32-i370.c (i370_elf_adjust_dynamic_symbol): Likewise.
* elf32-i386.c (elf_i386_adjust_dynamic_symbol): Likewise.
* elf32-lm32.c (lm32_elf_adjust_dynamic_symbol): Likewise.
* elf32-m32r.c (m32r_elf_adjust_dynamic_symbol): Likewise.
* elf32-m68k.c (elf_m68k_adjust_dynamic_symbol): Likewise.
* elf32-metag.c (elf_metag_adjust_dynamic_symbol): Likewise.
* elf32-or1k.c (or1k_elf_adjust_dynamic_symbol): Likewise.
* elf32-ppc.c (ppc_elf_adjust_dynamic_symbol): Likewise.
* elf32-s390.c (elf_s390_adjust_dynamic_symbol): Likewise.
* elf32-sh.c (sh_elf_adjust_dynamic_symbol): Likewise.
* elf32-tic6x.c (elf32_tic6x_adjust_dynamic_symbol): Likewise.
* elf32-tilepro.c (tilepro_elf_adjust_dynamic_symbol): Likewise.
* elf32-vax.c (elf_vax_adjust_dynamic_symbol): Likewise.
* elf64-ppc.c (ppc64_elf_adjust_dynamic_symbol): Likewise.
* elf64-s390.c (elf_s390_adjust_dynamic_symbol): Likewise.
* elf64-sh64.c (sh64_elf64_adjust_dynamic_symbol): Likewise.
* elf64-x86-64.c (elf_x86_64_adjust_dynamic_symbol): Likewise.
* elfnn-aarch64.c (elfNN_aarch64_adjust_dynamic_symbol): Likewise.
* elfxx-mips.c (_bfd_mips_elf_adjust_dynamic_symbol): Likewise.
* elfxx-sparc.c (_bfd_sparc_elf_adjust_dynamic_symbol): Likewise.
* elfxx-tilegx.c (tilegx_elf_adjust_dynamic_symbol): Likewise.
HI16/LO16 are deliberately put adjacent, which might mean relocs are
then not sorted by r_offset. See tc-mips.c:mips_frob_file. Don't undo
the HI16/LO16 sorting.
PR 17666
* elf-bfd.h (struct elf_backend_data): Add sort_relocs_p.
* elfxx-target.h (elf_backend_sort_relocs_p): Define.
(elfNN_bed): Init new field.
* elflink.c (elf_link_adjust_relocs): Conditionally sort.
(bfd_elf_final_link): Control sorting of relocs.
* elfxx-mips.c (_bfd_mips_elf_sort_relocs_p): New function.
* elfxx-mips.h (_bfd_mips_elf_sort_relocs_p): Declare.
* elf32-mips.c (elf_backend_sort_relocs_p): Define.
* elf64-mips.c (elf_backend_sort_relocs_p): Define.
In MIPS the relocation calculation only ignores the overflow checks for undefined
weak symbols on relocations associated with j/jal. This patch extends this to
the relocations used by the: b* instructions; pc/gp relative symbol offsets; and the
lwpc/ldpc MIPS r6 instructions.
bfd/
* elfxx-mips.c (mips_elf_calculate_relocation): Only check for overflow
on non-weak undefined symbols.
ld/testsuite/
* ld-mips-elf/mips-elf.exp: Add in undefined weak overflow tests for
o32, n32 and n64.
* ld-mips-elf/undefweak-overflow.s: New test.
* ld-mips-elf/undefweak-overflow.d: New test.
* ld-mips-elf/undefweak-overflow-n32.d: New test.
* ld-mips-elf/undefweak-overflow-n64.d: New test.
bfd/
* elfxx-mips.c (update_mips_abiflags_isa): Add E_MIPS_ARCH_32R6
and E_MIPS_ARCH_64R6 support.
ld/testsuite/
* ld-mips-elf/abiflags-strip10-ph.d: New file.
* ld-mips-elf/mips-eld.exp: Run the new test.
gas/
* config/tc-mips.c (mips_elf_final_processing): Add INSN_ISA32R6
and INSN_ISA64R6 support.
gas/testsuite/
* gas/mips/elf_arch_mips32r6.d: New file.
* gas/mips/elf_arch_mips64r6.d: New file.
* gas/mips/mips.exp: Run the new tests.
binutils:
2014-10-31 Andrew Pinski <apinski@cavium.com>
Naveen H.S <Naveen.Hurugalawadi@caviumnetworks.com>
* readelf.c (print_mips_isa_ext): Print the value of Octeon3.
gas:
2014-10-31 Andrew Pinski <apinski@cavium.com>
Naveen H.S <Naveen.Hurugalawadi@caviumnetworks.com>
* config/tc-mips.c (CPU_IS_OCTEON): Handle CPU_OCTEON3.
(mips_cpu_info_table): Octeon3 enables virt ase.
* doc/c-mips.texi: Document octeon3 as an acceptable value for
-march=.
gas/testsuite:
2014-10-31 Andrew Pinski <apinski@cavium.com>
Naveen H.S <Naveen.Hurugalawadi@caviumnetworks.com>
* gas/mips/mips.exp: Add support for Octeon3 architecture.
Also add in support for running Octeon3 tests.
* gas/mips/octeon3.d: New test.
* gas/mips/octeon3.s: New test source.
opcodes:
2014-10-31 Andrew Pinski <apinski@cavium.com>
Naveen H.S <Naveen.Hurugalawadi@caviumnetworks.com>
* mips-dis.c (mips_arch_choices): Add octeon3.
* mips-opc.c (IOCT): Include INSN_OCTEON3.
(IOCT2): Likewise.
(IOCT3): New define.
(IVIRT): New define.
(mips_builtin_opcodes): Add dmfgc0, dmtgc0, hypcall, mfgc0, mtgc0,
tlbinv, tlbinvf, tlbgr, tlbgwi, tlbginv, tlbginvf, tlbgwr, tlbgp, tlti
IVIRT instructions.
Extend mtm0, mtm1, mtm2, mtp0, mtp1, mtp2 instructions to take another
operand for IOCT3.
bfd:
2014-10-31 Andrew Pinski <apinski@cavium.com>
Naveen H.S <Naveen.Hurugalawadi@caviumnetworks.com>
* archures.c: Add octeon3 for mips target.
* bfd-in2.h: Regenerate.
* bfd/cpu-mips.c: Define I_mipsocteon3.
nfo_struct): Add octeon3 support.
* bfd/elfxx-mips.c: (_bfd_elf_mips_mach): Add support for
octeon3.
(mips_set_isa_flags): Add support for octeon3.
(bfd_mips_isa_ext): Add bfd_mach_mips_octeon3.
(mips_mach_extensions): Make bfd_mach_mips_octeon3 an
extension of bfd_mach_mips_octeon2.
(print_mips_isa_ext): Print the value of Octeon3.
bfd/
* elfxx-mips.c (print_mips_ases): Print unknown ASEs.
(print_mips_isa_ext): Print the value of an unknown extension.
binutils/
* readelf.c (print_mips_ases): Print unknown ASEs.
(print_mips_isa_ext): Print the value of an unknown extension.
include/
* elf/mips.h (AFL_ASE_MASK): Define.
bfd/
* aoutx.h (NAME (aout, machine_type)): Add mips32r6 and mips64r6.
* archures.c (bfd_architecture): Likewise.
* bfd-in2.h (bfd_architecture): Likewise.
(bfd_reloc_code_real): Add relocs BFD_RELOC_MIPS_21_PCREL_S2,
BFD_RELOC_MIPS_26_PCREL_S2, BFD_RELOC_MIPS_18_PCREL_S3 and
BFD_RELOC_MIPS_19_PCREL_S2.
* cpu-mips.c (arch_info_struct): Add mips32r6 and mips64r6.
* elf32-mips.c: Define relocs R_MIPS_PC21_S2, R_MIPS_PC26_S2
R_MIPS_PC18_S3, R_MIPS_PC19_S2, R_MIPS_PCHI16 and R_MIPS_PCLO16.
(mips_reloc_map): Add entries for BFD_RELOC_MIPS_21_PCREL_S2,
BFD_RELOC_MIPS_26_PCREL_S2, BFD_RELOC_MIPS_18_PCREL_S3,
BFD_RELOC_MIPS_19_PCREL_S2, BFD_RELOC_HI16_S_PCREL and
BFD_RELOC_LO16_PCREL.
* elf64-mips.c: Define REL, and RELA relocations R_MIPS_PC21_S2,
R_MIPS_PC26_S2, R_MIPS_PC18_S3, R_MIPS_PC19_S2, R_MIPS_PCHI16
and R_MIPS_PCLO16.
(mips_reloc_map): Add entries for BFD_RELOC_MIPS_21_PCREL_S2,
BFD_RELOC_MIPS_26_PCREL_S2, BFD_RELOC_MIPS_18_PCREL_S3,
BFD_RELOC_MIPS_19_PCREL_S2, BFD_RELOC_HI16_S_PCREL and
BFD_RELOC_LO16_PCREL.
* elfn32-mips.c: Likewise.
* elfxx-mips.c (MIPSR6_P): New define.
(mipsr6_exec_plt_entry): New array.
(hi16_reloc_p): Add support for R_MIPS_PCHI16.
(lo16_reloc_p): Add support for R_MIPS_PCLO16.
(aligned_pcrel_reloc_p): New function.
(mips_elf_relocation_needs_la25_stub): Add support for relocs:
R_MIPS_PC21_S2 and R_MIPS_PC26_S2.
(mips_elf_calculate_relocation): Add support for relocs:
R_MIPS_PC21_S2, R_MIPS_PC26_S2, R_MIPS_PC18_S3, R_MIPS_PC19_S2,
R_MIPS_PCHI16 and R_MIPS_PCLO16.
(_bfd_elf_mips_mach): Add support for mips32r6 and mips64r6.
(mips_elf_add_lo16_rel_addend): Add support for R_MIPS_PCHI16.
(_bfd_mips_elf_check_relocs): Add support for relocs:
R_MIPS_PC21_S2 and R_MIPS_PC26_S2.
(_bfd_mips_elf_relocate_section): Add a check for unaligned
pc relative relocs.
(_bfd_mips_elf_finish_dynamic_symbol): Add support for MIPS r6
plt entry.
(mips_set_isa_flags): Add support for mips32r6 and mips64r6.
(_bfd_mips_elf_print_private_bfd_data): Likewise.
(mips_32bit_flags_p): Add support for mips32r6.
* libbfd.h (bfd_reloc_code_real_names): Add entries for
BFD_RELOC_MIPS_21_PCREL_S2, BFD_RELOC_MIPS_26_PCREL_S2,
BFD_RELOC_MIPS_18_PCREL_S3 and BFD_RELOC_MIPS_19_PCREL_S2.
* reloc.c: Document relocs BFD_RELOC_MIPS_21_PCREL_S2,
BFD_RELOC_MIPS_26_PCREL_S2, BFD_RELOC_MIPS_18_PCREL_S3 and
BFD_RELOC_MIPS_19_PCREL_S2.
binutils/
* readelf.c (get_machine_flags): Add support for mips32r6 and
mips64r6.
elfcpp/
* mips.h (E_MIPS_ARCH_32R6, E_MIPS_ARCH_64R6): New enum constants.
gas/
* config/tc-mips.c (mips_nan2008): New static global.
(mips_flag_nan2008): Removed.
(LL_SC_FMT): New define.
(COP12_FMT): Updated.
(ISA_IS_R6): New define.
(ISA_HAS_64BIT_REGS): Add mips64r6.
(ISA_HAS_DROR): Likewise.
(ISA_HAS_64BIT_FPRS): Add mips32r6 and mips64r6.
(ISA_HAS_ROR): Likewise.
(ISA_HAS_ODD_SINGLE_FPR): Likewise.
(ISA_HAS_MXHC1): Likewise.
(hilo_interlocks): Likewise.
(md_longopts): Likewise.
(ISA_HAS_LEGACY_NAN): New define.
(options): Add OPTION_MIPS32R6 and OPTION_MIPS64R6.
(mips_ase): Add field rem_rev.
(mips_ases): Updated to add which ISA an ASE was removed in.
(mips_isa_rev): Add support for mips32r6 and mips64r6.
(mips_check_isa_supports_ase): Add support to check if an ASE
has been removed in the specified MIPS ISA revision.
(validate_mips_insn): Skip '-' character.
(macro_build): Likewise.
(mips_check_options): Prevent R6 working with fp32, mips16,
micromips, or branch relaxation.
(file_mips_check_options): Set R6 floating point registers to
64 bit. Also deal with the nan2008 option.
(limited_pcrel_reloc_p): Add relocs: BFD_RELOC_MIPS_21_PCREL_S2,
BFD_RELOC_MIPS_26_PCREL_S2, BFD_RELOC_MIPS_18_PCREL_S3,
BFD_RELOC_MIPS_19_PCREL_S2, BFD_RELOC_HI16_S_PCREL and
BFD_RELOC_LO16_PCREL.
(operand_reg_mask): Add support for OP_SAME_RS_RT, OP_CHECK_PREV
and OP_NON_ZERO_REG.
(match_check_prev_operand): New static function.
(match_same_rs_rt_operand): New static function.
(match_non_zero_reg_operand): New static function.
(match_operand): Added entries for: OP_SAME_RS_RT, OP_CHECK_PREV
and OP_NON_ZERO_REG.
(insns_between): Added case to deal with forbidden slots.
(append_insn): Added support for relocs: BFD_RELOC_MIPS_21_PCREL_S2
and BFD_RELOC_MIPS_26_PCREL_S2.
(match_insn): Add support for operands -A, -B, +' and +". Also
skip '-' character.
(mips_percent_op): Add entries for %pcrel_hi and %pcrel_lo.
(md_parse_option): Add support for mips32r6 and mips64r6. Also
update the nan option handling.
(md_pcrel_from): Add cases for relocs: BFD_RELOC_MIPS_21_PCREL_S2,
BFD_RELOC_MIPS_26_PCREL_S2.
(mips_force_relocation): Prevent forced relaxation for MIPS r6.
(md_apply_fix): Add support for relocs: BFD_RELOC_MIPS_21_PCREL_S2,
BFD_RELOC_MIPS_26_PCREL_S2, BFD_RELOC_MIPS_18_PCREL_S3,
BFD_RELOC_MIPS_19_PCREL_S2, BFD_RELOC_HI16_S_PCREL and
BFD_RELOC_LO16_PCREL.
(s_mipsset): Add support for mips32r6 and mips64r6.
(s_nan): Update to support the new nan2008 framework.
(tc_gen_reloc): Add relocs: BFD_RELOC_MIPS_21_PCREL_S2,
BFD_RELOC_MIPS_26_PCREL_S2, BFD_RELOC_MIPS_18_PCREL_S3,
BFD_RELOC_MIPS_19_PCREL_S2, BFD_RELOC_HI16_S_PCREL and
BFD_RELOC_LO16_PCREL.
(mips_elf_final_processing): Updated to use the mips_nan2008.
(mips_cpu_info_table): Add entries for mips32r6 and mips64r6.
(macro): Enable ldc2, sdc2, ll, lld, swc2, sc, scd, cache, pref
macros for R6.
(mips_fix_adjustable): Make PC relative R6 relocations relative
to the symbol and not the section.
* configure.ac: Add support for mips32r6 and mips64r6.
* configure: Regenerate.
* doc/c-mips.texi: Document the -mips32r6 and -mips64r6 command line
options.
* doc/as.texinfo: Likewise.
gas/testsuite/
* gas/mips/24k-triple-stores-1.s: If testing for r6 prevent
non-supported instructions from being tested.
* gas/mips/24k-triple-stores-2.s: Likewise.
* gas/mips/24k-triple-stores-3.s: Likewise.
* gas/mips/24k-triple-stores-6.s: Likewise.
* gas/mips/beq.s: Likewise.
* gas/mips/eva.s: Likewise.
* gas/mips/ld-zero-3.s: Likewise.
* gas/mips/mips32-cp2.s: Likewise.
* gas/mips/mips32.s: Likewise.
* gas/mips/mips4.s: Likewise.
* gas/mips/add.s: Don't test the add instructions if r6, and
add padding.
* gas/mips/add.d: Check for a triple dot not a nop at the end of the
disassembly output.
* gas/mips/micromips@add.d: Likewise.
* gas/mips/mipsr6@24k-branch-delay-1.d: New file.
* gas/mips/mipsr6@24k-triple-stores-1.d: New file.
* gas/mips/mipsr6@24k-triple-stores-2-llsc.d: New file.
* gas/mips/mipsr6@24k-triple-stores-2.d: New file.
* gas/mips/mipsr6@24k-triple-stores-3.d: New file.
* gas/mips/mipsr6@24k-triple-stores-6.d: New file.
* gas/mips/mipsr6@add.d: New file.
* gas/mips/mipsr6@attr-gnu-4-1-msingle-float.l: New file.
* gas/mips/mipsr6@attr-gnu-4-1-msingle-float.s: New file.
* gas/mips/mipsr6@attr-gnu-4-1-msoft-float.l: New file.
* gas/mips/mipsr6@attr-gnu-4-1-msoft-float.s: New file.
* gas/mips/mipsr6@attr-gnu-4-2-mdouble-float.l: New file.
* gas/mips/mipsr6@attr-gnu-4-2-mdouble-float.s: New file.
* gas/mips/mipsr6@beq.d: New file.
* gas/mips/mipsr6@bge.d: New file.
* gas/mips/mipsr6@bgeu.d: New file.
* gas/mips/mipsr6@blt.d: New file.
* gas/mips/mipsr6@bltu.d: New file.
* gas/mips/mipsr6@branch-misc-1.d: New file.
* gas/mips/mipsr6@branch-misc-2-64.d: New file.
* gas/mips/mipsr6@branch-misc-2pic-64.d: New file.
* gas/mips/mipsr6@branch-misc-4-64.d: New file.
* gas/mips/mipsr6@cache.d: New file.
* gas/mips/mipsr6@eva.d: New file.
* gas/mips/mipsr6@jal-svr4pic-noreorder.d: New file.
* gas/mips/mipsr6@jal-svr4pic.d: New file.
* gas/mips/mipsr6@ld-zero-2.d: New file.
* gas/mips/mipsr6@ld-zero-3.d: New file.
* gas/mips/mipsr6@loc-swap-dis.d: New file.
* gas/mips/mipsr6@mips32-cp2.d: New file.
* gas/mips/mipsr6@mips32-imm.d: New file.
* gas/mips/mipsr6@mips32.d: New file.
* gas/mips/mipsr6@mips32r2.d: New file.
* gas/mips/mipsr6@mips4-fp.d: New file.
* gas/mips/mipsr6@mips4-fp.l: New file.
* gas/mips/mipsr6@mips4-fp.s: New file.
* gas/mips/mipsr6@mips4.d: New file.
* gas/mips/mipsr6@mips5-fp.d: New file.
* gas/mips/mipsr6@mips5-fp.l: New file.
* gas/mips/mipsr6@mips5-fp.s: New file.
* gas/mips/mipsr6@mips64.d: New file.
* gas/mips/mipsr6@msa-branch.d: New file.
* gas/mips/mipsr6@msa.d: New file.
* gas/mips/mipsr6@pref.d: New file.
* gas/mips/mipsr6@relax-swap3.d: New file.
* gas/mips/r6-64-n32.d: New file.
* gas/mips/r6-64-n64.d: New file.
* gas/mips/r6-64-removed.l: New file.
* gas/mips/r6-64-removed.s: New file.
* gas/mips/r6-64.s: New file.
* gas/mips/r6-attr-none-double.d: New file.
* gas/mips/r6-n32.d: New file.
* gas/mips/r6-n64.d: New file.
* gas/mips/r6-removed.l: New file.
* gas/mips/r6-removed.s: New file.
* gas/mips/r6.d: New file.
* gas/mips/r6.s: New file.
* gas/mips/mipsr6@mips32-dsp.d: New file.
* gas/mips/mipsr6@mips32-dspr2.d: New file.
* gas/mips/mipsr6@mips32r2-ill.l: New file.
* gas/mips/mipsr6@mips32r2-ill.s: New file.
* gas/mips/cache.s: Add r6 instruction varients.
* gas/mips/mips.exp: Add support for the mips32r6 and mips64r6
architectures. Also prevent non r6 supported tests from running.
Finally, add in support for running the new r6 tests.
(run_dump_test_arch): Add support for mipsr6 tests.
(run_list_test_arch): Add support for using files of the
form arch@testname.l .
include/elf/
* mips.h: Add relocs: R_MIPS_PC21_S2, R_MIPS_PC26_S2, R_MIPS_PC18_S3,
R_MIPS_PC19_S2, R_MIPS_PCHI16 and R_MIPS_PCLO16.
(E_MIPS_ARCH_32R6): New define.
(E_MIPS_ARCH_64R6): New define.
include/opcode/
* mips.h (mips_operand_type): Add new entries: OP_SAME_RS_RT,
OP_CHECK_PREV and OP_NON_ZERO_REG. Add descriptions for the MIPS R6
instruction arguments: -a, -b, -d, -s, -t, -u, -v, -w, -x, -y, -A, -B,
+I, +O, +R, +:, +\, +", +;
(mips_check_prev_operand): New struct.
(INSN2_FORBIDDEN_SLOT): New define.
(INSN_ISA32R6): New define.
(INSN_ISA64R6): New define.
(INSN_UPTO32R6): New define.
(INSN_UPTO64R6): New define.
(mips_isa_table): Add INSN_UPTO32R6 and INSN_UPTO64R6.
(ISA_MIPS32R6): New define.
(ISA_MIPS64R6): New define.
(CPU_MIPS32R6): New define.
(CPU_MIPS64R6): New define.
(cpu_is_member): Add cases for CPU_MIPS32R6, and CPU_MIPS64R6.
ld/
* ldmain.c (get_emulation): Add support for -mips32r6 and -mips64r6.
opcodes/
* mips-dis.c (mips_arch_choices): Add entries for mips32r6 and
mips64r6.
(parse_mips_dis_option): Allow MSA and virtualization support for
mips64r6.
(mips_print_arg_state): Add fields dest_regno and seen_dest.
(mips_seen_register): New function.
(print_insn_arg): Refactored code to use mips_seen_register
function. Add support for OP_SAME_RS_RT, OP_CHECK_PREV and
OP_NON_ZERO_REG. Changed OP_REPEAT_DEST_REG case to print out
the register rather than aborting.
(print_insn_args): Add length argument. Add code to correctly
calculate the instruction address for pc relative instructions.
(validate_insn_args): New static function.
(print_insn_mips): Prevent jalx disassembling for r6. Use
validate_insn_args.
(print_insn_micromips): Use validate_insn_args.
all the arguments are valid.
* mips-formats.h (PREV_CHECK): New define.
* mips-opc.c (decode_mips_operand): Add support for -a, -b, -d, -s,
-t, -u, -v, -w, -x, -y, -A, -B, +I, +O, +R, +:, +\, +", +;
(RD_pc): New define.
(FS): New define.
(I37): New define.
(I69): New define.
(mips_builtin_opcodes): Add MIPS R6 instructions. Exclude recoded
MIPS R6 instructions from MIPS R2 instructions.
This patch firstly adds support for mips32r3 mips32r5, mips64r3
and mips64r5. Secondly it adds support for the eretnc instruction.
ChangeLog:
bfd/
* aoutx.h (NAME (aout, machine_type)): Add mips32r3, mips64r3,
mips32r5 and mips64r5.
* archures.c (bfd_architecture): Likewise.
* bfd-in2.h (bfd_architecture): Likewise.
* cpu-mips.c (arch_info_struct): Likewise.
* elfxx-mips.c (mips_set_isa_flags): Likewise.
gas/
* tc-mips.c (ISA_SUPPORTS_MIPS16E): Add mips32r3, mips32r5, mips64r3
and mips64r5.
(ISA_HAS_64BIT_FPRS): Likewise.
(ISA_HAS_ROR): Likewise.
(ISA_HAS_ODD_SINGLE_FPR): Likewise.
(ISA_HAS_MXHC1): Likewise.
(hilo_interlocks): Likewise.
(md_longopts): Likewise.
(ISA_HAS_64BIT_REGS): Add mips64r3 and mips64r5.
(ISA_HAS_DROR): Likewise.
(options): Add OPTION_MIPS32R3, OPTION_MIPS32R5, OPTION_MIPS64R3, and
OPTION_MIPS64R5.
(mips_isa_rev): Add support for mips32r3, mips32r5, mips64r3 and
mips64r5.
(md_parse_option): Likewise.
(s_mipsset): Likewise.
(mips_cpu_info_table): Add entries for mips32r3, mips32r5, mips64r3
and mips64r5. Also change p5600 entry to be mips32r5.
* configure.in: Add support for mips32r3, mips32r5, mips64r3 and
mips64r5.
* configure: Regenerate.
* doc/c-mips.texi: Document the -mips32r3, -mips32r5, -mips64r3 and
-mips64r5 command line options.
* doc/as.texinfo: Likewise.
gas/testsuite/
* gas/mips/mips.exp: Add MIPS32r5 tests. Also add the mips32r3,
mips32r5, mips64r3 and mips64r5 isas to the testsuite.
* gas/mips/r5.s: New test.
* gas/mips/r5.d: Likewise.
include/opcode/
* mips.h (INSN_ISA_MASK): Updated.
(INSN_ISA32R3): New define.
(INSN_ISA32R5): New define.
(INSN_ISA64R3): New define.
(INSN_ISA64R5): New define.
(INSN_ISA64, INSN_ISA64R2, INSN_ISA3_32, INSN_ISA3_32R2, INSN_ISA4_32
INSN_ISA4_32R2, INSN_ISA5_32R2): Renumbered.
(mips_isa_table): Add entries for mips32r3, mips32r5, mips64r3 and
mips64r5.
(INSN_UPTO32R3): New define.
(INSN_UPTO32R5): New define.
(INSN_UPTO64R3): New define.
(INSN_UPTO64R5): New define.
(ISA_MIPS32R3): New define.
(ISA_MIPS32R5): New define.
(ISA_MIPS64R3): New define.
(ISA_MIPS64R5): New define.
(CPU_MIPS32R3): New define.
(CPU_MIPS32R5): New define.
(CPU_MIPS64R3): New define.
(CPU_MIPS64R5): New define.
opcodes/
* mips-opc.c (mips_builtin_opcodes): Add MIPS32r5 eretnc instruction.
(I34): New define.
(I36): New define.
(I66): New define.
(I68): New define.
* mips-dis.c (mips_arch_choices): Add mips32r3, mips32r5, mips64r3 and
mips64r5.
(parse_mips_dis_option): Update MSA and virtualization support to
allow mips64r3 and mips64r5.
* elfxx-mips.h (elfxx-mips.h): Declare.
* elfxx-mips.c (mips_elf_merge_obj_attributes): Use it to report
Tag_GNU_MIPS_ABI_FP mismatches.
(_bfd_mips_fp_abi_string): New function.
be placed towards the front of local GOT space, while entries addressed
via a 32-bit index are placed towards the rear.
Provided that there are fewer than ~16K local GOT entries addressed via
a 16-bit index in total, this should eliminate any relocation overflows
caused by such GOT entries being allocated beyond the addressable range.
bfd/
* elfxx-mips.c (struct mips_got_info): Delete assigned_gotno
field. Add assigned_low_gotno and assigned_high_gotno fields.
(mips_elf_create_local_got_entry): Update out-of-space condition.
Set index of new GOT entry to assigned_low_gotno if required by
the current relocation, else set it to assigned_high_gotno.
(mips_elf_set_global_gotidx): Replace uses of assigned_gotno
with assigned_low_gotno.
(mips_elf_multi_got): Initialize assigned_low_gotno and
assigned_high_gotno in secondary GOTs. Use assigned_low_gotno
in place of assigned_gotno when handling global GOT entries.
(mips_elf_lay_out_got): Initialize assigned_low_gotno and
assigned_high_gotno.
(_bfd_mips_elf_finish_dynamic_sections): Account for a possible
gap in the middle of local GOT space.
ld/testsuite/
* ld-mips-elf/elf-rel-xgot-n32.d: Update for new GOT layout.
* ld-mips-elf/elf-rel-xgot-n32-embed.d: Likewise.
* ld-mips-elf/elf-rel-xgot-n64.d: Likewise.
* ld-mips-elf/elf-rel-xgot-n64-embed.d: Likewise.
* ld-mips-elf/elf-rel-xgot-n64-linux.d: Likewise.
Maciej W. Rozycki
Alan Modra
Matthew Fortune
Nick Clifton
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Catherine Moore
Rich Felker
H.J. Lu
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Joseph Myers
Andrew Bennett
Richard Sandiford
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