GLIBC BZ#20311 [1] proc_service.h install patch also remove 'const'
attributes from ps_get_thread_area and comment #15 discuss why to remove
the const attribute (basically since it a callback with the struct
ps_prochandle owned by the client it should be able to modify it if
it the case).
On default build this is not the issue and current g++ does not trigger
any issue with this mismatch declaration. However, on some bootstrap
build configuration where gdbserver is build with gcc instead this
triggers:
error: conflicting types for 'ps_get_thread_area'
This patch fixes it by syncing the declaration with GLIBC.
[1] https://sourceware.org/bugzilla/show_bug.cgi?id=20311
gdb/ChangeLog:
2016-08-25 Adhemerval Zanella <adhemerval.zanella@linaro.org>
* aarch64-linux-nat.c (ps_get_thread_area): Remove const from
struct ps_prochandle.
* amd64-linux-nat.c (ps_get_thread_area): Likewise.
* arm-linux-nat.c (ps_get_thread_area): Likewise.
* gdb_proc_service.h (ps_get_thread_area): Likewise.
* i386-linux-nat.c (ps_get_thread_area): Likewise.
* m68klinux-nat.c (ps_get_thread_area): Likewise.
* mips-linux-nat.c (ps_get_thread_area): Likewise.
* nat/aarch64-linux.c (aarch64_ps_get_thread_area): Likewise.
* nat/aarch64-linux.h (aarch64_ps_get_thread_area): Likewise.
* xtensa-linux-nat.c (ps_get_thread_area): Likewise.
gdb/gdbserver/ChangeLog:
2016-08-25 Adhemerval Zanella <adhemerval.zanella@linaro.org>
PR server/20491
* gdb_proc_service.h (ps_get_thread_area): Remove const from struct
ps_prochandle.
* linux-aarch64-low.c (ps_get_thread_area): Likewise.
* linux-arm-low.c (ps_get_thread_area): Likewise.
* linux-crisv32-low.c (ps_get_thread_area): Likewise.
* linux-m68k-low.c (ps_get_thread_area): Likewise.
* linux-mips-low.c (ps_get_thread_area): Likewise.
* linux-nios2-low.c (ps_get_thread_area): Likewise.
* linux-tic6x-low.c (ps_get_thread_area): Likewise.
* linux-x86-low.c (ps_get_thread_area): Likewise.
* linux-xtensa-low.c (ps_get_thread_area): Likewise.
I find the following test fail when I test native aarch64 gdb with
arm program,
(gdb) PASS: gdb.base/attach-pie-noexec.exp: attach
set architecture arm^M
warning: Selected architecture arm is not compatible with reported target architecture aarch64^M
Architecture `arm' not recognized.^M
The target architecture is set automatically (currently aarch64)^M
(gdb) FAIL: gdb.base/attach-pie-noexec.exp: set architecture arm
GDB thinks the target is aarch64, but it isn't. Nowadays, we are
using some entries AT_PHENT and AT_HWCAP in auxv to determine whether
the process is a 32-bit arm one or 64-bit aarch64 one, and get the
right gdbarch. However, in the process of parsing auxv (in
inf_ptrace_auxv_parse), the size of int and data pointer of
target_gdbarch is used. If debug program exists (in most of cases),
target_gdbarch is already set according to the debug program, which
is arm in my case. Then, GDB can parse auxv successfully. However,
in gdb.base/attach-pie-noexec.exp, the debug program is removed,
target_gdbarch is aarch64 when GDB parse auxv, so GDB can't parse
it successfully.
Instead of using auxv, we check the return value of ptrace NT_ARM_VFP.
If the program is an arm process, NT_ARM_VFP is OK, otherwise, error
is returned.
Additionally, we only return tdesc_arm_with_neon for arm process,
because neon is mandatory on ARMv8.
gdb:
2016-08-04 Yao Qi <yao.qi@linaro.org>
* aarch64-linux-nat.c (tdesc_arm_with_vfpv3): Remove the
declaration.
(aarch64_linux_read_description): Remove code on getting
auxv and select target description on it. Select target
description by the result of NT_ARM_VFP ptrace request.
Nowadays, both aarch64 GDB and linux kernel assumes that address for
setting breakpoint should be 4-byte aligned. However that is not true
after we support multi-arch, because thumb instruction can be at 2-byte
aligned address. Patch http://lists.infradead.org/pipermail/linux-arm-kernel/2015-October/375141.html
to linux kernel is to teach kernel to handle 2-byte aligned address for
HW breakpoint, while this patch is to teach aarch64 GDB handle 2-byte
aligned address.
First of all, we call gdbarch_breakpoint_from_pc to get the instruction
length rather than using hard-coded 4. Secondly, in GDBserver, we set
length back to 2 if it is 3, because GDB encode 3 in it to indicate it
is a 32-bit thumb breakpoint. Then we relax the address alignment
check from 4-byte aligned to 2-byte aligned.
This patch enables some tests (such as gdb.base/break-idempotent.exp,
gdb.base/cond-eval-mode.exp, gdb.base/watchpoint-reuse-slot.exp,) and
fixes many fails (such as gdb.base/hbreak2.exp) when the program is
compiled in thumb mode on aarch64.
Regression tested on aarch64-linux, both native and gdbserver. This
is the last patch of multi-arch work.
gdb:
2015-10-15 Yao Qi <yao.qi@linaro.org>
* aarch64-linux-nat.c (aarch64_linux_insert_hw_breakpoint):
Call gdbarch_breakpoint_from_pc to instruction length.
(aarch64_linux_remove_hw_breakpoint): Likewise.
* common/common-regcache.h (regcache_register_size): Declare.
* nat/aarch64-linux-hw-point.c: Include "common-regcache.h".
(aarch64_point_is_aligned): Set alignment to 2 for breakpoint if
the process is 32bit, otherwise set alignment to 4.
(aarch64_handle_breakpoint): Update comments.
* regcache.c (regcache_register_size): New function.
gdb/gdbserver:
2015-10-15 Yao Qi <yao.qi@linaro.org>
* linux-aarch64-low.c (aarch64_insert_point): Set len to 2
if it is 3.
(aarch64_remove_point): Likewise.
* regcache.c (regcache_register_size): New function.
With the kernle fix <http://lists.infradead.org/pipermail/linux-arm-kernel/2015-July/356511.html>,
aarch64 GDB is able to read the base of thread area of 32-bit arm
program through NT_ARM_TLS.
This patch is to teach both GDB and GDBserver to read the base of
thread area correctly in the multi-arch case. A new function
aarch64_ps_get_thread_area is added, and is shared between GDB and
GDBserver.
With this patch applied, the following fails in multi-arch testing
(GDB is aarch64 but the test cases are arm) are fixed,
-FAIL: gdb.threads/tls-nodebug.exp: thread local storage
-FAIL: gdb.threads/tls-shared.exp: print thread local storage variable
-FAIL: gdb.threads/tls-so_extern.exp: print thread local storage variable
-FAIL: gdb.threads/tls-var.exp: print tls_var
-FAIL: gdb.threads/tls.exp: first thread local storage
-FAIL: gdb.threads/tls.exp: first another thread local storage
-FAIL: gdb.threads/tls.exp: p a_thread_local
-FAIL: gdb.threads/tls.exp: p file2_thread_local
-FAIL: gdb.threads/tls.exp: p a_thread_local second time
gdb:
2015-09-18 Yao Qi <yao.qi@linaro.org>
* nat/aarch64-linux.c: Include elf/common.h,
nat/gdb_ptrace.h, asm/ptrace.h and sys/uio.h.
(aarch64_ps_get_thread_area): New function.
* nat/aarch64-linux.h: Include gdb_proc_service.h.
(aarch64_ps_get_thread_area): Declare.
* aarch64-linux-nat.c (ps_get_thread_area): Call
aarch64_ps_get_thread_area.
gdb/gdbserver:
2015-09-18 Yao Qi <yao.qi@linaro.org>
* linux-aarch64-low.c: Don't include sys/uio.h.
(ps_get_thread_area): Call aarch64_ps_get_thread_area.
Nowadays, GDB only knows whether architecture supports hardware single
step or software single step (through gdbarch hook software_single_step),
and for a given instruction or instruction sequence, GDB knows how to
do single step (hardware or software). However, GDB doesn't know whether
the target supports hardware single step. It is possible that the
architecture doesn't support hardware single step, such as arm, but
the target supports, such as simulator. This was discussed in this
thread https://www.sourceware.org/ml/gdb/2009-12/msg00033.html before.
I encounter this problem for aarch64 multi-arch support. When aarch64
debugs arm program, gdbarch is arm, so software single step is still
used. However, the underneath linux kernel does support hardware
single step, so IWBN to use it.
This patch is to add a new target_ops hook to_can_do_single_step, and
only use it in arm_linux_software_single_step to decide whether or not
to use hardware single step. On the native aarch64 linux target, 1 is
returned. On other targets, -1 is returned. On the remote target, if
the target supports s and S actions in the vCont? reply, then target
can do single step. However, old GDBserver will send s and S in the
reply to vCont?, which will confuse new GDB. For example, old GDBserver
on arm-linux will send s and S in the reply to vCont?, but it doesn't
support hardware single step. On the other hand, new GDBserver, on
arm-linux for example, will not send s and S in the reply to vCont?,
but old GDB thinks it doesn't support vCont packet at all. In order
to address this problem, I add a new qSupported feature vContSupported,
which indicates GDB wants to know the supported actions in the reply
to vCont?, and qSupported response contains vContSupported if the
stub is able tell supported vCont actions in the reply of vCont?.
If the patched GDB talks with patched GDBserver on x86, the RSP traffic
is like this:
-> $qSupported:...+;vContSupported+
<- ...+;vContSupported+
...
-> $vCont?
<- vCont;c;C;t;s;S;r
then, GDB knows the stub can do single step, and may stop using software
single step even the architecture doesn't support hardware single step.
If the patched GDB talks with patched GDBserver on arm, the last vCont?
reply will become:
<- vCont;c;C;t
GDB thinks the target doesn't support single step, so it will use software
single step.
If the patched GDB talks with unpatched GDBserver, the RSP traffic is like
this:
-> $qSupported:...+;vContSupported+
<- ...+
...
-> $vCont?
<- vCont;c;C;t;s;S;r
although GDBserver returns s and S, GDB still thinks GDBserver may not
support single step because it doesn't support vContSupported.
If the unpatched GDB talks with patched GDBserver on x86, the RSP traffic
is like:
-> $qSupported:...+;
<- ...+;vContSupported+
...
-> $vCont?
<- vCont;c;C;t;s;S;r
Since GDB doesn't sent vContSupported in the qSupported feature, GDBserver
sends s and S regardless of the support of hardware single step.
gdb:
2015-09-15 Yao Qi <yao.qi@linaro.org>
* aarch64-linux-nat.c (aarch64_linux_can_do_single_step): New
function.
(_initialize_aarch64_linux_nat): Install it to to_can_do_single_step.
* arm-linux-tdep.c (arm_linux_software_single_step): Return 0
if target_can_do_single_step returns 1.
* remote.c (struct vCont_action_support) <s, S>: New fields.
(PACKET_vContSupported): New enum.
(remote_protocol_features): New element for vContSupported.
(remote_query_supported): Append "vContSupported+".
(remote_vcont_probe): Remove support_s and support_S, use
rs->supports_vCont.s and rs->supports_vCont.S instead. Disable
vCont packet if c and C actions are not supported.
(remote_can_do_single_step): New function.
(init_remote_ops): Install it to to_can_do_single_step.
(_initialize_remote): Call add_packet_config_cmd.
* target.h (struct target_ops) <to_can_do_single_step>: New field.
(target_can_do_single_step): New macro.
* target-delegates.c: Re-generated.
gdb/gdbserver:
2015-09-15 Yao Qi <yao.qi@linaro.org>
* server.c (vCont_supported): New global variable.
(handle_query): Set vCont_supported to 1 if "vContSupported+"
matches. Append ";vContSupported+" to own_buf.
(handle_v_requests): Append ";s;S" to own_buf if target supports
hardware single step or vCont_supported is false.
(capture_main): Set vCont_supported to zero.
gdb/doc:
2015-09-15 Yao Qi <yao.qi@linaro.org>
* gdb.texinfo (General Query Packets): Add vContSupported to
tables of 'gdbfeatures' and 'stub features' supported in the
qSupported packet, as well as to the list containing stub
feature details.
This patch is to fixup the siginfo_t when aarch64 gdb or gdbserver
read from or write to the arm inferior. It is to convert the
"struct siginfo_t" between aarch64 and arm, which is quite mechanical.
gdb/gdbserver:
2015-09-15 Yao Qi <yao.qi@linaro.org>
* linux-aarch64-low.c (aarch64_linux_siginfo_fixup): New
function.
(struct linux_target_ops the_low_target): Install
aarch64_linux_siginfo_fixup.
gdb:
2015-09-15 Yao Qi <yao.qi@linaro.org>
* aarch64-linux-nat.c (aarch64_linux_siginfo_fixup): New function.
(_initialize_aarch64_linux_nat): Call linux_nat_set_siginfo_fixup.
* nat/aarch64-linux.c (aarch64_compat_siginfo_from_siginfo):
New function.
(aarch64_siginfo_from_compat_siginfo): New function.
* nat/aarch64-linux.h: Include signal.h.
(compat_int_t, compat_uptr_t, compat_time_t): Typedef.
(compat_timer_t, compat_clock_t): Likewise.
(struct compat_timeval): New.
(union compat_sigval): New.
(struct compat_siginfo): New.
(cpt_si_pid, cpt_si_uid, cpt_si_timerid): New macros.
(cpt_si_overrun, cpt_si_status, cpt_si_utime): Likewise.
(cpt_si_stime, cpt_si_ptr, cpt_si_addr): Likewise.
(cpt_si_band, cpt_si_fd): Likewise.
Nowadays, if user requests HW watchpoint to monitor a large memory area
or unaligned area, aarch64 GDB will split into multiple aligned areas,
and use multiple debugging registers to watch them. However, the
registers are not updated in a transaction way. GDBserver doesn't revert
updates in previous iterations if some debugging registers fail to update
due to some reason, like no free debugging registers available, in the
latter iteration. For example, if we have a char buf[34], and watch buf
in gdb,
(gdb) watch buf
Hardware watchpoint 2: buf
(gdb) c
Continuing.
infrun: clear_proceed_status_thread (Thread 13466)
infrun: proceed (addr=0xffffffffffffffff, signal=GDB_SIGNAL_DEFAULT)
infrun: step-over queue now empty
infrun: resuming [Thread 13466] for step-over
Sending packet: $m410838,22#35...Packet received: 00000000000000000000000000000000000000000000000000000000000000000000
infrun: skipping breakpoint: stepping past insn at: 0x400524
infrun: skipping breakpoint: stepping past insn at: 0x400524
Sending packet: $Z2,410838,22#80...Packet received: E01 <----- [1]
Packet Z2 (write-watchpoint) is supported
Sending packet: $Z0,7fb7fe0a8c,4#43...Packet received: OK
Warning:
Could not insert hardware watchpoint 2.
Could not insert hardware breakpoints:
You may have requested too many hardware breakpoints/watchpoints.
GDB receives E01 for Z2 packet [1] but GDBserver updates the debugging
register status,
insert_point (addr=0x00410838, len=34, type=hw-write-watchpoint):
BREAKPOINTs:
BP0: addr=0x0, ctrl=0x00000000, ref.count=0
BP1: addr=0x0, ctrl=0x00000000, ref.count=0
BP2: addr=0x0, ctrl=0x00000000, ref.count=0
BP3: addr=0x0, ctrl=0x00000000, ref.count=0
BP4: addr=0x0, ctrl=0x00000000, ref.count=0
BP5: addr=0x0, ctrl=0x00000000, ref.count=0
WATCHPOINTs:
WP0: addr=0x410850, ctrl=0x00001ff5, ref.count=1
WP1: addr=0x410848, ctrl=0x00001ff5, ref.count=1
WP2: addr=0x410840, ctrl=0x00001ff5, ref.count=1
WP3: addr=0x410838, ctrl=0x00001ff5, ref.count=1
four debugging registers can not monitor 34-byte long area, so the last
iteration of updating debugging register state fails but previous
iterations succeed. This makes GDB think no HW watchpoint is inserted
but some debugging registers are used.
This problem was exposed by "watch buf" gdb.base/watchpoint.exp with
aarch64 GDBserver debugging arm 32-bit program. The buf is 30-byte long
but 4-byte aligned, and four debugging registers can't cover 34-byte
(extend 4 bytes to be 8-byte aligned) area. However, this problem
does exist on non-multi-arch debugging scenario as well.
This patch moves code in aarch64_linux_region_ok_for_hw_watchpoint to
aarch64_linux_region_ok_for_watchpoint in nat/aarch64-linux-hw-point.c.
Then, checks with aarch64_linux_region_ok_for_watchpoint, like what we
are doing in GDB. If the region is OK, call aarch64_handle_watchpoint.
Regression tested on aarch64 with both 64-bit program and 32-bit
program. Some fails in gdb.base/watchpoint.exp are fixed.
gdb:
2015-09-03 Yao Qi <yao.qi@linaro.org>
* aarch64-linux-nat.c (aarch64_linux_region_ok_for_hw_watchpoint):
Move code to aarch64_linux_region_ok_for_watchpoint. Call
aarch64_linux_region_ok_for_watchpoint.
* nat/aarch64-linux-hw-point.c (aarch64_linux_region_ok_for_watchpoint):
New function.
* nat/aarch64-linux-hw-point.h (aarch64_linux_region_ok_for_watchpoint):
Declare it.
gdb/gdbserver:
2015-09-03 Yao Qi <yao.qi@linaro.org>
* linux-aarch64-low.c (aarch64_insert_point): Call
aarch64_handle_watchpoint if aarch64_linux_region_ok_for_watchpoint
returns true.
This patch moves aarch64_linux_new_thread in GDB and GDBserver to
nat/aarch64-linux.c.
gdb:
2015-08-25 Yao Qi <yao.qi@linaro.org>
* aarch64-linux-nat.c (aarch64_linux_new_thread): Move it to ...
* nat/aarch64-linux.c (aarch64_linux_new_thread): ... here.
* nat/aarch64-linux.h (aarch64_linux_new_thread): Declare.
gdb/gdbserver:
2015-08-25 Yao Qi <yao.qi@linaro.org>
* linux-aarch64-low.c (aarch64_linux_new_thread): Remove.
gdb:
2015-08-25 Yao Qi <yao.qi@linaro.org>
* aarch64-linux-nat.c (aarch64_linux_prepare_to_resume): Use
lwp_arch_private_info and ptid_of_lwp.
gdb/gdbserver:
2015-08-25 Yao Qi <yao.qi@linaro.org>
* linux-aarch64-low.c (aarch64_linux_prepare_to_resume): Use
lwp_arch_private_info and ptid_of_lwp.
This patch makes function debug_reg_change_callback in GDB and GDBserver
look the same, so that the following patch can move them to
nat/aarch64-linux-hw-point.c.
gdb:
2015-08-25 Yao Qi <yao.qi@linaro.org>
* aarch64-linux-nat.c (debug_reg_change_callback): Use
ptid_of_lwp to get ptid of lwp.
gdb/gdbserver:
2015-08-25 Yao Qi <yao.qi@linaro.org>
* linux-aarch64-low.c (debug_reg_change_callback): Use
ptid_of_lwp to get ptid of lwp.
gdb:
2015-08-25 Yao Qi <yao.qi@linaro.org>
* aarch64-linux-nat.c (debug_reg_change_callback): Use
debug_printf.
gdb/gdbserver:
2015-08-25 Yao Qi <yao.qi@linaro.org>
* linux-aarch64-low.c (debug_reg_change_callback): Use
debug_printf.
We print PID rather than LWPID in the debug output, so we need call
ptid_get_pid in debug_reg_change_callback.
gdb:
2015-08-25 Yao Qi <yao.qi@linaro.org>
* aarch64-linux-nat.c (debug_reg_change_callback): Call
ptid_get_pid rather than ptid_get_lwp.
This patch removes get_thread_id from aarch64-linux-nat.c,
arm-linux-nat.c and xtensa-linux-nat.c.
get_thread_id was added in this commit below in 2000,
41c49b06c4https://sourceware.org/ml/gdb-patches/2000-04/msg00398.html
which predates the ptid_t stuff added into GDB. Nowadays, lwpid of
inferior_ptid is only zero when the inferior is created (in
fork-child.c:fork_inferior) and its lwpid will be set after
linux_nat_wait_1 gets the first event. After that, lwpid of
inferior_ptid is not zero for linux-nat target, then we can use
ptid_get_lwp, so this function isn't needed anymore.
Even when GDB attaches to a process, the lwp of inferior_ptid
isn't zero, see linux-nat.c:linux_nat_attach,
/* The ptrace base target adds the main thread with (pid,0,0)
format. Decorate it with lwp info. */
ptid = ptid_build (ptid_get_pid (inferior_ptid),
ptid_get_pid (inferior_ptid),
0);
Note that linux_nat_xfer_partial shifts lwpid to pid for inferior_ptid
temperately for calling linux_ops->to_xfer_partial, but all the
affected functions in this patch are not called in
linux_ops->to_xfer_partial.
I think we can safely remove get_thread_id for all linux native targets.
Regression tested on arm-linux and aarch64-linux. Unable to build
native GDB and test it on xtensa-linux.
gdb:
2015-08-05 Yao Qi <yao.qi@linaro.org>
* aarch64-linux-nat.c (get_thread_id): Remove.
(debug_reg_change_callback): Call ptid_get_lwp instead of
get_thread_id.
(fetch_gregs_from_thread): Likewise.
(store_gregs_to_thread): Likewise.
(fetch_fpregs_from_thread): Likewise.
(store_fpregs_to_thread): Likewise.
(aarch64_linux_get_debug_reg_capacity): Likewise.
* arm-linux-nat.c (get_thread_id): Remove.
(GET_THREAD_ID): Update macro to use ptid_get_lwp.
* xtensa-linux-nat.c (get_thread_id): Remove.
(GET_THREAD_ID): Update macro to use ptid_get_lwp.
* arm-linux-nat.c (get_thread_id): Remove.
(GET_THREAD_ID): Remove.
(fetch_fpregs): Call ptid_get_lwp instead of GET_THREAD_ID.
(store_fpregs, fetch_regs, store_regs): Likewise.
(fetch_wmmx_regs, store_wmmx_regs): Likewise.
(fetch_vfp_regs, store_vfp_regs): Likewise.
(arm_linux_read_description): Likewise.
(arm_linux_get_hwbp_cap): Likewise.
* xtensa-linux-nat.c (get_thread_id): Remove.
(GET_THREAD_ID): Remove.
(fetch_gregs, store_gregs): Call ptid_get_lwp instead of
GET_THREAD_ID.
Nowadays aarch64_linux_can_use_hw_breakpoint always return one, but it
can be smarter, say, if GDB knows target doesn't support HW watchpoint
or breakpoint because HW watchpoint/breakpoint is disabled in linux
kernel, for example, it can safely return zero.
gdb:
2015-07-23 Yao Qi <yao.qi@linaro.org>
* aarch64-linux-nat.c (aarch64_linux_can_use_hw_breakpoint): If
TYPE is watchpoint, return zero if aarch64_num_wp_regs is zero.
If TYPE is breakpoint, return zero if arch64_num_bp_regs is zero.
There are also some duplication on getting HW watchpoint/breakpoint
registers info between GDB and GDBserver. This patch moves them
to nat/aarch64-linux-hw-point.c.
Note that ENABLE_NLS is not defined in GDBserver, so it should be OK
to use _( markup.
gdb:
2015-07-21 Yao Qi <yao.qi@linaro.org>
* aarch64-linux-nat.c (aarch64_linux_get_debug_reg_capacity):
Move it to nat/aarch64-linux-hw-point.c.
(aarch64_linux_child_post_startup_inferior): Update.
* nat/aarch64-linux-hw-point.c (aarch64_linux_get_debug_reg_capacity):
New function.
* nat/aarch64-linux-hw-point.h (aarch64_linux_get_debug_reg_capacity):
Declare it.
gdb/gdbserver:
2015-07-21 Yao Qi <yao.qi@linaro.org>
* linux-aarch64-low.c (aarch64_arch_setup): Remove code and call
aarch64_linux_get_debug_reg_capacity.
When I look at test fails related to watchpoint on aarch64-linux,
I find there are some code duplicates between GDB and GDBserver.
This patch is to move some of them to a nat/aarch64-linux-hw-point.{h,c}.
The only change I do is about the dr_changed_t typedef, which was
ULONGEST in GDB and 'unsigned long long' in GDBserver. Each bit
of dr_changed_t represents a status of each HW breakpoint or
watchpoint register, and the max number of HW breakpoint or watchpoint
registers is 16, so the width of 'unsigned long long' is sufficient.
gdb:
2015-07-17 Yao Qi <yao.qi@linaro.org>
* Makefile.in (HFILES_NO_SRCDIR): Add
nat/aarch64-linux-hw-point.h.
(aarch64-linux-hw-point.o): New rule.
* nat/aarch64-linux-hw-point.h: New file.
* nat/aarch64-linux-hw-point.c: New file.
* aarch64-linux-nat.c: Include nat/aarch64-linux-hw-point.h.
(AARCH64_HBP_MAX_NUM): Move to nat/aarch64-linux-hw-point.h.
(AARCH64_HWP_MAX_NUM, AARCH64_HBP_ALIGNMENT): Likewise.
(AARCH64_HWP_ALIGNMENT): Likewise.
(AARCH64_HWP_MAX_LEN_PER_REG): Likewise.
(AARCH64_DEBUG_NUM_SLOTS, AARCH64_DEBUG_ARCH): Likewise.
(AARCH64_DEBUG_ARCH_V8, DR_MARK_ALL_CHANGED): Likewise.
(DR_MARK_N_CHANGED, DR_CLEAR_CHANGED): Likewise.
(DR_HAS_CHANGED, DR_N_HAS_CHANGE): Likewise.
(aarch64_num_bp_regs, aarch64_num_wp_regs): Likewise.
(struct aarch64_debug_reg_state): Likewise.
(struct arch_lwp_info): Likewise.
(aarch64_linux_set_debug_regs): Likewise.
(aarch64_notify_debug_reg_change): Remove static.
(aarch64_align_watchpoint): Likewise.
(DR_CONTROL_ENABLED, DR_CONTROL_LENGTH): Likewise.
(aarch64_watchpoint_length): Likewise.
(aarch64_point_encode_ctrl_reg): Likewise
(aarch64_point_is_aligned): Likewise.
(aarch64_dr_state_insert_one_point): Likewise.
(aarch64_dr_state_remove_one_point): Likewise.
(aarch64_handle_breakpoint): Likewise.
(aarch64_handle_aligned_watchpoint): Likewise.
(aarch64_handle_unaligned_watchpoint): Likewise.
(aarch64_handle_watchpoint): Likewise.
* config/aarch64/linux.mh (NAT_FILE): Add
aarch64-linux-hw-point.o.
gdb/gdbserver:
2015-07-17 Yao Qi <yao.qi@linaro.org>
* Makefile.in (aarch64-linux-hw-point.o): New rule.
* configure.srv (srv_tgtobj): Append aarch64-linux-hw-point.o.
* linux-aarch64-low.c: Include nat/aarch64-linux-hw-point.h.
(AARCH64_HBP_MAX_NUM): Move to nat/aarch64-linux-hw-point.h.
(AARCH64_HWP_MAX_NUM, AARCH64_HBP_ALIGNMENT): Likewise.
(AARCH64_HWP_ALIGNMENT): Likewise.
(AARCH64_HWP_MAX_LEN_PER_REG): Likewise.
(AARCH64_DEBUG_NUM_SLOTS, AARCH64_DEBUG_ARCH): Likewise.
(aarch64_num_bp_regs, aarch64_num_wp_regs): Likewise.
(AARCH64_DEBUG_ARCH_V8, DR_MARK_ALL_CHANGED): Likewise.
(DR_MARK_N_CHANGED, DR_CLEAR_CHANGED): Likewise.
(DR_HAS_CHANGED, DR_N_HAS_CHANGE): Likewise.
(struct aarch64_debug_reg_state): Likewise.
(struct arch_lwp_info): Likewise.
(aarch64_align_watchpoint): Likewise.
(DR_CONTROL_ENABLED, DR_CONTROL_LENGTH): Likewise.
(aarch64_watchpoint_length): Likewise.
(aarch64_point_encode_ctrl_reg): Likewise
(aarch64_point_is_aligned): Likewise.
(aarch64_align_watchpoint): Likewise.
(aarch64_linux_set_debug_regs):
(aarch64_dr_state_insert_one_point): Likewise.
(aarch64_dr_state_remove_one_point): Likewise.
(aarch64_handle_breakpoint): Likewise.
(aarch64_handle_aligned_watchpoint): Likewise.
(aarch64_handle_unaligned_watchpoint): Likewise.
(aarch64_handle_watchpoint): Likewise.
Some functions on handling HW watchpoint in GDB and GDBserver looks the
same except the code getting debug register state from current inferior.
In GDB, we get debug register state like this:
state = aarch64_get_debug_reg_state (ptid_get_pid (inferior_ptid));
while in GDBserver, we get debug register state like this:
state = aarch64_get_debug_reg_state ();
This patch is to move two lines above out of some functions, and pass
aarch64_debug_reg_state to these functions, in this way, these functions
are the same, and can be moved to a common place.
gdb:
2015-07-17 Yao Qi <yao.qi@linaro.org>
* aarch64-linux-nat.c (aarch64_handle_breakpoint): Add argument
state and don't call aarch64_get_debug_reg_state. All callers
update.
(aarch64_linux_insert_hw_breakpoint): Call
aarch64_get_debug_reg_state earlier.
(aarch64_linux_remove_hw_breakpoint): Likewise.
(aarch64_handle_aligned_watchpoint): Add argument state and
don't call aarch64_get_debug_reg_state. All callers update.
(aarch64_handle_unaligned_watchpoint): Likewise.
(aarch64_handle_watchpoint): Add argument state.
(aarch64_linux_insert_watchpoint): Call aarch64_get_debug_reg_state
earlier.
(aarch64_linux_remove_watchpoint): Likewise.
gdb/gdbserver:
2015-07-17 Yao Qi <yao.qi@linaro.org>
* linux-aarch64-low.c (aarch64_handle_breakpoint): Add argument state
and don't aarch64_get_debug_reg_state. All callers update.
(aarch64_handle_aligned_watchpoint): Likewise.
(aarch64_handle_unaligned_watchpoint): Likewise.
(aarch64_handle_watchpoint): Likewise.
(aarch64_insert_point): Call aarch64_get_debug_reg_state earlier.
(aarch64_remove_point): Likewise.
Some functions in aarch64-linux-nat.c and linux-aarch64-low.c looks
the same except for the code printing debug message. In GDB, we use
fprintf_unfiltered (gdb_stdlog, ...) while in GDBserver, we use
fprintf (stderr, ...). This patch is to change them to use debug_printf
so that these functions are the same, and I can move them to a common
place in the following patch.
gdb:
2015-07-17 Yao Qi <yao.qi@linaro.org>
* aarch64-linux-nat.c (aarch64_show_debug_reg_state): Use
debug_printf.
(aarch64_handle_unaligned_watchpoint): Likewise.
gdb/gdbserver:
2015-07-17 Yao Qi <yao.qi@linaro.org>
* linux-aarch64-low.c (aarch64_show_debug_reg_state): Use
debug_printf.
(aarch64_handle_unaligned_watchpoint): Likewise.
This patch is to use 'enum target_hw_bp_type' instead of int for
breakpoint type, in order to make some functions in GDB and
GDBserver looks similar.
gdb:
2015-07-17 Yao Qi <yao.qi@linaro.org>
* aarch64-linux-nat.c (aarch64_dr_state_insert_one_point): Change
argument type's type to 'enum target_hw_bp_type'.
(aarch64_dr_state_remove_one_point): Likewise.
(aarch64_handle_breakpoint): Likewise.
(aarch64_linux_insert_hw_breakpoint): Likewise.
(aarch64_linux_remove_hw_breakpoint): Likewise.
(aarch64_handle_aligned_watchpoint): Likewise.
aarch64_linux_get_debug_reg_capacity is called by
aarch64_linux_child_post_startup_inferior, and argument ptid is created in
inf-ptrace.c:inf_ptrace_create_inferior,
/* On some targets, there must be some explicit actions taken after
the inferior has been started up. */
target_post_startup_inferior (pid_to_ptid (pid));
so in aarch64_linux_get_debug_reg_capacity, we can get pid by ptid_get_pid,
and don't need to use get_thread_id.
gdb:
2015-07-17 Yao Qi <yao.qi@linaro.org>
* aarch64-linux-nat.c (aarch64_linux_get_debug_reg_capacity): Call
ptid_get_pid instead of get_thread_id.
This patch is to pass ptid to aarch64_linux_get_debug_reg_capacity,
and stop using global variable inferior_ptid.
gdb:
2015-07-09 Yao Qi <yao.qi@linaro.org>
* aarch64-linux-nat.c (aarch64_linux_get_debug_reg_capacity): Add
argument ptid. Update comments. Caller update.
This patch is to let aarch64 GDB debug 32-bit arm program natively. In
each function for fetching and storing registers, GDB will check
gdbarch_bfd_arch_info (gdbarch)->bits_per_word, if it is 32, call
the corresponding aarch32 functions in aarch32-linux-nat.c, otherwise
fall back to aarch64 code to fetch and store registers.
aarch64_linux_read_description has to return the right target description,
but we don't have gdbarch available there, so GDB fetches auxv and gets
AT_PHENT, in order to determine whether the target is 32-bit or 64-bit.
I learned this trick from solib-svr4.c.
gdb:
2015-07-07 Yao Qi <yao.qi@linaro.org>
* aarch32-linux-nat.h (VFP_REGS_SIZE): New macro, moved from
arm-linux-nat.c.
* aarch64-linux-nat.c: Include aarch32-linux-nat.h and
elf/external.h.
(fetch_gregs_from_thread): Call aarch32_gp_regcache_supply
if target is 32-bit.
(store_gregs_to_thread): Call aarch32_gp_regcache_collect
if target is 32-bit.
(fetch_fpregs_from_thread): Call aarch32_vfp_regcache_supply
if target is 32-bit.
(store_fpregs_to_thread): Call aarch32_vfp_regcache_collect
if target is 32-bit.
(tdesc_arm_with_vfpv3, tdesc_arm_with_neon): Declare.
(aarch64_linux_read_description): Return the right target
description.
* arm-linux-nat.c (VFP_REGS_SIZE): Moved to aarch32-linux-nat.h.
* config/aarch64/linux.mh (NATDEPFILES): Add aarch32-linux-nat.o.
* configure.tgt (aarch64*-*-linux*): Add arm-tdep.o and
arm-linux-tdep.o
It should be "insert_hw_breakpoint" rather than "insert_hw_watchpoint".
gdb:
2015-07-02 Yao Qi <yao.qi@linaro.org>
* aarch64-linux-nat.c (aarch64_linux_insert_hw_breakpoint): Fix
typo in the debugging message.
Current trunk GDB (and gdb-7.8.1 too) fails to build on Aarch64 when
-fno-common is enabled. It fails during link stage due to multiple
definition of `tdesc_aarch64':
...
[ 199s] aarch64-linux-nat.o: In function `initialize_tdesc_aarch64':
[ 199s]
/home/abuild/rpmbuild/BUILD/gdb-7.8.1/gdb/features/aarch64.c:11:
multiple definition of `tdesc_aarch64'
[ 199s]
aarch64-tdep.o:/home/abuild/rpmbuild/BUILD/gdb-7.8.1/gdb/objfiles.h:540:
first defined here
[ 199s] aarch64-linux-nat.o: In function `initialize_tdesc_aarch64':
[ 199s]
/home/abuild/rpmbuild/BUILD/gdb-7.8.1/gdb/features/aarch64.c:11:
multiple definition of `tdesc_aarch64'
[ 199s]
aarch64-tdep.o:/home/abuild/rpmbuild/BUILD/gdb-7.8.1/gdb/objfiles.h:540:
first defined here
[ 199s] collect2: error: ld returned 1 exit status
[ 199s] make[2]: *** [gdb] Error 1
...
This happens because struct target_desc *tdesc_aarch64 is defined in
gdb/features/aarch64.c, which is included by two files
(gdb/aarch64-linux-nat.c and gdb/aarch64-tdep.c).
gdb/Changelog
2015-02-17 Max Ostapenko <m.ostapenko@partner.samsung.com>
PR gdb/17984
* aarch64-linux-nat.c: Don't include features/aarch64.c anymore.
(aarch64_linux_read_description): Remove initialize_tdesc_aarch64
call.
* aarch64-tdep.h (tdesc_aarch64): Declare.
This change:
commit b775012e84
Author: Luis Machado <luisgpm@br.ibm.com>
Date: Fri Feb 24 15:10:59 2012 +0000
2012-02-24 Luis Machado <lgustavo@codesourcery.com>
* remote.c (remote_supports_cond_breakpoints): New forward
declaration.
[...]
changed the way breakpoints are inserted and removed such that
`insert_bp_location' can now be called with the breakpoint being handled
already in place, while previously the call was only ever made for
breakpoints that have not been put in place. This in turn caused an
issue for software breakpoints and targets for which a breakpoint's
`placed_address' may not be the same as the original requested address.
The issue is `insert_bp_location' overwrites the previously adjusted
value in `placed_address' with the original address, that is only
replaced back with the correct adjusted address later on when
`gdbarch_breakpoint_from_pc' is called. Meanwhile there's a window
where the value in `placed_address' does not correspond to data stored
in `shadow_contents', leading to incorrect instruction bytes being
supplied when `one_breakpoint_xfer_memory' is called to supply the
instruction overlaid by the breakpoint.
And this is exactly what happens on the MIPS target with software
breakpoints placed in microMIPS code. In this case not only
`placed_address' is not the original address because of the ISA bit, but
`mips_breakpoint_from_pc' has to read the original instruction to
determine which one of the two software breakpoint instruction encodings
to choose as well. The 16-bit encoding is used to replace 16-bit
instructions and similarly the 32-bit one is used with 32-bit
instructions, to satisfy branch delay slot size requirements.
The mismatch between `placed_address' and the address data in
`shadow_contents' has been obtained from leads to the wrong encoding
being used in some cases, which in the case of a 32-bit software
breakpoint instruction replacing a 16-bit instruction causes corruption
to the adjacent following instruction and leads the debug session astray
if execution reaches there e.g. with a jump.
To address this problem I made the change below, that adds a
`reqstd_address' field to `struct bp_target_info' and leaves
`placed_address' unchanged once it has been set. This ensures data in
`shadow_contents' is always consistent with `placed_address'.
This approach also has this good side effect that all the places that
examine the breakpoint's address see a consistent value, either
`reqstd_address' or `placed_address', as required. Currently some
places see either the original or the adjusted address in
`placed_address', depending on whether they have been called before
`gdbarch_remote_breakpoint_from_pc' or afterwards. This is in
particular true for subsequent calls to
`gdbarch_remote_breakpoint_from_pc' itself, e.g. from
`one_breakpoint_xfer_memory'. This is also important for places like
`find_single_step_breakpoint' where a breakpoint's address is compared
to the raw value of $pc.
* breakpoint.h (bp_target_info): Add `reqstd_address' member,
update comments.
* breakpoint.c (one_breakpoint_xfer_memory): Use `reqstd_address'
for the breakpoint's address. Don't preinitialize `placed_size'.
(insert_bp_location): Set `reqstd_address' rather than
`placed_address'.
(bp_target_info_copy_insertion_state): Also copy `placed_address'.
(bkpt_insert_location): Use `reqstd_address' for the breakpoint's
address.
(bkpt_remove_location): Likewise.
(deprecated_insert_raw_breakpoint): Likewise.
(deprecated_remove_raw_breakpoint): Likewise.
(find_single_step_breakpoint): Likewise.
* mem-break.c (default_memory_insert_breakpoint): Use
`reqstd_address' for the breakpoint's address. Don't set
`placed_address' or `placed_size' if breakpoint contents couldn't
have been determined.
* remote.c (remote_insert_breakpoint): Use `reqstd_address' for
the breakpoint's address.
(remote_insert_hw_breakpoint): Likewise. Don't set
`placed_address' or `placed_size' if breakpoint couldn't have been
set.
* aarch64-linux-nat.c (aarch64_linux_insert_hw_breakpoint): Use
`reqstd_address' for the breakpoint's address.
* arm-linux-nat.c (arm_linux_hw_breakpoint_initialize): Likewise.
* ia64-tdep.c (ia64_memory_insert_breakpoint): Likewise.
* m32r-tdep.c (m32r_memory_insert_breakpoint): Likewise.
* microblaze-linux-tdep.c
(microblaze_linux_memory_remove_breakpoint): Likewise.
* monitor.c (monitor_insert_breakpoint): Likewise.
* nto-procfs.c (procfs_insert_breakpoint): Likewise.
(procfs_insert_hw_breakpoint): Likewise.
* ppc-linux-nat.c (ppc_linux_insert_hw_breakpoint): Likewise.
* ppc-linux-tdep.c (ppc_linux_memory_remove_breakpoint): Likewise.
* remote-m32r-sdi.c (m32r_insert_breakpoint): Likewise.
* remote-mips.c (mips_insert_breakpoint): Likewise.
* x86-nat.c (x86_insert_hw_breakpoint): Likewise.
This commit adds a new global flag show_debug_regs to common-debug.h
to replace the flag debug_hw_points used by gdbserver and by the
Linux x86 and AArch64 ports, and to replace the flag maint_show_dr
used by the Linux MIPS port.
Note that some debug printing in the AArch64 port was enabled only if
debug_hw_points > 1 but no way to set debug_hw_points to values other
than 0 and 1 was provided; that code was effectively dead. This
commit enables all debug printing if show_debug_regs is nonzero, so
the AArch64 output will be more verbose than previously.
gdb/ChangeLog:
* common/common-debug.h (show_debug_regs): Declare.
* common/common-debug.c (show_debug_regs): Define.
* aarch64-linux-nat.c (debug_hw_points): Don't define. Replace
all uses with show_debug_regs. Replace all uses that considered
debug_hw_points as a multi-value integer with straight boolean
uses.
* x86-nat.c (debug_hw_points): Don't define. Replace all uses
with show_debug_regs.
* nat/x86-dregs.c (debug_hw_points): Don't declare. Replace
all uses with show_debug_regs.
* mips-linux-nat.c (maint_show_dr): Don't define. Replace all
uses with show_debug_regs.
gdb/gdbserver/ChangeLog:
* server.h (debug_hw_points): Don't declare.
* server.c (debug_hw_points): Don't define. Replace all uses
with show_debug_regs.
* linux-aarch64-low.c (debug_hw_points): Don't define. Replace
all uses with show_debug_regs.
Recent gdb code refactor changes LONGEST from a macro to a typedef,
thus the use of it in aarch64-linux-nat.c is no longer valid.
2014-08-21 Bin Cheng <bin.cheng@arm.com>
* aarch64-linux-nat.c (dr_changed_t): Change the type from
unsigned LONGEST to ULONGEST.
In order to provide 'collect_regset' support, the generic function
regcache_collect_regset is exploited. Since this requires writing
appropriate register maps, these can be used for supply_regset as
well.
A recent change to glibc removed asm/ptrace.h from user.h for
AArch64. This meant that cross-native builds of gdb using trunk
glibc broke because aarch64-linux-nat.c because user_hwdebug_state
couldn't be found.
Fixed by including asm/ptrace.h like other ports.
2014-05-22 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
* aarch64-linux-nat.c (asm/ptrace.h): Include.
* aarch64-linux-nat.c (aarch64_linux_set_debug_regs): Set
iov.iov_len with the real length in use.
gdb/gdbserver/
* linux-aarch64-low.c (aarch64_linux_set_debug_regs): Set
iov.iov_len with the real length in use.
Yufeng Zhang <yufeng.zhang@arm.com>
* aarch64-linux-nat.c (aarch64_init_debug_reg_state): Delete.
(aarch64_inferior_data, struct aarch64_inferior_data):
Delete.
(struct aarch64_process_info): New.
(aarch64_process_list): New global.
(aarch64_find_process_pid, aarch64_add_process)
(aarch64_process_info_get): New functions.
(aarch64_inferior_data_get): Delete.
(aarch64_process_info_get): New function.
(aarch64_forget_process): New function.
(aarch64_get_debug_reg_state): New parameter 'pid'. Reimplement.
(aarch64_linux_prepare_to_resume): Pass the lwp's pid to
aarch64_get_debug_reg_state.
(aarch64_notify_debug_reg_change): Use iterate_over_lwps
instead of linux_nat_iterate_watchpoint_lwps.
(aarch64_linux_new_fork): New function.
(aarch64_linux_child_post_startup_inferior): Use
aarch64_forget_process instead of aarch64_init_debug_reg_state.
(aarch64_handle_breakpoint, aarch64_linux_insert_hw_breakpoint)
(aarch64_linux_remove_hw_breakpoint)
(aarch64_handle_aligned_watchpoint)
(aarch64_handle_unaligned_watchpoint)
(aarch64_linux_insert_watchpoint)
(aarch64_linux_remove_watchpoint)
(aarch64_linux_stopped_data_address): Adjust to pass the current
process id to aarch64_debug_reg_state.
(_initialize_aarch64_linux_nat): Install aarch64_linux_new_fork as
linux_nat_new_fork hook, and aarch64_forget_process as
linux_nat_forget_process hook; remove the call to
register_inferior_data_with_cleanup.
Adhemerval Zanella
Yao Qi
Joel Brobecker
Simon Marchi
Pedro Alves
Maxim Ostapenko
Maciej W. Rozycki
Gary Benson
Will Newton
Andreas Arnez
Ramana Radhakrishnan
Tom Tromey
Yufeng Zhang
Luis Machado
Andrew Pinski