gold/
* mips.cc (Mips_relobj::Mips_relobj): Initialize
has_reginfo_section_.
(Mips_relobj::has_reginfo_section_): New data member.
(Mips_relobj::has_reginfo_section): New method.
(class Mips_output_section_reginfo): Change base class to
Output_section_data, and set masks of the output .reginfo section
in constructor.
(Mips_output_section_reginfo::as_mips_output_section_reginfo):
Remove.
(Mips_output_section_reginfo::set_masks): Likewise.
(Mips_output_section_reginfo::set_final_data_size): Likewise.
(Mips_output_section_reginfo::do_print_to_mapfile): New method.
(Target_mips::do_make_output_section): Remove.
(Mips_relobj::do_read_symbols): Set has_reginfo_section_ to true
if the object contains a .reginfo section.
(Target_mips::do_finalize_sections): Create a .reginfo output
section if needed.
While working on the Rust support, I happened to notice that arch_type
and related functions take "char *" arguments, where "const char *"
would be more correct. This patch fixes this oversight. Tested by
rebuilding.
2016-06-10 Tom Tromey <tom@tromey.com>
* gdbtypes.c (arch_type, arch_integer_type, arch_character_type)
(arch_boolean_type, arch_float_type, arch_complex_type)
(arch_flags_type, append_flags_type_field)
(append_flags_type_flag, arch_composite_type)
(append_composite_type_field_raw)
(append_composite_type_field_aligned)
(append_composite_type_field): Make "name" parameter const.
* gdbtypes.h (arch_type, arch_integer_type, arch_character_type)
(arch_boolean_type, arch_float_type, arch_complex_type)
(append_composite_type_field, append_composite_type_field_aligned)
(append_composite_type_field_raw, arch_flags_type)
(append_flags_type_field, append_flags_type_flag): Constify.
PR rust/20110 concerns the type of an integer constant that is too
large for "i32", the default integer type. This patch changes the
type of such a constant to i64. This is important because such values
are often addresses, so truncating them by default is unfriendly.
Built and regtested on x86-64 Fedora 23.
2016-06-10 Tom Tromey <tom@tromey.com>
PR rust/20110:
* rust-exp.y (lex_number): Don't truncate large numbers to i32.
2016-06-10 Tom Tromey <tom@tromey.com>
PR rust/20110:
* gdb.rust/expr.exp: Add test for integer constant larger than
i32.
I noticed that the rust-exp handling in the Makefile differed from
that of other .y files. I believe I noticed this by seeing a stray
"rm" in the build log.
This patch changes the Makefile to bring the rust-exp handling in line
with that of other .y files.
2016-06-10 Tom Tromey <tom@tromey.com>
* Makefile.in (COMMON_OBS): Remove rust-exp.o.
(YYFILES): Add rust-exp.c.
(YYOBJ): Add rust-exp.o.
(local-maintainer-clean): Remove rust-exp.c.
Unknown instructions are currently just dumped as .long 1234. On
S/390 we can do a bit better since the instruction length is encoded
in the opcode. That way also unknown instructions can be skipped
according to their real length. That way we can continue correctly
after that instruction. However, there are also some drawbacks with
that behavior when dumping data. So for now that behavior is only
enabled for text section but even there it might mess things up when
having a literal pool embedded in the code. Therefore I've left the
feature disabled by default and have added the -Minsnlength option to
enable it explicitely.
opcodes/ChangeLog:
2016-06-10 Andreas Krebbel <krebbel@linux.vnet.ibm.com>
* s390-dis.c (option_use_insn_len_bits_p): New file scope
variable.
(init_disasm): Handle new command line option "insnlength".
(print_s390_disassembler_options): Mention new option in help
output.
(print_insn_s390): Use the encoded insn length when dumping
unknown instructions.
Non-local references in nested functions are usually implemented
by using DWARF static link. This feature was added
with commit 63e43d3aed
(DWARF: handle non-local references in nested functions) but
a testcase was missing in Fortran.
2016-06-10 Bernhard Heckel <bernhard.heckel@intel.com>
gdb/Testsuite/Changelog:
* gdb.fortran/nested-funcs.exp: New.
* gdb.fortran/nested-funcs.f90: New.
This change adds support for specifying a negative repeat count to
all the formats of the 'x' command to examine memory backward.
A new testcase 'examine-backward' is added to cover this new feature.
Here's the example output from the new feature:
<format 'i'>
(gdb) bt
#0 Func1 (n=42, p=0x40432e "hogehoge") at main.cpp:5
#1 0x00000000004041fa in main (argc=1, argv=0x7fffffffdff8) at main.cpp:19
(gdb) x/-4i 0x4041fa
0x4041e5 <main(int, char**)+11>: mov %rsi,-0x10(%rbp)
0x4041e9 <main(int, char**)+15>: lea 0x13e(%rip),%rsi
0x4041f0 <main(int, char**)+22>: mov $0x2a,%edi
0x4041f5 <main(int, char**)+27>: callq 0x404147
<format 'x'>
(gdb) x/-4xw 0x404200
0x4041f0 <main(int, char**)+22>: 0x00002abf 0xff4de800 0x76e8ffff 0xb8ffffff
(gdb) x/-4
0x4041e0 <main(int, char**)+6>: 0x7d8910ec 0x758948fc 0x358d48f0 0x0000013e
gdb/ChangeLog:
* NEWS: Mention that GDB now supports a negative repeat count in
the 'x' command.
* printcmd.c (decode_format): Allow '-' in the parameter
"string_ptr" to accept a negative repeat count.
(find_instruction_backward): New function.
(read_memory_backward): New function.
(integer_is_zero): New function.
(find_string_backward): New function.
(do_examine): Use new functions to examine memory backward.
(_initialize_printcmd): Mention that 'x' command supports a negative
repeat count.
gdb/doc/ChangeLog:
* gdb.texinfo (Examining Memory): Document negative repeat
count in the 'x' command.
gdb/testsuite/ChangeLog:
* gdb.base/examine-backward.c: New file.
* gdb.base/examine-backward.exp: New file.
PR python/19819 concerns some unused global variables in
py-xmethods.c. This patch deletes the unused globals.
Tested by rebuilding.
2016-06-09 Tom Tromey <tom@tromey.com>
PR python/19819:
* python/py-xmethods.c (invoke_method_name)
(py_get_result_type_method_name, py_invoke_method_name): Remove.
(gdbpy_initialize_xmethods): Don't initialize
py_invoke_method_name, py_get_result_type_method_name.
This patch fixes an edge case in linker relaxation that causes symbol
values to be computed incorrectly in the presence of align directives
in input source code.
bfd/
* elf32-avr.c (elf32_avr_relax_delete_bytes): Adjust syms
and relocs only if shrinking occurred.
ld/
* testsuite/ld-avr/avr-prop-5.d: New.
* testsuite/ld-avr/avr-prop-5.s: New.
This patch adds default data address space origin (0x800000) to the symbol addresses.
when disassemble lds/sts instructions. So that symbol names shall be printed in comments
for lds/sts instructions disassemble.
ld/
* testsuite/ld-avr/lds-mega.d: New test.
* testsuite/ld-avr/lds-mega.s: New test source.
* testsuite/ld-avr/lds-tiny.d: New test.
* testsuite/ld-avr/lds-tiny.s: New test source.
opcodes/
* avr-dis.c (avr_operand): Add default data address space origin (0x800000) to the
address and set as symbol address for LDS/ STS immediate operands.
include/ChangeLog:
2016-06-08 Jose E. Marchesi <jose.marchesi@oracle.com>
* opcode/sparc.h: Add missing documentation for hyperprivileged
registers in rd (%) and rs1 ($).
To call an external function, the direct branch to the PLT entry can be
replaced by an indirect branch via the GOT slot, which is similar to the
first instruction in the PLT slot. Instead using the PLT slot as function
address, the function address is retrieved from the GOT slot. The
R_386_GOT32X relocation can be used to compute the address of the symbol’s
GOT entry without base register when PIC is disabled. In non-PIC
executable,
call/jmp *func@GOT
should be used for indirect branch via the GOT slot and
movl func@GOT, %eax
should be used to load function address. Unlike PIC case, no register
is needed to access GOT. If linker determines the function is defined
locally, it converts indirect branch via the GOT slot to direct branch
with a nop prefix and converts load via the GOT slot to load immediate
or lea.
* testsuite/ld-i386/libno-plt-1b.dd: New file.
* testsuite/ld-i386/libno-plt-1b.rd: Likewise.
* testsuite/ld-i386/no-plt-1a.dd: Likewise.
* testsuite/ld-i386/no-plt-1a.rd: Likewise.
* testsuite/ld-i386/no-plt-1b.dd: Likewise.
* testsuite/ld-i386/no-plt-1b.rd: Likewise.
* testsuite/ld-i386/no-plt-1c.dd: Likewise.
* testsuite/ld-i386/no-plt-1c.rd: Likewise.
* testsuite/ld-i386/no-plt-1d.dd: Likewise.
* testsuite/ld-i386/no-plt-1d.rd: Likewise.
* testsuite/ld-i386/no-plt-1e.dd: Likewise.
* testsuite/ld-i386/no-plt-1e.rd: Likewise.
* testsuite/ld-i386/no-plt-1f.dd: Likewise.
* testsuite/ld-i386/no-plt-1f.rd: Likewise.
* testsuite/ld-i386/no-plt-1g.dd: Likewise.
* testsuite/ld-i386/no-plt-1g.rd: Likewise.
* testsuite/ld-i386/no-plt-1h.dd: Likewise.
* testsuite/ld-i386/no-plt-1h.rd: Likewise.
* testsuite/ld-i386/no-plt-1i.dd: Likewise.
* testsuite/ld-i386/no-plt-1i.rd: Likewise.
* testsuite/ld-i386/no-plt-1j.dd: Likewise.
* testsuite/ld-i386/no-plt-1j.rd: Likewise.
* testsuite/ld-i386/no-plt-check1a.S: Likewise.
* testsuite/ld-i386/no-plt-check1b.S: Likewise.
* testsuite/ld-i386/no-plt-extern1a.S: Likewise.
* testsuite/ld-i386/no-plt-extern1b.S: Likewise.
* testsuite/ld-i386/no-plt-func1.c: Likewise.
* testsuite/ld-i386/no-plt-main1.c: Likewise.
* testsuite/ld-i386/no-plt.exp: Likewise.
We can generate i386 TLS code sequences for general and local dynamic
models without PLT, which uses indirect call via GOT:
call *___tls_get_addr@GOT(%reg)
where EBX register isn't required as GOT base, instead of direct call:
call ___tls_get_addr[@PLT]
which requires EBX register as GOT base.
Since direct call is 4-byte long and indirect call, is 5-byte long, the
extra one byte must be handled properly.
For general dynamic model, 7-byte lea instruction before call instruction
is replaced by 6-byte one to make room for indirect call. For local
dynamic model, we simply use 5-byte indirect call.
TLS linker optimization is updated to recognize new instruction patterns.
For local dynamic model to local exec model transition, we generate
a 6-byte lea instruction as nop, instead of a 1-byte nop plus a 4-byte
lea instruction. Since linker may convert
call ___tls_get_addr[@PLT]
to
addr32 call ____tls_get_addr
when producing static executable, both patterns are recognized.
bfd/
* elf64-i386.c (elf_i386_link_hash_entry): Add tls_get_addr.
(elf_i386_link_hash_newfunc): Initialize tls_get_addr to 2.
(elf_i386_check_tls_transition): Check indirect call and direct
call with the addr32 prefix for general and local dynamic models.
Set the tls_get_addr feild.
(elf_i386_convert_load_reloc): Always use addr32 prefix for
indirect ___tls_get_addr call via GOT.
(elf_i386_relocate_section): Handle GD->LE, GD->IE and LD->LE
transitions with indirect call and direct call with the addr32
prefix.
ld/
* testsuite/ld-i386/i386.exp: Run libtlspic2.so, tlsbin2,
tlsgd3, tlsld2, tlsgd4, tlspie3a, tlspie3b and tlspie3c.
* testsuite/ld-i386/pass.out: New file.
* testsuite/ld-i386/tls-def1.c: Likewise.
* testsuite/ld-i386/tls-gd1.S: Likewise.
* testsuite/ld-i386/tls-ld1.S: Likewise.
* testsuite/ld-i386/tls-main1.c: Likewise.
* testsuite/ld-i386/tls.exp: Likewise.
* testsuite/ld-i386/tlsbin2-nacl.rd: Likewise.
* testsuite/ld-i386/tlsbin2.dd: Likewise.
* testsuite/ld-i386/tlsbin2.rd: Likewise.
* testsuite/ld-i386/tlsbin2.sd: Likewise.
* testsuite/ld-i386/tlsbin2.td: Likewise.
* testsuite/ld-i386/tlsbinpic2.s: Likewise.
* testsuite/ld-i386/tlsgd3.dd: Likewise.
* testsuite/ld-i386/tlsgd3.s: Likewise.
* testsuite/ld-i386/tlsgd4.d: Likewise.
* testsuite/ld-i386/tlsgd4.s: Likewise.
* testsuite/ld-i386/tlsld2.s: Likewise.
* testsuite/ld-i386/tlspic2-nacl.rd: Likewise.
* testsuite/ld-i386/tlspic2.dd: Likewise.
* testsuite/ld-i386/tlspic2.rd: Likewise.
* testsuite/ld-i386/tlspic2.sd: Likewise.
* testsuite/ld-i386/tlspic2.td: Likewise.
* testsuite/ld-i386/tlspic3.s: Likewise.
* testsuite/ld-i386/tlspie3.s: Likewise.
* testsuite/ld-i386/tlspie3a.d: Likewise.
* testsuite/ld-i386/tlspie3b.d: Likewise.
* testsuite/ld-i386/tlspie3c.d: Likewise.
To call an external function, the direct branch to the PLT entry can be
replaced by an indirect branch via the GOT slot, which is similar to the
first instruction in the PLT slot. Instead using the PLT slot as function
address, the function address is retrieved from the GOT slot. If linker
determines the function is defined locally, it converts indirect branch
via the GOT slot to direct branch with a nop prefix and converts load via
the GOT slot to load immediate or lea,
* testsuite/ld-x86-64/libno-plt-1b.dd: Likewise.
* testsuite/ld-x86-64/libno-plt-1b.rd: Likewise.
* testsuite/ld-x86-64/no-plt-1a.dd: Likewise.
* testsuite/ld-x86-64/no-plt-1a.rd: Likewise.
* testsuite/ld-x86-64/no-plt-1b.dd: Likewise.
* testsuite/ld-x86-64/no-plt-1b.rd: Likewise.
* testsuite/ld-x86-64/no-plt-1c.dd: Likewise.
* testsuite/ld-x86-64/no-plt-1c.rd: Likewise.
* testsuite/ld-x86-64/no-plt-1d.dd: Likewise.
* testsuite/ld-x86-64/no-plt-1d.rd: Likewise.
* testsuite/ld-x86-64/no-plt-1e.dd: Likewise.
* testsuite/ld-x86-64/no-plt-1e.rd: Likewise.
* testsuite/ld-x86-64/no-plt-1f.dd: Likewise.
* testsuite/ld-x86-64/no-plt-1f.rd: Likewise.
* testsuite/ld-x86-64/no-plt-1g.dd: Likewise.
* testsuite/ld-x86-64/no-plt-1g.rd: Likewise.
* testsuite/ld-x86-64/no-plt-check1.S: Likewise.
* testsuite/ld-x86-64/no-plt.exp: Likewise.
* testsuite/ld-x86-64/no-plt-extern1.S: Likewise.
* testsuite/ld-x86-64/no-plt-func1.c: Likewise.
* testsuite/ld-x86-64/no-plt-main1.c: Likewise.
The only non-comment fix here is in the code writing out the 3 fixed
.got.plt entries - it mistakenly put a 64-bit 0 at offsets 8 and 12
instead of 8 and 16.
bfd/ChangeLog:
* elf32-s390.c (elf_s390_finish_dynamic_symbol): Fix comment.
* elf64-s390.c (elf_s390x_plt_entry): Fix comment.
(elf_s390_relocate_section): Fix comment.
(elf_s390_finish_dynamic_sections): Fix initialization of fixed
.got.plt entries.
Revert the addition of `ft32-*-*' to this test case made with commit
d1f70bdcab ("Fix lots of linker testsuite failures for the FT32
target.") as this case scores an XPASS now.
ld/
* testsuite/ld-elf/init-fini-arrays.d: Remove `ft32-*-*' xfail.
Embedding the .plt section in another revealed a bug in the way the
larl operand of the first magic plt entry is being calculated. Fixed
with the attached patch.
bfd/ChangeLog:
* elf64-s390.c (elf_s390_finish_dynamic_sections): Subtract plt
section offset when calculation the larl operand in the first PLT
entry.
ld/ChangeLog:
* testsuite/ld-s390/pltoffset-1.dd: New test.
* testsuite/ld-s390/pltoffset-1.ld: New test.
* testsuite/ld-s390/pltoffset-1.s: New test.
* testsuite/ld-s390/s390.exp: Run new test.
VLE is an encoding, not a particular processor architecture, so it
isn't really proper to select insns based on PPC_OPCODE_VLE. For
example
{"evaddw", VX (4, 512), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {RS, RA, RB}},
{"vaddubs", VX (4, 512), VX_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VA, VB}},
shows two insns that have the same encoding, both available with VLE.
Enabling both with VLE means we can't disassemble the second variant
even if -Maltivec is given rather than -Mspe. Also, we don't check
user assembly against the processor type as well as we could.
Another problem is that when using the VLE encoding, insns from the
main ppc opcode table are not available, except those using opcode 4
and 31. Correcting this revealed two errors in the ld testsuite,
use of "nop" and "rfmci" when -mvle.
This patch fixes those problems in the opcode table, and removes
PPCNONE. I find a plain 0 distracts less from other values.
In addition, I've implemented code to recognize some machine values
from the apuinfo note present in ppc32 objects. It's not a complete
disambiguation since we're lacking info to detect newer chips, but
what we have should help with disassembly.
include/
* elf/ppc.h (APUINFO_SECTION_NAME, APUINFO_LABEL, PPC_APUINFO_ISEL,
PPC_APUINFO_PMR, PPC_APUINFO_RFMCI, PPC_APUINFO_CACHELCK,
PPC_APUINFO_SPE, PPC_APUINFO_EFS, PPC_APUINFO_BRLOCK,
PPC_APUINFO_VLE: Define.
opcodes/
* ppc-dis.c (ppc_opts): Delete extraneous parentheses. Default
cpu for "vle" to e500.
* ppc-opc.c (ALLOW8_SPRG): Remove PPC_OPCODE_VLE.
(NO371, PPCSPE, PPCISEL, PPCEFS, MULHW, DCBT_EO): Likewise.
(PPCNONE): Delete, substitute throughout.
(powerpc_opcodes): Remove PPCVLE from "flags". Add to "deprecated"
except for major opcode 4 and 31.
(vle_opcodes <se_rfmci>): Add PPCRFMCI to flags.
bfd/
* cpu-powerpc.c (powerpc_compatible): Allow bfd_mach_ppc_vle entry
to match other 32-bit archs.
* elf32-ppc.c (_bfd_elf_ppc_set_arch): New function.
(ppc_elf_object_p): Call it.
(ppc_elf_special_sections): Use APUINFO_SECTION_NAME. Fix
overlong line.
(APUINFO_SECTION_NAME, APUINFO_LABEL): Don't define here.
* elf64-ppc.c (ppc64_elf_object_p): Call _bfd_elf_ppc_set_arch.
* bfd-in.h (_bfd_elf_ppc_at_tls_transform,
_bfd_elf_ppc_at_tprel_transform): Move to..
* elf-bfd.h: ..here.
(_bfd_elf_ppc_set_arch): Declare.
* bfd-in2.h: Regenerate.
gas/
* config/tc-ppc.c (PPC_APUINFO_ISEL, PPC_APUINFO_PMR,
PPC_APUINFO_RFMCI, PPC_APUINFO_CACHELCK, PPC_APUINFO_SPE,
PPC_APUINFO_EFS, PPC_APUINFO_BRLOCK, PPC_APUINFO_VLE): Don't define.
(ppc_setup_opcodes): Check vle disables powerpc_opcodes overridden
by vle_opcodes, and that vle flag doesn't enable opcodes. Don't
add vle_opcodes twice.
(ppc_cleanup): Use APUINFO_SECTION_NAME and APUINFO_LABEL.
ld/
* testsuite/ld-powerpc/apuinfo1.s: Delete nop.
* testsuite/ld-powerpc/apuinfo-vle2.s: New.
* testsuite/ld-powerpc/powerpc.exp: Use apuinfo-vle2.s.
This patch adds the architecture extension "+ras" to enable RAS
support. It is enabled by default for -march=armv8.2-a and available but
disabled by default for armv8-a and armv8.1-a.
gas/
* config/tc-arm.c (arm_ext_v8_2): Rename to arm_ext_ras.
(arm_ext_ras): Renamed from arm_ext_v8_2.
(insns): Update for arm_ext_v8_2 renaming.
(arm_extensions): Add "ras".
* doc/c-arm.texi (ARM Options): Add an entry for "ras".
* testsuite/gas/arm/armv8-a+ras.d: New.
* testsuite/gas/arm/armv8_2-a.d: Add explicit command line
options.
include/
* opcode/arm.h (ARM_EXT2_RAS): New. Also align preceding
entries.
(ARM_AEXT_V8_2A): Add ARM_EXT2_RAS.
opcodes/
* arm-dis.c (arm_opcodes): Replace ARM_EXT_V8_2A with
ARM_EXT_RAS in relevant entries.
Eclipse CDT now supports enabling execution recording using two methods
(full and btrace) and both formats for btrace (bts and pt). In the
event that recording is enabled behind the back of the GUI (by the user
on the command line, or a script), we need to know which method/format
are being used, so it can be correctly reflected in the interface. This
patch adds this information to the =record-started async record.
Before:
=record-started,thread-group="i1"
After:
=record-started,thread-group="i1",method="btrace",format="bts"
=record-started,thread-group="i1",method="btrace",format="pt"
=record-started,thread-group="i1",method="full"
The "format" field is only present when the current method supports
multiple formats (only the btrace method as of now).
gdb/ChangeLog:
* NEWS: Mention the new fields in =record-started.
* common/btrace-common.h (btrace_format_short_string): New function
declaration.
* common/btrace-common.c (btrace_format_short_string): New
function.
* mi/mi-interp.c (mi_record_changed): Output method and format
fields in the =record-started record.
* record-btrace.c (record_btrace_open): Adapt record_changed
notification.
* record-full.c (record_full_open): Likewise.
* record.c (cmd_record_stop): Likewise.
gdb/doc/ChangeLog:
* gdb.texinfo (GDB/MI Async Records): Document method and
format fields in =record-started.
* observer.texi (record_changed): Add method and format
parameters.
gdb/testsuite/ChangeLog:
* gdb.mi/mi-record-changed.exp: Adjust =record-started output
matching.
We can generate x86-64 TLS code sequences for general and local dynamic
models without PLT, which uses indirect call via GOT:
call *__tls_get_addr@GOTPCREL(%rip)
instead of direct call:
call __tls_get_addr[@PLT]
Since direct call is 4-byte long and indirect call, is 5-byte long, the
extra one byte must be handled properly.
For general dynamic model, one 0x66 prefix before call instruction is
removed to make room for indirect call. For local dynamic model, we
simply use 5-byte indirect call.
TLS linker optimization is updated to recognize new instruction patterns.
For local dynamic model to local exec model transition, we generate
4 0x66 prefixes, instead of 3, before mov instruction in 64-bit and
generate a 5-byte nop, instead of 4-byte, before mov instruction in
32-bit. Since linker may convert
call *__tls_get_addr@GOTPCREL(%rip)
to
addr32 call __tls_get_addr
when producing static executable, both patterns are recognized.
bfd/
* elf64-x86-64.c (elf_x86_64_link_hash_entry): Add tls_get_addr.
(elf_x86_64_link_hash_newfunc): Initialize tls_get_addr to 2.
(elf_x86_64_check_tls_transition): Check indirect call and
direct call with the addr32 prefix for general and local dynamic
models. Set the tls_get_addr feild.
(elf_x86_64_convert_load_reloc): Always use addr32 prefix for
indirect __tls_get_addr call via GOT.
(elf_x86_64_relocate_section): Handle GD->LE, GD->IE and LD->LE
transitions with indirect call and direct call with the addr32
prefix.
ld/
* testsuite/ld-x86-64/pass.out: New file.
* testsuite/ld-x86-64/tls-def1.c: Likewise.
* testsuite/ld-x86-64/tls-gd1.S: Likewise.
* testsuite/ld-x86-64/tls-ld1.S: Likewise.
* testsuite/ld-x86-64/tls-main1.c: Likewise.
* testsuite/ld-x86-64/tls.exp: Likewise.
* testsuite/ld-x86-64/tlsbin2-nacl.rd: Likewise.
* testsuite/ld-x86-64/tlsbin2.dd: Likewise.
* testsuite/ld-x86-64/tlsbin2.rd: Likewise.
* testsuite/ld-x86-64/tlsbin2.sd: Likewise.
* testsuite/ld-x86-64/tlsbin2.td: Likewise.
* testsuite/ld-x86-64/tlsbinpic2.s: Likewise.
* testsuite/ld-x86-64/tlsgd10.dd: Likewise.
* testsuite/ld-x86-64/tlsgd10.s: Likewise.
* testsuite/ld-x86-64/tlsgd11.dd: Likewise.
* testsuite/ld-x86-64/tlsgd11.s: Likewise.
* testsuite/ld-x86-64/tlsgd12.d: Likewise.
* testsuite/ld-x86-64/tlsgd12.s: Likewise.
* testsuite/ld-x86-64/tlsgd13.d: Likewise.
* testsuite/ld-x86-64/tlsgd13.s: Likewise.
* testsuite/ld-x86-64/tlsgd14.dd: Likewise.
* testsuite/ld-x86-64/tlsgd14.s: Likewise.
* testsuite/ld-x86-64/tlsgd5c.s: Likewise.
* testsuite/ld-x86-64/tlsgd6c.s: Likewise.
* testsuite/ld-x86-64/tlsgd9.dd: Likewise.
* testsuite/ld-x86-64/tlsgd9.s: Likewise.
* testsuite/ld-x86-64/tlsld4.dd: Likewise.
* testsuite/ld-x86-64/tlsld4.s: Likewise.
* testsuite/ld-x86-64/tlsld5.dd: Likewise.
* testsuite/ld-x86-64/tlsld5.s: Likewise.
* testsuite/ld-x86-64/tlsld6.dd: Likewise.
* testsuite/ld-x86-64/tlsld6.s: Likewise.
* testsuite/ld-x86-64/tlspic2-nacl.rd: Likewise.
* testsuite/ld-x86-64/tlspic2.dd: Likewise.
* testsuite/ld-x86-64/tlspic2.rd: Likewise.
* testsuite/ld-x86-64/tlspic2.sd: Likewise.
* testsuite/ld-x86-64/tlspic2.td: Likewise.
* testsuite/ld-x86-64/tlspic3.s: Likewise.
* testsuite/ld-x86-64/tlspie2.s: Likewise.
* testsuite/ld-x86-64/tlspie2a.d: Likewise.
* testsuite/ld-x86-64/tlspie2b.d: Likewise.
* testsuite/ld-x86-64/tlspie2c.d: Likewise.
* testsuite/ld-x86-64/tlsgd5.dd: Updated.
* testsuite/ld-x86-64/tlsgd6.dd: Likewise.
* testsuite/ld-x86-64/x86-64.exp: Run libtlspic2.so, tlsbin2,
tlsgd5b, tlsgd6b, tlsld4, tlsld5, tlsld6, tlsgd9, tlsgd10,
tlsgd11, tlsgd14, tlsgd12, tlsgd13, tlspie2a, tlspie2b and
tlspie2c.
The values are always members of the enum, except the two places -1 is assigned
only to playcate -Wuninitialized because gcc isn't or at least didn't used to
be smart enough to figure out its only used if it was set.
gas/ChangeLog:
2016-06-05 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
* config/tc-sh.c (parse_reg): Change type of mode argument to
sh_arg_type.
(get_operand): Adjust.
(insert): Change type of how to bfd_reloc_code_real_type.
(insert4): Likewise.
* config/tc-sh64.c (shmedia_get_operand): Adjust.
(shmedia_parse_reg): Change type of mode to shmedia_arg_type.
it points to the result of strchr on a const char *, so it aliases
something that is const. Further its only passed to a function that expects a
const char *, so there's no reason for it to not be const.
gas/ChangeLog:
2016-06-05 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
* config/tc-nds32.c (nds32_parse_option): Make the type of ptr_arg
const char *.
bfd/
* coff-z8k.c (extra_case): Fix range check for R_JR relocation.
ld/
* ld/testsuite/ld-z8k/0filler.s: New file.
* ld/testsuite/ld-z8k/branch-target.s: New file.
* ld/testsuite/ld-z8k/branch-target2.s: New file.
* ld/testsuite/ld-z8k/calr-back-8001.d: New file.
* ld/testsuite/ld-z8k/calr-back-8002.d: New file.
* ld/testsuite/ld-z8k/calr-back-fail-8001.d: New file.
* ld/testsuite/ld-z8k/calr-back-fail-8002.d: New file.
* ld/testsuite/ld-z8k/calr-forw-8001.d: New file.
* ld/testsuite/ld-z8k/calr-forw-8002.d: New file.
* ld/testsuite/ld-z8k/calr-forw-fail-8001.d: New file.
* ld/testsuite/ld-z8k/calr-forw-fail-8002.d: New file.
* ld/testsuite/ld-z8k/calr-opcode.s: New file.
* ld/testsuite/ld-z8k/dbjnz-forw-8001.d: New file.
* ld/testsuite/ld-z8k/dbjnz-forw-8002.d: New file.
* ld/testsuite/ld-z8k/dbjnz-forw-fail-8001.d: New file.
* ld/testsuite/ld-z8k/dbjnz-forw-fail-8002.d: New file.
* ld/testsuite/ld-z8k/dbjnz-opcode.s: New file.
* ld/testsuite/ld-z8k/djnz-back-8001.d: New file.
* ld/testsuite/ld-z8k/djnz-back-8002.d: New file.
* ld/testsuite/ld-z8k/djnz-back-fail-8001.d: New file.
* ld/testsuite/ld-z8k/djnz-back-fail-8002.d: New file.
* ld/testsuite/ld-z8k/djnz-forw-8001.d: New file.
* ld/testsuite/ld-z8k/djnz-forw-8002.d: New file.
* ld/testsuite/ld-z8k/djnz-forw-fail-8001.d: New file.
* ld/testsuite/ld-z8k/djnz-forw-fail-8002.d: New file.
* ld/testsuite/ld-z8k/djnz-opcode.s: New file.
* ld/testsuite/ld-z8k/filler.s: New file.
* ld/testsuite/ld-z8k/jr-back-8001.d: New file.
* ld/testsuite/ld-z8k/jr-back-8002.d: New file.
* ld/testsuite/ld-z8k/jr-back-fail-8001.d: New file.
* ld/testsuite/ld-z8k/jr-back-fail-8002.d: New file.
* ld/testsuite/ld-z8k/jr-forw-8001.d: New file.
* ld/testsuite/ld-z8k/jr-forw-8002.d: New file.
* ld/testsuite/ld-z8k/jr-forw-fail-8001.d: New file.
* ld/testsuite/ld-z8k/jr-forw-fail-8002.d: New file.
* ld/testsuite/ld-z8k/jr-opcode.s: New file.
* ld/testsuite/ld-z8k/ldr-back-8001.d: New file.
* ld/testsuite/ld-z8k/ldr-back-8002.d: New file.
* ld/testsuite/ld-z8k/ldr-back-fail-8001.d: New file.
* ld/testsuite/ld-z8k/ldr-back-fail-8002.d: New file.
* ld/testsuite/ld-z8k/ldr-forw-8001.d: New file.
* ld/testsuite/ld-z8k/ldr-forw-8002.d: New file.
* ld/testsuite/ld-z8k/ldr-forw-fail-8001.d: New file.
* ld/testsuite/ld-z8k/ldr-forw-fail-8002.d: New file.
* ld/testsuite/ld-z8k/ldr-opcode.s: New file.
* ld/testsuite/ld-z8k/ldrb-forw-8001.d: New file.
* ld/testsuite/ld-z8k/ldrb-forw-8002.d: New file.
* ld/testsuite/ld-z8k/ldrb-forw-fail-8001.d: New file.
* ld/testsuite/ld-z8k/ldrb-forw-fail-8002.d: New file.
* ld/testsuite/ld-z8k/ldrb-opcode.s: New file.
* ld/testsuite/ld-z8k/ldrb-opcode2.s: New file.
* ld/testsuite/ld-z8k/other-file.s: New file.
* ld/testsuite/ld-z8k/reloc.dd: New file.
* ld/testsuite/ld-z8k/reloc.ld: New file.
* ld/testsuite/ld-z8k/relocseg.dd: New file.
* ld/testsuite/ld-z8k/relocseg.ld: New file.
* ld/testsuite/ld-z8k/relocseg1.dd: New file.
* ld/testsuite/ld-z8k/test-ld.sh: New file.
* ld/testsuite/ld-z8k/this-file.s: New file.
* ld/testsuite/ld-z8k/z8k.exp: New file.
AMD64 spec and Intel64 spec differ in indirect branches in 64-bit mode.
AMD64 supports indirect branches with 16-bit address via the data size
prefix while the data size prefix is ignored by Intel64.
gas/
PR binutis/18386
* testsuite/gas/i386/i386.exp: Run x86-64-branch-4.
* testsuite/gas/i386/x86-64-branch.d: Updated.
* testsuite/gas/i386/ilp32/x86-64-branch.d: Likewise.
* testsuite/gas/i386/x86-64-branch-4.l: New file.
* testsuite/gas/i386/x86-64-branch-4.s: Likewise.
opcodes/
PR binutis/18386
* i386-dis.c (indirEv): Replace stack_v_mode with indir_v_mode.
(indir_v_mode): New.
Add comments for '&'.
(reg_table): Replace "{T|}" with "{&|}" on call and jmp.
(putop): Handle '&'.
(intel_operand_size): Handle indir_v_mode.
(OP_E_register): Likewise.
* i386-opc.tbl: Mark 64-bit indirect call/jmp as AMD64. Add
64-bit indirect call/jmp for AMD64.
* i386-tbl.h: Regenerated
gdb/ChangeLog:
2016-06-02 Jon Turney <jon.turney@dronecode.org.uk>
* windows-nat.c (handle_output_debug_string): Return type of
gdb_signal_from_host() is gdb_signal, not an int.
(windows_get_exec_module_filename): Add pointer casts for C++.
gdb/gdbserver/ChangeLog:
2016-06-02 Jon Turney <jon.turney@dronecode.org.uk>
* win32-low.c (win32_create_inferior): Add pointer casts for C++.
