Commit Graph

2075 Commits

Author SHA1 Message Date
Cary Coutant 503a609192 Fix readelf so it doesn't complain about corrupt attribute.
When a DW_FORM_flag_present attribute comes at the very end of a
debug section, readelf complains about a corrupt attribute
because it's checking to make sure there's at least one byte of
data remaining. This patch suppresses the check when the form
is DW_FORM_flag_present.

2014-02-11  Cary Coutant  <ccoutant@google.com>

	* binutils/dwarf.c (read_and_display_attr_value): Don't warn
	for zero-length attribute value.
2014-02-11 11:33:49 -08:00
Alan Modra c1c69e839e binutils potfiles regen
Adds nds32 files to POTFILES.in
2014-02-10 09:59:35 +10:30
Andrew Pinski d32e5c54ad binutils/ChangeLog:
2014-02-06  Andrew Pinski  <apinski@cavium.com>

	* readelf.c  (get_machine_flags): Handle E_MIPS_MACH_OCTEON3 case.

elfcpp/ChangeLog:
2014-02-06  Andrew Pinski  <apinski@cavium.com>

	* mips.h (E_MIPS_MACH_OCTEON3): New enum constant.

include/elf/ChangeLog:
2014-02-06  Andrew Pinski  <apinski@cavium.com>

	* mips.h (E_MIPS_MACH_OCTEON3): New machine flag.
2014-02-06 11:26:26 -08:00
Cary Coutant 926c538512 Add readelf support for dumping gold version note sections.
binutils/
	PR binutils/16444
	* readelf.c (print_gnu_note): Add support for NT_GNU_GOLD_VERSION.
2014-02-06 08:38:03 -08:00
H.J. Lu 221fd5d598 Update copyright year to 2014
binutils/

	* version.c (print_version): Update copyright year to 2014.

gas/

	* as.c (parse_args): Update copyright year to 2014.

gold/

	* version.cc (print_version): Update copyright year to 2014.

ld/

	* ldver.c (ldversion): Update copyright year to 2014.

opcodes/

	* i386-gen.c (process_copyright): Update copyright year to 2014.
2014-01-08 05:48:12 -08:00
H.J. Lu 5fb776a637 New Year - binutils ChangeLog rotation 2014-01-08 05:32:12 -08:00
Tom Tromey 1651e569b4 remove VA_* from binutils
This removes the last uses of the obsolete VA_* macros from binutils.

All the binutils and bfd changes were tested by rebuilding.
I didn't rebuild the gas change but I think it is obviously correct.

2014-01-07  Tom Tromey  <tromey@redhat.com>

	* elf32-xtensa.c (vsprint_msg): Don't use old VA_* compatibility
	wrappers.

2014-01-07  Tom Tromey  <tromey@redhat.com>

	* bucomm.c (fatal, non_fatal): Replace obsolete VA_* macros with
	stdarg macros.
	* dlltool.c (inform): Replace obsolete VA_* macros with stdarg
	macros.
	* dllwrap.c (inform, warn): Replace obsolete VA_* macros with
	stdarg macros.

2014-01-07  Tom Tromey  <tromey@redhat.com>

	* config/tc-tic30.c (debug): Avoid old VA_* compatibility
	wrappers.
2014-01-07 09:17:05 -07:00
Tom Tromey b51f1626f6 remove uses of PARAMS from binutils
This removes the last uses of PARAMS from binutils.

The two changes in binutils were tested by rebuilding.
I didn't rebuild the gas change but I think it is obviously correct.

2014-01-07  Tom Tromey  <tromey@redhat.com>

	* coffgrok.h (coff_ofile): Don't use PARAMS.
	* nlmheader.y (strerror): Don't use PARAMS.

2014-01-07  Tom Tromey  <tromey@redhat.com>

	* config/tc-microblaze.h (parse_cons_expression_microblaze): Don't
	use PARAMS.
2014-01-07 09:17:04 -07:00
Nick Clifton bbad633bb8 * objcopy.c (dump_sections): New list.
(command_line_switch): Add OPTION_DUMP_SECTION.
	(copy_options): Add dump-section.
	(copy_usage): Document new option.
	(copy_object): Dump requested sections.
	(copy_main): Handle --dump-section.
	* doc/binutils.texi: Document --dump-section option.
	* NEWS: Mention new feature.
2013-12-31 09:52:24 +00:00
Nick Clifton 2e9e81a8f5 PR binutils/16218
* dwarf.c (read_and_display_attr_value): Only print a tab
	character if it preceeds further text.

	* binutils-all/dw2-1.W:	Update expected objdump output.
	* binutils-all/i386/compressed-1a.d: Likewise.
	* binutils-all/objdump.W: Likewise.
	* binutils-all/x86-64/compressed-1a.d: Likewise.

	* gas/elf/dwarf2-1.d: Update expected objdump output.
	* gas/elf/dwarf2-2.d: Likewise.
	* gas/i386/dw2-compress-1.d: Likewise.
2013-12-20 13:52:23 +00:00
Tom Tromey d493b2839b remove remnants of old Mach-O workaround
I happened to run readelf on an ELF file created by Guile.  readelf
complained about invalid values for DW_FORM_strp.  At first I assumed
this was just a Guile bug, but eu-readelf did the right thing, so I
looked a bit deeper.

I came across some old Mach-O code to bias some offsets by section
addresses.  Guile, unlike many ELF writers, sets the address for the
various DWARF-related sections, causing this unusual code to be run.

This code came from an old commit:

    2005-09-30  H.J. Lu  <hongjiu.lu@intel.com>

	    * dwarf.c (fetch_indirect_string): Adjust for section address.
	    (process_debug_info): Likewise.
	    (display_debug_loc): Likewise.
	    (display_debug_ranges): Likewise.

	    * objdump.c (mach_o_dwarf_sections): New.
	    (generic_dwarf_sections): Likewise.
	    (check_mach_o_dwarf): Likewise.
	    (dump_dwarf): Call check_mach_o_dwarf.

However it was partially reverted here:

    https://sourceware.org/ml/binutils/2008-11/msg00134.html

This patch just completes the reversion.

Built and regtested on x86-64 Fedora 18.  I also ran the resulting
readelf against the Guile-created object with success.

I have no way of testing this on Mach-O, so your feedback is
solicited.

2013-12-19  Tom Tromey  <tromey@redhat.com>

	* dwarf.c (fetch_indirect_string): Don't bias by section address.
	(fetch_indexed_string): Likewise.
	(process_debug_info): Likewise.
	(display_debug_loc): Likewise.
	(display_debug_ranges): Likewise.
2013-12-19 08:41:53 -07:00
Kuan-Lin Chen 35c081572f Add support for Andes NDS32:
BFD:
	* Makefile.am (BFD32_BACKENDS, BFD32_BACKENDS_CFILES): Add nds32
	files.
	* Makefile.in: Regenerate.
	* archures.c (bfd_nds32_arch): Add nds32 target.
	* bfd-in2.h: Regenerate.
	* config.bfd (nds32*le-*-linux): Add bfd_elf32_nds32lelin_vec
	and bfd_elf32_nds32belin_vec.
	(nds32*be-*-linux*): Likewise.
	(nds32*le-*-*): Add bfd_elf32_nds32le_vec and bfd_elf32_nds32be_vec.
	(nds32*be-*-*): Likewise.
	* configure.in (bfd_elf32_nds32be_vec): Add elf32-nds32.lo.
	(bfd_elf32_nds32le_vec): Likewise.
	(bfd_elf32_nds32belin_vec): Likewise.
	(bfd_elf32_nds32lelin_vec): Likewise.
	* configure: Regenerate.
	* cpu-nds32.c: New file for nds32.
	* elf-bfd.h: Add NDS32_ELF_DATA.
	* elf32-nds32.c: New file for nds32.
	* elf32-nds32.h: New file for nds32.
	* libbfd.h: Regenerate.
	* reloc.c: Add relocations for nds32.
	* targets.c (bfd_elf32_nds32be_vec): New declaration for nds32.
	(bfd_elf32_nds32le_vec): Likewise.
	(bfd_elf32_nds32belin_vec): Likewise.
	(bfd_elf32_nds32lelin_vec): Likewise.

BINUTILS:
	* readelf.c: Include elf/nds32.h
	(guess_is_rela): Add case for EM_NDS32.
	(dump_relocations): Add case for EM_NDS32.
	(decode_NDS32_machine_flags): New.
	(get_machine_flags): Add case for EM_NDS32.
	(is_32bit_abs_reloc): Likewise.
	(is_16bit_abs_reloc): Likewise.
	(process_nds32_specific): New.
	(process_arch_specific): Add case for EM_NDS32.
	* NEWS: Announce Andes nds32 support.
	* MAINTAINERS: Add nds32 maintainers.
  TESTSUITE:
	* binutils-all/objdump.exp: Add NDS32 cpu.
	* binutils-all/readelf.r: Skip extra reloc created by NDS32.

GAS:
	* Makefile.am (TARGET_CPU_CFILES): Add config/tc-nds32.c.
	(TARGET_CPU_HFILES): Add config/tc-nds32.h.
	* Makefile.in: Regenerate.
	* configure.in (nds32): Add nds32 target extension config support.
	* configure.tgt : Add case for nds32-*-elf* and nds32-*-linux*.
	* configure: Regenerate.
	* config/tc-nds32.c: New file for nds32.
	* config/tc-nds32.h: New file for nds32.
	* doc/Makefile.am (CPU_DOCS): Add c-nds32.texi.
	* doc/Makefile.in: Regenerate.
	* doc/as.texinfo: Add nds32 options.
	* doc/all.texi: Set NDS32.
	* doc/c-nds32.texi: New file dor nds32 document.
	* NEWS: Announce Andes nds32 support.
  TESTSUITE:
	* gas/all/gas.exp: Add expected failures for NDS32.
	* gas/elf/elf.exp: Likewise.
	* gas/lns/lns.exp: Use alternate test.
	* gas/macros/irp.d: Skip for NDS32.
	* gas/macros/macros.exp: Skip some tests for the NDS32.
	* gas/macros/rept.d: Skip for NDS32.
	* gas/macros/test3.d: Skip for NDS32.
	* gas/nds32: New directory.
	* gas/nds32/alu-1.s: New test.
	* gas/nds32/alu-1.d: Likewise.
	* gas/nds32/alu-2.s: Likewise.
	* gas/nds32/alu-2.d: Likewise.
	* gas/nds32/br-1.d: Likewise.
	* gas/nds32/br-1.s: Likewise.
	* gas/nds32/br-2.d: Likewise.
	* gas/nds32/br-2.s: Likewise.
	* gas/nds32/ji-jr.d: Likewise.
	* gas/nds32/ji-jr.s: Likewise.
	* gas/nds32/ls.d: Likewise.
	* gas/nds32/ls.s: Likewise.
	* gas/nds32/lsi.d: Likewise.
	* gas/nds32/lsi.s: Likewise.
	* gas/nds32/to-16bit-v1.d: Likewise.
	* gas/nds32/to-16bit-v1.s: Likewise.
	* gas/nds32/to-16bit-v2.d: Likewise.
	* gas/nds32/to-16bit-v2.s: Likewise.
	* gas/nds32/to-16bit-v3.d: Likewise.
	* gas/nds32/to-16bit-v3.s: Likewise.
	* gas/nds32/nds32.exp: New test driver.

LD:
	* Makefile.am (ALL_EMULATION_SOURCES): Add nds32 target.
	* Makefile.in: Regenerate.
	* configure.tgt: Add case for nds32*le-*-elf*, nds32*be-*-elf*,
	nds32*le-*-linux-gnu*, and nds32*be-*-linux-gnu*.
	* emulparams/nds32belf.sh: New file for nds32.
	* emulparams/nds32belf_linux.sh: Likewise.
	* emulparams/nds32belf16m.sh: Likewise.
	* emulparams/nds32elf.sh: Likewise.
	* emulparams/nds32elf_linux.sh: Likewise.
	* emulparams/nds32elf16m.sh: Likewise.
	* emultempl/nds32elf.em: Likewise.
	* scripttempl/nds32elf.sc}: Likewise.
	* gen-doc.texi: Set NDS32.
	* ld.texinfo: Set NDS32.
	* NEWS: Announce Andes nds32 support.
  TESTSUITE:
	* lib/ld-lib.exp: Add NDS32 to list of targets that do not support
	shared library generation.
	* ld-nds32: New directory.
	* ld-nds32/branch.d: New test.
	* ld-nds32/branch.ld: New test.
	* ld-nds32/branch.s: New test.
	* ld-nds32/diff.d: New test.
	* ld-nds32/diff.ld: New test.
	* ld-nds32/diff.s: New test.
	* ld-nds32/gp.d: New test.
	* ld-nds32/gp.ld: New test.
	* ld-nds32/gp.s: New test.
	* ld-nds32/imm.d: New test.
	* ld-nds32/imm.ld: New test.
	* ld-nds32/imm.s: New test.
	* ld-nds32/imm_symbol.s: New test.
	* ld-nds32/relax_jmp.d: New test.
	* ld-nds32/relax_jmp.ld: New test.
	* ld-nds32/relax_jmp.s: New test.
	* ld-nds32/relax_load_store.d: New test.
	* ld-nds32/relax_load_store.ld: New test.
	* ld-nds32/relax_load_store.s: New test.
	* ld-nds32/nds32.exp: New file.

OPCODES:
	* Makefile.am (TARGET_LIBOPCODES_CFILES): Add nds32-asm.c
	and nds32-dis.c.
	* Makefile.in: Regenerate.
	* configure.in: Add case for bfd_nds32_arch.
	* configure: Regenerate.
	* disassemble.c (ARCH_nds32): Define.
	* nds32-asm.c: New file for nds32.
	* nds32-asm.h: New file for nds32.
	* nds32-dis.c: New file for nds32.
	* nds32-opc.h: New file for nds32.

INCLUDE:
	* dis-asm.h (print_insn_nds32): Add nds32 target.
	* elf/nds32.h: New file for nds32.
	* opcode/nds32.h: New file for nds32.
2013-12-13 11:52:32 +00:00
Roland McGrath f2c7d7ee5b Use $(INSTALL_PROGRAM_ENV) consistently.
binutils/
	* Makefile.am (install-exec-local): Prefix libtool invocation with
	$(INSTALL_PROGRAM_ENV).
	* Makefile.in: Regenerate.

gas/
	* Makefile.am (install-exec-bindir): Prefix libtool invocation
	with $(INSTALL_PROGRAM_ENV).
	(install-exec-tooldir): Likewise.
	* Makefile.in: Regenerate.

gold/
	* Makefile.am (install-exec-local): Prefix $(INSTALL_PROGRAM) uses
	with $(INSTALL_PROGRAM_ENV).
	* Makefile.in: Regenerate.

ld/
	* Makefile.am (install-exec-local): Prefix libtool invocation with
	$(INSTALL_PROGRAM_ENV).
	* Makefile.in: Regenerate.
2013-12-10 15:19:50 -08:00
Cory Fields 0cb112f740 * windres.c (define_resource): Use zero for timestamp, making
output deterministic. time.h include is no longer needed.
	* resres.c (res_append_resource): Likewise.

	* pe-dll.c (fill_edata): Only use a real timestamp if
	--insert-timestamp was used.
	* emultempl/pe.em: Add the --insert-timestamp option.
	* emultempl/pep.em: Likewise for 64bit.
	* ld.texinfo: Document the --insert-timestamp option.

	* libcoff-in.h: Add insert_timestamp flag to the pe_data struct.
	* libcoff.h: Regenerate.
	* peXXigen.c (_bfd_XXi_only_swap_filehdr_out): Only use a real
	timestamp if --insert-timestamp was used.
2013-11-22 14:55:56 +00:00
Nick Clifton e2729ebe25 * rescoff.c (write_coff_file): Use 64-bit alignment for resource
data.
	(coff_res_to_bin): Likewise.
2013-11-13 12:54:29 +00:00
Doug Evans 459d52c84a Add pretty-printing of .debug_gnu_pubnames, .debug_gnu_pubtypes.
* dwarf.c (get_gdb_index_symbol_kind_name): New function.
	(display_debug_pubnames_worker): Renamed from display_debug_pubnames.
	Add support for .debug_gnu_pubnames, .debug_gnu_pubtypes.
	(display_debug_pubnames, display_debug_pubnames_gnu): New functions.
	(display_gdb_index): Redo printing of symbol kind.
	(debug_displays): Add .debug_gnu_pubnames, .debug_gnu_pubtypes.
	* dwarf.h (dwarf_section_display_enum): Add gnu_pubnames, gnu_pubtypes.
	* readelf.c (process_section_headers): Add gnu_pubnames, gnu_pubtypes.
2013-11-07 15:37:44 -08:00
Roland McGrath 64b384e1e8 Set CPU type in BFD backend for x86_64-nacl* and i?86-nacl* targets
bfd/
	* archures.c (bfd_mach_i386_nacl): Fix definition so it doesn't
	collide with bfd_mach_l1om.
	* bfd-in2.h: Regenerate.

	* elf32-i386.c (elf32_i386_nacl_elf_object_p): New function.
	(elf_backend_object_p): Use that in elf32-i386-nacl definition.
	* elf64-x86-64.c (elf64_x86_64_nacl_elf_object_p): New function.
	(elf_backend_object_p): Use that in elf64-x86-64-nacl definition.
	(elf32_x86_64_nacl_elf_object_p): New function.
	(elf_backend_object_p): Use that in elf32-x86-64-nacl definition.

binutils/
	* objdump.c (dump_dwarf): Grok bfd_mach_x86_64_nacl and
	bfd_mach_x64_32_nacl as equivalent to bfd_mach_x86_64.

ld/testsuite/
	* ld-x86-64/x86-64.exp (mixed1, mixed2): Loosen error string match
	so it accepts "i386:nacl" in place of "i386".
	* ld-x86-64/ilp32-2.d: Likewise.
	* ld-x86-64/ilp32-3.d: Likewise.
	* ld-x86-64/lp64-2.d: Likewise.
	* ld-x86-64/lp64-3.d: Likewise.
2013-11-07 10:00:32 -08:00
Alan Modra e8910a83af Replace DT_PPC_TLSOPT with DT_PPC_OPT.
This removes the DT_PPC_TLSOPT/DT_PPC64_TLSOPT dynamic tag and replaces
it with DT_PPC_OPT/DT_PPC64_OPT tag to provide the same functionality
and more.  This isn't backwards compatible, but the TLSOPT tag hasn't
been used since the tls optimisation support was never submitted to
glibc.

/include/elf/
	* ppc.h (DT_PPC_TLSOPT): Delete.
	(DT_PPC_OPT, PPC_OPT_TLS): Define.
	* ppc64.h (DT_PPC64_TLSOPT): Delete.
	(DT_PPC64_OPT, PPC64_OPT_TLS, PPC64_OPT_MULTI_TOC): Define.
bfd/
	* elf32-ppc.c (ppc_elf_size_dynamic_sections): Use new DT_PPC_OPT
	tag to specify tls optimisation.
	* elf64-ppc.c (ppc64_elf_size_dynamic_sections): Likewise.
	(ppc64_elf_finish_dynamic_sections): Specify whether multiple
	toc pointers are used via DT_PPC64_OPT.
binutils/
	* readelf.c (get_ppc_dynamic_type): Replace PPC_TLSOPT with PPC_OPT.
	(get_ppc64_dynamic_type): Replace PPC64_TLSOPT with PPC64_OPT.
2013-10-30 13:43:32 +10:30
Alan Modra 6911b7dcb8 Add ELFv2 .localentry support.
This defines the ELF symbol st_other field used to encode the number
of instructions between a function "global entry" and its "local entry",
and adds support related to the local entry offset.

include/elf/
	* ppc64.h (STO_PPC64_LOCAL_BIT, STO_PPC64_LOCAL_MASK): Define.
	(ppc64_decode_local_entry, ppc64_encode_local_entry): New functions.
	(PPC64_LOCAL_ENTRY_OFFSET, PPC64_SET_LOCAL_ENTRY_OFFSET): Define.
bfd/
	* elf64-ppc.c (struct ppc_stub_hash_entry): Add "other".
	(stub_hash_newfunc): Init new ppc_stub_hash_entry field, and one
	we forgot, "plt_ent".
	(ppc64_elf_add_symbol_hook): Check ELFv1 objects don't have
	st_other bits only valid in ELFv2.
	(ppc64_elf_merge_symbol_attribute): New function.
	(ppc_type_of_stub): Add local_off param to test branch range.
	(ppc_build_one_stub): Adjust destinations for ELFv2 locals.
	(ppc_size_one_stub, toc_adjusting_stub_needed): Similarly.
	(ppc64_elf_size_stubs): Pass local_off to ppc_type_of_stub.
	Set "other" field.
	(ppc64_elf_relocate_section): Adjust destination for ELFv2 local
	calls.
gas/
	* config/tc-ppc.c (md_pseudo_table): Add .localentry.
	(ppc_elf_localentry): New function.
	(ppc_force_relocation): Force relocs on all branches to localenty
	symbols.
	(ppc_fix_adjustable): Don't reduce such symbols to section+offset.
binutils/
	* readelf.c (get_ppc64_symbol_other): New function.
	(get_symbol_other): Use it for EM_PPC64.
2013-10-30 13:40:21 +10:30
Alan Modra ee67d69a3f Add .abiversion related support for ELFv2
Defines bits in ELF e_flags to differentiate ELFv2 objects from ELFv2,
adds .abiversion directive to explicitly choose the ABI, and code to
check and automatically select ABI.

include/elf/
	* ppc64.h (EF_PPC64_ABI): Define.
bfd/
	* elf64-ppc.c (abiversion, set_abiversion): New functions.
	(ppc64_elf_get_synthetic_symtab): Handle ELFv2 objects without .opd.
	(struct ppc_link_hash_table): Add opd_abi.
	(ppc64_elf_check_relocs): Check no .opd with ELFv2.
	(ppc64_elf_merge_private_bfd_data): New function.
	(ppc64_elf_print_private_bfd_data): New function.
	(ppc64_elf_tls_setup): Set htab->opd_abi.
	(ppc64_elf_size_dynamic_sections): Don't emit OPD related dynamic
	tags for ELFv2.
	(ppc_build_one_stub): Use R_PPC64_IRELATIVE for ELFv2 ifunc.
	(ppc64_elf_finish_dynamic_symbol): Likewise
binutils/
	* readelf.c (get_machine_flags): Display ABI version for EM_PPC64.
gas/
	* config/tc-ppc.c: Include elf/ppc64.h.
	(ppc_abiversion): New variable.
	(md_pseudo_table): Add .abiversion.
	(ppc_elf_abiversion, ppc_elf_end): New functions.
	* config/tc-ppc.h (md_end): Define.
2013-10-30 13:37:47 +10:30
Nick Clifton bf26dcc6ae * nm.c (display_rel_file): Treat bfd_error_no_symbols as
non-fatal.
2013-10-25 14:03:01 +00:00
Chao-ying Fu a9f581680f 2013-10-14 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
* readelf.c (display_mips_gnu_attribute): Support Tag_GNU_MIPS_ABI_MSA.
	* doc/binutils.texi: Document -Mmsa disassembler option.
2013-10-14 18:45:46 +00:00
Jan-Benedict Glaw 37e14bc332 2013-10-14 Jan-Benedict Glaw <jbglaw@lug-owl.de>
* readelf.c (decode_arm_unwind): Don't initialize `addr'.
2013-10-14 12:53:40 +00:00
Nick Clifton b2e951ec58 * gen-aout.c (main): Fix formatting. Close file.
* emultempl/aix.em (_read_file): Close file at end of function.

	* gas/all/itbl-test.c (main): Close fas.

	* read.c (add_include_dir): Use xrealloc.
	* config/tc-score.c (do_macro_bcmp): Initialise inst_main.
	* config/tc-tic6x.c (tic6x_parse_operand): Initialise second_reg.

	* readelf.c (decode_arm_unwind): Initialise addr structure.
	(process_symbol_table): Free lengths.
	* srcconv.c (wr_sc): Free info.

	* chew.c (perform): Free next.
2013-10-14 09:15:09 +00:00
Roland McGrath a2b903b78e binutils/
* winduni.c (languages): Use \345 (octal syntax) rather than
	literal non-ASCII/non-UTF8 character in string literal.
2013-10-11 17:24:26 +00:00
Roland McGrath 0b4362b076 binutils/
* readelf.c (print_dynamic_symbol): Use array subscript syntax
	rather than addition syntax with string literal.
2013-10-11 17:10:58 +00:00
Nick Clifton 35431c4c23 PR binutils/16023
* debug.c (debug_type_samep): Add missing break statement.
2013-10-09 16:21:26 +00:00
Nick Clifton aebcf7b7ec PR binutils/16024
* objdump.c (usage): Mark as a no-return function.
	(main): Add comment explaining why a break statement is not
	needed.
2013-10-09 16:17:23 +00:00
Nick Clifton a69c4772a4 * dwarf.c (add64): New function.
(read_and_display_attr_value): Add CU offset in to the value
	displayed for a DW_AT_ref8 attribute.
2013-10-09 14:06:00 +00:00
Nick Clifton 5cd84a722e * arsup.c (ar_save): Respect the deterministic setting when
reading from an mri script.
	* ar.c (main): Set the default deterministic mode when reading
	from an mri script.
2013-10-01 13:44:37 +00:00
Jan-Benedict Glaw e39462cbbb 2013-10-01 Jan-Benedict Glaw <jbglaw@lug-owl.de>
* dwarf.c (SAFE_BYTE_GET): Fix argument check.
2013-10-01 10:32:54 +00:00
H.J. Lu 9c41109d36 Pass offset_size to print_dwarf_vma for cie_id
binutils/

	* dwarf.c (display_debug_frames): Pass offset_size to
	print_dwarf_vma for cie_id.

binutils/testsuite/

	* binutils-all/x86-64/compressed-1a.d: Updated for 64-bit addresses.
2013-09-27 18:05:03 +00:00
Alan Modra cc9afea3e4 * libtool.m4 (_LT_ENABLE_LOCK <ld -m flags>): Remove non-canonical
ppc host match.  Support little-endian powerpc linux hosts.
Regenerate binutils configure files.
2013-09-20 09:51:25 +00:00
Tristan Gingold 58ca03a25d binutils/
2013-09-18  Tristan Gingold  <gingold@adacore.com>

	* NEWS: Add marker for 2.24.

gas/
2013-09-18  Tristan Gingold  <gingold@adacore.com>

	* NEWS: Add marker for 2.24.

ld/
2013-09-18  Tristan Gingold  <gingold@adacore.com>

	* NEWS: Add marker for 2.24.
2013-09-18 10:39:38 +00:00
Tristan Gingold bec18c8fd1 2013-09-18 Tristan Gingold <gingold@adacore.com>
* Makefile.am (LEXLIB): Define.  Replase references to @LEXLIB@
	by $(LEXLIB).
	* Makefile.in: Regenerate.
2013-09-18 10:33:02 +00:00
Steve Ellcey fef1b0b33b 2013-09-17 Doug Gilmore <Doug.Gilmore@imgtec.com>
* readelf.c (get_machine_flags): Handle EF_MIPS_FP64.
2013-09-17 21:09:27 +00:00
Nick Clifton bf5117e32d * dwarf.c (dwarf_vmatoa): Rename to dwarf_vmatoa_1 and add a
precision parameter.
	(dwarf_vmatoa): New wrapper for dwarf_vmatoa_1.
	(print_dwarf_vma): Use dwarf_vmatoa_1.
	(SAFE_BYTE_GET): Add check that VAL is big enough to contain
	AMOUNT bytes.
	(process_debug_info): Use an unsigned int for the offset size.
	(process_debug_pubnames): Likewise.
	(display_debug_aranges): Likewise.
	(struct Frame_Chunk): Use dwarf_vma type for pc_begin and pc_range
	fields.
	(frame_display_row): Use print_dwarf_vma to display dwarf_vma
	values.
	(display_debug_frames): Likewise.

	* binutils-all/x86-64/compressed-1a.d: Update expected output to
	allow for 64-bit addresses.

	* ld-elf/eh1.d: Update expected output to allow for
	64-bit addresses.
	* ld-elf/eh2.d: Likewise.
	* ld-elf/eh3.d: Likewise.
	* ld-elf/eh4.d: Likewise.
	* ld-elf/eh5.d: Likewise.
	* ld-elf/eh6.d: Likewise.
	* ld-mips-elf/eh-frame1-n64.d: Likewise.
	* ld-mips-elf/eh-frame2-n64.d: Likewise.
	* ld-mips-elf/eh-frame3.d: Likewise.

	* gas/cfi/cfi-alpha-1.d: Update expected output to allow for
	64-bit addresses.
	* gas/cfi/cfi-alpha-3.d: Likewise.
	* gas/cfi/cfi-arm-1.d: Likewise.
	* gas/cfi/cfi-common-1.d: Likewise.
	* gas/cfi/cfi-common-2.d: Likewise.
	* gas/cfi/cfi-common-3.d: Likewise.
	* gas/cfi/cfi-common-4.d: Likewise.
	* gas/cfi/cfi-common-5.d: Likewise.
	* gas/cfi/cfi-common-6.d: Likewise.
	* gas/cfi/cfi-common-7.d: Likewise.
	* gas/cfi/cfi-hppa-1.d: Likewise.
	* gas/cfi/cfi-i386-2.d: Likewise.
	* gas/cfi/cfi-i386.d: Likewise.
	* gas/cfi/cfi-m68k.d: Likewise.
	* gas/cfi/cfi-mips-1.d: Likewise.
	* gas/cfi/cfi-ppc-1.d: Likewise.
	* gas/cfi/cfi-s390-1.d: Likewise.
	* gas/cfi/cfi-s390x-1.d: Likewise.
	* gas/cfi/cfi-sh-1.d: Likewise.
	* gas/cfi/cfi-sparc-1.d: Likewise.
	* gas/cfi/cfi-sparc64-1.d: Likewise.
	* gas/cfi/cfi-x86_64.d: Likewise.
2013-09-12 09:14:47 +00:00
Nick Clifton 846a11e420 * dwarf.c (display_debug_frames): Check for DW64_CIE_ID when
parsing 64-bit frames.
2013-09-10 16:19:08 +00:00
Nick Clifton 0e135a02da PR binutils/15796
* ar.c (map_over_members): Correctly handle multiple same-name
	entries on the command line and in the archive.
2013-08-27 16:22:48 +00:00
H.J. Lu 5e080929e1 Remove the extra space
* doc/binutils.texi: Remove the extra space.
2013-08-23 17:06:44 +00:00
Nick Clifton a575c95845 PR binutils/15777
(nm --special-syms): Fix typo.
2013-08-23 14:22:39 +00:00
Nick Clifton e956b7d3bd PR binutils/15779
* doc/binutils.texi (ranlib -D): Correct description.
2013-08-23 14:20:34 +00:00
Nick Clifton 021f8a30f4 PR binutils/14136
(nm): Add description of 'I' symbol type.
2013-08-23 14:12:39 +00:00
Nick Clifton ce0570c764 PR binutils/15798
* doc/binutils.texi (ar cmdline): Update description of 'q'
	command.
2013-08-23 13:37:06 +00:00
Nick Clifton 9aff4b7ac1 PR binutils/15834
Fix typos:
---
 bfd/bfdio.c                                  |  2 +-
 bfd/elf32-spu.c                              |  2 +-
 bfd/elfnn-aarch64.c                          |  2 +-
 binutils/od-xcoff.c                          |  2 +-
 config/tcl.m4                                |  2 +-
 gas/config/tc-ia64.c                         |  2 +-
 gas/config/tc-sparc.c                        |  2 +-
 gas/config/tc-z80.c                          | 12 ++++++------
 gas/doc/c-i386.texi                          |  6 +++---
 gas/doc/c-m32r.texi                          |  2 +-
 gas/testsuite/gas/d10v/instruction_packing.d |  2 +-
 gas/testsuite/gas/z80/atend.d                |  2 +-
 gold/object.h                                |  2 +-
 include/gdb/remote-sim.h                     |  2 +-
 include/opcode/ChangeLog                     |  2 +-
 include/opcode/i960.h                        |  2 +-
 ld/testsuite/ld-mips-elf/mips16-pic-1.inc    |  2 +-
 opcodes/aarch64-asm.c                        |  2 +-
 opcodes/aarch64-dis.c                        |  2 +-
 opcodes/msp430-dis.c                         |  2 +-
2013-08-23 07:54:19 +00:00
Tristan Gingold 8b64b65e23 binutils/
2013-08-19  Tristan Gingold  <gingold@adacore.com>

	* nm.c (print_size_symbols): Directly get symbol size.


binutils/testsuite/
2013-08-19  Tristan Gingold  <gingold@adacore.com>

	* binutils-all/nm.exp: Add a test for nm --size-sort
	* binutils-all/nm-elf-1.s: New file.
	* binutils-all/nm-1.s: New file.
2013-08-19 15:08:52 +00:00
Andreas Schwab 643902a49a PR binutils/15818
* objdump.c (disassemble_section): Return early if nothing from
this section needs to be disassembled.
2013-08-12 07:55:55 +00:00
Nick Clifton 4046d87a36 * elf32-rl78.c (rl78_elf_merge_private_bfd_data): Complain if G10
flag bits do not match.
	(rl78_elf_print_private_bfd_data): Describe G10 flag.

	* readelf.c (get_machine_flags): Handle RL78 G10 flag.

	* config/tc-rl78.c (elf_flags): New variable.
	(enum options): Add OPTION_G10.
	(md_longopts): Add mg10.
	(md_parse_option): Parse -mg10.
	(rl78_elf_final_processing): New function.
	* config/tc-rl78.c (tc_final_processing): Define.
	* doc/c-rl78.texi: Document -mg10 option.

	* rl78.c (E_FLAG_RL78_G10): Define.

	* lib/ld-lib.exp (check_shared_lib_support): Note that the RL78
	does not support shared library generation.
2013-08-09 10:40:04 +00:00
H.J. Lu 43234a1e14 Add Intel AVX-512 support
binutils/

2013-07-26  Sergey Guriev  <sergey.s.guriev@intel.com>
	    Alexander Ivchenko  <alexander.ivchenko@intel.com>
	    Maxim Kuznetsov  <maxim.kuznetsov@intel.com>
	    Sergey Lega  <sergey.s.lega@intel.com>
	    Anna Tikhonova  <anna.tikhonova@intel.com>
	    Ilya Tocar  <ilya.tocar@intel.com>
	    Andrey Turetskiy  <andrey.turetskiy@intel.com>
	    Ilya Verbin  <ilya.verbin@intel.com>
	    Kirill Yukhin  <kirill.yukhin@intel.com>
	    Michael Zolotukhin  <michael.v.zolotukhin@intel.com>

	* dwarf.c (dwarf_regnames_i386): Add k0-k7 registers and
	numeration in comments.
	(dwarf_regnames_x86_64): Add xmm16-31 and k0-k7 registers to
	dwarf table.

gas/

2013-07-26  Sergey Guriev  <sergey.s.guriev@intel.com>
	    Alexander Ivchenko  <alexander.ivchenko@intel.com>
	    Maxim Kuznetsov  <maxim.kuznetsov@intel.com>
	    Sergey Lega  <sergey.s.lega@intel.com>
	    Anna Tikhonova  <anna.tikhonova@intel.com>
	    Ilya Tocar  <ilya.tocar@intel.com>
	    Andrey Turetskiy  <andrey.turetskiy@intel.com>
	    Ilya Verbin  <ilya.verbin@intel.com>
	    Kirill Yukhin  <kirill.yukhin@intel.com>
	    Michael Zolotukhin  <michael.v.zolotukhin@intel.com>

	* config/tc-i386-intel.c (O_zmmword_ptr): New.
	(i386_types): Add zmmword.
	(i386_intel_simplify_register): Allow regzmm.
	(i386_intel_simplify): Handle zmmwords.
	(i386_intel_operand): Handle RC/SAE, vector operations and
	zmmwords.
	* config/tc-i386.c (ZMMWORD_MNEM_SUFFIX): New.
	(struct RC_Operation): New.
	(struct Mask_Operation): New.
	(struct Broadcast_Operation): New.
	(vex_prefix): Size of bytes increased to 4 to support EVEX
	encoding.
	(enum i386_error): Add new error codes: unsupported_broadcast,
	broadcast_not_on_src_operand, broadcast_needed,
	unsupported_masking, mask_not_on_destination, no_default_mask,
	unsupported_rc_sae, rc_sae_operand_not_last_imm,
	invalid_register_operand, try_vector_disp8.
	(struct _i386_insn): Add new fields vrex, need_vrex, mask,
	rounding, broadcast, memshift.
	(struct RC_name): New.
	(RC_NamesTable): New.
	(evexlig): New.
	(evexwig): New.
	(extra_symbol_chars): Add '{'.
	(cpu_arch): Add AVX512F, AVX512CD, AVX512ER and AVX512PF.
	(i386_operand_type): Add regzmm, regmask and vec_disp8.
	(match_mem_size): Handle zmmwords.
	(operand_type_match): Handle zmm-registers.
	(mode_from_disp_size): Handle vec_disp8.
	(fits_in_vec_disp8): New.
	(md_begin): Handle {} properly.
	(type_names): Add "rZMM", "Mask reg" and "Vector d8".
	(build_vex_prefix): Handle vrex.
	(build_evex_prefix): New.
	(process_immext): Adjust to properly handle EVEX.
	(md_assemble): Add EVEX encoding support.
	(swap_2_operands): Correctly handle operands with masking,
	broadcasting or RC/SAE.
	(check_VecOperands): Support EVEX features.
	(VEX_check_operands): Properly handle 16 upper [xyz]mm registers.
	(match_template): Support regzmm and handle new error codes.
	(process_suffix): Handle zmmwords and zmm-registers.
	(check_byte_reg): Extend to zmm-registers.
	(process_operands): Extend to zmm-registers.
	(build_modrm_byte): Handle EVEX.
	(output_insn): Adjust to properly handle EVEX case.
	(disp_size): Handle vec_disp8.
	(output_disp): Support compressed disp8*N evex feature.
	(output_imm): Handle RC/SAE immediates properly.
	(check_VecOperations): New.
	(i386_immediate): Handle EVEX features.
	(i386_index_check): Handle zmmwords and zmm-registers.
	(RC_SAE_immediate): New.
	(i386_att_operand): Handle EVEX features.
	(parse_real_register): Add a check for ZMM/Mask registers.
	(OPTION_MEVEXLIG): New.
	(OPTION_MEVEXWIG): New.
	(md_longopts): Add mevexlig and mevexwig.
	(md_parse_option): Handle mevexlig and mevexwig options.
	(md_show_usage): Add description for mevexlig and mevexwig.
	* doc/c-i386.texi: Document avx512f/.avx512f, avx512cd/.avx512cd,
	avx512er/.avx512er, avx512pf/.avx512pf, mevexlig and mevexwig.

gas/testsuite/

2013-07-26  Sergey Guriev  <sergey.s.guriev@intel.com>
	    Alexander Ivchenko  <alexander.ivchenko@intel.com>
	    Maxim Kuznetsov  <maxim.kuznetsov@intel.com>
	    Sergey Lega  <sergey.s.lega@intel.com>
	    Anna Tikhonova  <anna.tikhonova@intel.com>
	    Ilya Tocar  <ilya.tocar@intel.com>
	    Andrey Turetskiy  <andrey.turetskiy@intel.com>
	    Ilya Verbin  <ilya.verbin@intel.com>
	    Kirill Yukhin  <kirill.yukhin@intel.com>
	    Michael Zolotukhin  <michael.v.zolotukhin@intel.com>

	* gas/cfi/cfi-i386.s: Add tests for k0-k7.
	* gas/cfi/cfi-i386.d: Change to reflect above mentioned changes.
	* gas/cfi/cfi-x86_64.s: Add tests for xmm16-31, k0-7.
	* gas/cfi/cfi-x86_64.d: Change to reflect above mentioned changes.
	* gas/i386/ilp32/cfi/cfi-x86_64.d: Ditto.
	* gas/i386/intel-regs.s: Add tests for zmm0 and xmm16 registers.
	* gas/i386/intel-regs.d: Change correspondingly.
	* gas/i386/prefetch-intel.d: Reflect implementation of prefetchwt1.
	* gas/i386/prefetch.d: Ditto.
	* gas/i386/x86-64-prefetch-intel.d: Ditto.
	* gas/i386/x86-64-prefetch.d: Ditto.
	* gas/i386/avx512f-intel.d: New.
	* gas/i386/avx512f-nondef.d: New.
	* gas/i386/avx512f-nondef.s: New.
	* gas/i386/avx512f-opts-intel.d: New.
	* gas/i386/avx512f-opts.d: New.
	* gas/i386/avx512f-opts.s: New.
	* gas/i386/avx512f.d: New.
	* gas/i386/avx512f.s: New.
	* gas/i386/avx512cd-intel.d: New.
	* gas/i386/avx512cd.d: New.
	* gas/i386/avx512cd.s: New.
	* gas/i386/avx512er-intel.d: New.
	* gas/i386/avx512er.d: New.
	* gas/i386/avx512er.s: New.
	* gas/i386/avx512pf-intel.d: New.
	* gas/i386/avx512pf.d: New.
	* gas/i386/avx512pf.s: New.
	* gas/i386/evex-lig.s: New.
	* gas/i386/evex-lig256-intel.d: New.
	* gas/i386/evex-lig256.d: New.
	* gas/i386/evex-lig512-intel.d: New.
	* gas/i386/evex-lig512.d: New.
	* gas/i386/evex-wig.s: New.
	* gas/i386/evex-wig1-intel.d: New.
	* gas/i386/evex-wig1.d: New.
	* gas/i386/inval-avx512f.l: New.
	* gas/i386/inval-avx512f.s: New.
	* gas/i386/x86-64-avx512f-intel.d: New.
	* gas/i386/x86-64-avx512f-nondef.d: New.
	* gas/i386/x86-64-avx512f-nondef.s: New.
	* gas/i386/x86-64-avx512f-opts-intel.d: New.
	* gas/i386/x86-64-avx512f-opts.d: New.
	* gas/i386/x86-64-avx512f-opts.s: New.
	* gas/i386/x86-64-avx512f.d: New.
	* gas/i386/x86-64-avx512f.s: New.
	* gas/i386/x86-64-avx512cd-intel.d: New.
	* gas/i386/x86-64-avx512cd.d: New.
	* gas/i386/x86-64-avx512cd.s: New.
	* gas/i386/x86-64-avx512er-intel.d: New.
	* gas/i386/x86-64-avx512er.d: New.
	* gas/i386/x86-64-avx512er.s: New.
	* gas/i386/x86-64-avx512pf-intel.d: New.
	* gas/i386/x86-64-avx512pf.d: New.
	* gas/i386/x86-64-avx512pf.s: New.
	* gas/i386/x86-64-evex-lig.s: New.
	* gas/i386/x86-64-evex-lig256-intel.d: New.
	* gas/i386/x86-64-evex-lig256.d: New.
	* gas/i386/x86-64-evex-lig512-intel.d: New.
	* gas/i386/x86-64-evex-lig512.d: New.
	* gas/i386/x86-64-evex-wig.s: New.
	* gas/i386/x86-64-evex-wig1-intel.d: New.
	* gas/i386/x86-64-evex-wig1.d: New.
	* gas/i386/x86-64-inval-avx512f.l: New.
	* gas/i386/x86-64-inval-avx512f.s: New.
	* gas/i386/i386.exp: Run new AVX-512 tests.

opcodes/

2013-07-26  Sergey Guriev  <sergey.s.guriev@intel.com>
	    Alexander Ivchenko  <alexander.ivchenko@intel.com>
	    Maxim Kuznetsov  <maxim.kuznetsov@intel.com>
	    Sergey Lega  <sergey.s.lega@intel.com>
	    Anna Tikhonova  <anna.tikhonova@intel.com>
	    Ilya Tocar  <ilya.tocar@intel.com>
	    Andrey Turetskiy  <andrey.turetskiy@intel.com>
	    Ilya Verbin  <ilya.verbin@intel.com>
	    Kirill Yukhin  <kirill.yukhin@intel.com>
	    Michael Zolotukhin  <michael.v.zolotukhin@intel.com>

	* i386-dis-evex.h: New.
	* i386-dis.c (OP_Rounding): New.
	(VPCMP_Fixup): New.
	(OP_Mask): New.
	(Rdq): New.
	(XMxmmq): New.
	(EXdScalarS): New.
	(EXymm): New.
	(EXEvexHalfBcstXmmq): New.
	(EXxmm_mdq): New.
	(EXEvexXGscat): New.
	(EXEvexXNoBcst): New.
	(VPCMP): New.
	(EXxEVexR): New.
	(EXxEVexS): New.
	(XMask): New.
	(MaskG): New.
	(MaskE): New.
	(MaskR): New.
	(MaskVex): New.
	(modes enum): Add evex_x_gscat_mode, evex_x_nobcst_mode,
	evex_half_bcst_xmmq_mode, xmm_mdq_mode, ymm_mode,
	evex_rounding_mode, evex_sae_mode, mask_mode.
	(USE_EVEX_TABLE): New.
	(EVEX_TABLE): New.
	(EVEX enum): New.
	(REG enum): Add REG_EVEX_0F72, REG_EVEX_0F73, REG_EVEX_0F38C6,
	REG_EVEX_0F38C7.
	(MOD enum): Add MOD_EVEX_0F10_PREFIX_1, MOD_EVEX_0F10_PREFIX_3,
	MOD_EVEX_0F11_PREFIX_1, MOD_EVEX_0F11_PREFIX_3,
	MOD_EVEX_0F12_PREFIX_0, MOD_EVEX_0F16_PREFIX_0, MOD_EVEX_0F38C6_REG_1,
	MOD_EVEX_0F38C6_REG_2, MOD_EVEX_0F38C6_REG_5, MOD_EVEX_0F38C6_REG_6,
	MOD_EVEX_0F38C7_REG_1, MOD_EVEX_0F38C7_REG_2,  MOD_EVEX_0F38C7_REG_5,
	MOD_EVEX_0F38C7_REG_6.
	(PREFIX enum): Add PREFIX_VEX_0F41, PREFIX_VEX_0F42, PREFIX_VEX_0F44,
	PREFIX_VEX_0F45, PREFIX_VEX_0F46, PREFIX_VEX_0F47, PREFIX_VEX_0F4B,
	PREFIX_VEX_0F90, PREFIX_VEX_0F91, PREFIX_VEX_0F92, PREFIX_VEX_0F93,
	PREFIX_VEX_0F98, PREFIX_VEX_0F3A30, PREFIX_VEX_0F3A32,
	PREFIX_VEX_0F3AF0, PREFIX_EVEX_0F10, PREFIX_EVEX_0F11,
	PREFIX_EVEX_0F12, PREFIX_EVEX_0F13, PREFIX_EVEX_0F14,
	PREFIX_EVEX_0F15, PREFIX_EVEX_0F16, PREFIX_EVEX_0F17,
	PREFIX_EVEX_0F28, PREFIX_EVEX_0F29, PREFIX_EVEX_0F2A,
	PREFIX_EVEX_0F2B, PREFIX_EVEX_0F2C, PREFIX_EVEX_0F2D,
	PREFIX_EVEX_0F2E, PREFIX_EVEX_0F2F, PREFIX_EVEX_0F51,
	PREFIX_EVEX_0F58, PREFIX_EVEX_0F59, PREFIX_EVEX_0F5A,
	PREFIX_EVEX_0F5B, PREFIX_EVEX_0F5C, PREFIX_EVEX_0F5D,
	PREFIX_EVEX_0F5E, PREFIX_EVEX_0F5F, PREFIX_EVEX_0F62,
	PREFIX_EVEX_0F66, PREFIX_EVEX_0F6A, PREFIX_EVEX_0F6C,
	PREFIX_EVEX_0F6D, PREFIX_EVEX_0F6E, PREFIX_EVEX_0F6F,
	PREFIX_EVEX_0F70, PREFIX_EVEX_0F72_REG_0, PREFIX_EVEX_0F72_REG_1,
	PREFIX_EVEX_0F72_REG_2, PREFIX_EVEX_0F72_REG_4,
	PREFIX_EVEX_0F72_REG_6, PREFIX_EVEX_0F73_REG_2,
	PREFIX_EVEX_0F73_REG_6, PREFIX_EVEX_0F76, PREFIX_EVEX_0F78,
	PREFIX_EVEX_0F79, PREFIX_EVEX_0F7A, PREFIX_EVEX_0F7B,
	PREFIX_EVEX_0F7E, PREFIX_EVEX_0F7F, PREFIX_EVEX_0FC2,
	PREFIX_EVEX_0FC6, PREFIX_EVEX_0FD2, PREFIX_EVEX_0FD3,
	PREFIX_EVEX_0FD4, PREFIX_EVEX_0FD6, PREFIX_EVEX_0FDB,
	PREFIX_EVEX_0FDF, PREFIX_EVEX_0FE2, PREFIX_EVEX_0FE6 PREFIX_EVEX_0FE7,
	PREFIX_EVEX_0FEB, PREFIX_EVEX_0FEF, PREFIX_EVEX_0FF2,
	PREFIX_EVEX_0FF3, PREFIX_EVEX_0FF4, PREFIX_EVEX_0FFA, PREFIX_EVEX_0FFB,
	PREFIX_EVEX_0FFE, PREFIX_EVEX_0F380C, PREFIX_EVEX_0F380D,
	PREFIX_EVEX_0F3811, PREFIX_EVEX_0F3812, PREFIX_EVEX_0F3813,
	PREFIX_EVEX_0F3814, PREFIX_EVEX_0F3815, PREFIX_EVEX_0F3816,
	PREFIX_EVEX_0F3818, PREFIX_EVEX_0F3819, PREFIX_EVEX_0F381A,
	PREFIX_EVEX_0F381B, PREFIX_EVEX_0F381E, PREFIX_EVEX_0F381F,
	PREFIX_EVEX_0F3821, PREFIX_EVEX_0F3822, PREFIX_EVEX_0F3823,
	PREFIX_EVEX_0F3824, PREFIX_EVEX_0F3825, PREFIX_EVEX_0F3827,
	PREFIX_EVEX_0F3828, PREFIX_EVEX_0F3829, PREFIX_EVEX_0F382A,
	PREFIX_EVEX_0F382C, PREFIX_EVEX_0F382D, PREFIX_EVEX_0F3831,
	PREFIX_EVEX_0F3832, PREFIX_EVEX_0F3833, PREFIX_EVEX_0F3834,
	PREFIX_EVEX_0F3835, PREFIX_EVEX_0F3836, PREFIX_EVEX_0F3837,
	PREFIX_EVEX_0F3839, PREFIX_EVEX_0F383A, PREFIX_EVEX_0F383B,
	PREFIX_EVEX_0F383D, PREFIX_EVEX_0F383F, PREFIX_EVEX_0F3840,
	PREFIX_EVEX_0F3842, PREFIX_EVEX_0F3843, PREFIX_EVEX_0F3844,
	PREFIX_EVEX_0F3845, PREFIX_EVEX_0F3846, PREFIX_EVEX_0F3847,
	PREFIX_EVEX_0F384C, PREFIX_EVEX_0F384D, PREFIX_EVEX_0F384E,
	PREFIX_EVEX_0F384F, PREFIX_EVEX_0F3858, PREFIX_EVEX_0F3859,
	PREFIX_EVEX_0F385A, PREFIX_EVEX_0F385B, PREFIX_EVEX_0F3864,
	PREFIX_EVEX_0F3865, PREFIX_EVEX_0F3876, PREFIX_EVEX_0F3877,
	PREFIX_EVEX_0F387C, PREFIX_EVEX_0F387E, PREFIX_EVEX_0F387F,
	PREFIX_EVEX_0F3888, PREFIX_EVEX_0F3889, PREFIX_EVEX_0F388A,
	PREFIX_EVEX_0F388B, PREFIX_EVEX_0F3890, PREFIX_EVEX_0F3891,
	PREFIX_EVEX_0F3892, PREFIX_EVEX_0F3893, PREFIX_EVEX_0F3896,
	PREFIX_EVEX_0F3897, PREFIX_EVEX_0F3898, PREFIX_EVEX_0F3899,
	PREFIX_EVEX_0F389A, PREFIX_EVEX_0F389B, PREFIX_EVEX_0F389C,
	PREFIX_EVEX_0F389D, PREFIX_EVEX_0F389E, PREFIX_EVEX_0F389F,
	PREFIX_EVEX_0F38A0, PREFIX_EVEX_0F38A1, PREFIX_EVEX_0F38A2,
	PREFIX_EVEX_0F38A3, PREFIX_EVEX_0F38A6, PREFIX_EVEX_0F38A7,
	PREFIX_EVEX_0F38A8, PREFIX_EVEX_0F38A9, PREFIX_EVEX_0F38AA,
	PREFIX_EVEX_0F38AB, PREFIX_EVEX_0F38AC, PREFIX_EVEX_0F38AD,
	PREFIX_EVEX_0F38AE, PREFIX_EVEX_0F38AF, PREFIX_EVEX_0F38B6,
	PREFIX_EVEX_0F38B7, PREFIX_EVEX_0F38B8, PREFIX_EVEX_0F38B9,
	PREFIX_EVEX_0F38BA, PREFIX_EVEX_0F38BB, PREFIX_EVEX_0F38BC,
	PREFIX_EVEX_0F38BD, PREFIX_EVEX_0F38BE, PREFIX_EVEX_0F38BF,
	PREFIX_EVEX_0F38C4, PREFIX_EVEX_0F38C6_REG_1,
	PREFIX_EVEX_0F38C6_REG_2, PREFIX_EVEX_0F38C6_REG_5,
	PREFIX_EVEX_0F38C6_REG_6, PREFIX_EVEX_0F38C7_REG_1,
	PREFIX_EVEX_0F38C7_REG_2, PREFIX_EVEX_0F38C7_REG_5,
	PREFIX_EVEX_0F38C7_REG_6, PREFIX_EVEX_0F38C8, PREFIX_EVEX_0F38CA,
	PREFIX_EVEX_0F38CB, PREFIX_EVEX_0F38CC, PREFIX_EVEX_0F38CD,
	PREFIX_EVEX_0F3A00,  PREFIX_EVEX_0F3A01, PREFIX_EVEX_0F3A03,
	PREFIX_EVEX_0F3A04, PREFIX_EVEX_0F3A05, PREFIX_EVEX_0F3A08,
	PREFIX_EVEX_0F3A09, PREFIX_EVEX_0F3A0A, PREFIX_EVEX_0F3A0B,
	PREFIX_EVEX_0F3A17, PREFIX_EVEX_0F3A18, PREFIX_EVEX_0F3A19,
	PREFIX_EVEX_0F3A1A, PREFIX_EVEX_0F3A1B, PREFIX_EVEX_0F3A1D,
	PREFIX_EVEX_0F3A1E, PREFIX_EVEX_0F3A1F, PREFIX_EVEX_0F3A21,
	PREFIX_EVEX_0F3A23, PREFIX_EVEX_0F3A25, PREFIX_EVEX_0F3A26,
	PREFIX_EVEX_0F3A27, PREFIX_EVEX_0F3A38, PREFIX_EVEX_0F3A39,
	PREFIX_EVEX_0F3A3A, PREFIX_EVEX_0F3A3B, PREFIX_EVEX_0F3A3E,
	PREFIX_EVEX_0F3A3F, PREFIX_EVEX_0F3A43, PREFIX_EVEX_0F3A54,
	PREFIX_EVEX_0F3A55.
	(VEX_LEN enum): Add VEX_LEN_0F41_P_0, VEX_LEN_0F42_P_0, VEX_LEN_0F44_P_0,
	VEX_LEN_0F45_P_0, VEX_LEN_0F46_P_0, VEX_LEN_0F47_P_0,
	VEX_LEN_0F4B_P_2, VEX_LEN_0F90_P_0, VEX_LEN_0F91_P_0,
	VEX_LEN_0F92_P_0, VEX_LEN_0F93_P_0, VEX_LEN_0F98_P_0,
	VEX_LEN_0F3A30_P_2, VEX_LEN_0F3A32_P_2, VEX_W_0F41_P_0_LEN_1,
	VEX_W_0F42_P_0_LEN_1, VEX_W_0F44_P_0_LEN_0, VEX_W_0F45_P_0_LEN_1,
	VEX_W_0F46_P_0_LEN_1, VEX_W_0F47_P_0_LEN_1, VEX_W_0F4B_P_2_LEN_1,
	VEX_W_0F90_P_0_LEN_0, VEX_W_0F91_P_0_LEN_0, VEX_W_0F92_P_0_LEN_0,
	VEX_W_0F93_P_0_LEN_0, VEX_W_0F98_P_0_LEN_0, VEX_W_0F3A30_P_2_LEN_0,
	VEX_W_0F3A32_P_2_LEN_0.
	(VEX_W enum): Add EVEX_W_0F10_P_0, EVEX_W_0F10_P_1_M_0,
	EVEX_W_0F10_P_1_M_1, EVEX_W_0F10_P_2, EVEX_W_0F10_P_3_M_0,
	EVEX_W_0F10_P_3_M_1, EVEX_W_0F11_P_0, EVEX_W_0F11_P_1_M_0,
	EVEX_W_0F11_P_1_M_1, EVEX_W_0F11_P_2, EVEX_W_0F11_P_3_M_0,
	EVEX_W_0F11_P_3_M_1, EVEX_W_0F12_P_0_M_0, EVEX_W_0F12_P_0_M_1,
	EVEX_W_0F12_P_1, EVEX_W_0F12_P_2, EVEX_W_0F12_P_3, EVEX_W_0F13_P_0,
	EVEX_W_0F13_P_2, EVEX_W_0F14_P_0, EVEX_W_0F14_P_2, EVEX_W_0F15_P_0,
	EVEX_W_0F15_P_2, EVEX_W_0F16_P_0_M_0, EVEX_W_0F16_P_0_M_1,
	EVEX_W_0F16_P_1, EVEX_W_0F16_P_2, EVEX_W_0F17_P_0, EVEX_W_0F17_P_2,
	EVEX_W_0F28_P_0, EVEX_W_0F28_P_2, EVEX_W_0F29_P_0, EVEX_W_0F29_P_2,
	EVEX_W_0F2A_P_1, EVEX_W_0F2A_P_3, EVEX_W_0F2B_P_0, EVEX_W_0F2B_P_2,
	EVEX_W_0F2E_P_0, EVEX_W_0F2E_P_2, EVEX_W_0F2F_P_0, EVEX_W_0F2F_P_2,
	EVEX_W_0F51_P_0, EVEX_W_0F51_P_1, EVEX_W_0F51_P_2, EVEX_W_0F51_P_3,
	EVEX_W_0F58_P_0, EVEX_W_0F58_P_1, EVEX_W_0F58_P_2, EVEX_W_0F58_P_3,
	EVEX_W_0F59_P_0, EVEX_W_0F59_P_1, EVEX_W_0F59_P_2, EVEX_W_0F59_P_3,
	EVEX_W_0F5A_P_0, EVEX_W_0F5A_P_1, EVEX_W_0F5A_P_2, EVEX_W_0F5A_P_3,
	EVEX_W_0F5B_P_0, EVEX_W_0F5B_P_1, EVEX_W_0F5B_P_2, EVEX_W_0F5C_P_0,
	EVEX_W_0F5C_P_1, EVEX_W_0F5C_P_2, EVEX_W_0F5C_P_3, EVEX_W_0F5D_P_0,
	EVEX_W_0F5D_P_1, EVEX_W_0F5D_P_2, EVEX_W_0F5D_P_3, EVEX_W_0F5E_P_0,
	EVEX_W_0F5E_P_1, EVEX_W_0F5E_P_2, EVEX_W_0F5E_P_3, EVEX_W_0F5F_P_0,
	EVEX_W_0F5F_P_1, EVEX_W_0F5F_P_2, EVEX_W_0F5F_P_3, EVEX_W_0F62_P_2,
	EVEX_W_0F66_P_2, EVEX_W_0F6A_P_2, EVEX_W_0F6C_P_2, EVEX_W_0F6D_P_2,
	EVEX_W_0F6E_P_2, EVEX_W_0F6F_P_1, EVEX_W_0F6F_P_2, EVEX_W_0F70_P_2,
	EVEX_W_0F72_R_2_P_2, EVEX_W_0F72_R_6_P_2, EVEX_W_0F73_R_2_P_2,
	EVEX_W_0F73_R_6_P_2, EVEX_W_0F76_P_2, EVEX_W_0F78_P_0,
	EVEX_W_0F79_P_0, EVEX_W_0F7A_P_1, EVEX_W_0F7A_P_3, EVEX_W_0F7B_P_1,
	EVEX_W_0F7B_P_3, EVEX_W_0F7E_P_1, EVEX_W_0F7E_P_2, EVEX_W_0F7F_P_1,
	EVEX_W_0F7F_P_2, EVEX_W_0FC2_P_0, EVEX_W_0FC2_P_1, EVEX_W_0FC2_P_2,
	EVEX_W_0FC2_P_3, EVEX_W_0FC6_P_0, EVEX_W_0FC6_P_2, EVEX_W_0FD2_P_2,
	EVEX_W_0FD3_P_2, EVEX_W_0FD4_P_2, EVEX_W_0FD6_P_2, EVEX_W_0FE6_P_1,
	EVEX_W_0FE6_P_2, EVEX_W_0FE6_P_3, EVEX_W_0FE7_P_2, EVEX_W_0FF2_P_2,
	EVEX_W_0FF3_P_2, EVEX_W_0FF4_P_2, EVEX_W_0FFA_P_2, EVEX_W_0FFB_P_2,
	EVEX_W_0FFE_P_2, EVEX_W_0F380C_P_2, EVEX_W_0F380D_P_2,
	EVEX_W_0F3811_P_1, EVEX_W_0F3812_P_1, EVEX_W_0F3813_P_1,
	EVEX_W_0F3813_P_2, EVEX_W_0F3814_P_1, EVEX_W_0F3815_P_1,
	EVEX_W_0F3818_P_2, EVEX_W_0F3819_P_2, EVEX_W_0F381A_P_2,
	EVEX_W_0F381B_P_2, EVEX_W_0F381E_P_2, EVEX_W_0F381F_P_2,
	EVEX_W_0F3821_P_1, EVEX_W_0F3822_P_1, EVEX_W_0F3823_P_1,
	EVEX_W_0F3824_P_1, EVEX_W_0F3825_P_1, EVEX_W_0F3825_P_2,
	EVEX_W_0F3828_P_2, EVEX_W_0F3829_P_2, EVEX_W_0F382A_P_1,
	EVEX_W_0F382A_P_2, EVEX_W_0F3831_P_1, EVEX_W_0F3832_P_1,
	EVEX_W_0F3833_P_1, EVEX_W_0F3834_P_1, EVEX_W_0F3835_P_1,
	EVEX_W_0F3835_P_2, EVEX_W_0F3837_P_2, EVEX_W_0F383A_P_1,
	EVEX_W_0F3840_P_2, EVEX_W_0F3858_P_2, EVEX_W_0F3859_P_2,
	EVEX_W_0F385A_P_2, EVEX_W_0F385B_P_2, EVEX_W_0F3891_P_2,
	EVEX_W_0F3893_P_2, EVEX_W_0F38A1_P_2, EVEX_W_0F38A3_P_2,
	EVEX_W_0F38C7_R_1_P_2, EVEX_W_0F38C7_R_2_P_2, EVEX_W_0F38C7_R_5_P_2,
	EVEX_W_0F38C7_R_6_P_2, EVEX_W_0F3A00_P_2, EVEX_W_0F3A01_P_2,
	EVEX_W_0F3A04_P_2, EVEX_W_0F3A05_P_2, EVEX_W_0F3A08_P_2,
	EVEX_W_0F3A09_P_2, EVEX_W_0F3A0A_P_2, EVEX_W_0F3A0B_P_2,
	EVEX_W_0F3A18_P_2, EVEX_W_0F3A19_P_2, EVEX_W_0F3A1A_P_2,
	EVEX_W_0F3A1B_P_2, EVEX_W_0F3A1D_P_2, EVEX_W_0F3A21_P_2,
	EVEX_W_0F3A23_P_2, EVEX_W_0F3A38_P_2, EVEX_W_0F3A39_P_2,
	EVEX_W_0F3A3A_P_2, EVEX_W_0F3A3B_P_2, EVEX_W_0F3A43_P_2.
	(struct vex): Add fields evex, r, v, mask_register_specifier,
	zeroing, ll, b.
	(intel_names_xmm): Add upper 16 registers.
	(att_names_xmm): Ditto.
	(intel_names_ymm): Ditto.
	(att_names_ymm): Ditto.
	(names_zmm): New.
	(intel_names_zmm): Ditto.
	(att_names_zmm): Ditto.
	(names_mask): Ditto.
	(intel_names_mask): Ditto.
	(att_names_mask): Ditto.
	(names_rounding): Ditto.
	(names_broadcast): Ditto.
	(x86_64_table): Add escape to evex-table.
	(reg_table): Include reg_table evex-entries from
	i386-dis-evex.h.  Fix prefetchwt1 instruction.
	(prefix_table): Add entries for new instructions.
	(vex_table): Ditto.
	(vex_len_table): Ditto.
	(vex_w_table): Ditto.
	(mod_table): Ditto.
	(get_valid_dis386): Properly handle new instructions.
	(print_insn): Handle zmm and mask registers, print mask operand.
	(intel_operand_size): Support EVEX, new modes and sizes.
	(OP_E_register): Handle new modes.
	(OP_E_memory): Ditto.
	(OP_G): Ditto.
	(OP_XMM): Ditto.
	(OP_EX): Ditto.
	(OP_VEX): Ditto.
	* i386-gen.c (cpu_flag_init): Update CPU_ANY_SSE_FLAGS and
	CPU_ANY_AVX_FLAGS.  Add CPU_AVX512F_FLAGS, CPU_AVX512CD_FLAGS,
	CPU_AVX512ER_FLAGS and CPU_AVX512PF_FLAGS.
	(cpu_flags): Add CpuAVX512F, CpuAVX512CD, CpuAVX512ER,
	CpuAVX512PF and CpuVREX.
	(operand_type_init): Add OPERAND_TYPE_REGZMM,
	OPERAND_TYPE_REGMASK and OPERAND_TYPE_VEC_DISP8.
	(opcode_modifiers): Add EVex, Masking, VecESize, Broadcast,
	StaticRounding, SAE, Disp8MemShift, NoDefMask.
	(operand_types): Add RegZMM, RegMask, Vec_Disp8, Zmmword.
	* i386-init.h: Regenerate.
	* i386-opc.h (CpuAVX512F): New.
	(CpuAVX512CD): New.
	(CpuAVX512ER): New.
	(CpuAVX512PF): New.
	(CpuVREX): New.
	(i386_cpu_flags): Add cpuavx512f, cpuavx512cd, cpuavx512er,
	cpuavx512pf and cpuvrex fields.
	(VecSIB): Add VecSIB512.
	(EVex): New.
	(Masking): New.
	(VecESize): New.
	(Broadcast): New.
	(StaticRounding): New.
	(SAE): New.
	(Disp8MemShift): New.
	(NoDefMask): New.
	(i386_opcode_modifier): Add evex, masking, vecesize, broadcast,
	staticrounding, sae, disp8memshift and nodefmask.
	(RegZMM): New.
	(Zmmword): Ditto.
	(Vec_Disp8): Ditto.
	(i386_operand_type): Add regzmm, regmask, zmmword and vec_disp8
	fields.
	(RegVRex): New.
	* i386-opc.tbl: Add AVX512 instructions.
	* i386-reg.tbl: Add 16 upper XMM and YMM registers, 32 new ZMM
	registers, mask registers.
	* i386-tbl.h: Regenerate.
2013-07-26 17:20:25 +00:00
Nick Clifton 1ae40aa4df PR binutils/15745
* readelf.c (get_unwind_section_word): Whilst searching for a
	reloc section associated with an unwind section, check the type as
	well as the section number.
2013-07-19 10:44:01 +00:00