When the sim is built w/out the bfroms, we end up passing a length of 0 when
mapping the rom region which the core sim code rejects. So add an alias field
equal to the length to avoid that error.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
The latest gdb sim-remote.c really wants a return value from the fetch/store
register functions, so update the Blackfin sim to avoid the warnings/errors.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
The change of include file introduces some new warnings about functions
being used without a prototype. So a few more system includes have been
added to compensate for that.
sim/d10v/ChangeLog:
* interp.c: #include "config.h" instead of "sysdep.h".
Add conditional include of string.h or strings.h, as well as
conditional include of stdlib.h.
This file includes "gdb/callback.h", which includes "bfd.h", which
itself verifies that "config.h" was included earlier.
sim/erc32/ChangeLog:
* sys.h: Include "config.h".
* wrapper.c: Include config.h before system header files.
* callback.c: Include config.h before system header files.
* cgen-trace.c: Likewise.
* cgen-utils.c: Likewise.
* gentmap.c: Likewise.
* sim-if.c: Include config.h before system header files.
* compile.c: Include config.h before system header files.
* sim-main.h: Likewise.
* gdb-if.c: Include config.h before system header files.
* load.c: Likewise.
* syscalls.c: Likewise.
* trace.c: Likewise.
* interp.c: Include config.h before system header files.
Newer BF54x parts feature an updated GPIO block where all the interrupt
handling is split off, so create a new model for the pin interrupts.
This is missing the port forwarding aspects, but at least the register
interface should be there.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
These are randomly generated tests to track down issues in ASTAT
handling with shift insns.
Signed-off-by: Robin Getz <robin.getz@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
More ASTAT directed fixes, but this time at the dsp32shift insns.
Signed-off-by: Robin Getz <robin.getz@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
This improves some of the arithmetic shifts to better match the
hardware (especially wrt ASTAT behavior). We hit areas where
the published documentation is thin so we have to rely on tests
run on the hardware to figure out how things should behave.
Signed-off-by: Robin Getz <robin.getz@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Now that we check for valid sub-insns in parallel insns, we can
enable the tests that explicitly validate those code paths.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Now that we keep track of the exact parallel insn slot we're in, we can
make sure that the current insn being decoded is valid for that slot.
This brings us much closer to the hardware in flagging invalid parallel
insn combinations.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Some insns need to know which slot they're in to determine whether they
are valid. So add an enum for each slot, and check that rather than the
overall insn len. This makes tracking things in the code much clearer.
However, this code is functionally the same, so a follow up patch will
leverage this more to properly flag invalid parallel insn combos.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Now that we have the se_all helpers together and working, we can see
what pieces are duplicated in each test and unify them in the common
header file.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
The amod1 helper includes a leading space so it can expand into the empty
string when need be, which means the caller need not add spacing itself.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Parallel insns can only do one 32bit, then two 16bits. So if we see
a 2nd 32bit insn after the first 32bit in a parallel insn, abort.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
This fix the build time warning:
warning: format not a string literal, argument types not checked [-Wformat-nonliteral]
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
machs.c: In function 'bfin_model_cpu_init':
machs.c:1657:1: warning: 'bfrom' may be used uninitialized
in this function [-Wuninitialized]
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Fix warning about mixing decls and code by moving auxvt_size decl
down to the scope where it is used.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
The current code triggers a warning:
dv-bfin_sic.c: In function 'bfin_sic_finish':
dv-bfin_sic.c:930:41: warning: operation on 'sic-><U78e8>.bf54x.iwr1'
may be undefined [-Wsequence-point]
This points out the IWR2 register was not being setup because of a typo.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
The place where these funcs get defined do not include the header that
declares their prototypes. Add that to fix -Wmissing-prototypes:
devices.c:59:1: warning: no previous prototype for 'dv_bfin_mmr_invalid'
devices.c:66:1: warning: no previous prototype for 'dv_bfin_mmr_require'
devices.c:99:1: warning: no previous prototype for 'dv_bfin_mmr_check'
devices.c:159:14: warning: no previous prototype for 'dv_get_bus_num'
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
The common code has a sim_core_trans_addr() helper that only the m32r code
uses. Move the inline extern in the m32r code to the proper common header.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Similar to logic in the cris exp, attempt a simple compile and if it fails
(presumably due to the compiler being broken), skip all the related tests.
Fortunately, most tests (~600 out of ~800) are pure assembly, so people should
still get pretty good coverage.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
